1 /* 2 * Copyright 2012-14 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef DC_STREAM_H_ 27 #define DC_STREAM_H_ 28 29 #include "dc_types.h" 30 #include "grph_object_defs.h" 31 32 /******************************************************************************* 33 * Stream Interfaces 34 ******************************************************************************/ 35 struct timing_sync_info { 36 int group_id; 37 int group_size; 38 bool master; 39 }; 40 41 struct dc_stream_status { 42 int primary_otg_inst; 43 int stream_enc_inst; 44 int plane_count; 45 int audio_inst; 46 struct timing_sync_info timing_sync_info; 47 struct dc_plane_state *plane_states[MAX_SURFACE_NUM]; 48 bool is_abm_supported; 49 }; 50 51 // TODO: References to this needs to be removed.. 52 struct freesync_context { 53 bool dummy; 54 }; 55 56 enum hubp_dmdata_mode { 57 DMDATA_SW_MODE, 58 DMDATA_HW_MODE 59 }; 60 61 struct dc_dmdata_attributes { 62 /* Specifies whether dynamic meta data will be updated by software 63 * or has to be fetched by hardware (DMA mode) 64 */ 65 enum hubp_dmdata_mode dmdata_mode; 66 /* Specifies if current dynamic meta data is to be used only for the current frame */ 67 bool dmdata_repeat; 68 /* Specifies the size of Dynamic Metadata surface in byte. Size of 0 means no Dynamic metadata is fetched */ 69 uint32_t dmdata_size; 70 /* Specifies if a new dynamic meta data should be fetched for an upcoming frame */ 71 bool dmdata_updated; 72 /* If hardware mode is used, the base address where DMDATA surface is located */ 73 PHYSICAL_ADDRESS_LOC address; 74 /* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */ 75 bool dmdata_qos_mode; 76 /* If qos_mode = 1, this is the QOS value to be used: */ 77 uint32_t dmdata_qos_level; 78 /* Specifies the value in unit of REFCLK cycles to be added to the 79 * current time to produce the Amortized deadline for Dynamic Metadata chunk request 80 */ 81 uint32_t dmdata_dl_delta; 82 /* An unbounded array of uint32s, represents software dmdata to be loaded */ 83 uint32_t *dmdata_sw_data; 84 }; 85 86 struct dc_writeback_info { 87 bool wb_enabled; 88 int dwb_pipe_inst; 89 struct dc_dwb_params dwb_params; 90 struct mcif_buf_params mcif_buf_params; 91 struct mcif_warmup_params mcif_warmup_params; 92 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */ 93 struct dc_plane_state *writeback_source_plane; 94 /* source MPCC instance. for use by internally by dc */ 95 int mpcc_inst; 96 }; 97 98 struct dc_writeback_update { 99 unsigned int num_wb_info; 100 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 101 }; 102 103 enum vertical_interrupt_ref_point { 104 START_V_UPDATE = 0, 105 START_V_SYNC, 106 INVALID_POINT 107 108 //For now, only v_update interrupt is used. 109 //START_V_BLANK, 110 //START_V_ACTIVE 111 }; 112 113 struct periodic_interrupt_config { 114 enum vertical_interrupt_ref_point ref_point; 115 int lines_offset; 116 }; 117 118 struct dc_mst_stream_bw_update { 119 bool is_increase; // is bandwidth reduced or increased 120 uint32_t mst_stream_bw; // new mst bandwidth in kbps 121 }; 122 123 union stream_update_flags { 124 struct { 125 uint32_t scaling:1; 126 uint32_t out_tf:1; 127 uint32_t out_csc:1; 128 uint32_t abm_level:1; 129 uint32_t dpms_off:1; 130 uint32_t gamut_remap:1; 131 uint32_t wb_update:1; 132 uint32_t dsc_changed : 1; 133 uint32_t mst_bw : 1; 134 uint32_t crtc_timing_adjust : 1; 135 } bits; 136 137 uint32_t raw; 138 }; 139 140 struct test_pattern { 141 enum dp_test_pattern type; 142 enum dp_test_pattern_color_space color_space; 143 struct link_training_settings const *p_link_settings; 144 unsigned char const *p_custom_pattern; 145 unsigned int cust_pattern_size; 146 }; 147 148 #define SUBVP_DRR_MARGIN_US 500 // 500us for DRR margin (SubVP + DRR) 149 150 enum mall_stream_type { 151 SUBVP_NONE, // subvp not in use 152 SUBVP_MAIN, // subvp in use, this stream is main stream 153 SUBVP_PHANTOM, // subvp in use, this stream is a phantom stream 154 }; 155 156 struct mall_stream_config { 157 /* MALL stream config to indicate if the stream is phantom or not. 158 * We will use a phantom stream to indicate that the pipe is phantom. 159 */ 160 enum mall_stream_type type; 161 struct dc_stream_state *paired_stream; // master / slave stream 162 }; 163 164 struct dc_stream_state { 165 // sink is deprecated, new code should not reference 166 // this pointer 167 struct dc_sink *sink; 168 169 struct dc_link *link; 170 /* For dynamic link encoder assignment, update the link encoder assigned to 171 * a stream via the volatile dc_state rather than the static dc_link. 172 */ 173 struct link_encoder *link_enc; 174 struct dc_panel_patch sink_patches; 175 union display_content_support content_support; 176 struct dc_crtc_timing timing; 177 struct dc_crtc_timing_adjust adjust; 178 struct dc_info_packet vrr_infopacket; 179 struct dc_info_packet vsc_infopacket; 180 struct dc_info_packet vsp_infopacket; 181 struct dc_info_packet hfvsif_infopacket; 182 struct dc_info_packet vtem_infopacket; 183 uint8_t dsc_packed_pps[128]; 184 struct rect src; /* composition area */ 185 struct rect dst; /* stream addressable area */ 186 187 // TODO: References to this needs to be removed.. 188 struct freesync_context freesync_ctx; 189 190 struct audio_info audio_info; 191 192 struct dc_info_packet hdr_static_metadata; 193 PHYSICAL_ADDRESS_LOC dmdata_address; 194 bool use_dynamic_meta; 195 196 struct dc_transfer_func *out_transfer_func; 197 struct colorspace_transform gamut_remap_matrix; 198 struct dc_csc_transform csc_color_matrix; 199 200 enum dc_color_space output_color_space; 201 enum dc_dither_option dither_option; 202 203 enum view_3d_format view_format; 204 205 bool use_vsc_sdp_for_colorimetry; 206 bool ignore_msa_timing_param; 207 208 bool allow_freesync; 209 bool vrr_active_variable; 210 bool freesync_on_desktop; 211 212 bool converter_disable_audio; 213 uint8_t qs_bit; 214 uint8_t qy_bit; 215 216 /* TODO: custom INFO packets */ 217 /* TODO: ABM info (DMCU) */ 218 /* TODO: CEA VIC */ 219 220 /* DMCU info */ 221 unsigned int abm_level; 222 223 struct periodic_interrupt_config periodic_interrupt0; 224 struct periodic_interrupt_config periodic_interrupt1; 225 226 /* from core_stream struct */ 227 struct dc_context *ctx; 228 229 /* used by DCP and FMT */ 230 struct bit_depth_reduction_params bit_depth_params; 231 struct clamping_and_pixel_encoding_params clamping; 232 233 int phy_pix_clk; 234 enum signal_type signal; 235 bool dpms_off; 236 237 void *dm_stream_context; 238 239 struct dc_cursor_attributes cursor_attributes; 240 struct dc_cursor_position cursor_position; 241 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode 242 243 /* from stream struct */ 244 struct kref refcount; 245 246 struct crtc_trigger_info triggered_crtc_reset; 247 248 /* writeback */ 249 unsigned int num_wb_info; 250 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 251 const struct dc_transfer_func *func_shaper; 252 const struct dc_3dlut *lut3d_func; 253 /* Computed state bits */ 254 bool mode_changed : 1; 255 256 /* Output from DC when stream state is committed or altered 257 * DC may only access these values during: 258 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams 259 * values may not change outside of those calls 260 */ 261 struct { 262 // For interrupt management, some hardware instance 263 // offsets need to be exposed to DM 264 uint8_t otg_offset; 265 } out; 266 267 bool apply_edp_fast_boot_optimization; 268 bool apply_seamless_boot_optimization; 269 uint32_t apply_boot_odm_mode; 270 271 uint32_t stream_id; 272 273 struct test_pattern test_pattern; 274 union stream_update_flags update_flags; 275 276 bool has_non_synchronizable_pclk; 277 bool vblank_synchronized; 278 struct mall_stream_config mall_stream_config; 279 280 bool odm_2to1_policy_applied; 281 }; 282 283 #define ABM_LEVEL_IMMEDIATE_DISABLE 255 284 285 struct dc_stream_update { 286 struct dc_stream_state *stream; 287 288 struct rect src; 289 struct rect dst; 290 struct dc_transfer_func *out_transfer_func; 291 struct dc_info_packet *hdr_static_metadata; 292 unsigned int *abm_level; 293 294 struct periodic_interrupt_config *periodic_interrupt0; 295 struct periodic_interrupt_config *periodic_interrupt1; 296 297 struct dc_info_packet *vrr_infopacket; 298 struct dc_info_packet *vsc_infopacket; 299 struct dc_info_packet *vsp_infopacket; 300 struct dc_info_packet *hfvsif_infopacket; 301 struct dc_info_packet *vtem_infopacket; 302 bool *dpms_off; 303 bool integer_scaling_update; 304 bool *allow_freesync; 305 bool *vrr_active_variable; 306 307 struct colorspace_transform *gamut_remap; 308 enum dc_color_space *output_color_space; 309 enum dc_dither_option *dither_option; 310 311 struct dc_csc_transform *output_csc_transform; 312 313 struct dc_writeback_update *wb_update; 314 struct dc_dsc_config *dsc_config; 315 struct dc_mst_stream_bw_update *mst_bw_update; 316 struct dc_transfer_func *func_shaper; 317 struct dc_3dlut *lut3d_func; 318 319 struct test_pattern *pending_test_pattern; 320 struct dc_crtc_timing_adjust *crtc_timing_adjust; 321 }; 322 323 bool dc_is_stream_unchanged( 324 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 325 bool dc_is_stream_scaling_unchanged( 326 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 327 328 /* 329 * Setup stream attributes if no stream updates are provided 330 * there will be no impact on the stream parameters 331 * 332 * Set up surface attributes and associate to a stream 333 * The surfaces parameter is an absolute set of all surface active for the stream. 334 * If no surfaces are provided, the stream will be blanked; no memory read. 335 * Any flip related attribute changes must be done through this interface. 336 * 337 * After this call: 338 * Surfaces attributes are programmed and configured to be composed into stream. 339 * This does not trigger a flip. No surface address is programmed. 340 * 341 */ 342 bool dc_update_planes_and_stream(struct dc *dc, 343 struct dc_surface_update *surface_updates, int surface_count, 344 struct dc_stream_state *dc_stream, 345 struct dc_stream_update *stream_update); 346 347 /* 348 * Set up surface attributes and associate to a stream 349 * The surfaces parameter is an absolute set of all surface active for the stream. 350 * If no surfaces are provided, the stream will be blanked; no memory read. 351 * Any flip related attribute changes must be done through this interface. 352 * 353 * After this call: 354 * Surfaces attributes are programmed and configured to be composed into stream. 355 * This does not trigger a flip. No surface address is programmed. 356 */ 357 void dc_commit_updates_for_stream(struct dc *dc, 358 struct dc_surface_update *srf_updates, 359 int surface_count, 360 struct dc_stream_state *stream, 361 struct dc_stream_update *stream_update, 362 struct dc_state *state); 363 /* 364 * Log the current stream state. 365 */ 366 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream); 367 368 uint8_t dc_get_current_stream_count(struct dc *dc); 369 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i); 370 371 /* 372 * Return the current frame counter. 373 */ 374 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream); 375 376 /* 377 * Send dp sdp message. 378 */ 379 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream, 380 const uint8_t *custom_sdp_message, 381 unsigned int sdp_message_size); 382 383 /* TODO: Return parsed values rather than direct register read 384 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos) 385 * being refactored properly to be dce-specific 386 */ 387 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 388 uint32_t *v_blank_start, 389 uint32_t *v_blank_end, 390 uint32_t *h_position, 391 uint32_t *v_position); 392 393 enum dc_status dc_add_stream_to_ctx( 394 struct dc *dc, 395 struct dc_state *new_ctx, 396 struct dc_stream_state *stream); 397 398 enum dc_status dc_remove_stream_from_ctx( 399 struct dc *dc, 400 struct dc_state *new_ctx, 401 struct dc_stream_state *stream); 402 403 404 bool dc_add_plane_to_context( 405 const struct dc *dc, 406 struct dc_stream_state *stream, 407 struct dc_plane_state *plane_state, 408 struct dc_state *context); 409 410 bool dc_remove_plane_from_context( 411 const struct dc *dc, 412 struct dc_stream_state *stream, 413 struct dc_plane_state *plane_state, 414 struct dc_state *context); 415 416 bool dc_rem_all_planes_for_stream( 417 const struct dc *dc, 418 struct dc_stream_state *stream, 419 struct dc_state *context); 420 421 bool dc_add_all_planes_for_stream( 422 const struct dc *dc, 423 struct dc_stream_state *stream, 424 struct dc_plane_state * const *plane_states, 425 int plane_count, 426 struct dc_state *context); 427 428 bool dc_stream_add_writeback(struct dc *dc, 429 struct dc_stream_state *stream, 430 struct dc_writeback_info *wb_info); 431 432 bool dc_stream_remove_writeback(struct dc *dc, 433 struct dc_stream_state *stream, 434 uint32_t dwb_pipe_inst); 435 436 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc, 437 struct dc_state *state, 438 struct dc_stream_state *stream); 439 440 bool dc_stream_warmup_writeback(struct dc *dc, 441 int num_dwb, 442 struct dc_writeback_info *wb_info); 443 444 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream); 445 446 bool dc_stream_set_dynamic_metadata(struct dc *dc, 447 struct dc_stream_state *stream, 448 struct dc_dmdata_attributes *dmdata_attr); 449 450 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream); 451 452 /* 453 * Set up streams and links associated to drive sinks 454 * The streams parameter is an absolute set of all active streams. 455 * 456 * After this call: 457 * Phy, Encoder, Timing Generator are programmed and enabled. 458 * New streams are enabled with blank stream; no memory read. 459 */ 460 /* 461 * Enable stereo when commit_streams is not required, 462 * for example, frame alternate. 463 */ 464 void dc_enable_stereo( 465 struct dc *dc, 466 struct dc_state *context, 467 struct dc_stream_state *streams[], 468 uint8_t stream_count); 469 470 /* Triggers multi-stream synchronization. */ 471 void dc_trigger_sync(struct dc *dc, struct dc_state *context); 472 473 enum surface_update_type dc_check_update_surfaces_for_stream( 474 struct dc *dc, 475 struct dc_surface_update *updates, 476 int surface_count, 477 struct dc_stream_update *stream_update, 478 const struct dc_stream_status *stream_status); 479 480 /** 481 * Create a new default stream for the requested sink 482 */ 483 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink); 484 485 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream); 486 487 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink); 488 489 void dc_stream_retain(struct dc_stream_state *dc_stream); 490 void dc_stream_release(struct dc_stream_state *dc_stream); 491 492 struct dc_stream_status *dc_stream_get_status_from_state( 493 struct dc_state *state, 494 struct dc_stream_state *stream); 495 struct dc_stream_status *dc_stream_get_status( 496 struct dc_stream_state *dc_stream); 497 498 #ifndef TRIM_FSFT 499 bool dc_optimize_timing_for_fsft( 500 struct dc_stream_state *pStream, 501 unsigned int max_input_rate_in_khz); 502 #endif 503 504 /******************************************************************************* 505 * Cursor interfaces - To manages the cursor within a stream 506 ******************************************************************************/ 507 /* TODO: Deprecated once we switch to dc_set_cursor_position */ 508 bool dc_stream_set_cursor_attributes( 509 struct dc_stream_state *stream, 510 const struct dc_cursor_attributes *attributes); 511 512 bool dc_stream_set_cursor_position( 513 struct dc_stream_state *stream, 514 const struct dc_cursor_position *position); 515 516 517 bool dc_stream_adjust_vmin_vmax(struct dc *dc, 518 struct dc_stream_state *stream, 519 struct dc_crtc_timing_adjust *adjust); 520 521 bool dc_stream_get_last_used_drr_vtotal(struct dc *dc, 522 struct dc_stream_state *stream, 523 uint32_t *refresh_rate); 524 525 bool dc_stream_get_crtc_position(struct dc *dc, 526 struct dc_stream_state **stream, 527 int num_streams, 528 unsigned int *v_pos, 529 unsigned int *nom_v_pos); 530 531 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 532 bool dc_stream_forward_dmcu_crc_window(struct dc *dc, struct dc_stream_state *stream, 533 struct crc_params *crc_window); 534 bool dc_stream_stop_dmcu_crc_win_update(struct dc *dc, 535 struct dc_stream_state *stream); 536 #endif 537 538 bool dc_stream_configure_crc(struct dc *dc, 539 struct dc_stream_state *stream, 540 struct crc_params *crc_window, 541 bool enable, 542 bool continuous); 543 544 bool dc_stream_get_crc(struct dc *dc, 545 struct dc_stream_state *stream, 546 uint32_t *r_cr, 547 uint32_t *g_y, 548 uint32_t *b_cb); 549 550 void dc_stream_set_static_screen_params(struct dc *dc, 551 struct dc_stream_state **stream, 552 int num_streams, 553 const struct dc_static_screen_params *params); 554 555 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream, 556 enum dc_dynamic_expansion option); 557 558 void dc_stream_set_dither_option(struct dc_stream_state *stream, 559 enum dc_dither_option option); 560 561 bool dc_stream_set_gamut_remap(struct dc *dc, 562 const struct dc_stream_state *stream); 563 564 bool dc_stream_program_csc_matrix(struct dc *dc, 565 struct dc_stream_state *stream); 566 567 bool dc_stream_get_crtc_position(struct dc *dc, 568 struct dc_stream_state **stream, 569 int num_streams, 570 unsigned int *v_pos, 571 unsigned int *nom_v_pos); 572 573 struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream); 574 575 void dc_dmub_update_dirty_rect(struct dc *dc, 576 int surface_count, 577 struct dc_stream_state *stream, 578 struct dc_surface_update *srf_updates, 579 struct dc_state *context); 580 #endif /* DC_STREAM_H_ */ 581