1a98cdd8cSWenjing Liu /* 2a98cdd8cSWenjing Liu * Copyright 2022 Advanced Micro Devices, Inc. 3a98cdd8cSWenjing Liu * 4a98cdd8cSWenjing Liu * Permission is hereby granted, free of charge, to any person obtaining a 5a98cdd8cSWenjing Liu * copy of this software and associated documentation files (the "Software"), 6a98cdd8cSWenjing Liu * to deal in the Software without restriction, including without limitation 7a98cdd8cSWenjing Liu * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8a98cdd8cSWenjing Liu * and/or sell copies of the Software, and to permit persons to whom the 9a98cdd8cSWenjing Liu * Software is furnished to do so, subject to the following conditions: 10a98cdd8cSWenjing Liu * 11a98cdd8cSWenjing Liu * The above copyright notice and this permission notice shall be included in 12a98cdd8cSWenjing Liu * all copies or substantial portions of the Software. 13a98cdd8cSWenjing Liu * 14a98cdd8cSWenjing Liu * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15a98cdd8cSWenjing Liu * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16a98cdd8cSWenjing Liu * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17a98cdd8cSWenjing Liu * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18a98cdd8cSWenjing Liu * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19a98cdd8cSWenjing Liu * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20a98cdd8cSWenjing Liu * OTHER DEALINGS IN THE SOFTWARE. 21a98cdd8cSWenjing Liu * 22a98cdd8cSWenjing Liu * Authors: AMD 23a98cdd8cSWenjing Liu * 24a98cdd8cSWenjing Liu */ 25a98cdd8cSWenjing Liu 26a98cdd8cSWenjing Liu #ifndef DC_HDMI_TYPES_H 27a98cdd8cSWenjing Liu #define DC_HDMI_TYPES_H 28a98cdd8cSWenjing Liu 29a98cdd8cSWenjing Liu #include "os_types.h" 30a98cdd8cSWenjing Liu 31a98cdd8cSWenjing Liu /* Address range from 0x00 to 0x1F.*/ 32a98cdd8cSWenjing Liu #define DP_ADAPTOR_TYPE2_SIZE 0x20 33a98cdd8cSWenjing Liu #define DP_ADAPTOR_TYPE2_REG_ID 0x10 34a98cdd8cSWenjing Liu #define DP_ADAPTOR_TYPE2_REG_MAX_TMDS_CLK 0x1D 35a98cdd8cSWenjing Liu /* Identifies adaptor as Dual-mode adaptor */ 36a98cdd8cSWenjing Liu #define DP_ADAPTOR_TYPE2_ID 0xA0 37a98cdd8cSWenjing Liu /* MHz*/ 38a98cdd8cSWenjing Liu #define DP_ADAPTOR_TYPE2_MAX_TMDS_CLK 600 39a98cdd8cSWenjing Liu /* MHz*/ 40a98cdd8cSWenjing Liu #define DP_ADAPTOR_TYPE2_MIN_TMDS_CLK 25 41a98cdd8cSWenjing Liu /* kHZ*/ 42a98cdd8cSWenjing Liu #define DP_ADAPTOR_DVI_MAX_TMDS_CLK 165000 43a98cdd8cSWenjing Liu /* kHZ*/ 44a98cdd8cSWenjing Liu #define DP_ADAPTOR_HDMI_SAFE_MAX_TMDS_CLK 165000 45a98cdd8cSWenjing Liu 46a98cdd8cSWenjing Liu struct dp_hdmi_dongle_signature_data { 47a98cdd8cSWenjing Liu int8_t id[15];/* "DP-HDMI ADAPTOR"*/ 48a98cdd8cSWenjing Liu uint8_t eot;/* end of transmition '\x4' */ 49a98cdd8cSWenjing Liu }; 50a98cdd8cSWenjing Liu 51a98cdd8cSWenjing Liu /* DP-HDMI dongle slave address for retrieving dongle signature*/ 52a98cdd8cSWenjing Liu #define DP_HDMI_DONGLE_ADDRESS 0x40 53a98cdd8cSWenjing Liu #define DP_HDMI_DONGLE_SIGNATURE_EOT 0x04 54a98cdd8cSWenjing Liu 55a98cdd8cSWenjing Liu 56a98cdd8cSWenjing Liu /* SCDC Address defines (HDMI 2.0)*/ 57a98cdd8cSWenjing Liu #define HDMI_SCDC_WRITE_UPDATE_0_ARRAY 3 58a98cdd8cSWenjing Liu #define HDMI_SCDC_ADDRESS 0x54 59a98cdd8cSWenjing Liu #define HDMI_SCDC_SINK_VERSION 0x01 60a98cdd8cSWenjing Liu #define HDMI_SCDC_SOURCE_VERSION 0x02 61a98cdd8cSWenjing Liu #define HDMI_SCDC_UPDATE_0 0x10 62a98cdd8cSWenjing Liu #define HDMI_SCDC_TMDS_CONFIG 0x20 63a98cdd8cSWenjing Liu #define HDMI_SCDC_SCRAMBLER_STATUS 0x21 64a98cdd8cSWenjing Liu #define HDMI_SCDC_CONFIG_0 0x30 65a98cdd8cSWenjing Liu #define HDMI_SCDC_CONFIG_1 0x31 66a98cdd8cSWenjing Liu #define HDMI_SCDC_SOURCE_TEST_REQ 0x35 67a98cdd8cSWenjing Liu #define HDMI_SCDC_STATUS_FLAGS 0x40 68a98cdd8cSWenjing Liu #define HDMI_SCDC_ERR_DETECT 0x50 69a98cdd8cSWenjing Liu #define HDMI_SCDC_TEST_CONFIG 0xC0 70a98cdd8cSWenjing Liu 71*71d7e890SLeo (Hanghong) Ma #define HDMI_SCDC_MANUFACTURER_OUI 0xD0 72*71d7e890SLeo (Hanghong) Ma #define HDMI_SCDC_DEVICE_ID 0xDB 73*71d7e890SLeo (Hanghong) Ma 74a98cdd8cSWenjing Liu union hdmi_scdc_update_read_data { 75a98cdd8cSWenjing Liu uint8_t byte[2]; 76a98cdd8cSWenjing Liu struct { 77a98cdd8cSWenjing Liu uint8_t STATUS_UPDATE:1; 78a98cdd8cSWenjing Liu uint8_t CED_UPDATE:1; 79a98cdd8cSWenjing Liu uint8_t RR_TEST:1; 80a98cdd8cSWenjing Liu uint8_t RESERVED:5; 81a98cdd8cSWenjing Liu uint8_t RESERVED2:8; 82a98cdd8cSWenjing Liu } fields; 83a98cdd8cSWenjing Liu }; 84a98cdd8cSWenjing Liu 85a98cdd8cSWenjing Liu union hdmi_scdc_status_flags_data { 86a98cdd8cSWenjing Liu uint8_t byte; 87a98cdd8cSWenjing Liu struct { 88a98cdd8cSWenjing Liu uint8_t CLOCK_DETECTED:1; 89a98cdd8cSWenjing Liu uint8_t CH0_LOCKED:1; 90a98cdd8cSWenjing Liu uint8_t CH1_LOCKED:1; 91a98cdd8cSWenjing Liu uint8_t CH2_LOCKED:1; 92a98cdd8cSWenjing Liu uint8_t RESERVED:4; 93a98cdd8cSWenjing Liu } fields; 94a98cdd8cSWenjing Liu }; 95a98cdd8cSWenjing Liu 96a98cdd8cSWenjing Liu union hdmi_scdc_ced_data { 97a98cdd8cSWenjing Liu uint8_t byte[11]; 98a98cdd8cSWenjing Liu struct { 99a98cdd8cSWenjing Liu uint8_t CH0_8LOW:8; 100a98cdd8cSWenjing Liu uint8_t CH0_7HIGH:7; 101a98cdd8cSWenjing Liu uint8_t CH0_VALID:1; 102a98cdd8cSWenjing Liu uint8_t CH1_8LOW:8; 103a98cdd8cSWenjing Liu uint8_t CH1_7HIGH:7; 104a98cdd8cSWenjing Liu uint8_t CH1_VALID:1; 105a98cdd8cSWenjing Liu uint8_t CH2_8LOW:8; 106a98cdd8cSWenjing Liu uint8_t CH2_7HIGH:7; 107a98cdd8cSWenjing Liu uint8_t CH2_VALID:1; 108a98cdd8cSWenjing Liu uint8_t CHECKSUM:8; 109a98cdd8cSWenjing Liu uint8_t RESERVED:8; 110a98cdd8cSWenjing Liu uint8_t RESERVED2:8; 111a98cdd8cSWenjing Liu uint8_t RESERVED3:8; 112a98cdd8cSWenjing Liu uint8_t RESERVED4:4; 113a98cdd8cSWenjing Liu } fields; 114a98cdd8cSWenjing Liu }; 115a98cdd8cSWenjing Liu 116*71d7e890SLeo (Hanghong) Ma union hdmi_scdc_manufacturer_OUI_data { 117*71d7e890SLeo (Hanghong) Ma uint8_t byte[3]; 118*71d7e890SLeo (Hanghong) Ma struct { 119*71d7e890SLeo (Hanghong) Ma uint8_t Manufacturer_OUI_1:8; 120*71d7e890SLeo (Hanghong) Ma uint8_t Manufacturer_OUI_2:8; 121*71d7e890SLeo (Hanghong) Ma uint8_t Manufacturer_OUI_3:8; 122*71d7e890SLeo (Hanghong) Ma } fields; 123*71d7e890SLeo (Hanghong) Ma }; 124*71d7e890SLeo (Hanghong) Ma 125*71d7e890SLeo (Hanghong) Ma union hdmi_scdc_device_id_data { 126*71d7e890SLeo (Hanghong) Ma uint8_t byte; 127*71d7e890SLeo (Hanghong) Ma struct { 128*71d7e890SLeo (Hanghong) Ma uint8_t Hardware_Minor_Rev:4; 129*71d7e890SLeo (Hanghong) Ma uint8_t Hardware_Major_Rev:4; 130*71d7e890SLeo (Hanghong) Ma } fields; 131*71d7e890SLeo (Hanghong) Ma }; 132*71d7e890SLeo (Hanghong) Ma 133a98cdd8cSWenjing Liu #endif /* DC_HDMI_TYPES_H */ 134