1 #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT 2 #ifndef DC_DSC_H_ 3 #define DC_DSC_H_ 4 /* 5 * Copyright 2019 Advanced Micro Devices, Inc. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the "Software"), 9 * to deal in the Software without restriction, including without limitation 10 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * and/or sell copies of the Software, and to permit persons to whom the 12 * Software is furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 21 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 23 * OTHER DEALINGS IN THE SOFTWARE. 24 * 25 * Author: AMD 26 */ 27 28 /* put it here temporarily until linux has the new addresses official defined */ 29 /* DP Extended DSC Capabilities */ 30 #define DP_DSC_BRANCH_OVERALL_THROUGHPUT_0 0x0a0 /* DP 1.4a SCR */ 31 #define DP_DSC_BRANCH_OVERALL_THROUGHPUT_1 0x0a1 32 #define DP_DSC_BRANCH_MAX_LINE_WIDTH 0x0a2 33 34 struct dc_dsc_bw_range { 35 uint32_t min_kbps; /* Bandwidth if min_target_bpp_x16 is used */ 36 uint32_t min_target_bpp_x16; 37 uint32_t max_kbps; /* Bandwidth if max_target_bpp_x16 is used */ 38 uint32_t max_target_bpp_x16; 39 uint32_t stream_kbps; /* Uncompressed stream bandwidth */ 40 }; 41 42 43 bool dc_dsc_parse_dsc_dpcd(const uint8_t *dpcd_dsc_basic_data, 44 const uint8_t *dpcd_dsc_ext_data, 45 struct dsc_dec_dpcd_caps *dsc_sink_caps); 46 47 bool dc_dsc_compute_bandwidth_range( 48 const struct dc *dc, 49 const uint32_t min_kbps, 50 const uint32_t max_kbps, 51 const struct dsc_dec_dpcd_caps *dsc_sink_caps, 52 const struct dc_crtc_timing *timing, 53 struct dc_dsc_bw_range *range); 54 55 bool dc_dsc_compute_config( 56 const struct dc *dc, 57 const struct dsc_dec_dpcd_caps *dsc_sink_caps, 58 uint32_t target_bandwidth_kbps, 59 const struct dc_crtc_timing *timing, 60 struct dc_dsc_config *dsc_cfg); 61 #endif 62 #endif 63