xref: /openbmc/linux/drivers/gpu/drm/amd/display/dc/dc.h (revision b10d51f8)
1 /*
2  * Copyright 2012-14 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef DC_INTERFACE_H_
27 #define DC_INTERFACE_H_
28 
29 #include "dc_types.h"
30 #include "grph_object_defs.h"
31 #include "logger_types.h"
32 #include "gpio_types.h"
33 #include "link_service_types.h"
34 
35 #define MAX_SURFACES 3
36 #define MAX_STREAMS 6
37 #define MAX_SINKS_PER_LINK 4
38 
39 /*******************************************************************************
40  * Display Core Interfaces
41  ******************************************************************************/
42 
43 struct dc_caps {
44 	uint32_t max_streams;
45 	uint32_t max_links;
46 	uint32_t max_audios;
47 	uint32_t max_slave_planes;
48 	uint32_t max_downscale_ratio;
49 	uint32_t i2c_speed_in_khz;
50 };
51 
52 
53 struct dc_dcc_surface_param {
54 	enum surface_pixel_format format;
55 	struct dc_size surface_size;
56 	enum dc_scan_direction scan;
57 };
58 
59 struct dc_dcc_setting {
60 	unsigned int max_compressed_blk_size;
61 	unsigned int max_uncompressed_blk_size;
62 	bool independent_64b_blks;
63 };
64 
65 struct dc_surface_dcc_cap {
66 	bool capable;
67 	bool const_color_support;
68 
69 	union {
70 		struct {
71 			struct dc_dcc_setting rgb;
72 		} grph;
73 
74 		struct {
75 			struct dc_dcc_setting luma;
76 			struct dc_dcc_setting chroma;
77 		} video;
78 	};
79 };
80 
81 /* Forward declaration*/
82 struct dc;
83 struct dc_surface;
84 struct validate_context;
85 
86 struct dc_cap_funcs {
87 	int i;
88 };
89 
90 struct dc_stream_funcs {
91 	bool (*adjust_vmin_vmax)(struct dc *dc,
92 			const struct dc_stream **stream,
93 			int num_streams,
94 			int vmin,
95 			int vmax);
96 
97 	void (*stream_update_scaling)(const struct dc *dc,
98 			const struct dc_stream *dc_stream,
99 			const struct rect *src,
100 			const struct rect *dst);
101 	bool (*set_gamut_remap)(struct dc *dc,
102 			const struct dc_stream **stream, int num_streams);
103 	bool (*set_backlight)(struct dc *dc, unsigned int backlight_level,
104 		unsigned int frame_ramp, const struct dc_stream *stream);
105 	bool (*init_dmcu_backlight_settings)(struct dc *dc);
106 	bool (*set_abm_level)(struct dc *dc, unsigned int abm_level);
107 	bool (*set_psr_enable)(struct dc *dc, bool enable);
108 	bool (*setup_psr)(struct dc *dc, const struct dc_stream *stream);
109 };
110 
111 struct link_training_settings;
112 
113 struct dc_link_funcs {
114 	void (*set_drive_settings)(struct dc *dc,
115 			struct link_training_settings *lt_settings,
116 			const struct dc_link *link);
117 	void (*perform_link_training)(struct dc *dc,
118 			struct dc_link_settings *link_setting,
119 			bool skip_video_pattern);
120 	void (*set_preferred_link_settings)(struct dc *dc,
121 			struct dc_link_settings *link_setting,
122 			const struct dc_link *link);
123 	void (*enable_hpd)(const struct dc_link *link);
124 	void (*disable_hpd)(const struct dc_link *link);
125 	void (*set_test_pattern)(
126 			const struct dc_link *link,
127 			enum dp_test_pattern test_pattern,
128 			const struct link_training_settings *p_link_settings,
129 			const unsigned char *p_custom_pattern,
130 			unsigned int cust_pattern_size);
131 };
132 
133 /* Structure to hold configuration flags set by dm at dc creation. */
134 struct dc_config {
135 	bool gpu_vm_support;
136 	bool disable_disp_pll_sharing;
137 };
138 
139 struct dc_debug {
140 	bool surface_visual_confirm;
141 	bool max_disp_clk;
142 	bool surface_trace;
143 	bool timing_trace;
144 	bool validation_trace;
145 	bool disable_stutter;
146 	bool disable_dcc;
147 	bool disable_dfs_bypass;
148 	bool disable_dpp_power_gate;
149 	bool disable_hubp_power_gate;
150 	bool disable_clock_gate;
151 	bool disable_dmcu;
152 	bool disable_color_module;
153 };
154 
155 struct dc {
156 	struct dc_caps caps;
157 	struct dc_cap_funcs cap_funcs;
158 	struct dc_stream_funcs stream_funcs;
159 	struct dc_link_funcs link_funcs;
160 	struct dc_config config;
161 	struct dc_debug debug;
162 };
163 
164 struct dc_init_data {
165 	struct hw_asic_id asic_id;
166 	void *driver; /* ctx */
167 	struct cgs_device *cgs_device;
168 
169 	int num_virtual_links;
170 	/*
171 	 * If 'vbios_override' not NULL, it will be called instead
172 	 * of the real VBIOS. Intended use is Diagnostics on FPGA.
173 	 */
174 	struct dc_bios *vbios_override;
175 	enum dce_environment dce_environment;
176 
177 	struct dc_config flags;
178 };
179 
180 struct dc *dc_create(const struct dc_init_data *init_params);
181 
182 void dc_destroy(struct dc **dc);
183 
184 /*******************************************************************************
185  * Surface Interfaces
186  ******************************************************************************/
187 
188 enum {
189 	TRANSFER_FUNC_POINTS = 1025
190 };
191 
192 struct dc_hdr_static_metadata {
193 	bool is_hdr;
194 
195 	/* display chromaticities and white point in units of 0.00001 */
196 	unsigned int chromaticity_green_x;
197 	unsigned int chromaticity_green_y;
198 	unsigned int chromaticity_blue_x;
199 	unsigned int chromaticity_blue_y;
200 	unsigned int chromaticity_red_x;
201 	unsigned int chromaticity_red_y;
202 	unsigned int chromaticity_white_point_x;
203 	unsigned int chromaticity_white_point_y;
204 
205 	uint32_t min_luminance;
206 	uint32_t max_luminance;
207 	uint32_t maximum_content_light_level;
208 	uint32_t maximum_frame_average_light_level;
209 };
210 
211 enum dc_transfer_func_type {
212 	TF_TYPE_PREDEFINED,
213 	TF_TYPE_DISTRIBUTED_POINTS,
214 };
215 
216 struct dc_transfer_func_distributed_points {
217 	struct fixed31_32 red[TRANSFER_FUNC_POINTS];
218 	struct fixed31_32 green[TRANSFER_FUNC_POINTS];
219 	struct fixed31_32 blue[TRANSFER_FUNC_POINTS];
220 
221 	uint16_t end_exponent;
222 	uint16_t x_point_at_y1_red;
223 	uint16_t x_point_at_y1_green;
224 	uint16_t x_point_at_y1_blue;
225 };
226 
227 enum dc_transfer_func_predefined {
228 	TRANSFER_FUNCTION_SRGB,
229 	TRANSFER_FUNCTION_BT709,
230 	TRANSFER_FUNCTION_PQ,
231 	TRANSFER_FUNCTION_LINEAR,
232 };
233 
234 struct dc_transfer_func {
235 	enum dc_transfer_func_type type;
236 	enum dc_transfer_func_predefined tf;
237 	struct dc_transfer_func_distributed_points tf_pts;
238 };
239 
240 struct dc_surface {
241 	bool visible;
242 	bool flip_immediate;
243 	struct dc_plane_address address;
244 
245 	struct scaling_taps scaling_quality;
246 	struct rect src_rect;
247 	struct rect dst_rect;
248 	struct rect clip_rect;
249 
250 	union plane_size plane_size;
251 	union dc_tiling_info tiling_info;
252 	struct dc_plane_dcc_param dcc;
253 	enum dc_color_space color_space;
254 
255 	enum surface_pixel_format format;
256 	enum dc_rotation_angle rotation;
257 	bool horizontal_mirror;
258 	enum plane_stereo_format stereo_format;
259 
260 	struct dc_hdr_static_metadata hdr_static_ctx;
261 
262 	const struct dc_gamma *gamma_correction;
263 	const struct dc_transfer_func *in_transfer_func;
264 };
265 
266 struct dc_plane_info {
267 	union plane_size plane_size;
268 	union dc_tiling_info tiling_info;
269 	struct dc_plane_dcc_param dcc;
270 	enum surface_pixel_format format;
271 	enum dc_rotation_angle rotation;
272 	bool horizontal_mirror;
273 	enum plane_stereo_format stereo_format;
274 	enum dc_color_space color_space; /*todo: wrong place, fits in scaling info*/
275 	bool visible;
276 };
277 
278 struct dc_scaling_info {
279 		struct rect src_rect;
280 		struct rect dst_rect;
281 		struct rect clip_rect;
282 		struct scaling_taps scaling_quality;
283 };
284 
285 struct dc_surface_update {
286 	const struct dc_surface *surface;
287 
288 	/* isr safe update parameters.  null means no updates */
289 	struct dc_flip_addrs *flip_addr;
290 	struct dc_plane_info *plane_info;
291 	struct dc_scaling_info *scaling_info;
292 	/* following updates require alloc/sleep/spin that is not isr safe,
293 	 * null means no updates
294 	 */
295 	/* gamma TO BE REMOVED */
296 	struct dc_gamma *gamma;
297 	struct dc_hdr_static_metadata *hdr_static_metadata;
298 	struct dc_transfer_func *in_transfer_func;
299 	struct dc_transfer_func *out_transfer_func;
300 
301 
302 };
303 /*
304  * This structure is filled in by dc_surface_get_status and contains
305  * the last requested address and the currently active address so the called
306  * can determine if there are any outstanding flips
307  */
308 struct dc_surface_status {
309 	struct dc_plane_address requested_address;
310 	struct dc_plane_address current_address;
311 	bool is_flip_pending;
312 };
313 
314 /*
315  * Create a new surface with default parameters;
316  */
317 struct dc_surface *dc_create_surface(const struct dc *dc);
318 const struct dc_surface_status *dc_surface_get_status(
319 		const struct dc_surface *dc_surface);
320 
321 void dc_surface_retain(const struct dc_surface *dc_surface);
322 void dc_surface_release(const struct dc_surface *dc_surface);
323 
324 void dc_gamma_retain(const struct dc_gamma *dc_gamma);
325 void dc_gamma_release(const struct dc_gamma **dc_gamma);
326 struct dc_gamma *dc_create_gamma(void);
327 
328 void dc_transfer_func_retain(const struct dc_transfer_func *dc_tf);
329 void dc_transfer_func_release(const struct dc_transfer_func *dc_tf);
330 struct dc_transfer_func *dc_create_transfer_func(void);
331 
332 /*
333  * This structure holds a surface address.  There could be multiple addresses
334  * in cases such as Stereo 3D, Planar YUV, etc.  Other per-flip attributes such
335  * as frame durations and DCC format can also be set.
336  */
337 struct dc_flip_addrs {
338 	struct dc_plane_address address;
339 	bool flip_immediate;
340 	/* TODO: DCC format info */
341 	/* TODO: add flip duration for FreeSync */
342 };
343 
344 /*
345  * Optimized flip address update function.
346  *
347  * After this call:
348  *   Surface addresses and flip attributes are programmed.
349  *   Surface flip occur at next configured time (h_sync or v_sync flip)
350  */
351 void dc_flip_surface_addrs(struct dc *dc,
352 		const struct dc_surface *const surfaces[],
353 		struct dc_flip_addrs flip_addrs[],
354 		uint32_t count);
355 
356 /*
357  * Set up surface attributes and associate to a stream
358  * The surfaces parameter is an absolute set of all surface active for the stream.
359  * If no surfaces are provided, the stream will be blanked; no memory read.
360  * Any flip related attribute changes must be done through this interface.
361  *
362  * After this call:
363  *   Surfaces attributes are programmed and configured to be composed into stream.
364  *   This does not trigger a flip.  No surface address is programmed.
365  */
366 
367 bool dc_commit_surfaces_to_stream(
368 		struct dc *dc,
369 		const struct dc_surface **dc_surfaces,
370 		uint8_t surface_count,
371 		const struct dc_stream *stream);
372 
373 bool dc_pre_update_surfaces_to_stream(
374 		struct dc *dc,
375 		const struct dc_surface *const *new_surfaces,
376 		uint8_t new_surface_count,
377 		const struct dc_stream *stream);
378 
379 bool dc_post_update_surfaces_to_stream(
380 		struct dc *dc);
381 
382 void dc_update_surfaces_for_stream(struct dc *dc, struct dc_surface_update *updates,
383 		int surface_count, const struct dc_stream *stream);
384 
385 /*******************************************************************************
386  * Stream Interfaces
387  ******************************************************************************/
388 struct dc_stream {
389 	const struct dc_sink *sink;
390 	struct dc_crtc_timing timing;
391 
392 	enum dc_color_space output_color_space;
393 
394 	struct rect src; /* composition area */
395 	struct rect dst; /* stream addressable area */
396 
397 	struct audio_info audio_info;
398 
399 	bool ignore_msa_timing_param;
400 
401 	struct freesync_context freesync_ctx;
402 
403 	const struct dc_transfer_func *out_transfer_func;
404 	struct colorspace_transform gamut_remap_matrix;
405 	struct csc_transform csc_color_matrix;
406 
407 	/* TODO: dithering */
408 	/* TODO: custom INFO packets */
409 	/* TODO: ABM info (DMCU) */
410 	/* TODO: PSR info */
411 	/* TODO: CEA VIC */
412 };
413 
414 /*
415  * Log the current stream state.
416  */
417 void dc_stream_log(
418 	const struct dc_stream *stream,
419 	struct dal_logger *dc_logger,
420 	enum dc_log_type log_type);
421 
422 uint8_t dc_get_current_stream_count(const struct dc *dc);
423 struct dc_stream *dc_get_stream_at_index(const struct dc *dc, uint8_t i);
424 
425 /*
426  * Return the current frame counter.
427  */
428 uint32_t dc_stream_get_vblank_counter(const struct dc_stream *stream);
429 
430 /* TODO: Return parsed values rather than direct register read
431  * This has a dependency on the caller (amdgpu_get_crtc_scanoutpos)
432  * being refactored properly to be dce-specific
433  */
434 uint32_t dc_stream_get_scanoutpos(
435 		const struct dc_stream *stream, uint32_t *vbl, uint32_t *position);
436 
437 /*
438  * Structure to store surface/stream associations for validation
439  */
440 struct dc_validation_set {
441 	const struct dc_stream *stream;
442 	const struct dc_surface *surfaces[MAX_SURFACES];
443 	uint8_t surface_count;
444 };
445 
446 /*
447  * This function takes a set of resources and checks that they are cofunctional.
448  *
449  * After this call:
450  *   No hardware is programmed for call.  Only validation is done.
451  */
452 bool dc_validate_resources(
453 		const struct dc *dc,
454 		const struct dc_validation_set set[],
455 		uint8_t set_count);
456 
457 /*
458  * This function takes a stream and checks if it is guaranteed to be supported.
459  * Guaranteed means that MAX_COFUNC similar streams are supported.
460  *
461  * After this call:
462  *   No hardware is programmed for call.  Only validation is done.
463  */
464 
465 bool dc_validate_guaranteed(
466 		const struct dc *dc,
467 		const struct dc_stream *stream);
468 
469 /*
470  * Set up streams and links associated to drive sinks
471  * The streams parameter is an absolute set of all active streams.
472  *
473  * After this call:
474  *   Phy, Encoder, Timing Generator are programmed and enabled.
475  *   New streams are enabled with blank stream; no memory read.
476  */
477 bool dc_commit_streams(
478 		struct dc *dc,
479 		const struct dc_stream *streams[],
480 		uint8_t stream_count);
481 
482 /**
483  * Create a new default stream for the requested sink
484  */
485 struct dc_stream *dc_create_stream_for_sink(const struct dc_sink *dc_sink);
486 
487 void dc_stream_retain(const struct dc_stream *dc_stream);
488 void dc_stream_release(const struct dc_stream *dc_stream);
489 
490 struct dc_stream_status {
491 	int primary_otg_inst;
492 	int surface_count;
493 	const struct dc_surface *surfaces[MAX_SURFACE_NUM];
494 
495 	/*
496 	 * link this stream passes through
497 	 */
498 	const struct dc_link *link;
499 };
500 
501 const struct dc_stream_status *dc_stream_get_status(
502 	const struct dc_stream *dc_stream);
503 
504 /*******************************************************************************
505  * Link Interfaces
506  ******************************************************************************/
507 
508 /*
509  * A link contains one or more sinks and their connected status.
510  * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
511  */
512 struct dc_link {
513 	const struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
514 	unsigned int sink_count;
515 	const struct dc_sink *local_sink;
516 	unsigned int link_index;
517 	enum dc_connection_type type;
518 	enum signal_type connector_signal;
519 	enum dc_irq_source irq_source_hpd;
520 	enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse  */
521 	/* caps is the same as reported_link_cap. link_traing use
522 	 * reported_link_cap. Will clean up.  TODO
523 	 */
524 	struct dc_link_settings reported_link_cap;
525 	struct dc_link_settings verified_link_cap;
526 	struct dc_link_settings max_link_setting;
527 	struct dc_link_settings cur_link_settings;
528 	struct dc_lane_settings cur_lane_setting;
529 
530 	uint8_t ddc_hw_inst;
531 	uint8_t link_enc_hw_inst;
532 
533 	struct psr_caps psr_caps;
534 	bool test_pattern_enabled;
535 	union compliance_test_state compliance_test_state;
536 };
537 
538 struct dpcd_caps {
539 	union dpcd_rev dpcd_rev;
540 	union max_lane_count max_ln_count;
541 	union max_down_spread max_down_spread;
542 
543 	/* dongle type (DP converter, CV smart dongle) */
544 	enum display_dongle_type dongle_type;
545 	/* Dongle's downstream count. */
546 	union sink_count sink_count;
547 	/* If dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER,
548 	indicates 'Frame Sequential-to-lllFrame Pack' conversion capability.*/
549 	bool is_dp_hdmi_s3d_converter;
550 
551 	bool allow_invalid_MSA_timing_param;
552 	bool panel_mode_edp;
553 	uint32_t sink_dev_id;
554 	uint32_t branch_dev_id;
555 	int8_t branch_dev_name[6];
556 	int8_t branch_hw_revision;
557 };
558 
559 struct dc_link_status {
560 	struct dpcd_caps *dpcd_caps;
561 };
562 
563 const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
564 
565 /*
566  * Return an enumerated dc_link.  dc_link order is constant and determined at
567  * boot time.  They cannot be created or destroyed.
568  * Use dc_get_caps() to get number of links.
569  */
570 const struct dc_link *dc_get_link_at_index(const struct dc *dc, uint32_t link_index);
571 
572 /* Return id of physical connector represented by a dc_link at link_index.*/
573 const struct graphics_object_id dc_get_link_id_at_index(
574 		struct dc *dc, uint32_t link_index);
575 
576 /* Set backlight level of an embedded panel (eDP, LVDS). */
577 bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level,
578 		uint32_t frame_ramp, const struct dc_stream *stream);
579 
580 bool dc_link_init_dmcu_backlight_settings(const struct dc_link *dc_link);
581 
582 bool dc_link_set_abm_level(const struct dc_link *dc_link, uint32_t level);
583 
584 bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable);
585 
586 bool dc_link_setup_psr(const struct dc_link *dc_link,
587 		const struct dc_stream *stream);
588 
589 /* Request DC to detect if there is a Panel connected.
590  * boot - If this call is during initial boot.
591  * Return false for any type of detection failure or MST detection
592  * true otherwise. True meaning further action is required (status update
593  * and OS notification).
594  */
595 bool dc_link_detect(const struct dc_link *dc_link, bool boot);
596 
597 /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
598  * Return:
599  * true - Downstream port status changed. DM should call DC to do the
600  * detection.
601  * false - no change in Downstream port status. No further action required
602  * from DM. */
603 bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link);
604 
605 struct dc_sink_init_data;
606 
607 struct dc_sink *dc_link_add_remote_sink(
608 		const struct dc_link *dc_link,
609 		const uint8_t *edid,
610 		int len,
611 		struct dc_sink_init_data *init_data);
612 
613 void dc_link_remove_remote_sink(
614 	const struct dc_link *link,
615 	const struct dc_sink *sink);
616 
617 /* Used by diagnostics for virtual link at the moment */
618 void dc_link_set_sink(const struct dc_link *link, struct dc_sink *sink);
619 
620 void dc_link_dp_set_drive_settings(
621 	struct dc_link *link,
622 	struct link_training_settings *lt_settings);
623 
624 bool dc_link_dp_perform_link_training(
625 	struct dc_link *link,
626 	const struct dc_link_settings *link_setting,
627 	bool skip_video_pattern);
628 
629 void dc_link_dp_enable_hpd(const struct dc_link *link);
630 
631 void dc_link_dp_disable_hpd(const struct dc_link *link);
632 
633 bool dc_link_dp_set_test_pattern(
634 	const struct dc_link *link,
635 	enum dp_test_pattern test_pattern,
636 	const struct link_training_settings *p_link_settings,
637 	const unsigned char *p_custom_pattern,
638 	unsigned int cust_pattern_size);
639 
640 /*******************************************************************************
641  * Sink Interfaces - A sink corresponds to a display output device
642  ******************************************************************************/
643 
644 /*
645  * The sink structure contains EDID and other display device properties
646  */
647 struct dc_sink {
648 	enum signal_type sink_signal;
649 	struct dc_edid dc_edid; /* raw edid */
650 	struct dc_edid_caps edid_caps; /* parse display caps */
651 };
652 
653 void dc_sink_retain(const struct dc_sink *sink);
654 void dc_sink_release(const struct dc_sink *sink);
655 
656 const struct audio **dc_get_audios(struct dc *dc);
657 
658 struct dc_sink_init_data {
659 	enum signal_type sink_signal;
660 	const struct dc_link *link;
661 	uint32_t dongle_max_pix_clk;
662 	bool converter_disable_audio;
663 };
664 
665 struct dc_sink *dc_sink_create(const struct dc_sink_init_data *init_params);
666 
667 /*******************************************************************************
668  * Cursor interfaces - To manages the cursor within a stream
669  ******************************************************************************/
670 /* TODO: Deprecated once we switch to dc_set_cursor_position */
671 bool dc_stream_set_cursor_attributes(
672 	const struct dc_stream *stream,
673 	const struct dc_cursor_attributes *attributes);
674 
675 bool dc_stream_set_cursor_position(
676 	const struct dc_stream *stream,
677 	const struct dc_cursor_position *position);
678 
679 /* Newer interfaces  */
680 struct dc_cursor {
681 	struct dc_plane_address address;
682 	struct dc_cursor_attributes attributes;
683 };
684 
685 /*******************************************************************************
686  * Interrupt interfaces
687  ******************************************************************************/
688 enum dc_irq_source dc_interrupt_to_irq_source(
689 		struct dc *dc,
690 		uint32_t src_id,
691 		uint32_t ext_id);
692 void dc_interrupt_set(const struct dc *dc, enum dc_irq_source src, bool enable);
693 void dc_interrupt_ack(struct dc *dc, enum dc_irq_source src);
694 enum dc_irq_source dc_get_hpd_irq_source_at_index(
695 		struct dc *dc, uint32_t link_index);
696 
697 /*******************************************************************************
698  * Power Interfaces
699  ******************************************************************************/
700 
701 void dc_set_power_state(
702 		struct dc *dc,
703 		enum dc_acpi_cm_power_state power_state,
704 		enum dc_video_power_state video_power_state);
705 void dc_resume(const struct dc *dc);
706 
707 /*******************************************************************************
708  * DDC Interfaces
709  ******************************************************************************/
710 
711 const struct ddc_service *dc_get_ddc_at_index(
712 		struct dc *dc, uint32_t link_index);
713 
714 /*
715  * DPCD access interfaces
716  */
717 
718 bool dc_read_dpcd(
719 		struct dc *dc,
720 		uint32_t link_index,
721 		uint32_t address,
722 		uint8_t *data,
723 		uint32_t size);
724 
725 bool dc_write_dpcd(
726 		struct dc *dc,
727 		uint32_t link_index,
728 		uint32_t address,
729 		const uint8_t *data,
730 	uint32_t size);
731 
732 bool dc_submit_i2c(
733 		struct dc *dc,
734 		uint32_t link_index,
735 		struct i2c_command *cmd);
736 
737 #endif /* DC_INTERFACE_H_ */
738