1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include "dm_services.h" 27 #include "dc.h" 28 #include "core_types.h" 29 #include "resource.h" 30 #include "ipp.h" 31 #include "timing_generator.h" 32 33 /******************************************************************************* 34 * Private functions 35 ******************************************************************************/ 36 void update_stream_signal(struct dc_stream_state *stream) 37 { 38 39 struct dc_sink *dc_sink = stream->sink; 40 41 if (dc_sink->sink_signal == SIGNAL_TYPE_NONE) 42 stream->signal = stream->sink->link->connector_signal; 43 else 44 stream->signal = dc_sink->sink_signal; 45 46 if (dc_is_dvi_signal(stream->signal)) { 47 if (stream->ctx->dc->caps.dual_link_dvi && 48 stream->timing.pix_clk_khz > TMDS_MAX_PIXEL_CLOCK && 49 stream->sink->sink_signal != SIGNAL_TYPE_DVI_SINGLE_LINK) 50 stream->signal = SIGNAL_TYPE_DVI_DUAL_LINK; 51 else 52 stream->signal = SIGNAL_TYPE_DVI_SINGLE_LINK; 53 } 54 } 55 56 static void construct(struct dc_stream_state *stream, 57 struct dc_sink *dc_sink_data) 58 { 59 uint32_t i = 0; 60 61 stream->sink = dc_sink_data; 62 stream->ctx = stream->sink->ctx; 63 64 dc_sink_retain(dc_sink_data); 65 66 /* Copy audio modes */ 67 /* TODO - Remove this translation */ 68 for (i = 0; i < (dc_sink_data->edid_caps.audio_mode_count); i++) 69 { 70 stream->audio_info.modes[i].channel_count = dc_sink_data->edid_caps.audio_modes[i].channel_count; 71 stream->audio_info.modes[i].format_code = dc_sink_data->edid_caps.audio_modes[i].format_code; 72 stream->audio_info.modes[i].sample_rates.all = dc_sink_data->edid_caps.audio_modes[i].sample_rate; 73 stream->audio_info.modes[i].sample_size = dc_sink_data->edid_caps.audio_modes[i].sample_size; 74 } 75 stream->audio_info.mode_count = dc_sink_data->edid_caps.audio_mode_count; 76 stream->audio_info.audio_latency = dc_sink_data->edid_caps.audio_latency; 77 stream->audio_info.video_latency = dc_sink_data->edid_caps.video_latency; 78 memmove( 79 stream->audio_info.display_name, 80 dc_sink_data->edid_caps.display_name, 81 AUDIO_INFO_DISPLAY_NAME_SIZE_IN_CHARS); 82 stream->audio_info.manufacture_id = dc_sink_data->edid_caps.manufacturer_id; 83 stream->audio_info.product_id = dc_sink_data->edid_caps.product_id; 84 stream->audio_info.flags.all = dc_sink_data->edid_caps.speaker_flags; 85 86 if (dc_sink_data->dc_container_id != NULL) { 87 struct dc_container_id *dc_container_id = dc_sink_data->dc_container_id; 88 89 stream->audio_info.port_id[0] = dc_container_id->portId[0]; 90 stream->audio_info.port_id[1] = dc_container_id->portId[1]; 91 } else { 92 /* TODO - WindowDM has implemented, 93 other DMs need Unhardcode port_id */ 94 stream->audio_info.port_id[0] = 0x5558859e; 95 stream->audio_info.port_id[1] = 0xd989449; 96 } 97 98 /* EDID CAP translation for HDMI 2.0 */ 99 stream->timing.flags.LTE_340MCSC_SCRAMBLE = dc_sink_data->edid_caps.lte_340mcsc_scramble; 100 101 stream->status.link = stream->sink->link; 102 103 update_stream_signal(stream); 104 105 stream->out_transfer_func = dc_create_transfer_func(); 106 stream->out_transfer_func->type = TF_TYPE_BYPASS; 107 } 108 109 static void destruct(struct dc_stream_state *stream) 110 { 111 dc_sink_release(stream->sink); 112 if (stream->out_transfer_func != NULL) { 113 dc_transfer_func_release(stream->out_transfer_func); 114 stream->out_transfer_func = NULL; 115 } 116 } 117 118 void dc_stream_retain(struct dc_stream_state *stream) 119 { 120 kref_get(&stream->refcount); 121 } 122 123 static void dc_stream_free(struct kref *kref) 124 { 125 struct dc_stream_state *stream = container_of(kref, struct dc_stream_state, refcount); 126 127 destruct(stream); 128 kfree(stream); 129 } 130 131 void dc_stream_release(struct dc_stream_state *stream) 132 { 133 if (stream != NULL) { 134 kref_put(&stream->refcount, dc_stream_free); 135 } 136 } 137 138 struct dc_stream_state *dc_create_stream_for_sink( 139 struct dc_sink *sink) 140 { 141 struct dc_stream_state *stream; 142 143 if (sink == NULL) 144 return NULL; 145 146 stream = kzalloc(sizeof(struct dc_stream_state), GFP_KERNEL); 147 if (stream == NULL) 148 return NULL; 149 150 construct(stream, sink); 151 152 kref_init(&stream->refcount); 153 154 return stream; 155 } 156 157 struct dc_stream_status *dc_stream_get_status( 158 struct dc_stream_state *stream) 159 { 160 uint8_t i; 161 struct dc *dc = stream->ctx->dc; 162 163 for (i = 0; i < dc->current_state->stream_count; i++) { 164 if (stream == dc->current_state->streams[i]) 165 return &dc->current_state->stream_status[i]; 166 } 167 168 return NULL; 169 } 170 171 /** 172 * Update the cursor attributes and set cursor surface address 173 */ 174 bool dc_stream_set_cursor_attributes( 175 struct dc_stream_state *stream, 176 const struct dc_cursor_attributes *attributes) 177 { 178 int i; 179 struct dc *core_dc; 180 struct resource_context *res_ctx; 181 struct pipe_ctx *pipe_to_program = NULL; 182 183 if (NULL == stream) { 184 dm_error("DC: dc_stream is NULL!\n"); 185 return false; 186 } 187 if (NULL == attributes) { 188 dm_error("DC: attributes is NULL!\n"); 189 return false; 190 } 191 192 if (attributes->address.quad_part == 0) { 193 dm_output_to_console("DC: Cursor address is 0!\n"); 194 return false; 195 } 196 197 core_dc = stream->ctx->dc; 198 res_ctx = &core_dc->current_state->res_ctx; 199 stream->cursor_attributes = *attributes; 200 201 for (i = 0; i < MAX_PIPES; i++) { 202 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; 203 204 if (pipe_ctx->stream != stream) 205 continue; 206 if (pipe_ctx->top_pipe && pipe_ctx->plane_state != pipe_ctx->top_pipe->plane_state) 207 continue; 208 209 if (!pipe_to_program) { 210 pipe_to_program = pipe_ctx; 211 core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, true); 212 } 213 214 core_dc->hwss.set_cursor_attribute(pipe_ctx); 215 } 216 217 if (pipe_to_program) 218 core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, false); 219 220 return true; 221 } 222 223 bool dc_stream_set_cursor_position( 224 struct dc_stream_state *stream, 225 const struct dc_cursor_position *position) 226 { 227 int i; 228 struct dc *core_dc; 229 struct resource_context *res_ctx; 230 struct pipe_ctx *pipe_to_program = NULL; 231 232 if (NULL == stream) { 233 dm_error("DC: dc_stream is NULL!\n"); 234 return false; 235 } 236 237 if (NULL == position) { 238 dm_error("DC: cursor position is NULL!\n"); 239 return false; 240 } 241 242 core_dc = stream->ctx->dc; 243 res_ctx = &core_dc->current_state->res_ctx; 244 stream->cursor_position = *position; 245 246 for (i = 0; i < MAX_PIPES; i++) { 247 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; 248 249 if (pipe_ctx->stream != stream || 250 (!pipe_ctx->plane_res.mi && !pipe_ctx->plane_res.hubp) || 251 !pipe_ctx->plane_state || 252 (!pipe_ctx->plane_res.xfm && !pipe_ctx->plane_res.dpp) || 253 !pipe_ctx->plane_res.ipp) 254 continue; 255 256 if (!pipe_to_program) { 257 pipe_to_program = pipe_ctx; 258 core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, true); 259 } 260 261 core_dc->hwss.set_cursor_position(pipe_ctx); 262 } 263 264 if (pipe_to_program) 265 core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, false); 266 267 return true; 268 } 269 270 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream) 271 { 272 uint8_t i; 273 struct dc *core_dc = stream->ctx->dc; 274 struct resource_context *res_ctx = 275 &core_dc->current_state->res_ctx; 276 277 for (i = 0; i < MAX_PIPES; i++) { 278 struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg; 279 280 if (res_ctx->pipe_ctx[i].stream != stream) 281 continue; 282 283 return tg->funcs->get_frame_count(tg); 284 } 285 286 return 0; 287 } 288 289 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 290 uint32_t *v_blank_start, 291 uint32_t *v_blank_end, 292 uint32_t *h_position, 293 uint32_t *v_position) 294 { 295 uint8_t i; 296 bool ret = false; 297 struct dc *core_dc = stream->ctx->dc; 298 struct resource_context *res_ctx = 299 &core_dc->current_state->res_ctx; 300 301 for (i = 0; i < MAX_PIPES; i++) { 302 struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg; 303 304 if (res_ctx->pipe_ctx[i].stream != stream) 305 continue; 306 307 tg->funcs->get_scanoutpos(tg, 308 v_blank_start, 309 v_blank_end, 310 h_position, 311 v_position); 312 313 ret = true; 314 break; 315 } 316 317 return ret; 318 } 319 320 321 void dc_stream_log( 322 const struct dc_stream_state *stream, 323 struct dal_logger *dm_logger, 324 enum dc_log_type log_type) 325 { 326 327 dm_logger_write(dm_logger, 328 log_type, 329 "core_stream 0x%x: src: %d, %d, %d, %d; dst: %d, %d, %d, %d, colorSpace:%d\n", 330 stream, 331 stream->src.x, 332 stream->src.y, 333 stream->src.width, 334 stream->src.height, 335 stream->dst.x, 336 stream->dst.y, 337 stream->dst.width, 338 stream->dst.height, 339 stream->output_color_space); 340 dm_logger_write(dm_logger, 341 log_type, 342 "\tpix_clk_khz: %d, h_total: %d, v_total: %d, pixelencoder:%d, displaycolorDepth:%d\n", 343 stream->timing.pix_clk_khz, 344 stream->timing.h_total, 345 stream->timing.v_total, 346 stream->timing.pixel_encoding, 347 stream->timing.display_color_depth); 348 dm_logger_write(dm_logger, 349 log_type, 350 "\tsink name: %s, serial: %d\n", 351 stream->sink->edid_caps.display_name, 352 stream->sink->edid_caps.serial_number); 353 dm_logger_write(dm_logger, 354 log_type, 355 "\tlink: %d\n", 356 stream->sink->link->link_index); 357 } 358