1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include <linux/delay.h> 27 #include <linux/slab.h> 28 29 #include "dm_services.h" 30 #include "basics/dc_common.h" 31 #include "dc.h" 32 #include "core_types.h" 33 #include "resource.h" 34 #include "ipp.h" 35 #include "timing_generator.h" 36 37 #define DC_LOGGER dc->ctx->logger 38 39 /******************************************************************************* 40 * Private functions 41 ******************************************************************************/ 42 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink) 43 { 44 if (sink->sink_signal == SIGNAL_TYPE_NONE) 45 stream->signal = stream->link->connector_signal; 46 else 47 stream->signal = sink->sink_signal; 48 49 if (dc_is_dvi_signal(stream->signal)) { 50 if (stream->ctx->dc->caps.dual_link_dvi && 51 (stream->timing.pix_clk_100hz / 10) > TMDS_MAX_PIXEL_CLOCK && 52 sink->sink_signal != SIGNAL_TYPE_DVI_SINGLE_LINK) 53 stream->signal = SIGNAL_TYPE_DVI_DUAL_LINK; 54 else 55 stream->signal = SIGNAL_TYPE_DVI_SINGLE_LINK; 56 } 57 } 58 59 static void dc_stream_construct(struct dc_stream_state *stream, 60 struct dc_sink *dc_sink_data) 61 { 62 uint32_t i = 0; 63 64 stream->sink = dc_sink_data; 65 dc_sink_retain(dc_sink_data); 66 67 stream->ctx = dc_sink_data->ctx; 68 stream->link = dc_sink_data->link; 69 stream->sink_patches = dc_sink_data->edid_caps.panel_patch; 70 stream->converter_disable_audio = dc_sink_data->converter_disable_audio; 71 stream->qs_bit = dc_sink_data->edid_caps.qs_bit; 72 stream->qy_bit = dc_sink_data->edid_caps.qy_bit; 73 74 /* Copy audio modes */ 75 /* TODO - Remove this translation */ 76 for (i = 0; i < (dc_sink_data->edid_caps.audio_mode_count); i++) 77 { 78 stream->audio_info.modes[i].channel_count = dc_sink_data->edid_caps.audio_modes[i].channel_count; 79 stream->audio_info.modes[i].format_code = dc_sink_data->edid_caps.audio_modes[i].format_code; 80 stream->audio_info.modes[i].sample_rates.all = dc_sink_data->edid_caps.audio_modes[i].sample_rate; 81 stream->audio_info.modes[i].sample_size = dc_sink_data->edid_caps.audio_modes[i].sample_size; 82 } 83 stream->audio_info.mode_count = dc_sink_data->edid_caps.audio_mode_count; 84 stream->audio_info.audio_latency = dc_sink_data->edid_caps.audio_latency; 85 stream->audio_info.video_latency = dc_sink_data->edid_caps.video_latency; 86 memmove( 87 stream->audio_info.display_name, 88 dc_sink_data->edid_caps.display_name, 89 AUDIO_INFO_DISPLAY_NAME_SIZE_IN_CHARS); 90 stream->audio_info.manufacture_id = dc_sink_data->edid_caps.manufacturer_id; 91 stream->audio_info.product_id = dc_sink_data->edid_caps.product_id; 92 stream->audio_info.flags.all = dc_sink_data->edid_caps.speaker_flags; 93 94 if (dc_sink_data->dc_container_id != NULL) { 95 struct dc_container_id *dc_container_id = dc_sink_data->dc_container_id; 96 97 stream->audio_info.port_id[0] = dc_container_id->portId[0]; 98 stream->audio_info.port_id[1] = dc_container_id->portId[1]; 99 } else { 100 /* TODO - WindowDM has implemented, 101 other DMs need Unhardcode port_id */ 102 stream->audio_info.port_id[0] = 0x5558859e; 103 stream->audio_info.port_id[1] = 0xd989449; 104 } 105 106 /* EDID CAP translation for HDMI 2.0 */ 107 stream->timing.flags.LTE_340MCSC_SCRAMBLE = dc_sink_data->edid_caps.lte_340mcsc_scramble; 108 109 memset(&stream->timing.dsc_cfg, 0, sizeof(stream->timing.dsc_cfg)); 110 stream->timing.dsc_cfg.num_slices_h = 0; 111 stream->timing.dsc_cfg.num_slices_v = 0; 112 stream->timing.dsc_cfg.bits_per_pixel = 128; 113 stream->timing.dsc_cfg.block_pred_enable = 1; 114 stream->timing.dsc_cfg.linebuf_depth = 9; 115 stream->timing.dsc_cfg.version_minor = 2; 116 stream->timing.dsc_cfg.ycbcr422_simple = 0; 117 118 update_stream_signal(stream, dc_sink_data); 119 120 stream->out_transfer_func = dc_create_transfer_func(); 121 stream->out_transfer_func->type = TF_TYPE_BYPASS; 122 stream->out_transfer_func->ctx = stream->ctx; 123 124 stream->stream_id = stream->ctx->dc_stream_id_count; 125 stream->ctx->dc_stream_id_count++; 126 } 127 128 static void dc_stream_destruct(struct dc_stream_state *stream) 129 { 130 dc_sink_release(stream->sink); 131 if (stream->out_transfer_func != NULL) { 132 dc_transfer_func_release(stream->out_transfer_func); 133 stream->out_transfer_func = NULL; 134 } 135 } 136 137 void dc_stream_retain(struct dc_stream_state *stream) 138 { 139 kref_get(&stream->refcount); 140 } 141 142 static void dc_stream_free(struct kref *kref) 143 { 144 struct dc_stream_state *stream = container_of(kref, struct dc_stream_state, refcount); 145 146 dc_stream_destruct(stream); 147 kfree(stream); 148 } 149 150 void dc_stream_release(struct dc_stream_state *stream) 151 { 152 if (stream != NULL) { 153 kref_put(&stream->refcount, dc_stream_free); 154 } 155 } 156 157 struct dc_stream_state *dc_create_stream_for_sink( 158 struct dc_sink *sink) 159 { 160 struct dc_stream_state *stream; 161 162 if (sink == NULL) 163 return NULL; 164 165 stream = kzalloc(sizeof(struct dc_stream_state), GFP_KERNEL); 166 if (stream == NULL) 167 return NULL; 168 169 dc_stream_construct(stream, sink); 170 171 kref_init(&stream->refcount); 172 173 return stream; 174 } 175 176 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream) 177 { 178 struct dc_stream_state *new_stream; 179 180 new_stream = kmemdup(stream, sizeof(struct dc_stream_state), GFP_KERNEL); 181 if (!new_stream) 182 return NULL; 183 184 if (new_stream->sink) 185 dc_sink_retain(new_stream->sink); 186 187 if (new_stream->out_transfer_func) 188 dc_transfer_func_retain(new_stream->out_transfer_func); 189 190 new_stream->stream_id = new_stream->ctx->dc_stream_id_count; 191 new_stream->ctx->dc_stream_id_count++; 192 193 kref_init(&new_stream->refcount); 194 195 return new_stream; 196 } 197 198 /** 199 * dc_stream_get_status_from_state - Get stream status from given dc state 200 * @state: DC state to find the stream status in 201 * @stream: The stream to get the stream status for 202 * 203 * The given stream is expected to exist in the given dc state. Otherwise, NULL 204 * will be returned. 205 */ 206 struct dc_stream_status *dc_stream_get_status_from_state( 207 struct dc_state *state, 208 struct dc_stream_state *stream) 209 { 210 uint8_t i; 211 212 for (i = 0; i < state->stream_count; i++) { 213 if (stream == state->streams[i]) 214 return &state->stream_status[i]; 215 } 216 217 return NULL; 218 } 219 220 /** 221 * dc_stream_get_status() - Get current stream status of the given stream state 222 * @stream: The stream to get the stream status for. 223 * 224 * The given stream is expected to exist in dc->current_state. Otherwise, NULL 225 * will be returned. 226 */ 227 struct dc_stream_status *dc_stream_get_status( 228 struct dc_stream_state *stream) 229 { 230 struct dc *dc = stream->ctx->dc; 231 return dc_stream_get_status_from_state(dc->current_state, stream); 232 } 233 234 235 /** 236 * dc_stream_set_cursor_attributes() - Update cursor attributes and set cursor surface address 237 */ 238 bool dc_stream_set_cursor_attributes( 239 struct dc_stream_state *stream, 240 const struct dc_cursor_attributes *attributes) 241 { 242 int i; 243 struct dc *dc; 244 struct resource_context *res_ctx; 245 struct pipe_ctx *pipe_to_program = NULL; 246 247 if (NULL == stream) { 248 dm_error("DC: dc_stream is NULL!\n"); 249 return false; 250 } 251 if (NULL == attributes) { 252 dm_error("DC: attributes is NULL!\n"); 253 return false; 254 } 255 256 if (attributes->address.quad_part == 0) { 257 dm_output_to_console("DC: Cursor address is 0!\n"); 258 return false; 259 } 260 261 dc = stream->ctx->dc; 262 res_ctx = &dc->current_state->res_ctx; 263 stream->cursor_attributes = *attributes; 264 265 for (i = 0; i < MAX_PIPES; i++) { 266 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; 267 268 if (pipe_ctx->stream != stream) 269 continue; 270 271 if (!pipe_to_program) { 272 pipe_to_program = pipe_ctx; 273 dc->hwss.cursor_lock(dc, pipe_to_program, true); 274 } 275 276 dc->hwss.set_cursor_attribute(pipe_ctx); 277 if (dc->hwss.set_cursor_sdr_white_level) 278 dc->hwss.set_cursor_sdr_white_level(pipe_ctx); 279 } 280 281 if (pipe_to_program) 282 dc->hwss.cursor_lock(dc, pipe_to_program, false); 283 284 return true; 285 } 286 287 bool dc_stream_set_cursor_position( 288 struct dc_stream_state *stream, 289 const struct dc_cursor_position *position) 290 { 291 int i; 292 struct dc *dc; 293 struct resource_context *res_ctx; 294 struct pipe_ctx *pipe_to_program = NULL; 295 296 if (NULL == stream) { 297 dm_error("DC: dc_stream is NULL!\n"); 298 return false; 299 } 300 301 if (NULL == position) { 302 dm_error("DC: cursor position is NULL!\n"); 303 return false; 304 } 305 306 dc = stream->ctx->dc; 307 res_ctx = &dc->current_state->res_ctx; 308 stream->cursor_position = *position; 309 310 for (i = 0; i < MAX_PIPES; i++) { 311 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; 312 313 if (pipe_ctx->stream != stream || 314 (!pipe_ctx->plane_res.mi && !pipe_ctx->plane_res.hubp) || 315 !pipe_ctx->plane_state || 316 (!pipe_ctx->plane_res.xfm && !pipe_ctx->plane_res.dpp) || 317 (!pipe_ctx->plane_res.ipp && !pipe_ctx->plane_res.dpp)) 318 continue; 319 320 if (!pipe_to_program) { 321 pipe_to_program = pipe_ctx; 322 dc->hwss.cursor_lock(dc, pipe_to_program, true); 323 } 324 325 dc->hwss.set_cursor_position(pipe_ctx); 326 } 327 328 if (pipe_to_program) 329 dc->hwss.cursor_lock(dc, pipe_to_program, false); 330 331 return true; 332 } 333 334 bool dc_stream_add_writeback(struct dc *dc, 335 struct dc_stream_state *stream, 336 struct dc_writeback_info *wb_info) 337 { 338 bool isDrc = false; 339 int i = 0; 340 struct dwbc *dwb; 341 342 if (stream == NULL) { 343 dm_error("DC: dc_stream is NULL!\n"); 344 return false; 345 } 346 347 if (wb_info == NULL) { 348 dm_error("DC: dc_writeback_info is NULL!\n"); 349 return false; 350 } 351 352 if (wb_info->dwb_pipe_inst >= MAX_DWB_PIPES) { 353 dm_error("DC: writeback pipe is invalid!\n"); 354 return false; 355 } 356 357 wb_info->dwb_params.out_transfer_func = stream->out_transfer_func; 358 359 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; 360 dwb->dwb_is_drc = false; 361 362 /* recalculate and apply DML parameters */ 363 364 for (i = 0; i < stream->num_wb_info; i++) { 365 /*dynamic update*/ 366 if (stream->writeback_info[i].wb_enabled && 367 stream->writeback_info[i].dwb_pipe_inst == wb_info->dwb_pipe_inst) { 368 stream->writeback_info[i] = *wb_info; 369 isDrc = true; 370 } 371 } 372 373 if (!isDrc) { 374 stream->writeback_info[stream->num_wb_info++] = *wb_info; 375 } 376 377 if (dc->hwss.enable_writeback) { 378 struct dc_stream_status *stream_status = dc_stream_get_status(stream); 379 struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; 380 dwb->otg_inst = stream_status->primary_otg_inst; 381 } 382 if (IS_DIAG_DC(dc->ctx->dce_environment)) { 383 if (!dc->hwss.update_bandwidth(dc, dc->current_state)) { 384 dm_error("DC: update_bandwidth failed!\n"); 385 return false; 386 } 387 388 /* enable writeback */ 389 if (dc->hwss.enable_writeback) { 390 struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; 391 392 if (dwb->funcs->is_enabled(dwb)) { 393 /* writeback pipe already enabled, only need to update */ 394 dc->hwss.update_writeback(dc, wb_info, dc->current_state); 395 } else { 396 /* Enable writeback pipe from scratch*/ 397 dc->hwss.enable_writeback(dc, wb_info, dc->current_state); 398 } 399 } 400 } 401 return true; 402 } 403 404 bool dc_stream_remove_writeback(struct dc *dc, 405 struct dc_stream_state *stream, 406 uint32_t dwb_pipe_inst) 407 { 408 int i = 0, j = 0; 409 if (stream == NULL) { 410 dm_error("DC: dc_stream is NULL!\n"); 411 return false; 412 } 413 414 if (dwb_pipe_inst >= MAX_DWB_PIPES) { 415 dm_error("DC: writeback pipe is invalid!\n"); 416 return false; 417 } 418 419 // stream->writeback_info[dwb_pipe_inst].wb_enabled = false; 420 for (i = 0; i < stream->num_wb_info; i++) { 421 /*dynamic update*/ 422 if (stream->writeback_info[i].wb_enabled && 423 stream->writeback_info[i].dwb_pipe_inst == dwb_pipe_inst) { 424 stream->writeback_info[i].wb_enabled = false; 425 } 426 } 427 428 /* remove writeback info for disabled writeback pipes from stream */ 429 for (i = 0, j = 0; i < stream->num_wb_info; i++) { 430 if (stream->writeback_info[i].wb_enabled) { 431 if (i != j) 432 /* trim the array */ 433 stream->writeback_info[j] = stream->writeback_info[i]; 434 j++; 435 } 436 } 437 stream->num_wb_info = j; 438 439 if (IS_DIAG_DC(dc->ctx->dce_environment)) { 440 /* recalculate and apply DML parameters */ 441 if (!dc->hwss.update_bandwidth(dc, dc->current_state)) { 442 dm_error("DC: update_bandwidth failed!\n"); 443 return false; 444 } 445 446 /* disable writeback */ 447 if (dc->hwss.disable_writeback) 448 dc->hwss.disable_writeback(dc, dwb_pipe_inst); 449 } 450 return true; 451 } 452 453 bool dc_stream_warmup_writeback(struct dc *dc, 454 int num_dwb, 455 struct dc_writeback_info *wb_info) 456 { 457 if (dc->hwss.mmhubbub_warmup) 458 return dc->hwss.mmhubbub_warmup(dc, num_dwb, wb_info); 459 else 460 return false; 461 } 462 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream) 463 { 464 uint8_t i; 465 struct dc *dc = stream->ctx->dc; 466 struct resource_context *res_ctx = 467 &dc->current_state->res_ctx; 468 469 for (i = 0; i < MAX_PIPES; i++) { 470 struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg; 471 472 if (res_ctx->pipe_ctx[i].stream != stream) 473 continue; 474 475 return tg->funcs->get_frame_count(tg); 476 } 477 478 return 0; 479 } 480 481 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream, 482 const uint8_t *custom_sdp_message, 483 unsigned int sdp_message_size) 484 { 485 int i; 486 struct dc *dc; 487 struct resource_context *res_ctx; 488 489 if (stream == NULL) { 490 dm_error("DC: dc_stream is NULL!\n"); 491 return false; 492 } 493 494 dc = stream->ctx->dc; 495 res_ctx = &dc->current_state->res_ctx; 496 497 for (i = 0; i < MAX_PIPES; i++) { 498 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; 499 500 if (pipe_ctx->stream != stream) 501 continue; 502 503 if (dc->hwss.send_immediate_sdp_message != NULL) 504 dc->hwss.send_immediate_sdp_message(pipe_ctx, 505 custom_sdp_message, 506 sdp_message_size); 507 else 508 DC_LOG_WARNING("%s:send_immediate_sdp_message not implemented on this ASIC\n", 509 __func__); 510 511 } 512 513 return true; 514 } 515 516 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 517 uint32_t *v_blank_start, 518 uint32_t *v_blank_end, 519 uint32_t *h_position, 520 uint32_t *v_position) 521 { 522 uint8_t i; 523 bool ret = false; 524 struct dc *dc = stream->ctx->dc; 525 struct resource_context *res_ctx = 526 &dc->current_state->res_ctx; 527 528 for (i = 0; i < MAX_PIPES; i++) { 529 struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg; 530 531 if (res_ctx->pipe_ctx[i].stream != stream) 532 continue; 533 534 tg->funcs->get_scanoutpos(tg, 535 v_blank_start, 536 v_blank_end, 537 h_position, 538 v_position); 539 540 ret = true; 541 break; 542 } 543 544 return ret; 545 } 546 547 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream) 548 { 549 struct pipe_ctx *pipe = NULL; 550 int i; 551 552 if (!dc->hwss.dmdata_status_done) 553 return false; 554 555 for (i = 0; i < MAX_PIPES; i++) { 556 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; 557 if (pipe->stream == stream) 558 break; 559 } 560 /* Stream not found, by default we'll assume HUBP fetched dm data */ 561 if (i == MAX_PIPES) 562 return true; 563 564 return dc->hwss.dmdata_status_done(pipe); 565 } 566 567 bool dc_stream_set_dynamic_metadata(struct dc *dc, 568 struct dc_stream_state *stream, 569 struct dc_dmdata_attributes *attr) 570 { 571 struct pipe_ctx *pipe_ctx = NULL; 572 struct hubp *hubp; 573 int i; 574 575 /* Dynamic metadata is only supported on HDMI or DP */ 576 if (!dc_is_hdmi_signal(stream->signal) && !dc_is_dp_signal(stream->signal)) 577 return false; 578 579 /* Check hardware support */ 580 if (!dc->hwss.program_dmdata_engine) 581 return false; 582 583 for (i = 0; i < MAX_PIPES; i++) { 584 pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; 585 if (pipe_ctx->stream == stream) 586 break; 587 } 588 589 if (i == MAX_PIPES) 590 return false; 591 592 hubp = pipe_ctx->plane_res.hubp; 593 if (hubp == NULL) 594 return false; 595 596 pipe_ctx->stream->dmdata_address = attr->address; 597 598 dc->hwss.program_dmdata_engine(pipe_ctx); 599 600 if (hubp->funcs->dmdata_set_attributes != NULL && 601 pipe_ctx->stream->dmdata_address.quad_part != 0) { 602 hubp->funcs->dmdata_set_attributes(hubp, attr); 603 } 604 605 return true; 606 } 607 608 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream) 609 { 610 DC_LOG_DC( 611 "core_stream 0x%p: src: %d, %d, %d, %d; dst: %d, %d, %d, %d, colorSpace:%d\n", 612 stream, 613 stream->src.x, 614 stream->src.y, 615 stream->src.width, 616 stream->src.height, 617 stream->dst.x, 618 stream->dst.y, 619 stream->dst.width, 620 stream->dst.height, 621 stream->output_color_space); 622 DC_LOG_DC( 623 "\tpix_clk_khz: %d, h_total: %d, v_total: %d, pixelencoder:%d, displaycolorDepth:%d\n", 624 stream->timing.pix_clk_100hz / 10, 625 stream->timing.h_total, 626 stream->timing.v_total, 627 stream->timing.pixel_encoding, 628 stream->timing.display_color_depth); 629 DC_LOG_DC( 630 "\tlink: %d\n", 631 stream->link->link_index); 632 } 633