1*265280b9SAurabindo Pillai /*
2*265280b9SAurabindo Pillai  * Copyright 2021 Advanced Micro Devices, Inc.
3*265280b9SAurabindo Pillai  *
4*265280b9SAurabindo Pillai  * Permission is hereby granted, free of charge, to any person obtaining a
5*265280b9SAurabindo Pillai  * copy of this software and associated documentation files (the "Software"),
6*265280b9SAurabindo Pillai  * to deal in the Software without restriction, including without limitation
7*265280b9SAurabindo Pillai  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*265280b9SAurabindo Pillai  * and/or sell copies of the Software, and to permit persons to whom the
9*265280b9SAurabindo Pillai  * Software is furnished to do so, subject to the following conditions:
10*265280b9SAurabindo Pillai  *
11*265280b9SAurabindo Pillai  * The above copyright notice and this permission notice shall be included in
12*265280b9SAurabindo Pillai  * all copies or substantial portions of the Software.
13*265280b9SAurabindo Pillai  *
14*265280b9SAurabindo Pillai  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*265280b9SAurabindo Pillai  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*265280b9SAurabindo Pillai  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17*265280b9SAurabindo Pillai  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*265280b9SAurabindo Pillai  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*265280b9SAurabindo Pillai  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*265280b9SAurabindo Pillai  * OTHER DEALINGS IN THE SOFTWARE.
21*265280b9SAurabindo Pillai  *
22*265280b9SAurabindo Pillai  * Authors: AMD
23*265280b9SAurabindo Pillai  *
24*265280b9SAurabindo Pillai  */
25*265280b9SAurabindo Pillai #ifndef SMU13_DRIVER_IF_DCN32_H
26*265280b9SAurabindo Pillai #define SMU13_DRIVER_IF_DCN32_H
27*265280b9SAurabindo Pillai 
28*265280b9SAurabindo Pillai // *** IMPORTANT ***
29*265280b9SAurabindo Pillai // PMFW TEAM: Always increment the interface version on any change to this file
30*265280b9SAurabindo Pillai #define SMU13_DRIVER_IF_VERSION  0x18
31*265280b9SAurabindo Pillai 
32*265280b9SAurabindo Pillai //Only Clks that have DPM descriptors are listed here
33*265280b9SAurabindo Pillai typedef enum {
34*265280b9SAurabindo Pillai   PPCLK_GFXCLK = 0,
35*265280b9SAurabindo Pillai   PPCLK_SOCCLK,
36*265280b9SAurabindo Pillai   PPCLK_UCLK,
37*265280b9SAurabindo Pillai   PPCLK_FCLK,
38*265280b9SAurabindo Pillai   PPCLK_DCLK_0,
39*265280b9SAurabindo Pillai   PPCLK_VCLK_0,
40*265280b9SAurabindo Pillai   PPCLK_DCLK_1,
41*265280b9SAurabindo Pillai   PPCLK_VCLK_1,
42*265280b9SAurabindo Pillai   PPCLK_DISPCLK,
43*265280b9SAurabindo Pillai   PPCLK_DPPCLK,
44*265280b9SAurabindo Pillai   PPCLK_DPREFCLK,
45*265280b9SAurabindo Pillai   PPCLK_DCFCLK,
46*265280b9SAurabindo Pillai   PPCLK_DTBCLK,
47*265280b9SAurabindo Pillai   PPCLK_COUNT,
48*265280b9SAurabindo Pillai } PPCLK_e;
49*265280b9SAurabindo Pillai 
50*265280b9SAurabindo Pillai typedef enum {
51*265280b9SAurabindo Pillai   UCLK_DIV_BY_1 = 0,
52*265280b9SAurabindo Pillai   UCLK_DIV_BY_2,
53*265280b9SAurabindo Pillai   UCLK_DIV_BY_4,
54*265280b9SAurabindo Pillai   UCLK_DIV_BY_8,
55*265280b9SAurabindo Pillai } UCLK_DIV_e;
56*265280b9SAurabindo Pillai 
57*265280b9SAurabindo Pillai typedef struct {
58*265280b9SAurabindo Pillai   uint8_t  WmSetting;
59*265280b9SAurabindo Pillai   uint8_t  Flags;
60*265280b9SAurabindo Pillai   uint8_t  Padding[2];
61*265280b9SAurabindo Pillai 
62*265280b9SAurabindo Pillai } WatermarkRowGeneric_t;
63*265280b9SAurabindo Pillai 
64*265280b9SAurabindo Pillai #define NUM_WM_RANGES 4
65*265280b9SAurabindo Pillai 
66*265280b9SAurabindo Pillai typedef enum {
67*265280b9SAurabindo Pillai   WATERMARKS_CLOCK_RANGE = 0,
68*265280b9SAurabindo Pillai   WATERMARKS_DUMMY_PSTATE,
69*265280b9SAurabindo Pillai   WATERMARKS_MALL,
70*265280b9SAurabindo Pillai   WATERMARKS_COUNT,
71*265280b9SAurabindo Pillai } WATERMARKS_FLAGS_e;
72*265280b9SAurabindo Pillai 
73*265280b9SAurabindo Pillai typedef struct {
74*265280b9SAurabindo Pillai   // Watermarks
75*265280b9SAurabindo Pillai   WatermarkRowGeneric_t WatermarkRow[NUM_WM_RANGES];
76*265280b9SAurabindo Pillai } Watermarks_t;
77*265280b9SAurabindo Pillai 
78*265280b9SAurabindo Pillai typedef struct {
79*265280b9SAurabindo Pillai   Watermarks_t Watermarks;
80*265280b9SAurabindo Pillai   uint32_t  Spare[16];
81*265280b9SAurabindo Pillai 
82*265280b9SAurabindo Pillai   uint32_t     MmHubPadding[8]; // SMU internal use
83*265280b9SAurabindo Pillai } WatermarksExternal_t;
84*265280b9SAurabindo Pillai 
85*265280b9SAurabindo Pillai // These defines are used with the following messages:
86*265280b9SAurabindo Pillai // SMC_MSG_TransferTableDram2Smu
87*265280b9SAurabindo Pillai // SMC_MSG_TransferTableSmu2Dram
88*265280b9SAurabindo Pillai 
89*265280b9SAurabindo Pillai // Table transfer status
90*265280b9SAurabindo Pillai #define TABLE_TRANSFER_OK         0x0
91*265280b9SAurabindo Pillai #define TABLE_TRANSFER_FAILED     0xFF
92*265280b9SAurabindo Pillai #define TABLE_TRANSFER_PENDING    0xAB
93*265280b9SAurabindo Pillai 
94*265280b9SAurabindo Pillai // Table types
95*265280b9SAurabindo Pillai #define TABLE_PMFW_PPTABLE            0
96*265280b9SAurabindo Pillai #define TABLE_COMBO_PPTABLE           1
97*265280b9SAurabindo Pillai #define TABLE_WATERMARKS              2
98*265280b9SAurabindo Pillai #define TABLE_AVFS_PSM_DEBUG          3
99*265280b9SAurabindo Pillai #define TABLE_PMSTATUSLOG             4
100*265280b9SAurabindo Pillai #define TABLE_SMU_METRICS             5
101*265280b9SAurabindo Pillai #define TABLE_DRIVER_SMU_CONFIG       6
102*265280b9SAurabindo Pillai #define TABLE_ACTIVITY_MONITOR_COEFF  7
103*265280b9SAurabindo Pillai #define TABLE_OVERDRIVE               8
104*265280b9SAurabindo Pillai #define TABLE_I2C_COMMANDS            9
105*265280b9SAurabindo Pillai #define TABLE_DRIVER_INFO             10
106*265280b9SAurabindo Pillai #define TABLE_COUNT                   11
107*265280b9SAurabindo Pillai 
108*265280b9SAurabindo Pillai #endif
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