1118a3315SNicholas Kazlauskas /* 2118a3315SNicholas Kazlauskas * Copyright 2019 Advanced Micro Devices, Inc. 3118a3315SNicholas Kazlauskas * 4118a3315SNicholas Kazlauskas * Permission is hereby granted, free of charge, to any person obtaining a 5118a3315SNicholas Kazlauskas * copy of this software and associated documentation files (the "Software"), 6118a3315SNicholas Kazlauskas * to deal in the Software without restriction, including without limitation 7118a3315SNicholas Kazlauskas * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8118a3315SNicholas Kazlauskas * and/or sell copies of the Software, and to permit persons to whom the 9118a3315SNicholas Kazlauskas * Software is furnished to do so, subject to the following conditions: 10118a3315SNicholas Kazlauskas * 11118a3315SNicholas Kazlauskas * The above copyright notice and this permission notice shall be included in 12118a3315SNicholas Kazlauskas * all copies or substantial portions of the Software. 13118a3315SNicholas Kazlauskas * 14118a3315SNicholas Kazlauskas * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15118a3315SNicholas Kazlauskas * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16118a3315SNicholas Kazlauskas * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17118a3315SNicholas Kazlauskas * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18118a3315SNicholas Kazlauskas * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19118a3315SNicholas Kazlauskas * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20118a3315SNicholas Kazlauskas * OTHER DEALINGS IN THE SOFTWARE. 21118a3315SNicholas Kazlauskas * 22118a3315SNicholas Kazlauskas * Authors: AMD 23118a3315SNicholas Kazlauskas * 24118a3315SNicholas Kazlauskas */ 25118a3315SNicholas Kazlauskas 26118a3315SNicholas Kazlauskas #ifndef __DCN31_CLK_MGR_H__ 27118a3315SNicholas Kazlauskas #define __DCN31_CLK_MGR_H__ 28118a3315SNicholas Kazlauskas #include "clk_mgr_internal.h" 29118a3315SNicholas Kazlauskas 30118a3315SNicholas Kazlauskas struct dcn31_watermarks; 31118a3315SNicholas Kazlauskas 32118a3315SNicholas Kazlauskas struct dcn31_smu_watermark_set { 33118a3315SNicholas Kazlauskas struct dcn31_watermarks *wm_set; 34118a3315SNicholas Kazlauskas union large_integer mc_address; 35118a3315SNicholas Kazlauskas }; 36118a3315SNicholas Kazlauskas 37118a3315SNicholas Kazlauskas struct clk_mgr_dcn31 { 38118a3315SNicholas Kazlauskas struct clk_mgr_internal base; 39118a3315SNicholas Kazlauskas struct dcn31_smu_watermark_set smu_wm_set; 40118a3315SNicholas Kazlauskas }; 41118a3315SNicholas Kazlauskas 42b57d16bdSDmytro Laktyushkin bool dcn31_are_clock_states_equal(struct dc_clocks *a, 43b57d16bdSDmytro Laktyushkin struct dc_clocks *b); 44b57d16bdSDmytro Laktyushkin void dcn31_init_clocks(struct clk_mgr *clk_mgr); 45b57d16bdSDmytro Laktyushkin void dcn31_update_clocks(struct clk_mgr *clk_mgr_base, 46b57d16bdSDmytro Laktyushkin struct dc_state *context, 47b57d16bdSDmytro Laktyushkin bool safe_to_lower); 48b57d16bdSDmytro Laktyushkin 49118a3315SNicholas Kazlauskas void dcn31_clk_mgr_construct(struct dc_context *ctx, 50118a3315SNicholas Kazlauskas struct clk_mgr_dcn31 *clk_mgr, 51118a3315SNicholas Kazlauskas struct pp_smu_funcs *pp_smu, 52118a3315SNicholas Kazlauskas struct dccg *dccg); 53118a3315SNicholas Kazlauskas 54*0ec74408SLeung, Martin int dcn31_get_dtb_ref_freq_khz(struct clk_mgr *clk_mgr_base); 55*0ec74408SLeung, Martin 56118a3315SNicholas Kazlauskas void dcn31_clk_mgr_destroy(struct clk_mgr_internal *clk_mgr_int); 57118a3315SNicholas Kazlauskas 58118a3315SNicholas Kazlauskas #endif //__DCN31_CLK_MGR_H__ 59