1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include "dm_services.h" 27 28 #include "ObjectID.h" 29 #include "atomfirmware.h" 30 31 #include "include/bios_parser_types.h" 32 33 #include "command_table_helper2.h" 34 35 bool dal_bios_parser_init_cmd_tbl_helper2( 36 const struct command_table_helper **h, 37 enum dce_version dce) 38 { 39 switch (dce) { 40 case DCE_VERSION_8_0: 41 case DCE_VERSION_8_1: 42 case DCE_VERSION_8_3: 43 *h = dal_cmd_tbl_helper_dce80_get_table(); 44 return true; 45 46 case DCE_VERSION_10_0: 47 *h = dal_cmd_tbl_helper_dce110_get_table(); 48 return true; 49 50 case DCE_VERSION_11_0: 51 *h = dal_cmd_tbl_helper_dce110_get_table(); 52 return true; 53 54 case DCE_VERSION_11_2: 55 case DCE_VERSION_11_22: 56 case DCE_VERSION_12_0: 57 case DCE_VERSION_12_1: 58 *h = dal_cmd_tbl_helper_dce112_get_table2(); 59 return true; 60 #if defined(CONFIG_DRM_AMD_DC_DCN) 61 case DCN_VERSION_1_0: 62 case DCN_VERSION_1_01: 63 case DCN_VERSION_2_0: 64 case DCN_VERSION_2_1: 65 *h = dal_cmd_tbl_helper_dce112_get_table2(); 66 return true; 67 #endif 68 69 default: 70 /* Unsupported DCE */ 71 BREAK_TO_DEBUGGER(); 72 return false; 73 } 74 } 75 76 /* real implementations */ 77 78 bool dal_cmd_table_helper_controller_id_to_atom2( 79 enum controller_id id, 80 uint8_t *atom_id) 81 { 82 if (atom_id == NULL) { 83 BREAK_TO_DEBUGGER(); 84 return false; 85 } 86 87 switch (id) { 88 case CONTROLLER_ID_D0: 89 *atom_id = ATOM_CRTC1; 90 return true; 91 case CONTROLLER_ID_D1: 92 *atom_id = ATOM_CRTC2; 93 return true; 94 case CONTROLLER_ID_D2: 95 *atom_id = ATOM_CRTC3; 96 return true; 97 case CONTROLLER_ID_D3: 98 *atom_id = ATOM_CRTC4; 99 return true; 100 case CONTROLLER_ID_D4: 101 *atom_id = ATOM_CRTC5; 102 return true; 103 case CONTROLLER_ID_D5: 104 *atom_id = ATOM_CRTC6; 105 return true; 106 /* TODO :case CONTROLLER_ID_UNDERLAY0: 107 *atom_id = ATOM_UNDERLAY_PIPE0; 108 return true; 109 */ 110 case CONTROLLER_ID_UNDEFINED: 111 *atom_id = ATOM_CRTC_INVALID; 112 return true; 113 default: 114 /* Wrong controller id */ 115 BREAK_TO_DEBUGGER(); 116 return false; 117 } 118 } 119 120 /** 121 * translate_transmitter_bp_to_atom 122 * 123 * @brief 124 * Translate the Transmitter to the corresponding ATOM BIOS value 125 * 126 * @param 127 * input transmitter 128 * output digitalTransmitter 129 * // =00: Digital Transmitter1 ( UNIPHY linkAB ) 130 * // =01: Digital Transmitter2 ( UNIPHY linkCD ) 131 * // =02: Digital Transmitter3 ( UNIPHY linkEF ) 132 */ 133 uint8_t dal_cmd_table_helper_transmitter_bp_to_atom2( 134 enum transmitter t) 135 { 136 switch (t) { 137 case TRANSMITTER_UNIPHY_A: 138 case TRANSMITTER_UNIPHY_B: 139 case TRANSMITTER_TRAVIS_LCD: 140 return 0; 141 case TRANSMITTER_UNIPHY_C: 142 case TRANSMITTER_UNIPHY_D: 143 return 1; 144 case TRANSMITTER_UNIPHY_E: 145 case TRANSMITTER_UNIPHY_F: 146 return 2; 147 default: 148 /* Invalid Transmitter Type! */ 149 BREAK_TO_DEBUGGER(); 150 return 0; 151 } 152 } 153 154 uint32_t dal_cmd_table_helper_encoder_mode_bp_to_atom2( 155 enum signal_type s, 156 bool enable_dp_audio) 157 { 158 switch (s) { 159 case SIGNAL_TYPE_DVI_SINGLE_LINK: 160 case SIGNAL_TYPE_DVI_DUAL_LINK: 161 return ATOM_ENCODER_MODE_DVI; 162 case SIGNAL_TYPE_HDMI_TYPE_A: 163 return ATOM_ENCODER_MODE_HDMI; 164 case SIGNAL_TYPE_LVDS: 165 return ATOM_ENCODER_MODE_LVDS; 166 case SIGNAL_TYPE_EDP: 167 case SIGNAL_TYPE_DISPLAY_PORT_MST: 168 case SIGNAL_TYPE_DISPLAY_PORT: 169 case SIGNAL_TYPE_VIRTUAL: 170 if (enable_dp_audio) 171 return ATOM_ENCODER_MODE_DP_AUDIO; 172 else 173 return ATOM_ENCODER_MODE_DP; 174 case SIGNAL_TYPE_RGB: 175 return ATOM_ENCODER_MODE_CRT; 176 default: 177 return ATOM_ENCODER_MODE_CRT; 178 } 179 } 180 181 bool dal_cmd_table_helper_clock_source_id_to_ref_clk_src2( 182 enum clock_source_id id, 183 uint32_t *ref_clk_src_id) 184 { 185 if (ref_clk_src_id == NULL) { 186 BREAK_TO_DEBUGGER(); 187 return false; 188 } 189 190 switch (id) { 191 case CLOCK_SOURCE_ID_PLL1: 192 *ref_clk_src_id = ENCODER_REFCLK_SRC_P1PLL; 193 return true; 194 case CLOCK_SOURCE_ID_PLL2: 195 *ref_clk_src_id = ENCODER_REFCLK_SRC_P2PLL; 196 return true; 197 /*TODO:case CLOCK_SOURCE_ID_DCPLL: 198 *ref_clk_src_id = ENCODER_REFCLK_SRC_DCPLL; 199 return true; 200 */ 201 case CLOCK_SOURCE_ID_EXTERNAL: 202 *ref_clk_src_id = ENCODER_REFCLK_SRC_EXTCLK; 203 return true; 204 case CLOCK_SOURCE_ID_UNDEFINED: 205 *ref_clk_src_id = ENCODER_REFCLK_SRC_INVALID; 206 return true; 207 default: 208 /* Unsupported clock source id */ 209 BREAK_TO_DEBUGGER(); 210 return false; 211 } 212 } 213 214 uint8_t dal_cmd_table_helper_encoder_id_to_atom2( 215 enum encoder_id id) 216 { 217 switch (id) { 218 case ENCODER_ID_INTERNAL_LVDS: 219 return ENCODER_OBJECT_ID_INTERNAL_LVDS; 220 case ENCODER_ID_INTERNAL_TMDS1: 221 return ENCODER_OBJECT_ID_INTERNAL_TMDS1; 222 case ENCODER_ID_INTERNAL_TMDS2: 223 return ENCODER_OBJECT_ID_INTERNAL_TMDS2; 224 case ENCODER_ID_INTERNAL_DAC1: 225 return ENCODER_OBJECT_ID_INTERNAL_DAC1; 226 case ENCODER_ID_INTERNAL_DAC2: 227 return ENCODER_OBJECT_ID_INTERNAL_DAC2; 228 case ENCODER_ID_INTERNAL_LVTM1: 229 return ENCODER_OBJECT_ID_INTERNAL_LVTM1; 230 case ENCODER_ID_INTERNAL_HDMI: 231 return ENCODER_OBJECT_ID_HDMI_INTERNAL; 232 case ENCODER_ID_EXTERNAL_TRAVIS: 233 return ENCODER_OBJECT_ID_TRAVIS; 234 case ENCODER_ID_EXTERNAL_NUTMEG: 235 return ENCODER_OBJECT_ID_NUTMEG; 236 case ENCODER_ID_INTERNAL_KLDSCP_TMDS1: 237 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1; 238 case ENCODER_ID_INTERNAL_KLDSCP_DAC1: 239 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1; 240 case ENCODER_ID_INTERNAL_KLDSCP_DAC2: 241 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2; 242 case ENCODER_ID_EXTERNAL_MVPU_FPGA: 243 return ENCODER_OBJECT_ID_MVPU_FPGA; 244 case ENCODER_ID_INTERNAL_DDI: 245 return ENCODER_OBJECT_ID_INTERNAL_DDI; 246 case ENCODER_ID_INTERNAL_UNIPHY: 247 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY; 248 case ENCODER_ID_INTERNAL_KLDSCP_LVTMA: 249 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA; 250 case ENCODER_ID_INTERNAL_UNIPHY1: 251 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY1; 252 case ENCODER_ID_INTERNAL_UNIPHY2: 253 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY2; 254 case ENCODER_ID_INTERNAL_UNIPHY3: 255 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY3; 256 case ENCODER_ID_INTERNAL_WIRELESS: 257 return ENCODER_OBJECT_ID_INTERNAL_VCE; 258 case ENCODER_ID_INTERNAL_VIRTUAL: 259 return ENCODER_OBJECT_ID_NONE; 260 case ENCODER_ID_UNKNOWN: 261 return ENCODER_OBJECT_ID_NONE; 262 default: 263 /* Invalid encoder id */ 264 BREAK_TO_DEBUGGER(); 265 return ENCODER_OBJECT_ID_NONE; 266 } 267 } 268