1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/kernel.h> 26 #include <linux/pci.h> 27 #include <linux/errno.h> 28 #include <linux/acpi.h> 29 #include <linux/hash.h> 30 #include <linux/cpufreq.h> 31 #include <linux/log2.h> 32 #include <linux/dmi.h> 33 #include <linux/atomic.h> 34 35 #include "kfd_priv.h" 36 #include "kfd_crat.h" 37 #include "kfd_topology.h" 38 #include "kfd_device_queue_manager.h" 39 #include "kfd_iommu.h" 40 #include "kfd_svm.h" 41 #include "kfd_debug.h" 42 #include "amdgpu_amdkfd.h" 43 #include "amdgpu_ras.h" 44 #include "amdgpu.h" 45 46 /* topology_device_list - Master list of all topology devices */ 47 static struct list_head topology_device_list; 48 static struct kfd_system_properties sys_props; 49 50 static DECLARE_RWSEM(topology_lock); 51 static uint32_t topology_crat_proximity_domain; 52 53 struct kfd_topology_device *kfd_topology_device_by_proximity_domain_no_lock( 54 uint32_t proximity_domain) 55 { 56 struct kfd_topology_device *top_dev; 57 struct kfd_topology_device *device = NULL; 58 59 list_for_each_entry(top_dev, &topology_device_list, list) 60 if (top_dev->proximity_domain == proximity_domain) { 61 device = top_dev; 62 break; 63 } 64 65 return device; 66 } 67 68 struct kfd_topology_device *kfd_topology_device_by_proximity_domain( 69 uint32_t proximity_domain) 70 { 71 struct kfd_topology_device *device = NULL; 72 73 down_read(&topology_lock); 74 75 device = kfd_topology_device_by_proximity_domain_no_lock( 76 proximity_domain); 77 up_read(&topology_lock); 78 79 return device; 80 } 81 82 struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id) 83 { 84 struct kfd_topology_device *top_dev = NULL; 85 struct kfd_topology_device *ret = NULL; 86 87 down_read(&topology_lock); 88 89 list_for_each_entry(top_dev, &topology_device_list, list) 90 if (top_dev->gpu_id == gpu_id) { 91 ret = top_dev; 92 break; 93 } 94 95 up_read(&topology_lock); 96 97 return ret; 98 } 99 100 struct kfd_node *kfd_device_by_id(uint32_t gpu_id) 101 { 102 struct kfd_topology_device *top_dev; 103 104 top_dev = kfd_topology_device_by_id(gpu_id); 105 if (!top_dev) 106 return NULL; 107 108 return top_dev->gpu; 109 } 110 111 struct kfd_node *kfd_device_by_pci_dev(const struct pci_dev *pdev) 112 { 113 struct kfd_topology_device *top_dev; 114 struct kfd_node *device = NULL; 115 116 down_read(&topology_lock); 117 118 list_for_each_entry(top_dev, &topology_device_list, list) 119 if (top_dev->gpu && top_dev->gpu->adev->pdev == pdev) { 120 device = top_dev->gpu; 121 break; 122 } 123 124 up_read(&topology_lock); 125 126 return device; 127 } 128 129 /* Called with write topology_lock acquired */ 130 static void kfd_release_topology_device(struct kfd_topology_device *dev) 131 { 132 struct kfd_mem_properties *mem; 133 struct kfd_cache_properties *cache; 134 struct kfd_iolink_properties *iolink; 135 struct kfd_iolink_properties *p2plink; 136 struct kfd_perf_properties *perf; 137 138 list_del(&dev->list); 139 140 while (dev->mem_props.next != &dev->mem_props) { 141 mem = container_of(dev->mem_props.next, 142 struct kfd_mem_properties, list); 143 list_del(&mem->list); 144 kfree(mem); 145 } 146 147 while (dev->cache_props.next != &dev->cache_props) { 148 cache = container_of(dev->cache_props.next, 149 struct kfd_cache_properties, list); 150 list_del(&cache->list); 151 kfree(cache); 152 } 153 154 while (dev->io_link_props.next != &dev->io_link_props) { 155 iolink = container_of(dev->io_link_props.next, 156 struct kfd_iolink_properties, list); 157 list_del(&iolink->list); 158 kfree(iolink); 159 } 160 161 while (dev->p2p_link_props.next != &dev->p2p_link_props) { 162 p2plink = container_of(dev->p2p_link_props.next, 163 struct kfd_iolink_properties, list); 164 list_del(&p2plink->list); 165 kfree(p2plink); 166 } 167 168 while (dev->perf_props.next != &dev->perf_props) { 169 perf = container_of(dev->perf_props.next, 170 struct kfd_perf_properties, list); 171 list_del(&perf->list); 172 kfree(perf); 173 } 174 175 kfree(dev); 176 } 177 178 void kfd_release_topology_device_list(struct list_head *device_list) 179 { 180 struct kfd_topology_device *dev; 181 182 while (!list_empty(device_list)) { 183 dev = list_first_entry(device_list, 184 struct kfd_topology_device, list); 185 kfd_release_topology_device(dev); 186 } 187 } 188 189 static void kfd_release_live_view(void) 190 { 191 kfd_release_topology_device_list(&topology_device_list); 192 memset(&sys_props, 0, sizeof(sys_props)); 193 } 194 195 struct kfd_topology_device *kfd_create_topology_device( 196 struct list_head *device_list) 197 { 198 struct kfd_topology_device *dev; 199 200 dev = kfd_alloc_struct(dev); 201 if (!dev) { 202 pr_err("No memory to allocate a topology device"); 203 return NULL; 204 } 205 206 INIT_LIST_HEAD(&dev->mem_props); 207 INIT_LIST_HEAD(&dev->cache_props); 208 INIT_LIST_HEAD(&dev->io_link_props); 209 INIT_LIST_HEAD(&dev->p2p_link_props); 210 INIT_LIST_HEAD(&dev->perf_props); 211 212 list_add_tail(&dev->list, device_list); 213 214 return dev; 215 } 216 217 218 #define sysfs_show_gen_prop(buffer, offs, fmt, ...) \ 219 (offs += snprintf(buffer+offs, PAGE_SIZE-offs, \ 220 fmt, __VA_ARGS__)) 221 #define sysfs_show_32bit_prop(buffer, offs, name, value) \ 222 sysfs_show_gen_prop(buffer, offs, "%s %u\n", name, value) 223 #define sysfs_show_64bit_prop(buffer, offs, name, value) \ 224 sysfs_show_gen_prop(buffer, offs, "%s %llu\n", name, value) 225 #define sysfs_show_32bit_val(buffer, offs, value) \ 226 sysfs_show_gen_prop(buffer, offs, "%u\n", value) 227 #define sysfs_show_str_val(buffer, offs, value) \ 228 sysfs_show_gen_prop(buffer, offs, "%s\n", value) 229 230 static ssize_t sysprops_show(struct kobject *kobj, struct attribute *attr, 231 char *buffer) 232 { 233 int offs = 0; 234 235 /* Making sure that the buffer is an empty string */ 236 buffer[0] = 0; 237 238 if (attr == &sys_props.attr_genid) { 239 sysfs_show_32bit_val(buffer, offs, 240 sys_props.generation_count); 241 } else if (attr == &sys_props.attr_props) { 242 sysfs_show_64bit_prop(buffer, offs, "platform_oem", 243 sys_props.platform_oem); 244 sysfs_show_64bit_prop(buffer, offs, "platform_id", 245 sys_props.platform_id); 246 sysfs_show_64bit_prop(buffer, offs, "platform_rev", 247 sys_props.platform_rev); 248 } else { 249 offs = -EINVAL; 250 } 251 252 return offs; 253 } 254 255 static void kfd_topology_kobj_release(struct kobject *kobj) 256 { 257 kfree(kobj); 258 } 259 260 static const struct sysfs_ops sysprops_ops = { 261 .show = sysprops_show, 262 }; 263 264 static const struct kobj_type sysprops_type = { 265 .release = kfd_topology_kobj_release, 266 .sysfs_ops = &sysprops_ops, 267 }; 268 269 static ssize_t iolink_show(struct kobject *kobj, struct attribute *attr, 270 char *buffer) 271 { 272 int offs = 0; 273 struct kfd_iolink_properties *iolink; 274 275 /* Making sure that the buffer is an empty string */ 276 buffer[0] = 0; 277 278 iolink = container_of(attr, struct kfd_iolink_properties, attr); 279 if (iolink->gpu && kfd_devcgroup_check_permission(iolink->gpu)) 280 return -EPERM; 281 sysfs_show_32bit_prop(buffer, offs, "type", iolink->iolink_type); 282 sysfs_show_32bit_prop(buffer, offs, "version_major", iolink->ver_maj); 283 sysfs_show_32bit_prop(buffer, offs, "version_minor", iolink->ver_min); 284 sysfs_show_32bit_prop(buffer, offs, "node_from", iolink->node_from); 285 sysfs_show_32bit_prop(buffer, offs, "node_to", iolink->node_to); 286 sysfs_show_32bit_prop(buffer, offs, "weight", iolink->weight); 287 sysfs_show_32bit_prop(buffer, offs, "min_latency", iolink->min_latency); 288 sysfs_show_32bit_prop(buffer, offs, "max_latency", iolink->max_latency); 289 sysfs_show_32bit_prop(buffer, offs, "min_bandwidth", 290 iolink->min_bandwidth); 291 sysfs_show_32bit_prop(buffer, offs, "max_bandwidth", 292 iolink->max_bandwidth); 293 sysfs_show_32bit_prop(buffer, offs, "recommended_transfer_size", 294 iolink->rec_transfer_size); 295 sysfs_show_32bit_prop(buffer, offs, "flags", iolink->flags); 296 297 return offs; 298 } 299 300 static const struct sysfs_ops iolink_ops = { 301 .show = iolink_show, 302 }; 303 304 static const struct kobj_type iolink_type = { 305 .release = kfd_topology_kobj_release, 306 .sysfs_ops = &iolink_ops, 307 }; 308 309 static ssize_t mem_show(struct kobject *kobj, struct attribute *attr, 310 char *buffer) 311 { 312 int offs = 0; 313 struct kfd_mem_properties *mem; 314 315 /* Making sure that the buffer is an empty string */ 316 buffer[0] = 0; 317 318 mem = container_of(attr, struct kfd_mem_properties, attr); 319 if (mem->gpu && kfd_devcgroup_check_permission(mem->gpu)) 320 return -EPERM; 321 sysfs_show_32bit_prop(buffer, offs, "heap_type", mem->heap_type); 322 sysfs_show_64bit_prop(buffer, offs, "size_in_bytes", 323 mem->size_in_bytes); 324 sysfs_show_32bit_prop(buffer, offs, "flags", mem->flags); 325 sysfs_show_32bit_prop(buffer, offs, "width", mem->width); 326 sysfs_show_32bit_prop(buffer, offs, "mem_clk_max", 327 mem->mem_clk_max); 328 329 return offs; 330 } 331 332 static const struct sysfs_ops mem_ops = { 333 .show = mem_show, 334 }; 335 336 static const struct kobj_type mem_type = { 337 .release = kfd_topology_kobj_release, 338 .sysfs_ops = &mem_ops, 339 }; 340 341 static ssize_t kfd_cache_show(struct kobject *kobj, struct attribute *attr, 342 char *buffer) 343 { 344 int offs = 0; 345 uint32_t i, j; 346 struct kfd_cache_properties *cache; 347 348 /* Making sure that the buffer is an empty string */ 349 buffer[0] = 0; 350 cache = container_of(attr, struct kfd_cache_properties, attr); 351 if (cache->gpu && kfd_devcgroup_check_permission(cache->gpu)) 352 return -EPERM; 353 sysfs_show_32bit_prop(buffer, offs, "processor_id_low", 354 cache->processor_id_low); 355 sysfs_show_32bit_prop(buffer, offs, "level", cache->cache_level); 356 sysfs_show_32bit_prop(buffer, offs, "size", cache->cache_size); 357 sysfs_show_32bit_prop(buffer, offs, "cache_line_size", 358 cache->cacheline_size); 359 sysfs_show_32bit_prop(buffer, offs, "cache_lines_per_tag", 360 cache->cachelines_per_tag); 361 sysfs_show_32bit_prop(buffer, offs, "association", cache->cache_assoc); 362 sysfs_show_32bit_prop(buffer, offs, "latency", cache->cache_latency); 363 sysfs_show_32bit_prop(buffer, offs, "type", cache->cache_type); 364 365 offs += snprintf(buffer+offs, PAGE_SIZE-offs, "sibling_map "); 366 for (i = 0; i < cache->sibling_map_size; i++) 367 for (j = 0; j < sizeof(cache->sibling_map[0])*8; j++) 368 /* Check each bit */ 369 offs += snprintf(buffer+offs, PAGE_SIZE-offs, "%d,", 370 (cache->sibling_map[i] >> j) & 1); 371 372 /* Replace the last "," with end of line */ 373 buffer[offs-1] = '\n'; 374 return offs; 375 } 376 377 static const struct sysfs_ops cache_ops = { 378 .show = kfd_cache_show, 379 }; 380 381 static const struct kobj_type cache_type = { 382 .release = kfd_topology_kobj_release, 383 .sysfs_ops = &cache_ops, 384 }; 385 386 /****** Sysfs of Performance Counters ******/ 387 388 struct kfd_perf_attr { 389 struct kobj_attribute attr; 390 uint32_t data; 391 }; 392 393 static ssize_t perf_show(struct kobject *kobj, struct kobj_attribute *attrs, 394 char *buf) 395 { 396 int offs = 0; 397 struct kfd_perf_attr *attr; 398 399 buf[0] = 0; 400 attr = container_of(attrs, struct kfd_perf_attr, attr); 401 if (!attr->data) /* invalid data for PMC */ 402 return 0; 403 else 404 return sysfs_show_32bit_val(buf, offs, attr->data); 405 } 406 407 #define KFD_PERF_DESC(_name, _data) \ 408 { \ 409 .attr = __ATTR(_name, 0444, perf_show, NULL), \ 410 .data = _data, \ 411 } 412 413 static struct kfd_perf_attr perf_attr_iommu[] = { 414 KFD_PERF_DESC(max_concurrent, 0), 415 KFD_PERF_DESC(num_counters, 0), 416 KFD_PERF_DESC(counter_ids, 0), 417 }; 418 /****************************************/ 419 420 static ssize_t node_show(struct kobject *kobj, struct attribute *attr, 421 char *buffer) 422 { 423 int offs = 0; 424 struct kfd_topology_device *dev; 425 uint32_t log_max_watch_addr; 426 427 /* Making sure that the buffer is an empty string */ 428 buffer[0] = 0; 429 430 if (strcmp(attr->name, "gpu_id") == 0) { 431 dev = container_of(attr, struct kfd_topology_device, 432 attr_gpuid); 433 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu)) 434 return -EPERM; 435 return sysfs_show_32bit_val(buffer, offs, dev->gpu_id); 436 } 437 438 if (strcmp(attr->name, "name") == 0) { 439 dev = container_of(attr, struct kfd_topology_device, 440 attr_name); 441 442 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu)) 443 return -EPERM; 444 return sysfs_show_str_val(buffer, offs, dev->node_props.name); 445 } 446 447 dev = container_of(attr, struct kfd_topology_device, 448 attr_props); 449 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu)) 450 return -EPERM; 451 sysfs_show_32bit_prop(buffer, offs, "cpu_cores_count", 452 dev->node_props.cpu_cores_count); 453 sysfs_show_32bit_prop(buffer, offs, "simd_count", 454 dev->gpu ? (dev->node_props.simd_count * 455 NUM_XCC(dev->gpu->xcc_mask)) : 0); 456 sysfs_show_32bit_prop(buffer, offs, "mem_banks_count", 457 dev->node_props.mem_banks_count); 458 sysfs_show_32bit_prop(buffer, offs, "caches_count", 459 dev->node_props.caches_count); 460 sysfs_show_32bit_prop(buffer, offs, "io_links_count", 461 dev->node_props.io_links_count); 462 sysfs_show_32bit_prop(buffer, offs, "p2p_links_count", 463 dev->node_props.p2p_links_count); 464 sysfs_show_32bit_prop(buffer, offs, "cpu_core_id_base", 465 dev->node_props.cpu_core_id_base); 466 sysfs_show_32bit_prop(buffer, offs, "simd_id_base", 467 dev->node_props.simd_id_base); 468 sysfs_show_32bit_prop(buffer, offs, "max_waves_per_simd", 469 dev->node_props.max_waves_per_simd); 470 sysfs_show_32bit_prop(buffer, offs, "lds_size_in_kb", 471 dev->node_props.lds_size_in_kb); 472 sysfs_show_32bit_prop(buffer, offs, "gds_size_in_kb", 473 dev->node_props.gds_size_in_kb); 474 sysfs_show_32bit_prop(buffer, offs, "num_gws", 475 dev->node_props.num_gws); 476 sysfs_show_32bit_prop(buffer, offs, "wave_front_size", 477 dev->node_props.wave_front_size); 478 sysfs_show_32bit_prop(buffer, offs, "array_count", 479 dev->gpu ? (dev->node_props.array_count * 480 NUM_XCC(dev->gpu->xcc_mask)) : 0); 481 sysfs_show_32bit_prop(buffer, offs, "simd_arrays_per_engine", 482 dev->node_props.simd_arrays_per_engine); 483 sysfs_show_32bit_prop(buffer, offs, "cu_per_simd_array", 484 dev->node_props.cu_per_simd_array); 485 sysfs_show_32bit_prop(buffer, offs, "simd_per_cu", 486 dev->node_props.simd_per_cu); 487 sysfs_show_32bit_prop(buffer, offs, "max_slots_scratch_cu", 488 dev->node_props.max_slots_scratch_cu); 489 sysfs_show_32bit_prop(buffer, offs, "gfx_target_version", 490 dev->node_props.gfx_target_version); 491 sysfs_show_32bit_prop(buffer, offs, "vendor_id", 492 dev->node_props.vendor_id); 493 sysfs_show_32bit_prop(buffer, offs, "device_id", 494 dev->node_props.device_id); 495 sysfs_show_32bit_prop(buffer, offs, "location_id", 496 dev->node_props.location_id); 497 sysfs_show_32bit_prop(buffer, offs, "domain", 498 dev->node_props.domain); 499 sysfs_show_32bit_prop(buffer, offs, "drm_render_minor", 500 dev->node_props.drm_render_minor); 501 sysfs_show_64bit_prop(buffer, offs, "hive_id", 502 dev->node_props.hive_id); 503 sysfs_show_32bit_prop(buffer, offs, "num_sdma_engines", 504 dev->node_props.num_sdma_engines); 505 sysfs_show_32bit_prop(buffer, offs, "num_sdma_xgmi_engines", 506 dev->node_props.num_sdma_xgmi_engines); 507 sysfs_show_32bit_prop(buffer, offs, "num_sdma_queues_per_engine", 508 dev->node_props.num_sdma_queues_per_engine); 509 sysfs_show_32bit_prop(buffer, offs, "num_cp_queues", 510 dev->node_props.num_cp_queues); 511 512 if (dev->gpu) { 513 log_max_watch_addr = 514 __ilog2_u32(dev->gpu->kfd->device_info.num_of_watch_points); 515 516 if (log_max_watch_addr) { 517 dev->node_props.capability |= 518 HSA_CAP_WATCH_POINTS_SUPPORTED; 519 520 dev->node_props.capability |= 521 ((log_max_watch_addr << 522 HSA_CAP_WATCH_POINTS_TOTALBITS_SHIFT) & 523 HSA_CAP_WATCH_POINTS_TOTALBITS_MASK); 524 } 525 526 if (dev->gpu->adev->asic_type == CHIP_TONGA) 527 dev->node_props.capability |= 528 HSA_CAP_AQL_QUEUE_DOUBLE_MAP; 529 530 sysfs_show_32bit_prop(buffer, offs, "max_engine_clk_fcompute", 531 dev->node_props.max_engine_clk_fcompute); 532 533 sysfs_show_64bit_prop(buffer, offs, "local_mem_size", 0ULL); 534 535 sysfs_show_32bit_prop(buffer, offs, "fw_version", 536 dev->gpu->kfd->mec_fw_version); 537 sysfs_show_32bit_prop(buffer, offs, "capability", 538 dev->node_props.capability); 539 sysfs_show_64bit_prop(buffer, offs, "debug_prop", 540 dev->node_props.debug_prop); 541 sysfs_show_32bit_prop(buffer, offs, "sdma_fw_version", 542 dev->gpu->kfd->sdma_fw_version); 543 sysfs_show_64bit_prop(buffer, offs, "unique_id", 544 dev->gpu->adev->unique_id); 545 sysfs_show_32bit_prop(buffer, offs, "num_xcc", 546 NUM_XCC(dev->gpu->xcc_mask)); 547 } 548 549 return sysfs_show_32bit_prop(buffer, offs, "max_engine_clk_ccompute", 550 cpufreq_quick_get_max(0)/1000); 551 } 552 553 static const struct sysfs_ops node_ops = { 554 .show = node_show, 555 }; 556 557 static const struct kobj_type node_type = { 558 .release = kfd_topology_kobj_release, 559 .sysfs_ops = &node_ops, 560 }; 561 562 static void kfd_remove_sysfs_file(struct kobject *kobj, struct attribute *attr) 563 { 564 sysfs_remove_file(kobj, attr); 565 kobject_del(kobj); 566 kobject_put(kobj); 567 } 568 569 static void kfd_remove_sysfs_node_entry(struct kfd_topology_device *dev) 570 { 571 struct kfd_iolink_properties *p2plink; 572 struct kfd_iolink_properties *iolink; 573 struct kfd_cache_properties *cache; 574 struct kfd_mem_properties *mem; 575 struct kfd_perf_properties *perf; 576 577 if (dev->kobj_iolink) { 578 list_for_each_entry(iolink, &dev->io_link_props, list) 579 if (iolink->kobj) { 580 kfd_remove_sysfs_file(iolink->kobj, 581 &iolink->attr); 582 iolink->kobj = NULL; 583 } 584 kobject_del(dev->kobj_iolink); 585 kobject_put(dev->kobj_iolink); 586 dev->kobj_iolink = NULL; 587 } 588 589 if (dev->kobj_p2plink) { 590 list_for_each_entry(p2plink, &dev->p2p_link_props, list) 591 if (p2plink->kobj) { 592 kfd_remove_sysfs_file(p2plink->kobj, 593 &p2plink->attr); 594 p2plink->kobj = NULL; 595 } 596 kobject_del(dev->kobj_p2plink); 597 kobject_put(dev->kobj_p2plink); 598 dev->kobj_p2plink = NULL; 599 } 600 601 if (dev->kobj_cache) { 602 list_for_each_entry(cache, &dev->cache_props, list) 603 if (cache->kobj) { 604 kfd_remove_sysfs_file(cache->kobj, 605 &cache->attr); 606 cache->kobj = NULL; 607 } 608 kobject_del(dev->kobj_cache); 609 kobject_put(dev->kobj_cache); 610 dev->kobj_cache = NULL; 611 } 612 613 if (dev->kobj_mem) { 614 list_for_each_entry(mem, &dev->mem_props, list) 615 if (mem->kobj) { 616 kfd_remove_sysfs_file(mem->kobj, &mem->attr); 617 mem->kobj = NULL; 618 } 619 kobject_del(dev->kobj_mem); 620 kobject_put(dev->kobj_mem); 621 dev->kobj_mem = NULL; 622 } 623 624 if (dev->kobj_perf) { 625 list_for_each_entry(perf, &dev->perf_props, list) { 626 kfree(perf->attr_group); 627 perf->attr_group = NULL; 628 } 629 kobject_del(dev->kobj_perf); 630 kobject_put(dev->kobj_perf); 631 dev->kobj_perf = NULL; 632 } 633 634 if (dev->kobj_node) { 635 sysfs_remove_file(dev->kobj_node, &dev->attr_gpuid); 636 sysfs_remove_file(dev->kobj_node, &dev->attr_name); 637 sysfs_remove_file(dev->kobj_node, &dev->attr_props); 638 kobject_del(dev->kobj_node); 639 kobject_put(dev->kobj_node); 640 dev->kobj_node = NULL; 641 } 642 } 643 644 static int kfd_build_sysfs_node_entry(struct kfd_topology_device *dev, 645 uint32_t id) 646 { 647 struct kfd_iolink_properties *p2plink; 648 struct kfd_iolink_properties *iolink; 649 struct kfd_cache_properties *cache; 650 struct kfd_mem_properties *mem; 651 struct kfd_perf_properties *perf; 652 int ret; 653 uint32_t i, num_attrs; 654 struct attribute **attrs; 655 656 if (WARN_ON(dev->kobj_node)) 657 return -EEXIST; 658 659 /* 660 * Creating the sysfs folders 661 */ 662 dev->kobj_node = kfd_alloc_struct(dev->kobj_node); 663 if (!dev->kobj_node) 664 return -ENOMEM; 665 666 ret = kobject_init_and_add(dev->kobj_node, &node_type, 667 sys_props.kobj_nodes, "%d", id); 668 if (ret < 0) { 669 kobject_put(dev->kobj_node); 670 return ret; 671 } 672 673 dev->kobj_mem = kobject_create_and_add("mem_banks", dev->kobj_node); 674 if (!dev->kobj_mem) 675 return -ENOMEM; 676 677 dev->kobj_cache = kobject_create_and_add("caches", dev->kobj_node); 678 if (!dev->kobj_cache) 679 return -ENOMEM; 680 681 dev->kobj_iolink = kobject_create_and_add("io_links", dev->kobj_node); 682 if (!dev->kobj_iolink) 683 return -ENOMEM; 684 685 dev->kobj_p2plink = kobject_create_and_add("p2p_links", dev->kobj_node); 686 if (!dev->kobj_p2plink) 687 return -ENOMEM; 688 689 dev->kobj_perf = kobject_create_and_add("perf", dev->kobj_node); 690 if (!dev->kobj_perf) 691 return -ENOMEM; 692 693 /* 694 * Creating sysfs files for node properties 695 */ 696 dev->attr_gpuid.name = "gpu_id"; 697 dev->attr_gpuid.mode = KFD_SYSFS_FILE_MODE; 698 sysfs_attr_init(&dev->attr_gpuid); 699 dev->attr_name.name = "name"; 700 dev->attr_name.mode = KFD_SYSFS_FILE_MODE; 701 sysfs_attr_init(&dev->attr_name); 702 dev->attr_props.name = "properties"; 703 dev->attr_props.mode = KFD_SYSFS_FILE_MODE; 704 sysfs_attr_init(&dev->attr_props); 705 ret = sysfs_create_file(dev->kobj_node, &dev->attr_gpuid); 706 if (ret < 0) 707 return ret; 708 ret = sysfs_create_file(dev->kobj_node, &dev->attr_name); 709 if (ret < 0) 710 return ret; 711 ret = sysfs_create_file(dev->kobj_node, &dev->attr_props); 712 if (ret < 0) 713 return ret; 714 715 i = 0; 716 list_for_each_entry(mem, &dev->mem_props, list) { 717 mem->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 718 if (!mem->kobj) 719 return -ENOMEM; 720 ret = kobject_init_and_add(mem->kobj, &mem_type, 721 dev->kobj_mem, "%d", i); 722 if (ret < 0) { 723 kobject_put(mem->kobj); 724 return ret; 725 } 726 727 mem->attr.name = "properties"; 728 mem->attr.mode = KFD_SYSFS_FILE_MODE; 729 sysfs_attr_init(&mem->attr); 730 ret = sysfs_create_file(mem->kobj, &mem->attr); 731 if (ret < 0) 732 return ret; 733 i++; 734 } 735 736 i = 0; 737 list_for_each_entry(cache, &dev->cache_props, list) { 738 cache->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 739 if (!cache->kobj) 740 return -ENOMEM; 741 ret = kobject_init_and_add(cache->kobj, &cache_type, 742 dev->kobj_cache, "%d", i); 743 if (ret < 0) { 744 kobject_put(cache->kobj); 745 return ret; 746 } 747 748 cache->attr.name = "properties"; 749 cache->attr.mode = KFD_SYSFS_FILE_MODE; 750 sysfs_attr_init(&cache->attr); 751 ret = sysfs_create_file(cache->kobj, &cache->attr); 752 if (ret < 0) 753 return ret; 754 i++; 755 } 756 757 i = 0; 758 list_for_each_entry(iolink, &dev->io_link_props, list) { 759 iolink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 760 if (!iolink->kobj) 761 return -ENOMEM; 762 ret = kobject_init_and_add(iolink->kobj, &iolink_type, 763 dev->kobj_iolink, "%d", i); 764 if (ret < 0) { 765 kobject_put(iolink->kobj); 766 return ret; 767 } 768 769 iolink->attr.name = "properties"; 770 iolink->attr.mode = KFD_SYSFS_FILE_MODE; 771 sysfs_attr_init(&iolink->attr); 772 ret = sysfs_create_file(iolink->kobj, &iolink->attr); 773 if (ret < 0) 774 return ret; 775 i++; 776 } 777 778 i = 0; 779 list_for_each_entry(p2plink, &dev->p2p_link_props, list) { 780 p2plink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 781 if (!p2plink->kobj) 782 return -ENOMEM; 783 ret = kobject_init_and_add(p2plink->kobj, &iolink_type, 784 dev->kobj_p2plink, "%d", i); 785 if (ret < 0) { 786 kobject_put(p2plink->kobj); 787 return ret; 788 } 789 790 p2plink->attr.name = "properties"; 791 p2plink->attr.mode = KFD_SYSFS_FILE_MODE; 792 sysfs_attr_init(&p2plink->attr); 793 ret = sysfs_create_file(p2plink->kobj, &p2plink->attr); 794 if (ret < 0) 795 return ret; 796 i++; 797 } 798 799 /* All hardware blocks have the same number of attributes. */ 800 num_attrs = ARRAY_SIZE(perf_attr_iommu); 801 list_for_each_entry(perf, &dev->perf_props, list) { 802 perf->attr_group = kzalloc(sizeof(struct kfd_perf_attr) 803 * num_attrs + sizeof(struct attribute_group), 804 GFP_KERNEL); 805 if (!perf->attr_group) 806 return -ENOMEM; 807 808 attrs = (struct attribute **)(perf->attr_group + 1); 809 if (!strcmp(perf->block_name, "iommu")) { 810 /* Information of IOMMU's num_counters and counter_ids is shown 811 * under /sys/bus/event_source/devices/amd_iommu. We don't 812 * duplicate here. 813 */ 814 perf_attr_iommu[0].data = perf->max_concurrent; 815 for (i = 0; i < num_attrs; i++) 816 attrs[i] = &perf_attr_iommu[i].attr.attr; 817 } 818 perf->attr_group->name = perf->block_name; 819 perf->attr_group->attrs = attrs; 820 ret = sysfs_create_group(dev->kobj_perf, perf->attr_group); 821 if (ret < 0) 822 return ret; 823 } 824 825 return 0; 826 } 827 828 /* Called with write topology lock acquired */ 829 static int kfd_build_sysfs_node_tree(void) 830 { 831 struct kfd_topology_device *dev; 832 int ret; 833 uint32_t i = 0; 834 835 list_for_each_entry(dev, &topology_device_list, list) { 836 ret = kfd_build_sysfs_node_entry(dev, i); 837 if (ret < 0) 838 return ret; 839 i++; 840 } 841 842 return 0; 843 } 844 845 /* Called with write topology lock acquired */ 846 static void kfd_remove_sysfs_node_tree(void) 847 { 848 struct kfd_topology_device *dev; 849 850 list_for_each_entry(dev, &topology_device_list, list) 851 kfd_remove_sysfs_node_entry(dev); 852 } 853 854 static int kfd_topology_update_sysfs(void) 855 { 856 int ret; 857 858 if (!sys_props.kobj_topology) { 859 sys_props.kobj_topology = 860 kfd_alloc_struct(sys_props.kobj_topology); 861 if (!sys_props.kobj_topology) 862 return -ENOMEM; 863 864 ret = kobject_init_and_add(sys_props.kobj_topology, 865 &sysprops_type, &kfd_device->kobj, 866 "topology"); 867 if (ret < 0) { 868 kobject_put(sys_props.kobj_topology); 869 return ret; 870 } 871 872 sys_props.kobj_nodes = kobject_create_and_add("nodes", 873 sys_props.kobj_topology); 874 if (!sys_props.kobj_nodes) 875 return -ENOMEM; 876 877 sys_props.attr_genid.name = "generation_id"; 878 sys_props.attr_genid.mode = KFD_SYSFS_FILE_MODE; 879 sysfs_attr_init(&sys_props.attr_genid); 880 ret = sysfs_create_file(sys_props.kobj_topology, 881 &sys_props.attr_genid); 882 if (ret < 0) 883 return ret; 884 885 sys_props.attr_props.name = "system_properties"; 886 sys_props.attr_props.mode = KFD_SYSFS_FILE_MODE; 887 sysfs_attr_init(&sys_props.attr_props); 888 ret = sysfs_create_file(sys_props.kobj_topology, 889 &sys_props.attr_props); 890 if (ret < 0) 891 return ret; 892 } 893 894 kfd_remove_sysfs_node_tree(); 895 896 return kfd_build_sysfs_node_tree(); 897 } 898 899 static void kfd_topology_release_sysfs(void) 900 { 901 kfd_remove_sysfs_node_tree(); 902 if (sys_props.kobj_topology) { 903 sysfs_remove_file(sys_props.kobj_topology, 904 &sys_props.attr_genid); 905 sysfs_remove_file(sys_props.kobj_topology, 906 &sys_props.attr_props); 907 if (sys_props.kobj_nodes) { 908 kobject_del(sys_props.kobj_nodes); 909 kobject_put(sys_props.kobj_nodes); 910 sys_props.kobj_nodes = NULL; 911 } 912 kobject_del(sys_props.kobj_topology); 913 kobject_put(sys_props.kobj_topology); 914 sys_props.kobj_topology = NULL; 915 } 916 } 917 918 /* Called with write topology_lock acquired */ 919 static void kfd_topology_update_device_list(struct list_head *temp_list, 920 struct list_head *master_list) 921 { 922 while (!list_empty(temp_list)) { 923 list_move_tail(temp_list->next, master_list); 924 sys_props.num_devices++; 925 } 926 } 927 928 static void kfd_debug_print_topology(void) 929 { 930 struct kfd_topology_device *dev; 931 932 down_read(&topology_lock); 933 934 dev = list_last_entry(&topology_device_list, 935 struct kfd_topology_device, list); 936 if (dev) { 937 if (dev->node_props.cpu_cores_count && 938 dev->node_props.simd_count) { 939 pr_info("Topology: Add APU node [0x%0x:0x%0x]\n", 940 dev->node_props.device_id, 941 dev->node_props.vendor_id); 942 } else if (dev->node_props.cpu_cores_count) 943 pr_info("Topology: Add CPU node\n"); 944 else if (dev->node_props.simd_count) 945 pr_info("Topology: Add dGPU node [0x%0x:0x%0x]\n", 946 dev->node_props.device_id, 947 dev->node_props.vendor_id); 948 } 949 up_read(&topology_lock); 950 } 951 952 /* Helper function for intializing platform_xx members of 953 * kfd_system_properties. Uses OEM info from the last CPU/APU node. 954 */ 955 static void kfd_update_system_properties(void) 956 { 957 struct kfd_topology_device *dev; 958 959 down_read(&topology_lock); 960 dev = list_last_entry(&topology_device_list, 961 struct kfd_topology_device, list); 962 if (dev) { 963 sys_props.platform_id = 964 (*((uint64_t *)dev->oem_id)) & CRAT_OEMID_64BIT_MASK; 965 sys_props.platform_oem = *((uint64_t *)dev->oem_table_id); 966 sys_props.platform_rev = dev->oem_revision; 967 } 968 up_read(&topology_lock); 969 } 970 971 static void find_system_memory(const struct dmi_header *dm, 972 void *private) 973 { 974 struct kfd_mem_properties *mem; 975 u16 mem_width, mem_clock; 976 struct kfd_topology_device *kdev = 977 (struct kfd_topology_device *)private; 978 const u8 *dmi_data = (const u8 *)(dm + 1); 979 980 if (dm->type == DMI_ENTRY_MEM_DEVICE && dm->length >= 0x15) { 981 mem_width = (u16)(*(const u16 *)(dmi_data + 0x6)); 982 mem_clock = (u16)(*(const u16 *)(dmi_data + 0x11)); 983 list_for_each_entry(mem, &kdev->mem_props, list) { 984 if (mem_width != 0xFFFF && mem_width != 0) 985 mem->width = mem_width; 986 if (mem_clock != 0) 987 mem->mem_clk_max = mem_clock; 988 } 989 } 990 } 991 992 /* 993 * Performance counters information is not part of CRAT but we would like to 994 * put them in the sysfs under topology directory for Thunk to get the data. 995 * This function is called before updating the sysfs. 996 */ 997 static int kfd_add_perf_to_topology(struct kfd_topology_device *kdev) 998 { 999 /* These are the only counters supported so far */ 1000 return kfd_iommu_add_perf_counters(kdev); 1001 } 1002 1003 /* kfd_add_non_crat_information - Add information that is not currently 1004 * defined in CRAT but is necessary for KFD topology 1005 * @dev - topology device to which addition info is added 1006 */ 1007 static void kfd_add_non_crat_information(struct kfd_topology_device *kdev) 1008 { 1009 /* Check if CPU only node. */ 1010 if (!kdev->gpu) { 1011 /* Add system memory information */ 1012 dmi_walk(find_system_memory, kdev); 1013 } 1014 /* TODO: For GPU node, rearrange code from kfd_topology_add_device */ 1015 } 1016 1017 /* kfd_is_acpi_crat_invalid - CRAT from ACPI is valid only for AMD APU devices. 1018 * Ignore CRAT for all other devices. AMD APU is identified if both CPU 1019 * and GPU cores are present. 1020 * @device_list - topology device list created by parsing ACPI CRAT table. 1021 * @return - TRUE if invalid, FALSE is valid. 1022 */ 1023 static bool kfd_is_acpi_crat_invalid(struct list_head *device_list) 1024 { 1025 struct kfd_topology_device *dev; 1026 1027 list_for_each_entry(dev, device_list, list) { 1028 if (dev->node_props.cpu_cores_count && 1029 dev->node_props.simd_count) 1030 return false; 1031 } 1032 pr_info("Ignoring ACPI CRAT on non-APU system\n"); 1033 return true; 1034 } 1035 1036 int kfd_topology_init(void) 1037 { 1038 void *crat_image = NULL; 1039 size_t image_size = 0; 1040 int ret; 1041 struct list_head temp_topology_device_list; 1042 int cpu_only_node = 0; 1043 struct kfd_topology_device *kdev; 1044 int proximity_domain; 1045 1046 /* topology_device_list - Master list of all topology devices 1047 * temp_topology_device_list - temporary list created while parsing CRAT 1048 * or VCRAT. Once parsing is complete the contents of list is moved to 1049 * topology_device_list 1050 */ 1051 1052 /* Initialize the head for the both the lists */ 1053 INIT_LIST_HEAD(&topology_device_list); 1054 INIT_LIST_HEAD(&temp_topology_device_list); 1055 init_rwsem(&topology_lock); 1056 1057 memset(&sys_props, 0, sizeof(sys_props)); 1058 1059 /* Proximity domains in ACPI CRAT tables start counting at 1060 * 0. The same should be true for virtual CRAT tables created 1061 * at this stage. GPUs added later in kfd_topology_add_device 1062 * use a counter. 1063 */ 1064 proximity_domain = 0; 1065 1066 /* 1067 * Get the CRAT image from the ACPI. If ACPI doesn't have one 1068 * or if ACPI CRAT is invalid create a virtual CRAT. 1069 * NOTE: The current implementation expects all AMD APUs to have 1070 * CRAT. If no CRAT is available, it is assumed to be a CPU 1071 */ 1072 ret = kfd_create_crat_image_acpi(&crat_image, &image_size); 1073 if (!ret) { 1074 ret = kfd_parse_crat_table(crat_image, 1075 &temp_topology_device_list, 1076 proximity_domain); 1077 if (ret || 1078 kfd_is_acpi_crat_invalid(&temp_topology_device_list)) { 1079 kfd_release_topology_device_list( 1080 &temp_topology_device_list); 1081 kfd_destroy_crat_image(crat_image); 1082 crat_image = NULL; 1083 } 1084 } 1085 1086 if (!crat_image) { 1087 ret = kfd_create_crat_image_virtual(&crat_image, &image_size, 1088 COMPUTE_UNIT_CPU, NULL, 1089 proximity_domain); 1090 cpu_only_node = 1; 1091 if (ret) { 1092 pr_err("Error creating VCRAT table for CPU\n"); 1093 return ret; 1094 } 1095 1096 ret = kfd_parse_crat_table(crat_image, 1097 &temp_topology_device_list, 1098 proximity_domain); 1099 if (ret) { 1100 pr_err("Error parsing VCRAT table for CPU\n"); 1101 goto err; 1102 } 1103 } 1104 1105 kdev = list_first_entry(&temp_topology_device_list, 1106 struct kfd_topology_device, list); 1107 kfd_add_perf_to_topology(kdev); 1108 1109 down_write(&topology_lock); 1110 kfd_topology_update_device_list(&temp_topology_device_list, 1111 &topology_device_list); 1112 topology_crat_proximity_domain = sys_props.num_devices-1; 1113 ret = kfd_topology_update_sysfs(); 1114 up_write(&topology_lock); 1115 1116 if (!ret) { 1117 sys_props.generation_count++; 1118 kfd_update_system_properties(); 1119 kfd_debug_print_topology(); 1120 } else 1121 pr_err("Failed to update topology in sysfs ret=%d\n", ret); 1122 1123 /* For nodes with GPU, this information gets added 1124 * when GPU is detected (kfd_topology_add_device). 1125 */ 1126 if (cpu_only_node) { 1127 /* Add additional information to CPU only node created above */ 1128 down_write(&topology_lock); 1129 kdev = list_first_entry(&topology_device_list, 1130 struct kfd_topology_device, list); 1131 up_write(&topology_lock); 1132 kfd_add_non_crat_information(kdev); 1133 } 1134 1135 err: 1136 kfd_destroy_crat_image(crat_image); 1137 return ret; 1138 } 1139 1140 void kfd_topology_shutdown(void) 1141 { 1142 down_write(&topology_lock); 1143 kfd_topology_release_sysfs(); 1144 kfd_release_live_view(); 1145 up_write(&topology_lock); 1146 } 1147 1148 static uint32_t kfd_generate_gpu_id(struct kfd_node *gpu) 1149 { 1150 uint32_t hashout; 1151 uint32_t buf[8]; 1152 uint64_t local_mem_size; 1153 int i; 1154 1155 if (!gpu) 1156 return 0; 1157 1158 local_mem_size = gpu->local_mem_info.local_mem_size_private + 1159 gpu->local_mem_info.local_mem_size_public; 1160 buf[0] = gpu->adev->pdev->devfn; 1161 buf[1] = gpu->adev->pdev->subsystem_vendor | 1162 (gpu->adev->pdev->subsystem_device << 16); 1163 buf[2] = pci_domain_nr(gpu->adev->pdev->bus); 1164 buf[3] = gpu->adev->pdev->device; 1165 buf[4] = gpu->adev->pdev->bus->number; 1166 buf[5] = lower_32_bits(local_mem_size); 1167 buf[6] = upper_32_bits(local_mem_size); 1168 buf[7] = (ffs(gpu->xcc_mask) - 1) | (NUM_XCC(gpu->xcc_mask) << 16); 1169 1170 for (i = 0, hashout = 0; i < 8; i++) 1171 hashout ^= hash_32(buf[i], KFD_GPU_ID_HASH_WIDTH); 1172 1173 return hashout; 1174 } 1175 /* kfd_assign_gpu - Attach @gpu to the correct kfd topology device. If 1176 * the GPU device is not already present in the topology device 1177 * list then return NULL. This means a new topology device has to 1178 * be created for this GPU. 1179 */ 1180 static struct kfd_topology_device *kfd_assign_gpu(struct kfd_node *gpu) 1181 { 1182 struct kfd_topology_device *dev; 1183 struct kfd_topology_device *out_dev = NULL; 1184 struct kfd_mem_properties *mem; 1185 struct kfd_cache_properties *cache; 1186 struct kfd_iolink_properties *iolink; 1187 struct kfd_iolink_properties *p2plink; 1188 1189 list_for_each_entry(dev, &topology_device_list, list) { 1190 /* Discrete GPUs need their own topology device list 1191 * entries. Don't assign them to CPU/APU nodes. 1192 */ 1193 if (!gpu->kfd->use_iommu_v2 && 1194 dev->node_props.cpu_cores_count) 1195 continue; 1196 1197 if (!dev->gpu && (dev->node_props.simd_count > 0)) { 1198 dev->gpu = gpu; 1199 out_dev = dev; 1200 1201 list_for_each_entry(mem, &dev->mem_props, list) 1202 mem->gpu = dev->gpu; 1203 list_for_each_entry(cache, &dev->cache_props, list) 1204 cache->gpu = dev->gpu; 1205 list_for_each_entry(iolink, &dev->io_link_props, list) 1206 iolink->gpu = dev->gpu; 1207 list_for_each_entry(p2plink, &dev->p2p_link_props, list) 1208 p2plink->gpu = dev->gpu; 1209 break; 1210 } 1211 } 1212 return out_dev; 1213 } 1214 1215 static void kfd_notify_gpu_change(uint32_t gpu_id, int arrival) 1216 { 1217 /* 1218 * TODO: Generate an event for thunk about the arrival/removal 1219 * of the GPU 1220 */ 1221 } 1222 1223 /* kfd_fill_mem_clk_max_info - Since CRAT doesn't have memory clock info, 1224 * patch this after CRAT parsing. 1225 */ 1226 static void kfd_fill_mem_clk_max_info(struct kfd_topology_device *dev) 1227 { 1228 struct kfd_mem_properties *mem; 1229 struct kfd_local_mem_info local_mem_info; 1230 1231 if (!dev) 1232 return; 1233 1234 /* Currently, amdgpu driver (amdgpu_mc) deals only with GPUs with 1235 * single bank of VRAM local memory. 1236 * for dGPUs - VCRAT reports only one bank of Local Memory 1237 * for APUs - If CRAT from ACPI reports more than one bank, then 1238 * all the banks will report the same mem_clk_max information 1239 */ 1240 amdgpu_amdkfd_get_local_mem_info(dev->gpu->adev, &local_mem_info, 1241 dev->gpu->xcp); 1242 1243 list_for_each_entry(mem, &dev->mem_props, list) 1244 mem->mem_clk_max = local_mem_info.mem_clk_max; 1245 } 1246 1247 static void kfd_set_iolink_no_atomics(struct kfd_topology_device *dev, 1248 struct kfd_topology_device *target_gpu_dev, 1249 struct kfd_iolink_properties *link) 1250 { 1251 /* xgmi always supports atomics between links. */ 1252 if (link->iolink_type == CRAT_IOLINK_TYPE_XGMI) 1253 return; 1254 1255 /* check pcie support to set cpu(dev) flags for target_gpu_dev link. */ 1256 if (target_gpu_dev) { 1257 uint32_t cap; 1258 1259 pcie_capability_read_dword(target_gpu_dev->gpu->adev->pdev, 1260 PCI_EXP_DEVCAP2, &cap); 1261 1262 if (!(cap & (PCI_EXP_DEVCAP2_ATOMIC_COMP32 | 1263 PCI_EXP_DEVCAP2_ATOMIC_COMP64))) 1264 link->flags |= CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT | 1265 CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT; 1266 /* set gpu (dev) flags. */ 1267 } else { 1268 if (!dev->gpu->kfd->pci_atomic_requested || 1269 dev->gpu->adev->asic_type == CHIP_HAWAII) 1270 link->flags |= CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT | 1271 CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT; 1272 } 1273 } 1274 1275 static void kfd_set_iolink_non_coherent(struct kfd_topology_device *to_dev, 1276 struct kfd_iolink_properties *outbound_link, 1277 struct kfd_iolink_properties *inbound_link) 1278 { 1279 /* CPU -> GPU with PCIe */ 1280 if (!to_dev->gpu && 1281 inbound_link->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS) 1282 inbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT; 1283 1284 if (to_dev->gpu) { 1285 /* GPU <-> GPU with PCIe and 1286 * Vega20 with XGMI 1287 */ 1288 if (inbound_link->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS || 1289 (inbound_link->iolink_type == CRAT_IOLINK_TYPE_XGMI && 1290 KFD_GC_VERSION(to_dev->gpu) == IP_VERSION(9, 4, 0))) { 1291 outbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT; 1292 inbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT; 1293 } 1294 } 1295 } 1296 1297 static void kfd_fill_iolink_non_crat_info(struct kfd_topology_device *dev) 1298 { 1299 struct kfd_iolink_properties *link, *inbound_link; 1300 struct kfd_topology_device *peer_dev; 1301 1302 if (!dev || !dev->gpu) 1303 return; 1304 1305 /* GPU only creates direct links so apply flags setting to all */ 1306 list_for_each_entry(link, &dev->io_link_props, list) { 1307 link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1308 kfd_set_iolink_no_atomics(dev, NULL, link); 1309 peer_dev = kfd_topology_device_by_proximity_domain( 1310 link->node_to); 1311 1312 if (!peer_dev) 1313 continue; 1314 1315 /* Include the CPU peer in GPU hive if connected over xGMI. */ 1316 if (!peer_dev->gpu && 1317 link->iolink_type == CRAT_IOLINK_TYPE_XGMI) { 1318 /* 1319 * If the GPU is not part of a GPU hive, use its pci 1320 * device location as the hive ID to bind with the CPU. 1321 */ 1322 if (!dev->node_props.hive_id) 1323 dev->node_props.hive_id = pci_dev_id(dev->gpu->adev->pdev); 1324 peer_dev->node_props.hive_id = dev->node_props.hive_id; 1325 } 1326 1327 list_for_each_entry(inbound_link, &peer_dev->io_link_props, 1328 list) { 1329 if (inbound_link->node_to != link->node_from) 1330 continue; 1331 1332 inbound_link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1333 kfd_set_iolink_no_atomics(peer_dev, dev, inbound_link); 1334 kfd_set_iolink_non_coherent(peer_dev, link, inbound_link); 1335 } 1336 } 1337 1338 /* Create indirect links so apply flags setting to all */ 1339 list_for_each_entry(link, &dev->p2p_link_props, list) { 1340 link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1341 kfd_set_iolink_no_atomics(dev, NULL, link); 1342 peer_dev = kfd_topology_device_by_proximity_domain( 1343 link->node_to); 1344 1345 if (!peer_dev) 1346 continue; 1347 1348 list_for_each_entry(inbound_link, &peer_dev->p2p_link_props, 1349 list) { 1350 if (inbound_link->node_to != link->node_from) 1351 continue; 1352 1353 inbound_link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1354 kfd_set_iolink_no_atomics(peer_dev, dev, inbound_link); 1355 kfd_set_iolink_non_coherent(peer_dev, link, inbound_link); 1356 } 1357 } 1358 } 1359 1360 static int kfd_build_p2p_node_entry(struct kfd_topology_device *dev, 1361 struct kfd_iolink_properties *p2plink) 1362 { 1363 int ret; 1364 1365 p2plink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 1366 if (!p2plink->kobj) 1367 return -ENOMEM; 1368 1369 ret = kobject_init_and_add(p2plink->kobj, &iolink_type, 1370 dev->kobj_p2plink, "%d", dev->node_props.p2p_links_count - 1); 1371 if (ret < 0) { 1372 kobject_put(p2plink->kobj); 1373 return ret; 1374 } 1375 1376 p2plink->attr.name = "properties"; 1377 p2plink->attr.mode = KFD_SYSFS_FILE_MODE; 1378 sysfs_attr_init(&p2plink->attr); 1379 ret = sysfs_create_file(p2plink->kobj, &p2plink->attr); 1380 if (ret < 0) 1381 return ret; 1382 1383 return 0; 1384 } 1385 1386 static int kfd_create_indirect_link_prop(struct kfd_topology_device *kdev, int gpu_node) 1387 { 1388 struct kfd_iolink_properties *gpu_link, *tmp_link, *cpu_link; 1389 struct kfd_iolink_properties *props = NULL, *props2 = NULL; 1390 struct kfd_topology_device *cpu_dev; 1391 int ret = 0; 1392 int i, num_cpu; 1393 1394 num_cpu = 0; 1395 list_for_each_entry(cpu_dev, &topology_device_list, list) { 1396 if (cpu_dev->gpu) 1397 break; 1398 num_cpu++; 1399 } 1400 1401 gpu_link = list_first_entry(&kdev->io_link_props, 1402 struct kfd_iolink_properties, list); 1403 if (!gpu_link) 1404 return -ENOMEM; 1405 1406 for (i = 0; i < num_cpu; i++) { 1407 /* CPU <--> GPU */ 1408 if (gpu_link->node_to == i) 1409 continue; 1410 1411 /* find CPU <--> CPU links */ 1412 cpu_link = NULL; 1413 cpu_dev = kfd_topology_device_by_proximity_domain(i); 1414 if (cpu_dev) { 1415 list_for_each_entry(tmp_link, 1416 &cpu_dev->io_link_props, list) { 1417 if (tmp_link->node_to == gpu_link->node_to) { 1418 cpu_link = tmp_link; 1419 break; 1420 } 1421 } 1422 } 1423 1424 if (!cpu_link) 1425 return -ENOMEM; 1426 1427 /* CPU <--> CPU <--> GPU, GPU node*/ 1428 props = kfd_alloc_struct(props); 1429 if (!props) 1430 return -ENOMEM; 1431 1432 memcpy(props, gpu_link, sizeof(struct kfd_iolink_properties)); 1433 props->weight = gpu_link->weight + cpu_link->weight; 1434 props->min_latency = gpu_link->min_latency + cpu_link->min_latency; 1435 props->max_latency = gpu_link->max_latency + cpu_link->max_latency; 1436 props->min_bandwidth = min(gpu_link->min_bandwidth, cpu_link->min_bandwidth); 1437 props->max_bandwidth = min(gpu_link->max_bandwidth, cpu_link->max_bandwidth); 1438 1439 props->node_from = gpu_node; 1440 props->node_to = i; 1441 kdev->node_props.p2p_links_count++; 1442 list_add_tail(&props->list, &kdev->p2p_link_props); 1443 ret = kfd_build_p2p_node_entry(kdev, props); 1444 if (ret < 0) 1445 return ret; 1446 1447 /* for small Bar, no CPU --> GPU in-direct links */ 1448 if (kfd_dev_is_large_bar(kdev->gpu)) { 1449 /* CPU <--> CPU <--> GPU, CPU node*/ 1450 props2 = kfd_alloc_struct(props2); 1451 if (!props2) 1452 return -ENOMEM; 1453 1454 memcpy(props2, props, sizeof(struct kfd_iolink_properties)); 1455 props2->node_from = i; 1456 props2->node_to = gpu_node; 1457 props2->kobj = NULL; 1458 cpu_dev->node_props.p2p_links_count++; 1459 list_add_tail(&props2->list, &cpu_dev->p2p_link_props); 1460 ret = kfd_build_p2p_node_entry(cpu_dev, props2); 1461 if (ret < 0) 1462 return ret; 1463 } 1464 } 1465 return ret; 1466 } 1467 1468 #if defined(CONFIG_HSA_AMD_P2P) 1469 static int kfd_add_peer_prop(struct kfd_topology_device *kdev, 1470 struct kfd_topology_device *peer, int from, int to) 1471 { 1472 struct kfd_iolink_properties *props = NULL; 1473 struct kfd_iolink_properties *iolink1, *iolink2, *iolink3; 1474 struct kfd_topology_device *cpu_dev; 1475 int ret = 0; 1476 1477 if (!amdgpu_device_is_peer_accessible( 1478 kdev->gpu->adev, 1479 peer->gpu->adev)) 1480 return ret; 1481 1482 iolink1 = list_first_entry(&kdev->io_link_props, 1483 struct kfd_iolink_properties, list); 1484 if (!iolink1) 1485 return -ENOMEM; 1486 1487 iolink2 = list_first_entry(&peer->io_link_props, 1488 struct kfd_iolink_properties, list); 1489 if (!iolink2) 1490 return -ENOMEM; 1491 1492 props = kfd_alloc_struct(props); 1493 if (!props) 1494 return -ENOMEM; 1495 1496 memcpy(props, iolink1, sizeof(struct kfd_iolink_properties)); 1497 1498 props->weight = iolink1->weight + iolink2->weight; 1499 props->min_latency = iolink1->min_latency + iolink2->min_latency; 1500 props->max_latency = iolink1->max_latency + iolink2->max_latency; 1501 props->min_bandwidth = min(iolink1->min_bandwidth, iolink2->min_bandwidth); 1502 props->max_bandwidth = min(iolink2->max_bandwidth, iolink2->max_bandwidth); 1503 1504 if (iolink1->node_to != iolink2->node_to) { 1505 /* CPU->CPU link*/ 1506 cpu_dev = kfd_topology_device_by_proximity_domain(iolink1->node_to); 1507 if (cpu_dev) { 1508 list_for_each_entry(iolink3, &cpu_dev->io_link_props, list) 1509 if (iolink3->node_to == iolink2->node_to) 1510 break; 1511 1512 props->weight += iolink3->weight; 1513 props->min_latency += iolink3->min_latency; 1514 props->max_latency += iolink3->max_latency; 1515 props->min_bandwidth = min(props->min_bandwidth, 1516 iolink3->min_bandwidth); 1517 props->max_bandwidth = min(props->max_bandwidth, 1518 iolink3->max_bandwidth); 1519 } else { 1520 WARN(1, "CPU node not found"); 1521 } 1522 } 1523 1524 props->node_from = from; 1525 props->node_to = to; 1526 peer->node_props.p2p_links_count++; 1527 list_add_tail(&props->list, &peer->p2p_link_props); 1528 ret = kfd_build_p2p_node_entry(peer, props); 1529 1530 return ret; 1531 } 1532 #endif 1533 1534 static int kfd_dev_create_p2p_links(void) 1535 { 1536 struct kfd_topology_device *dev; 1537 struct kfd_topology_device *new_dev; 1538 #if defined(CONFIG_HSA_AMD_P2P) 1539 uint32_t i; 1540 #endif 1541 uint32_t k; 1542 int ret = 0; 1543 1544 k = 0; 1545 list_for_each_entry(dev, &topology_device_list, list) 1546 k++; 1547 if (k < 2) 1548 return 0; 1549 1550 new_dev = list_last_entry(&topology_device_list, struct kfd_topology_device, list); 1551 if (WARN_ON(!new_dev->gpu)) 1552 return 0; 1553 1554 k--; 1555 1556 /* create in-direct links */ 1557 ret = kfd_create_indirect_link_prop(new_dev, k); 1558 if (ret < 0) 1559 goto out; 1560 1561 /* create p2p links */ 1562 #if defined(CONFIG_HSA_AMD_P2P) 1563 i = 0; 1564 list_for_each_entry(dev, &topology_device_list, list) { 1565 if (dev == new_dev) 1566 break; 1567 if (!dev->gpu || !dev->gpu->adev || 1568 (dev->gpu->kfd->hive_id && 1569 dev->gpu->kfd->hive_id == new_dev->gpu->kfd->hive_id)) 1570 goto next; 1571 1572 /* check if node(s) is/are peer accessible in one direction or bi-direction */ 1573 ret = kfd_add_peer_prop(new_dev, dev, i, k); 1574 if (ret < 0) 1575 goto out; 1576 1577 ret = kfd_add_peer_prop(dev, new_dev, k, i); 1578 if (ret < 0) 1579 goto out; 1580 next: 1581 i++; 1582 } 1583 #endif 1584 1585 out: 1586 return ret; 1587 } 1588 1589 /* Helper function. See kfd_fill_gpu_cache_info for parameter description */ 1590 static int fill_in_l1_pcache(struct kfd_cache_properties **props_ext, 1591 struct kfd_gpu_cache_info *pcache_info, 1592 struct kfd_cu_info *cu_info, 1593 int cu_bitmask, 1594 int cache_type, unsigned int cu_processor_id, 1595 int cu_block) 1596 { 1597 unsigned int cu_sibling_map_mask; 1598 int first_active_cu; 1599 struct kfd_cache_properties *pcache = NULL; 1600 1601 cu_sibling_map_mask = cu_bitmask; 1602 cu_sibling_map_mask >>= cu_block; 1603 cu_sibling_map_mask &= ((1 << pcache_info[cache_type].num_cu_shared) - 1); 1604 first_active_cu = ffs(cu_sibling_map_mask); 1605 1606 /* CU could be inactive. In case of shared cache find the first active 1607 * CU. and incase of non-shared cache check if the CU is inactive. If 1608 * inactive active skip it 1609 */ 1610 if (first_active_cu) { 1611 pcache = kfd_alloc_struct(pcache); 1612 if (!pcache) 1613 return -ENOMEM; 1614 1615 memset(pcache, 0, sizeof(struct kfd_cache_properties)); 1616 pcache->processor_id_low = cu_processor_id + (first_active_cu - 1); 1617 pcache->cache_level = pcache_info[cache_type].cache_level; 1618 pcache->cache_size = pcache_info[cache_type].cache_size; 1619 1620 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_DATA_CACHE) 1621 pcache->cache_type |= HSA_CACHE_TYPE_DATA; 1622 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_INST_CACHE) 1623 pcache->cache_type |= HSA_CACHE_TYPE_INSTRUCTION; 1624 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_CPU_CACHE) 1625 pcache->cache_type |= HSA_CACHE_TYPE_CPU; 1626 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_SIMD_CACHE) 1627 pcache->cache_type |= HSA_CACHE_TYPE_HSACU; 1628 1629 /* Sibling map is w.r.t processor_id_low, so shift out 1630 * inactive CU 1631 */ 1632 cu_sibling_map_mask = 1633 cu_sibling_map_mask >> (first_active_cu - 1); 1634 1635 pcache->sibling_map[0] = (uint8_t)(cu_sibling_map_mask & 0xFF); 1636 pcache->sibling_map[1] = 1637 (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF); 1638 pcache->sibling_map[2] = 1639 (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF); 1640 pcache->sibling_map[3] = 1641 (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF); 1642 1643 pcache->sibling_map_size = 4; 1644 *props_ext = pcache; 1645 1646 return 0; 1647 } 1648 return 1; 1649 } 1650 1651 /* Helper function. See kfd_fill_gpu_cache_info for parameter description */ 1652 static int fill_in_l2_l3_pcache(struct kfd_cache_properties **props_ext, 1653 struct kfd_gpu_cache_info *pcache_info, 1654 struct kfd_cu_info *cu_info, 1655 int cache_type, unsigned int cu_processor_id) 1656 { 1657 unsigned int cu_sibling_map_mask; 1658 int first_active_cu; 1659 int i, j, k; 1660 struct kfd_cache_properties *pcache = NULL; 1661 1662 cu_sibling_map_mask = cu_info->cu_bitmap[0][0]; 1663 cu_sibling_map_mask &= 1664 ((1 << pcache_info[cache_type].num_cu_shared) - 1); 1665 first_active_cu = ffs(cu_sibling_map_mask); 1666 1667 /* CU could be inactive. In case of shared cache find the first active 1668 * CU. and incase of non-shared cache check if the CU is inactive. If 1669 * inactive active skip it 1670 */ 1671 if (first_active_cu) { 1672 pcache = kfd_alloc_struct(pcache); 1673 if (!pcache) 1674 return -ENOMEM; 1675 1676 memset(pcache, 0, sizeof(struct kfd_cache_properties)); 1677 pcache->processor_id_low = cu_processor_id 1678 + (first_active_cu - 1); 1679 pcache->cache_level = pcache_info[cache_type].cache_level; 1680 pcache->cache_size = pcache_info[cache_type].cache_size; 1681 1682 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_DATA_CACHE) 1683 pcache->cache_type |= HSA_CACHE_TYPE_DATA; 1684 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_INST_CACHE) 1685 pcache->cache_type |= HSA_CACHE_TYPE_INSTRUCTION; 1686 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_CPU_CACHE) 1687 pcache->cache_type |= HSA_CACHE_TYPE_CPU; 1688 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_SIMD_CACHE) 1689 pcache->cache_type |= HSA_CACHE_TYPE_HSACU; 1690 1691 /* Sibling map is w.r.t processor_id_low, so shift out 1692 * inactive CU 1693 */ 1694 cu_sibling_map_mask = cu_sibling_map_mask >> (first_active_cu - 1); 1695 k = 0; 1696 1697 for (i = 0; i < cu_info->num_shader_engines; i++) { 1698 for (j = 0; j < cu_info->num_shader_arrays_per_engine; j++) { 1699 pcache->sibling_map[k] = (uint8_t)(cu_sibling_map_mask & 0xFF); 1700 pcache->sibling_map[k+1] = (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF); 1701 pcache->sibling_map[k+2] = (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF); 1702 pcache->sibling_map[k+3] = (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF); 1703 k += 4; 1704 1705 cu_sibling_map_mask = cu_info->cu_bitmap[i % 4][j + i / 4]; 1706 cu_sibling_map_mask &= ((1 << pcache_info[cache_type].num_cu_shared) - 1); 1707 } 1708 } 1709 pcache->sibling_map_size = k; 1710 *props_ext = pcache; 1711 return 0; 1712 } 1713 return 1; 1714 } 1715 1716 #define KFD_MAX_CACHE_TYPES 6 1717 1718 /* kfd_fill_cache_non_crat_info - Fill GPU cache info using kfd_gpu_cache_info 1719 * tables 1720 */ 1721 static void kfd_fill_cache_non_crat_info(struct kfd_topology_device *dev, struct kfd_node *kdev) 1722 { 1723 struct kfd_gpu_cache_info *pcache_info = NULL; 1724 int i, j, k; 1725 int ct = 0; 1726 unsigned int cu_processor_id; 1727 int ret; 1728 unsigned int num_cu_shared; 1729 struct kfd_cu_info cu_info; 1730 struct kfd_cu_info *pcu_info; 1731 int gpu_processor_id; 1732 struct kfd_cache_properties *props_ext; 1733 int num_of_entries = 0; 1734 int num_of_cache_types = 0; 1735 struct kfd_gpu_cache_info cache_info[KFD_MAX_CACHE_TYPES]; 1736 1737 amdgpu_amdkfd_get_cu_info(kdev->adev, &cu_info); 1738 pcu_info = &cu_info; 1739 1740 gpu_processor_id = dev->node_props.simd_id_base; 1741 1742 pcache_info = cache_info; 1743 num_of_cache_types = kfd_get_gpu_cache_info(kdev, &pcache_info); 1744 if (!num_of_cache_types) { 1745 pr_warn("no cache info found\n"); 1746 return; 1747 } 1748 1749 /* For each type of cache listed in the kfd_gpu_cache_info table, 1750 * go through all available Compute Units. 1751 * The [i,j,k] loop will 1752 * if kfd_gpu_cache_info.num_cu_shared = 1 1753 * will parse through all available CU 1754 * If (kfd_gpu_cache_info.num_cu_shared != 1) 1755 * then it will consider only one CU from 1756 * the shared unit 1757 */ 1758 for (ct = 0; ct < num_of_cache_types; ct++) { 1759 cu_processor_id = gpu_processor_id; 1760 if (pcache_info[ct].cache_level == 1) { 1761 for (i = 0; i < pcu_info->num_shader_engines; i++) { 1762 for (j = 0; j < pcu_info->num_shader_arrays_per_engine; j++) { 1763 for (k = 0; k < pcu_info->num_cu_per_sh; k += pcache_info[ct].num_cu_shared) { 1764 1765 ret = fill_in_l1_pcache(&props_ext, pcache_info, pcu_info, 1766 pcu_info->cu_bitmap[i % 4][j + i / 4], ct, 1767 cu_processor_id, k); 1768 1769 if (ret < 0) 1770 break; 1771 1772 if (!ret) { 1773 num_of_entries++; 1774 list_add_tail(&props_ext->list, &dev->cache_props); 1775 } 1776 1777 /* Move to next CU block */ 1778 num_cu_shared = ((k + pcache_info[ct].num_cu_shared) <= 1779 pcu_info->num_cu_per_sh) ? 1780 pcache_info[ct].num_cu_shared : 1781 (pcu_info->num_cu_per_sh - k); 1782 cu_processor_id += num_cu_shared; 1783 } 1784 } 1785 } 1786 } else { 1787 ret = fill_in_l2_l3_pcache(&props_ext, pcache_info, 1788 pcu_info, ct, cu_processor_id); 1789 1790 if (ret < 0) 1791 break; 1792 1793 if (!ret) { 1794 num_of_entries++; 1795 list_add_tail(&props_ext->list, &dev->cache_props); 1796 } 1797 } 1798 } 1799 dev->node_props.caches_count += num_of_entries; 1800 pr_debug("Added [%d] GPU cache entries\n", num_of_entries); 1801 } 1802 1803 static int kfd_topology_add_device_locked(struct kfd_node *gpu, uint32_t gpu_id, 1804 struct kfd_topology_device **dev) 1805 { 1806 int proximity_domain = ++topology_crat_proximity_domain; 1807 struct list_head temp_topology_device_list; 1808 void *crat_image = NULL; 1809 size_t image_size = 0; 1810 int res; 1811 1812 res = kfd_create_crat_image_virtual(&crat_image, &image_size, 1813 COMPUTE_UNIT_GPU, gpu, 1814 proximity_domain); 1815 if (res) { 1816 pr_err("Error creating VCRAT for GPU (ID: 0x%x)\n", 1817 gpu_id); 1818 topology_crat_proximity_domain--; 1819 goto err; 1820 } 1821 1822 INIT_LIST_HEAD(&temp_topology_device_list); 1823 1824 res = kfd_parse_crat_table(crat_image, 1825 &temp_topology_device_list, 1826 proximity_domain); 1827 if (res) { 1828 pr_err("Error parsing VCRAT for GPU (ID: 0x%x)\n", 1829 gpu_id); 1830 topology_crat_proximity_domain--; 1831 goto err; 1832 } 1833 1834 kfd_topology_update_device_list(&temp_topology_device_list, 1835 &topology_device_list); 1836 1837 *dev = kfd_assign_gpu(gpu); 1838 if (WARN_ON(!*dev)) { 1839 res = -ENODEV; 1840 goto err; 1841 } 1842 1843 /* Fill the cache affinity information here for the GPUs 1844 * using VCRAT 1845 */ 1846 kfd_fill_cache_non_crat_info(*dev, gpu); 1847 1848 /* Update the SYSFS tree, since we added another topology 1849 * device 1850 */ 1851 res = kfd_topology_update_sysfs(); 1852 if (!res) 1853 sys_props.generation_count++; 1854 else 1855 pr_err("Failed to update GPU (ID: 0x%x) to sysfs topology. res=%d\n", 1856 gpu_id, res); 1857 1858 err: 1859 kfd_destroy_crat_image(crat_image); 1860 return res; 1861 } 1862 1863 static void kfd_topology_set_dbg_firmware_support(struct kfd_topology_device *dev) 1864 { 1865 bool firmware_supported = true; 1866 1867 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(11, 0, 0) && 1868 KFD_GC_VERSION(dev->gpu) < IP_VERSION(12, 0, 0)) { 1869 uint32_t mes_api_rev = (dev->gpu->adev->mes.sched_version & 1870 AMDGPU_MES_API_VERSION_MASK) >> 1871 AMDGPU_MES_API_VERSION_SHIFT; 1872 uint32_t mes_rev = dev->gpu->adev->mes.sched_version & 1873 AMDGPU_MES_VERSION_MASK; 1874 1875 firmware_supported = (mes_api_rev >= 14) && (mes_rev >= 64); 1876 goto out; 1877 } 1878 1879 /* 1880 * Note: Any unlisted devices here are assumed to support exception handling. 1881 * Add additional checks here as needed. 1882 */ 1883 switch (KFD_GC_VERSION(dev->gpu)) { 1884 case IP_VERSION(9, 0, 1): 1885 firmware_supported = dev->gpu->kfd->mec_fw_version >= 459 + 32768; 1886 break; 1887 case IP_VERSION(9, 1, 0): 1888 case IP_VERSION(9, 2, 1): 1889 case IP_VERSION(9, 2, 2): 1890 case IP_VERSION(9, 3, 0): 1891 case IP_VERSION(9, 4, 0): 1892 firmware_supported = dev->gpu->kfd->mec_fw_version >= 459; 1893 break; 1894 case IP_VERSION(9, 4, 1): 1895 firmware_supported = dev->gpu->kfd->mec_fw_version >= 60; 1896 break; 1897 case IP_VERSION(9, 4, 2): 1898 firmware_supported = dev->gpu->kfd->mec_fw_version >= 51; 1899 break; 1900 case IP_VERSION(10, 1, 10): 1901 case IP_VERSION(10, 1, 2): 1902 case IP_VERSION(10, 1, 1): 1903 firmware_supported = dev->gpu->kfd->mec_fw_version >= 144; 1904 break; 1905 case IP_VERSION(10, 3, 0): 1906 case IP_VERSION(10, 3, 2): 1907 case IP_VERSION(10, 3, 1): 1908 case IP_VERSION(10, 3, 4): 1909 case IP_VERSION(10, 3, 5): 1910 firmware_supported = dev->gpu->kfd->mec_fw_version >= 89; 1911 break; 1912 case IP_VERSION(10, 1, 3): 1913 case IP_VERSION(10, 3, 3): 1914 firmware_supported = false; 1915 break; 1916 default: 1917 break; 1918 } 1919 1920 out: 1921 if (firmware_supported) 1922 dev->node_props.capability |= HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED; 1923 } 1924 1925 static void kfd_topology_set_capabilities(struct kfd_topology_device *dev) 1926 { 1927 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 << 1928 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) & 1929 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK); 1930 1931 dev->node_props.capability |= HSA_CAP_TRAP_DEBUG_SUPPORT | 1932 HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_TRAP_OVERRIDE_SUPPORTED | 1933 HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_MODE_SUPPORTED; 1934 1935 if (kfd_dbg_has_ttmps_always_setup(dev->gpu)) 1936 dev->node_props.debug_prop |= HSA_DBG_DISPATCH_INFO_ALWAYS_VALID; 1937 1938 if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(10, 0, 0)) { 1939 if (KFD_GC_VERSION(dev->gpu) == IP_VERSION(9, 4, 3)) 1940 dev->node_props.debug_prop |= 1941 HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX9_4_3 | 1942 HSA_DBG_WATCH_ADDR_MASK_HI_BIT_GFX9_4_3; 1943 else 1944 dev->node_props.debug_prop |= 1945 HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX9 | 1946 HSA_DBG_WATCH_ADDR_MASK_HI_BIT; 1947 1948 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(9, 4, 2)) 1949 dev->node_props.capability |= 1950 HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED; 1951 } else { 1952 dev->node_props.debug_prop |= HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX10 | 1953 HSA_DBG_WATCH_ADDR_MASK_HI_BIT; 1954 1955 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(11, 0, 0)) 1956 dev->node_props.capability |= 1957 HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED; 1958 } 1959 1960 kfd_topology_set_dbg_firmware_support(dev); 1961 } 1962 1963 int kfd_topology_add_device(struct kfd_node *gpu) 1964 { 1965 uint32_t gpu_id; 1966 struct kfd_topology_device *dev; 1967 struct kfd_cu_info cu_info; 1968 int res = 0; 1969 int i; 1970 const char *asic_name = amdgpu_asic_name[gpu->adev->asic_type]; 1971 1972 gpu_id = kfd_generate_gpu_id(gpu); 1973 pr_debug("Adding new GPU (ID: 0x%x) to topology\n", gpu_id); 1974 1975 /* Check to see if this gpu device exists in the topology_device_list. 1976 * If so, assign the gpu to that device, 1977 * else create a Virtual CRAT for this gpu device and then parse that 1978 * CRAT to create a new topology device. Once created assign the gpu to 1979 * that topology device 1980 */ 1981 down_write(&topology_lock); 1982 dev = kfd_assign_gpu(gpu); 1983 if (!dev) 1984 res = kfd_topology_add_device_locked(gpu, gpu_id, &dev); 1985 up_write(&topology_lock); 1986 if (res) 1987 return res; 1988 1989 dev->gpu_id = gpu_id; 1990 gpu->id = gpu_id; 1991 1992 kfd_dev_create_p2p_links(); 1993 1994 /* TODO: Move the following lines to function 1995 * kfd_add_non_crat_information 1996 */ 1997 1998 /* Fill-in additional information that is not available in CRAT but 1999 * needed for the topology 2000 */ 2001 2002 amdgpu_amdkfd_get_cu_info(dev->gpu->adev, &cu_info); 2003 2004 for (i = 0; i < KFD_TOPOLOGY_PUBLIC_NAME_SIZE-1; i++) { 2005 dev->node_props.name[i] = __tolower(asic_name[i]); 2006 if (asic_name[i] == '\0') 2007 break; 2008 } 2009 dev->node_props.name[i] = '\0'; 2010 2011 dev->node_props.simd_arrays_per_engine = 2012 cu_info.num_shader_arrays_per_engine; 2013 2014 dev->node_props.gfx_target_version = 2015 gpu->kfd->device_info.gfx_target_version; 2016 dev->node_props.vendor_id = gpu->adev->pdev->vendor; 2017 dev->node_props.device_id = gpu->adev->pdev->device; 2018 dev->node_props.capability |= 2019 ((dev->gpu->adev->rev_id << HSA_CAP_ASIC_REVISION_SHIFT) & 2020 HSA_CAP_ASIC_REVISION_MASK); 2021 2022 dev->node_props.location_id = pci_dev_id(gpu->adev->pdev); 2023 if (KFD_GC_VERSION(dev->gpu->kfd) == IP_VERSION(9, 4, 3)) 2024 dev->node_props.location_id |= dev->gpu->node_id; 2025 2026 dev->node_props.domain = pci_domain_nr(gpu->adev->pdev->bus); 2027 dev->node_props.max_engine_clk_fcompute = 2028 amdgpu_amdkfd_get_max_engine_clock_in_mhz(dev->gpu->adev); 2029 dev->node_props.max_engine_clk_ccompute = 2030 cpufreq_quick_get_max(0) / 1000; 2031 2032 if (gpu->xcp) 2033 dev->node_props.drm_render_minor = gpu->xcp->ddev->render->index; 2034 else 2035 dev->node_props.drm_render_minor = 2036 gpu->kfd->shared_resources.drm_render_minor; 2037 2038 dev->node_props.hive_id = gpu->kfd->hive_id; 2039 dev->node_props.num_sdma_engines = kfd_get_num_sdma_engines(gpu); 2040 dev->node_props.num_sdma_xgmi_engines = 2041 kfd_get_num_xgmi_sdma_engines(gpu); 2042 dev->node_props.num_sdma_queues_per_engine = 2043 gpu->kfd->device_info.num_sdma_queues_per_engine - 2044 gpu->kfd->device_info.num_reserved_sdma_queues_per_engine; 2045 dev->node_props.num_gws = (dev->gpu->gws && 2046 dev->gpu->dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS) ? 2047 dev->gpu->adev->gds.gws_size : 0; 2048 dev->node_props.num_cp_queues = get_cp_queues_num(dev->gpu->dqm); 2049 2050 kfd_fill_mem_clk_max_info(dev); 2051 kfd_fill_iolink_non_crat_info(dev); 2052 2053 switch (dev->gpu->adev->asic_type) { 2054 case CHIP_KAVERI: 2055 case CHIP_HAWAII: 2056 case CHIP_TONGA: 2057 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_PRE_1_0 << 2058 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) & 2059 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK); 2060 break; 2061 case CHIP_CARRIZO: 2062 case CHIP_FIJI: 2063 case CHIP_POLARIS10: 2064 case CHIP_POLARIS11: 2065 case CHIP_POLARIS12: 2066 case CHIP_VEGAM: 2067 pr_debug("Adding doorbell packet type capability\n"); 2068 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_1_0 << 2069 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) & 2070 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK); 2071 break; 2072 default: 2073 if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(9, 0, 1)) 2074 WARN(1, "Unexpected ASIC family %u", 2075 dev->gpu->adev->asic_type); 2076 else 2077 kfd_topology_set_capabilities(dev); 2078 } 2079 2080 /* 2081 * Overwrite ATS capability according to needs_iommu_device to fix 2082 * potential missing corresponding bit in CRAT of BIOS. 2083 */ 2084 if (dev->gpu->kfd->use_iommu_v2) 2085 dev->node_props.capability |= HSA_CAP_ATS_PRESENT; 2086 else 2087 dev->node_props.capability &= ~HSA_CAP_ATS_PRESENT; 2088 2089 /* Fix errors in CZ CRAT. 2090 * simd_count: Carrizo CRAT reports wrong simd_count, probably 2091 * because it doesn't consider masked out CUs 2092 * max_waves_per_simd: Carrizo reports wrong max_waves_per_simd 2093 */ 2094 if (dev->gpu->adev->asic_type == CHIP_CARRIZO) { 2095 dev->node_props.simd_count = 2096 cu_info.simd_per_cu * cu_info.cu_active_number; 2097 dev->node_props.max_waves_per_simd = 10; 2098 } 2099 2100 /* kfd only concerns sram ecc on GFX and HBM ecc on UMC */ 2101 dev->node_props.capability |= 2102 ((dev->gpu->adev->ras_enabled & BIT(AMDGPU_RAS_BLOCK__GFX)) != 0) ? 2103 HSA_CAP_SRAM_EDCSUPPORTED : 0; 2104 dev->node_props.capability |= 2105 ((dev->gpu->adev->ras_enabled & BIT(AMDGPU_RAS_BLOCK__UMC)) != 0) ? 2106 HSA_CAP_MEM_EDCSUPPORTED : 0; 2107 2108 if (KFD_GC_VERSION(dev->gpu) != IP_VERSION(9, 0, 1)) 2109 dev->node_props.capability |= (dev->gpu->adev->ras_enabled != 0) ? 2110 HSA_CAP_RASEVENTNOTIFY : 0; 2111 2112 if (KFD_IS_SVM_API_SUPPORTED(dev->gpu->adev)) 2113 dev->node_props.capability |= HSA_CAP_SVMAPI_SUPPORTED; 2114 2115 if (dev->gpu->adev->gmc.is_app_apu || 2116 dev->gpu->adev->gmc.xgmi.connected_to_cpu) 2117 dev->node_props.capability |= HSA_CAP_FLAGS_COHERENTHOSTACCESS; 2118 2119 kfd_debug_print_topology(); 2120 2121 kfd_notify_gpu_change(gpu_id, 1); 2122 2123 return 0; 2124 } 2125 2126 /** 2127 * kfd_topology_update_io_links() - Update IO links after device removal. 2128 * @proximity_domain: Proximity domain value of the dev being removed. 2129 * 2130 * The topology list currently is arranged in increasing order of 2131 * proximity domain. 2132 * 2133 * Two things need to be done when a device is removed: 2134 * 1. All the IO links to this device need to be removed. 2135 * 2. All nodes after the current device node need to move 2136 * up once this device node is removed from the topology 2137 * list. As a result, the proximity domain values for 2138 * all nodes after the node being deleted reduce by 1. 2139 * This would also cause the proximity domain values for 2140 * io links to be updated based on new proximity domain 2141 * values. 2142 * 2143 * Context: The caller must hold write topology_lock. 2144 */ 2145 static void kfd_topology_update_io_links(int proximity_domain) 2146 { 2147 struct kfd_topology_device *dev; 2148 struct kfd_iolink_properties *iolink, *p2plink, *tmp; 2149 2150 list_for_each_entry(dev, &topology_device_list, list) { 2151 if (dev->proximity_domain > proximity_domain) 2152 dev->proximity_domain--; 2153 2154 list_for_each_entry_safe(iolink, tmp, &dev->io_link_props, list) { 2155 /* 2156 * If there is an io link to the dev being deleted 2157 * then remove that IO link also. 2158 */ 2159 if (iolink->node_to == proximity_domain) { 2160 list_del(&iolink->list); 2161 dev->node_props.io_links_count--; 2162 } else { 2163 if (iolink->node_from > proximity_domain) 2164 iolink->node_from--; 2165 if (iolink->node_to > proximity_domain) 2166 iolink->node_to--; 2167 } 2168 } 2169 2170 list_for_each_entry_safe(p2plink, tmp, &dev->p2p_link_props, list) { 2171 /* 2172 * If there is a p2p link to the dev being deleted 2173 * then remove that p2p link also. 2174 */ 2175 if (p2plink->node_to == proximity_domain) { 2176 list_del(&p2plink->list); 2177 dev->node_props.p2p_links_count--; 2178 } else { 2179 if (p2plink->node_from > proximity_domain) 2180 p2plink->node_from--; 2181 if (p2plink->node_to > proximity_domain) 2182 p2plink->node_to--; 2183 } 2184 } 2185 } 2186 } 2187 2188 int kfd_topology_remove_device(struct kfd_node *gpu) 2189 { 2190 struct kfd_topology_device *dev, *tmp; 2191 uint32_t gpu_id; 2192 int res = -ENODEV; 2193 int i = 0; 2194 2195 down_write(&topology_lock); 2196 2197 list_for_each_entry_safe(dev, tmp, &topology_device_list, list) { 2198 if (dev->gpu == gpu) { 2199 gpu_id = dev->gpu_id; 2200 kfd_remove_sysfs_node_entry(dev); 2201 kfd_release_topology_device(dev); 2202 sys_props.num_devices--; 2203 kfd_topology_update_io_links(i); 2204 topology_crat_proximity_domain = sys_props.num_devices-1; 2205 sys_props.generation_count++; 2206 res = 0; 2207 if (kfd_topology_update_sysfs() < 0) 2208 kfd_topology_release_sysfs(); 2209 break; 2210 } 2211 i++; 2212 } 2213 2214 up_write(&topology_lock); 2215 2216 if (!res) 2217 kfd_notify_gpu_change(gpu_id, 0); 2218 2219 return res; 2220 } 2221 2222 /* kfd_topology_enum_kfd_devices - Enumerate through all devices in KFD 2223 * topology. If GPU device is found @idx, then valid kfd_dev pointer is 2224 * returned through @kdev 2225 * Return - 0: On success (@kdev will be NULL for non GPU nodes) 2226 * -1: If end of list 2227 */ 2228 int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_node **kdev) 2229 { 2230 2231 struct kfd_topology_device *top_dev; 2232 uint8_t device_idx = 0; 2233 2234 *kdev = NULL; 2235 down_read(&topology_lock); 2236 2237 list_for_each_entry(top_dev, &topology_device_list, list) { 2238 if (device_idx == idx) { 2239 *kdev = top_dev->gpu; 2240 up_read(&topology_lock); 2241 return 0; 2242 } 2243 2244 device_idx++; 2245 } 2246 2247 up_read(&topology_lock); 2248 2249 return -1; 2250 2251 } 2252 2253 static int kfd_cpumask_to_apic_id(const struct cpumask *cpumask) 2254 { 2255 int first_cpu_of_numa_node; 2256 2257 if (!cpumask || cpumask == cpu_none_mask) 2258 return -1; 2259 first_cpu_of_numa_node = cpumask_first(cpumask); 2260 if (first_cpu_of_numa_node >= nr_cpu_ids) 2261 return -1; 2262 #ifdef CONFIG_X86_64 2263 return cpu_data(first_cpu_of_numa_node).apicid; 2264 #else 2265 return first_cpu_of_numa_node; 2266 #endif 2267 } 2268 2269 /* kfd_numa_node_to_apic_id - Returns the APIC ID of the first logical processor 2270 * of the given NUMA node (numa_node_id) 2271 * Return -1 on failure 2272 */ 2273 int kfd_numa_node_to_apic_id(int numa_node_id) 2274 { 2275 if (numa_node_id == -1) { 2276 pr_warn("Invalid NUMA Node. Use online CPU mask\n"); 2277 return kfd_cpumask_to_apic_id(cpu_online_mask); 2278 } 2279 return kfd_cpumask_to_apic_id(cpumask_of_node(numa_node_id)); 2280 } 2281 2282 void kfd_double_confirm_iommu_support(struct kfd_dev *gpu) 2283 { 2284 struct kfd_topology_device *dev; 2285 2286 gpu->use_iommu_v2 = false; 2287 2288 if (!gpu->device_info.needs_iommu_device) 2289 return; 2290 2291 down_read(&topology_lock); 2292 2293 /* Only use IOMMUv2 if there is an APU topology node with no GPU 2294 * assigned yet. This GPU will be assigned to it. 2295 */ 2296 list_for_each_entry(dev, &topology_device_list, list) 2297 if (dev->node_props.cpu_cores_count && 2298 dev->node_props.simd_count && 2299 !dev->gpu) 2300 gpu->use_iommu_v2 = true; 2301 2302 up_read(&topology_lock); 2303 } 2304 2305 #if defined(CONFIG_DEBUG_FS) 2306 2307 int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data) 2308 { 2309 struct kfd_topology_device *dev; 2310 unsigned int i = 0; 2311 int r = 0; 2312 2313 down_read(&topology_lock); 2314 2315 list_for_each_entry(dev, &topology_device_list, list) { 2316 if (!dev->gpu) { 2317 i++; 2318 continue; 2319 } 2320 2321 seq_printf(m, "Node %u, gpu_id %x:\n", i++, dev->gpu->id); 2322 r = dqm_debugfs_hqds(m, dev->gpu->dqm); 2323 if (r) 2324 break; 2325 } 2326 2327 up_read(&topology_lock); 2328 2329 return r; 2330 } 2331 2332 int kfd_debugfs_rls_by_device(struct seq_file *m, void *data) 2333 { 2334 struct kfd_topology_device *dev; 2335 unsigned int i = 0; 2336 int r = 0; 2337 2338 down_read(&topology_lock); 2339 2340 list_for_each_entry(dev, &topology_device_list, list) { 2341 if (!dev->gpu) { 2342 i++; 2343 continue; 2344 } 2345 2346 seq_printf(m, "Node %u, gpu_id %x:\n", i++, dev->gpu->id); 2347 r = pm_debugfs_runlist(m, &dev->gpu->dqm->packet_mgr); 2348 if (r) 2349 break; 2350 } 2351 2352 up_read(&topology_lock); 2353 2354 return r; 2355 } 2356 2357 #endif 2358