1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 #include <linux/types.h> 24 #include <linux/kernel.h> 25 #include <linux/pci.h> 26 #include <linux/errno.h> 27 #include <linux/acpi.h> 28 #include <linux/hash.h> 29 #include <linux/cpufreq.h> 30 #include <linux/log2.h> 31 #include <linux/dmi.h> 32 #include <linux/atomic.h> 33 34 #include "kfd_priv.h" 35 #include "kfd_crat.h" 36 #include "kfd_topology.h" 37 #include "kfd_device_queue_manager.h" 38 #include "kfd_iommu.h" 39 #include "amdgpu_amdkfd.h" 40 #include "amdgpu_ras.h" 41 42 /* topology_device_list - Master list of all topology devices */ 43 static struct list_head topology_device_list; 44 static struct kfd_system_properties sys_props; 45 46 static DECLARE_RWSEM(topology_lock); 47 static atomic_t topology_crat_proximity_domain; 48 49 struct kfd_topology_device *kfd_topology_device_by_proximity_domain( 50 uint32_t proximity_domain) 51 { 52 struct kfd_topology_device *top_dev; 53 struct kfd_topology_device *device = NULL; 54 55 down_read(&topology_lock); 56 57 list_for_each_entry(top_dev, &topology_device_list, list) 58 if (top_dev->proximity_domain == proximity_domain) { 59 device = top_dev; 60 break; 61 } 62 63 up_read(&topology_lock); 64 65 return device; 66 } 67 68 struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id) 69 { 70 struct kfd_topology_device *top_dev = NULL; 71 struct kfd_topology_device *ret = NULL; 72 73 down_read(&topology_lock); 74 75 list_for_each_entry(top_dev, &topology_device_list, list) 76 if (top_dev->gpu_id == gpu_id) { 77 ret = top_dev; 78 break; 79 } 80 81 up_read(&topology_lock); 82 83 return ret; 84 } 85 86 struct kfd_dev *kfd_device_by_id(uint32_t gpu_id) 87 { 88 struct kfd_topology_device *top_dev; 89 90 top_dev = kfd_topology_device_by_id(gpu_id); 91 if (!top_dev) 92 return NULL; 93 94 return top_dev->gpu; 95 } 96 97 struct kfd_dev *kfd_device_by_pci_dev(const struct pci_dev *pdev) 98 { 99 struct kfd_topology_device *top_dev; 100 struct kfd_dev *device = NULL; 101 102 down_read(&topology_lock); 103 104 list_for_each_entry(top_dev, &topology_device_list, list) 105 if (top_dev->gpu && top_dev->gpu->pdev == pdev) { 106 device = top_dev->gpu; 107 break; 108 } 109 110 up_read(&topology_lock); 111 112 return device; 113 } 114 115 struct kfd_dev *kfd_device_by_kgd(const struct kgd_dev *kgd) 116 { 117 struct kfd_topology_device *top_dev; 118 struct kfd_dev *device = NULL; 119 120 down_read(&topology_lock); 121 122 list_for_each_entry(top_dev, &topology_device_list, list) 123 if (top_dev->gpu && top_dev->gpu->kgd == kgd) { 124 device = top_dev->gpu; 125 break; 126 } 127 128 up_read(&topology_lock); 129 130 return device; 131 } 132 133 /* Called with write topology_lock acquired */ 134 static void kfd_release_topology_device(struct kfd_topology_device *dev) 135 { 136 struct kfd_mem_properties *mem; 137 struct kfd_cache_properties *cache; 138 struct kfd_iolink_properties *iolink; 139 struct kfd_perf_properties *perf; 140 141 list_del(&dev->list); 142 143 while (dev->mem_props.next != &dev->mem_props) { 144 mem = container_of(dev->mem_props.next, 145 struct kfd_mem_properties, list); 146 list_del(&mem->list); 147 kfree(mem); 148 } 149 150 while (dev->cache_props.next != &dev->cache_props) { 151 cache = container_of(dev->cache_props.next, 152 struct kfd_cache_properties, list); 153 list_del(&cache->list); 154 kfree(cache); 155 } 156 157 while (dev->io_link_props.next != &dev->io_link_props) { 158 iolink = container_of(dev->io_link_props.next, 159 struct kfd_iolink_properties, list); 160 list_del(&iolink->list); 161 kfree(iolink); 162 } 163 164 while (dev->perf_props.next != &dev->perf_props) { 165 perf = container_of(dev->perf_props.next, 166 struct kfd_perf_properties, list); 167 list_del(&perf->list); 168 kfree(perf); 169 } 170 171 kfree(dev); 172 } 173 174 void kfd_release_topology_device_list(struct list_head *device_list) 175 { 176 struct kfd_topology_device *dev; 177 178 while (!list_empty(device_list)) { 179 dev = list_first_entry(device_list, 180 struct kfd_topology_device, list); 181 kfd_release_topology_device(dev); 182 } 183 } 184 185 static void kfd_release_live_view(void) 186 { 187 kfd_release_topology_device_list(&topology_device_list); 188 memset(&sys_props, 0, sizeof(sys_props)); 189 } 190 191 struct kfd_topology_device *kfd_create_topology_device( 192 struct list_head *device_list) 193 { 194 struct kfd_topology_device *dev; 195 196 dev = kfd_alloc_struct(dev); 197 if (!dev) { 198 pr_err("No memory to allocate a topology device"); 199 return NULL; 200 } 201 202 INIT_LIST_HEAD(&dev->mem_props); 203 INIT_LIST_HEAD(&dev->cache_props); 204 INIT_LIST_HEAD(&dev->io_link_props); 205 INIT_LIST_HEAD(&dev->perf_props); 206 207 list_add_tail(&dev->list, device_list); 208 209 return dev; 210 } 211 212 213 #define sysfs_show_gen_prop(buffer, fmt, ...) \ 214 snprintf(buffer, PAGE_SIZE, "%s"fmt, buffer, __VA_ARGS__) 215 #define sysfs_show_32bit_prop(buffer, name, value) \ 216 sysfs_show_gen_prop(buffer, "%s %u\n", name, value) 217 #define sysfs_show_64bit_prop(buffer, name, value) \ 218 sysfs_show_gen_prop(buffer, "%s %llu\n", name, value) 219 #define sysfs_show_32bit_val(buffer, value) \ 220 sysfs_show_gen_prop(buffer, "%u\n", value) 221 #define sysfs_show_str_val(buffer, value) \ 222 sysfs_show_gen_prop(buffer, "%s\n", value) 223 224 static ssize_t sysprops_show(struct kobject *kobj, struct attribute *attr, 225 char *buffer) 226 { 227 ssize_t ret; 228 229 /* Making sure that the buffer is an empty string */ 230 buffer[0] = 0; 231 232 if (attr == &sys_props.attr_genid) { 233 ret = sysfs_show_32bit_val(buffer, sys_props.generation_count); 234 } else if (attr == &sys_props.attr_props) { 235 sysfs_show_64bit_prop(buffer, "platform_oem", 236 sys_props.platform_oem); 237 sysfs_show_64bit_prop(buffer, "platform_id", 238 sys_props.platform_id); 239 ret = sysfs_show_64bit_prop(buffer, "platform_rev", 240 sys_props.platform_rev); 241 } else { 242 ret = -EINVAL; 243 } 244 245 return ret; 246 } 247 248 static void kfd_topology_kobj_release(struct kobject *kobj) 249 { 250 kfree(kobj); 251 } 252 253 static const struct sysfs_ops sysprops_ops = { 254 .show = sysprops_show, 255 }; 256 257 static struct kobj_type sysprops_type = { 258 .release = kfd_topology_kobj_release, 259 .sysfs_ops = &sysprops_ops, 260 }; 261 262 static ssize_t iolink_show(struct kobject *kobj, struct attribute *attr, 263 char *buffer) 264 { 265 ssize_t ret; 266 struct kfd_iolink_properties *iolink; 267 268 /* Making sure that the buffer is an empty string */ 269 buffer[0] = 0; 270 271 iolink = container_of(attr, struct kfd_iolink_properties, attr); 272 if (iolink->gpu && kfd_devcgroup_check_permission(iolink->gpu)) 273 return -EPERM; 274 sysfs_show_32bit_prop(buffer, "type", iolink->iolink_type); 275 sysfs_show_32bit_prop(buffer, "version_major", iolink->ver_maj); 276 sysfs_show_32bit_prop(buffer, "version_minor", iolink->ver_min); 277 sysfs_show_32bit_prop(buffer, "node_from", iolink->node_from); 278 sysfs_show_32bit_prop(buffer, "node_to", iolink->node_to); 279 sysfs_show_32bit_prop(buffer, "weight", iolink->weight); 280 sysfs_show_32bit_prop(buffer, "min_latency", iolink->min_latency); 281 sysfs_show_32bit_prop(buffer, "max_latency", iolink->max_latency); 282 sysfs_show_32bit_prop(buffer, "min_bandwidth", iolink->min_bandwidth); 283 sysfs_show_32bit_prop(buffer, "max_bandwidth", iolink->max_bandwidth); 284 sysfs_show_32bit_prop(buffer, "recommended_transfer_size", 285 iolink->rec_transfer_size); 286 ret = sysfs_show_32bit_prop(buffer, "flags", iolink->flags); 287 288 return ret; 289 } 290 291 static const struct sysfs_ops iolink_ops = { 292 .show = iolink_show, 293 }; 294 295 static struct kobj_type iolink_type = { 296 .release = kfd_topology_kobj_release, 297 .sysfs_ops = &iolink_ops, 298 }; 299 300 static ssize_t mem_show(struct kobject *kobj, struct attribute *attr, 301 char *buffer) 302 { 303 ssize_t ret; 304 struct kfd_mem_properties *mem; 305 306 /* Making sure that the buffer is an empty string */ 307 buffer[0] = 0; 308 309 mem = container_of(attr, struct kfd_mem_properties, attr); 310 if (mem->gpu && kfd_devcgroup_check_permission(mem->gpu)) 311 return -EPERM; 312 sysfs_show_32bit_prop(buffer, "heap_type", mem->heap_type); 313 sysfs_show_64bit_prop(buffer, "size_in_bytes", mem->size_in_bytes); 314 sysfs_show_32bit_prop(buffer, "flags", mem->flags); 315 sysfs_show_32bit_prop(buffer, "width", mem->width); 316 ret = sysfs_show_32bit_prop(buffer, "mem_clk_max", mem->mem_clk_max); 317 318 return ret; 319 } 320 321 static const struct sysfs_ops mem_ops = { 322 .show = mem_show, 323 }; 324 325 static struct kobj_type mem_type = { 326 .release = kfd_topology_kobj_release, 327 .sysfs_ops = &mem_ops, 328 }; 329 330 static ssize_t kfd_cache_show(struct kobject *kobj, struct attribute *attr, 331 char *buffer) 332 { 333 ssize_t ret; 334 uint32_t i, j; 335 struct kfd_cache_properties *cache; 336 337 /* Making sure that the buffer is an empty string */ 338 buffer[0] = 0; 339 340 cache = container_of(attr, struct kfd_cache_properties, attr); 341 if (cache->gpu && kfd_devcgroup_check_permission(cache->gpu)) 342 return -EPERM; 343 sysfs_show_32bit_prop(buffer, "processor_id_low", 344 cache->processor_id_low); 345 sysfs_show_32bit_prop(buffer, "level", cache->cache_level); 346 sysfs_show_32bit_prop(buffer, "size", cache->cache_size); 347 sysfs_show_32bit_prop(buffer, "cache_line_size", cache->cacheline_size); 348 sysfs_show_32bit_prop(buffer, "cache_lines_per_tag", 349 cache->cachelines_per_tag); 350 sysfs_show_32bit_prop(buffer, "association", cache->cache_assoc); 351 sysfs_show_32bit_prop(buffer, "latency", cache->cache_latency); 352 sysfs_show_32bit_prop(buffer, "type", cache->cache_type); 353 snprintf(buffer, PAGE_SIZE, "%ssibling_map ", buffer); 354 for (i = 0; i < CRAT_SIBLINGMAP_SIZE; i++) 355 for (j = 0; j < sizeof(cache->sibling_map[0])*8; j++) { 356 /* Check each bit */ 357 if (cache->sibling_map[i] & (1 << j)) 358 ret = snprintf(buffer, PAGE_SIZE, 359 "%s%d%s", buffer, 1, ","); 360 else 361 ret = snprintf(buffer, PAGE_SIZE, 362 "%s%d%s", buffer, 0, ","); 363 } 364 /* Replace the last "," with end of line */ 365 *(buffer + strlen(buffer) - 1) = 0xA; 366 return ret; 367 } 368 369 static const struct sysfs_ops cache_ops = { 370 .show = kfd_cache_show, 371 }; 372 373 static struct kobj_type cache_type = { 374 .release = kfd_topology_kobj_release, 375 .sysfs_ops = &cache_ops, 376 }; 377 378 /****** Sysfs of Performance Counters ******/ 379 380 struct kfd_perf_attr { 381 struct kobj_attribute attr; 382 uint32_t data; 383 }; 384 385 static ssize_t perf_show(struct kobject *kobj, struct kobj_attribute *attrs, 386 char *buf) 387 { 388 struct kfd_perf_attr *attr; 389 390 buf[0] = 0; 391 attr = container_of(attrs, struct kfd_perf_attr, attr); 392 if (!attr->data) /* invalid data for PMC */ 393 return 0; 394 else 395 return sysfs_show_32bit_val(buf, attr->data); 396 } 397 398 #define KFD_PERF_DESC(_name, _data) \ 399 { \ 400 .attr = __ATTR(_name, 0444, perf_show, NULL), \ 401 .data = _data, \ 402 } 403 404 static struct kfd_perf_attr perf_attr_iommu[] = { 405 KFD_PERF_DESC(max_concurrent, 0), 406 KFD_PERF_DESC(num_counters, 0), 407 KFD_PERF_DESC(counter_ids, 0), 408 }; 409 /****************************************/ 410 411 static ssize_t node_show(struct kobject *kobj, struct attribute *attr, 412 char *buffer) 413 { 414 struct kfd_topology_device *dev; 415 uint32_t log_max_watch_addr; 416 417 /* Making sure that the buffer is an empty string */ 418 buffer[0] = 0; 419 420 if (strcmp(attr->name, "gpu_id") == 0) { 421 dev = container_of(attr, struct kfd_topology_device, 422 attr_gpuid); 423 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu)) 424 return -EPERM; 425 return sysfs_show_32bit_val(buffer, dev->gpu_id); 426 } 427 428 if (strcmp(attr->name, "name") == 0) { 429 dev = container_of(attr, struct kfd_topology_device, 430 attr_name); 431 432 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu)) 433 return -EPERM; 434 return sysfs_show_str_val(buffer, dev->node_props.name); 435 } 436 437 dev = container_of(attr, struct kfd_topology_device, 438 attr_props); 439 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu)) 440 return -EPERM; 441 sysfs_show_32bit_prop(buffer, "cpu_cores_count", 442 dev->node_props.cpu_cores_count); 443 sysfs_show_32bit_prop(buffer, "simd_count", 444 dev->node_props.simd_count); 445 sysfs_show_32bit_prop(buffer, "mem_banks_count", 446 dev->node_props.mem_banks_count); 447 sysfs_show_32bit_prop(buffer, "caches_count", 448 dev->node_props.caches_count); 449 sysfs_show_32bit_prop(buffer, "io_links_count", 450 dev->node_props.io_links_count); 451 sysfs_show_32bit_prop(buffer, "cpu_core_id_base", 452 dev->node_props.cpu_core_id_base); 453 sysfs_show_32bit_prop(buffer, "simd_id_base", 454 dev->node_props.simd_id_base); 455 sysfs_show_32bit_prop(buffer, "max_waves_per_simd", 456 dev->node_props.max_waves_per_simd); 457 sysfs_show_32bit_prop(buffer, "lds_size_in_kb", 458 dev->node_props.lds_size_in_kb); 459 sysfs_show_32bit_prop(buffer, "gds_size_in_kb", 460 dev->node_props.gds_size_in_kb); 461 sysfs_show_32bit_prop(buffer, "num_gws", 462 dev->node_props.num_gws); 463 sysfs_show_32bit_prop(buffer, "wave_front_size", 464 dev->node_props.wave_front_size); 465 sysfs_show_32bit_prop(buffer, "array_count", 466 dev->node_props.array_count); 467 sysfs_show_32bit_prop(buffer, "simd_arrays_per_engine", 468 dev->node_props.simd_arrays_per_engine); 469 sysfs_show_32bit_prop(buffer, "cu_per_simd_array", 470 dev->node_props.cu_per_simd_array); 471 sysfs_show_32bit_prop(buffer, "simd_per_cu", 472 dev->node_props.simd_per_cu); 473 sysfs_show_32bit_prop(buffer, "max_slots_scratch_cu", 474 dev->node_props.max_slots_scratch_cu); 475 sysfs_show_32bit_prop(buffer, "vendor_id", 476 dev->node_props.vendor_id); 477 sysfs_show_32bit_prop(buffer, "device_id", 478 dev->node_props.device_id); 479 sysfs_show_32bit_prop(buffer, "location_id", 480 dev->node_props.location_id); 481 sysfs_show_32bit_prop(buffer, "drm_render_minor", 482 dev->node_props.drm_render_minor); 483 sysfs_show_64bit_prop(buffer, "hive_id", 484 dev->node_props.hive_id); 485 sysfs_show_32bit_prop(buffer, "num_sdma_engines", 486 dev->node_props.num_sdma_engines); 487 sysfs_show_32bit_prop(buffer, "num_sdma_xgmi_engines", 488 dev->node_props.num_sdma_xgmi_engines); 489 sysfs_show_32bit_prop(buffer, "num_sdma_queues_per_engine", 490 dev->node_props.num_sdma_queues_per_engine); 491 sysfs_show_32bit_prop(buffer, "num_cp_queues", 492 dev->node_props.num_cp_queues); 493 sysfs_show_64bit_prop(buffer, "unique_id", 494 dev->node_props.unique_id); 495 496 if (dev->gpu) { 497 log_max_watch_addr = 498 __ilog2_u32(dev->gpu->device_info->num_of_watch_points); 499 500 if (log_max_watch_addr) { 501 dev->node_props.capability |= 502 HSA_CAP_WATCH_POINTS_SUPPORTED; 503 504 dev->node_props.capability |= 505 ((log_max_watch_addr << 506 HSA_CAP_WATCH_POINTS_TOTALBITS_SHIFT) & 507 HSA_CAP_WATCH_POINTS_TOTALBITS_MASK); 508 } 509 510 if (dev->gpu->device_info->asic_family == CHIP_TONGA) 511 dev->node_props.capability |= 512 HSA_CAP_AQL_QUEUE_DOUBLE_MAP; 513 514 sysfs_show_32bit_prop(buffer, "max_engine_clk_fcompute", 515 dev->node_props.max_engine_clk_fcompute); 516 517 sysfs_show_64bit_prop(buffer, "local_mem_size", 518 (unsigned long long int) 0); 519 520 sysfs_show_32bit_prop(buffer, "fw_version", 521 dev->gpu->mec_fw_version); 522 sysfs_show_32bit_prop(buffer, "capability", 523 dev->node_props.capability); 524 sysfs_show_32bit_prop(buffer, "sdma_fw_version", 525 dev->gpu->sdma_fw_version); 526 } 527 528 return sysfs_show_32bit_prop(buffer, "max_engine_clk_ccompute", 529 cpufreq_quick_get_max(0)/1000); 530 } 531 532 static const struct sysfs_ops node_ops = { 533 .show = node_show, 534 }; 535 536 static struct kobj_type node_type = { 537 .release = kfd_topology_kobj_release, 538 .sysfs_ops = &node_ops, 539 }; 540 541 static void kfd_remove_sysfs_file(struct kobject *kobj, struct attribute *attr) 542 { 543 sysfs_remove_file(kobj, attr); 544 kobject_del(kobj); 545 kobject_put(kobj); 546 } 547 548 static void kfd_remove_sysfs_node_entry(struct kfd_topology_device *dev) 549 { 550 struct kfd_iolink_properties *iolink; 551 struct kfd_cache_properties *cache; 552 struct kfd_mem_properties *mem; 553 struct kfd_perf_properties *perf; 554 555 if (dev->kobj_iolink) { 556 list_for_each_entry(iolink, &dev->io_link_props, list) 557 if (iolink->kobj) { 558 kfd_remove_sysfs_file(iolink->kobj, 559 &iolink->attr); 560 iolink->kobj = NULL; 561 } 562 kobject_del(dev->kobj_iolink); 563 kobject_put(dev->kobj_iolink); 564 dev->kobj_iolink = NULL; 565 } 566 567 if (dev->kobj_cache) { 568 list_for_each_entry(cache, &dev->cache_props, list) 569 if (cache->kobj) { 570 kfd_remove_sysfs_file(cache->kobj, 571 &cache->attr); 572 cache->kobj = NULL; 573 } 574 kobject_del(dev->kobj_cache); 575 kobject_put(dev->kobj_cache); 576 dev->kobj_cache = NULL; 577 } 578 579 if (dev->kobj_mem) { 580 list_for_each_entry(mem, &dev->mem_props, list) 581 if (mem->kobj) { 582 kfd_remove_sysfs_file(mem->kobj, &mem->attr); 583 mem->kobj = NULL; 584 } 585 kobject_del(dev->kobj_mem); 586 kobject_put(dev->kobj_mem); 587 dev->kobj_mem = NULL; 588 } 589 590 if (dev->kobj_perf) { 591 list_for_each_entry(perf, &dev->perf_props, list) { 592 kfree(perf->attr_group); 593 perf->attr_group = NULL; 594 } 595 kobject_del(dev->kobj_perf); 596 kobject_put(dev->kobj_perf); 597 dev->kobj_perf = NULL; 598 } 599 600 if (dev->kobj_node) { 601 sysfs_remove_file(dev->kobj_node, &dev->attr_gpuid); 602 sysfs_remove_file(dev->kobj_node, &dev->attr_name); 603 sysfs_remove_file(dev->kobj_node, &dev->attr_props); 604 kobject_del(dev->kobj_node); 605 kobject_put(dev->kobj_node); 606 dev->kobj_node = NULL; 607 } 608 } 609 610 static int kfd_build_sysfs_node_entry(struct kfd_topology_device *dev, 611 uint32_t id) 612 { 613 struct kfd_iolink_properties *iolink; 614 struct kfd_cache_properties *cache; 615 struct kfd_mem_properties *mem; 616 struct kfd_perf_properties *perf; 617 int ret; 618 uint32_t i, num_attrs; 619 struct attribute **attrs; 620 621 if (WARN_ON(dev->kobj_node)) 622 return -EEXIST; 623 624 /* 625 * Creating the sysfs folders 626 */ 627 dev->kobj_node = kfd_alloc_struct(dev->kobj_node); 628 if (!dev->kobj_node) 629 return -ENOMEM; 630 631 ret = kobject_init_and_add(dev->kobj_node, &node_type, 632 sys_props.kobj_nodes, "%d", id); 633 if (ret < 0) 634 return ret; 635 636 dev->kobj_mem = kobject_create_and_add("mem_banks", dev->kobj_node); 637 if (!dev->kobj_mem) 638 return -ENOMEM; 639 640 dev->kobj_cache = kobject_create_and_add("caches", dev->kobj_node); 641 if (!dev->kobj_cache) 642 return -ENOMEM; 643 644 dev->kobj_iolink = kobject_create_and_add("io_links", dev->kobj_node); 645 if (!dev->kobj_iolink) 646 return -ENOMEM; 647 648 dev->kobj_perf = kobject_create_and_add("perf", dev->kobj_node); 649 if (!dev->kobj_perf) 650 return -ENOMEM; 651 652 /* 653 * Creating sysfs files for node properties 654 */ 655 dev->attr_gpuid.name = "gpu_id"; 656 dev->attr_gpuid.mode = KFD_SYSFS_FILE_MODE; 657 sysfs_attr_init(&dev->attr_gpuid); 658 dev->attr_name.name = "name"; 659 dev->attr_name.mode = KFD_SYSFS_FILE_MODE; 660 sysfs_attr_init(&dev->attr_name); 661 dev->attr_props.name = "properties"; 662 dev->attr_props.mode = KFD_SYSFS_FILE_MODE; 663 sysfs_attr_init(&dev->attr_props); 664 ret = sysfs_create_file(dev->kobj_node, &dev->attr_gpuid); 665 if (ret < 0) 666 return ret; 667 ret = sysfs_create_file(dev->kobj_node, &dev->attr_name); 668 if (ret < 0) 669 return ret; 670 ret = sysfs_create_file(dev->kobj_node, &dev->attr_props); 671 if (ret < 0) 672 return ret; 673 674 i = 0; 675 list_for_each_entry(mem, &dev->mem_props, list) { 676 mem->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 677 if (!mem->kobj) 678 return -ENOMEM; 679 ret = kobject_init_and_add(mem->kobj, &mem_type, 680 dev->kobj_mem, "%d", i); 681 if (ret < 0) 682 return ret; 683 684 mem->attr.name = "properties"; 685 mem->attr.mode = KFD_SYSFS_FILE_MODE; 686 sysfs_attr_init(&mem->attr); 687 ret = sysfs_create_file(mem->kobj, &mem->attr); 688 if (ret < 0) 689 return ret; 690 i++; 691 } 692 693 i = 0; 694 list_for_each_entry(cache, &dev->cache_props, list) { 695 cache->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 696 if (!cache->kobj) 697 return -ENOMEM; 698 ret = kobject_init_and_add(cache->kobj, &cache_type, 699 dev->kobj_cache, "%d", i); 700 if (ret < 0) 701 return ret; 702 703 cache->attr.name = "properties"; 704 cache->attr.mode = KFD_SYSFS_FILE_MODE; 705 sysfs_attr_init(&cache->attr); 706 ret = sysfs_create_file(cache->kobj, &cache->attr); 707 if (ret < 0) 708 return ret; 709 i++; 710 } 711 712 i = 0; 713 list_for_each_entry(iolink, &dev->io_link_props, list) { 714 iolink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 715 if (!iolink->kobj) 716 return -ENOMEM; 717 ret = kobject_init_and_add(iolink->kobj, &iolink_type, 718 dev->kobj_iolink, "%d", i); 719 if (ret < 0) 720 return ret; 721 722 iolink->attr.name = "properties"; 723 iolink->attr.mode = KFD_SYSFS_FILE_MODE; 724 sysfs_attr_init(&iolink->attr); 725 ret = sysfs_create_file(iolink->kobj, &iolink->attr); 726 if (ret < 0) 727 return ret; 728 i++; 729 } 730 731 /* All hardware blocks have the same number of attributes. */ 732 num_attrs = ARRAY_SIZE(perf_attr_iommu); 733 list_for_each_entry(perf, &dev->perf_props, list) { 734 perf->attr_group = kzalloc(sizeof(struct kfd_perf_attr) 735 * num_attrs + sizeof(struct attribute_group), 736 GFP_KERNEL); 737 if (!perf->attr_group) 738 return -ENOMEM; 739 740 attrs = (struct attribute **)(perf->attr_group + 1); 741 if (!strcmp(perf->block_name, "iommu")) { 742 /* Information of IOMMU's num_counters and counter_ids is shown 743 * under /sys/bus/event_source/devices/amd_iommu. We don't 744 * duplicate here. 745 */ 746 perf_attr_iommu[0].data = perf->max_concurrent; 747 for (i = 0; i < num_attrs; i++) 748 attrs[i] = &perf_attr_iommu[i].attr.attr; 749 } 750 perf->attr_group->name = perf->block_name; 751 perf->attr_group->attrs = attrs; 752 ret = sysfs_create_group(dev->kobj_perf, perf->attr_group); 753 if (ret < 0) 754 return ret; 755 } 756 757 return 0; 758 } 759 760 /* Called with write topology lock acquired */ 761 static int kfd_build_sysfs_node_tree(void) 762 { 763 struct kfd_topology_device *dev; 764 int ret; 765 uint32_t i = 0; 766 767 list_for_each_entry(dev, &topology_device_list, list) { 768 ret = kfd_build_sysfs_node_entry(dev, i); 769 if (ret < 0) 770 return ret; 771 i++; 772 } 773 774 return 0; 775 } 776 777 /* Called with write topology lock acquired */ 778 static void kfd_remove_sysfs_node_tree(void) 779 { 780 struct kfd_topology_device *dev; 781 782 list_for_each_entry(dev, &topology_device_list, list) 783 kfd_remove_sysfs_node_entry(dev); 784 } 785 786 static int kfd_topology_update_sysfs(void) 787 { 788 int ret; 789 790 pr_info("Creating topology SYSFS entries\n"); 791 if (!sys_props.kobj_topology) { 792 sys_props.kobj_topology = 793 kfd_alloc_struct(sys_props.kobj_topology); 794 if (!sys_props.kobj_topology) 795 return -ENOMEM; 796 797 ret = kobject_init_and_add(sys_props.kobj_topology, 798 &sysprops_type, &kfd_device->kobj, 799 "topology"); 800 if (ret < 0) 801 return ret; 802 803 sys_props.kobj_nodes = kobject_create_and_add("nodes", 804 sys_props.kobj_topology); 805 if (!sys_props.kobj_nodes) 806 return -ENOMEM; 807 808 sys_props.attr_genid.name = "generation_id"; 809 sys_props.attr_genid.mode = KFD_SYSFS_FILE_MODE; 810 sysfs_attr_init(&sys_props.attr_genid); 811 ret = sysfs_create_file(sys_props.kobj_topology, 812 &sys_props.attr_genid); 813 if (ret < 0) 814 return ret; 815 816 sys_props.attr_props.name = "system_properties"; 817 sys_props.attr_props.mode = KFD_SYSFS_FILE_MODE; 818 sysfs_attr_init(&sys_props.attr_props); 819 ret = sysfs_create_file(sys_props.kobj_topology, 820 &sys_props.attr_props); 821 if (ret < 0) 822 return ret; 823 } 824 825 kfd_remove_sysfs_node_tree(); 826 827 return kfd_build_sysfs_node_tree(); 828 } 829 830 static void kfd_topology_release_sysfs(void) 831 { 832 kfd_remove_sysfs_node_tree(); 833 if (sys_props.kobj_topology) { 834 sysfs_remove_file(sys_props.kobj_topology, 835 &sys_props.attr_genid); 836 sysfs_remove_file(sys_props.kobj_topology, 837 &sys_props.attr_props); 838 if (sys_props.kobj_nodes) { 839 kobject_del(sys_props.kobj_nodes); 840 kobject_put(sys_props.kobj_nodes); 841 sys_props.kobj_nodes = NULL; 842 } 843 kobject_del(sys_props.kobj_topology); 844 kobject_put(sys_props.kobj_topology); 845 sys_props.kobj_topology = NULL; 846 } 847 } 848 849 /* Called with write topology_lock acquired */ 850 static void kfd_topology_update_device_list(struct list_head *temp_list, 851 struct list_head *master_list) 852 { 853 while (!list_empty(temp_list)) { 854 list_move_tail(temp_list->next, master_list); 855 sys_props.num_devices++; 856 } 857 } 858 859 static void kfd_debug_print_topology(void) 860 { 861 struct kfd_topology_device *dev; 862 863 down_read(&topology_lock); 864 865 dev = list_last_entry(&topology_device_list, 866 struct kfd_topology_device, list); 867 if (dev) { 868 if (dev->node_props.cpu_cores_count && 869 dev->node_props.simd_count) { 870 pr_info("Topology: Add APU node [0x%0x:0x%0x]\n", 871 dev->node_props.device_id, 872 dev->node_props.vendor_id); 873 } else if (dev->node_props.cpu_cores_count) 874 pr_info("Topology: Add CPU node\n"); 875 else if (dev->node_props.simd_count) 876 pr_info("Topology: Add dGPU node [0x%0x:0x%0x]\n", 877 dev->node_props.device_id, 878 dev->node_props.vendor_id); 879 } 880 up_read(&topology_lock); 881 } 882 883 /* Helper function for intializing platform_xx members of 884 * kfd_system_properties. Uses OEM info from the last CPU/APU node. 885 */ 886 static void kfd_update_system_properties(void) 887 { 888 struct kfd_topology_device *dev; 889 890 down_read(&topology_lock); 891 dev = list_last_entry(&topology_device_list, 892 struct kfd_topology_device, list); 893 if (dev) { 894 sys_props.platform_id = 895 (*((uint64_t *)dev->oem_id)) & CRAT_OEMID_64BIT_MASK; 896 sys_props.platform_oem = *((uint64_t *)dev->oem_table_id); 897 sys_props.platform_rev = dev->oem_revision; 898 } 899 up_read(&topology_lock); 900 } 901 902 static void find_system_memory(const struct dmi_header *dm, 903 void *private) 904 { 905 struct kfd_mem_properties *mem; 906 u16 mem_width, mem_clock; 907 struct kfd_topology_device *kdev = 908 (struct kfd_topology_device *)private; 909 const u8 *dmi_data = (const u8 *)(dm + 1); 910 911 if (dm->type == DMI_ENTRY_MEM_DEVICE && dm->length >= 0x15) { 912 mem_width = (u16)(*(const u16 *)(dmi_data + 0x6)); 913 mem_clock = (u16)(*(const u16 *)(dmi_data + 0x11)); 914 list_for_each_entry(mem, &kdev->mem_props, list) { 915 if (mem_width != 0xFFFF && mem_width != 0) 916 mem->width = mem_width; 917 if (mem_clock != 0) 918 mem->mem_clk_max = mem_clock; 919 } 920 } 921 } 922 923 /* 924 * Performance counters information is not part of CRAT but we would like to 925 * put them in the sysfs under topology directory for Thunk to get the data. 926 * This function is called before updating the sysfs. 927 */ 928 static int kfd_add_perf_to_topology(struct kfd_topology_device *kdev) 929 { 930 /* These are the only counters supported so far */ 931 return kfd_iommu_add_perf_counters(kdev); 932 } 933 934 /* kfd_add_non_crat_information - Add information that is not currently 935 * defined in CRAT but is necessary for KFD topology 936 * @dev - topology device to which addition info is added 937 */ 938 static void kfd_add_non_crat_information(struct kfd_topology_device *kdev) 939 { 940 /* Check if CPU only node. */ 941 if (!kdev->gpu) { 942 /* Add system memory information */ 943 dmi_walk(find_system_memory, kdev); 944 } 945 /* TODO: For GPU node, rearrange code from kfd_topology_add_device */ 946 } 947 948 /* kfd_is_acpi_crat_invalid - CRAT from ACPI is valid only for AMD APU devices. 949 * Ignore CRAT for all other devices. AMD APU is identified if both CPU 950 * and GPU cores are present. 951 * @device_list - topology device list created by parsing ACPI CRAT table. 952 * @return - TRUE if invalid, FALSE is valid. 953 */ 954 static bool kfd_is_acpi_crat_invalid(struct list_head *device_list) 955 { 956 struct kfd_topology_device *dev; 957 958 list_for_each_entry(dev, device_list, list) { 959 if (dev->node_props.cpu_cores_count && 960 dev->node_props.simd_count) 961 return false; 962 } 963 pr_info("Ignoring ACPI CRAT on non-APU system\n"); 964 return true; 965 } 966 967 int kfd_topology_init(void) 968 { 969 void *crat_image = NULL; 970 size_t image_size = 0; 971 int ret; 972 struct list_head temp_topology_device_list; 973 int cpu_only_node = 0; 974 struct kfd_topology_device *kdev; 975 int proximity_domain; 976 977 /* topology_device_list - Master list of all topology devices 978 * temp_topology_device_list - temporary list created while parsing CRAT 979 * or VCRAT. Once parsing is complete the contents of list is moved to 980 * topology_device_list 981 */ 982 983 /* Initialize the head for the both the lists */ 984 INIT_LIST_HEAD(&topology_device_list); 985 INIT_LIST_HEAD(&temp_topology_device_list); 986 init_rwsem(&topology_lock); 987 988 memset(&sys_props, 0, sizeof(sys_props)); 989 990 /* Proximity domains in ACPI CRAT tables start counting at 991 * 0. The same should be true for virtual CRAT tables created 992 * at this stage. GPUs added later in kfd_topology_add_device 993 * use a counter. 994 */ 995 proximity_domain = 0; 996 997 /* 998 * Get the CRAT image from the ACPI. If ACPI doesn't have one 999 * or if ACPI CRAT is invalid create a virtual CRAT. 1000 * NOTE: The current implementation expects all AMD APUs to have 1001 * CRAT. If no CRAT is available, it is assumed to be a CPU 1002 */ 1003 ret = kfd_create_crat_image_acpi(&crat_image, &image_size); 1004 if (!ret) { 1005 ret = kfd_parse_crat_table(crat_image, 1006 &temp_topology_device_list, 1007 proximity_domain); 1008 if (ret || 1009 kfd_is_acpi_crat_invalid(&temp_topology_device_list)) { 1010 kfd_release_topology_device_list( 1011 &temp_topology_device_list); 1012 kfd_destroy_crat_image(crat_image); 1013 crat_image = NULL; 1014 } 1015 } 1016 1017 if (!crat_image) { 1018 ret = kfd_create_crat_image_virtual(&crat_image, &image_size, 1019 COMPUTE_UNIT_CPU, NULL, 1020 proximity_domain); 1021 cpu_only_node = 1; 1022 if (ret) { 1023 pr_err("Error creating VCRAT table for CPU\n"); 1024 return ret; 1025 } 1026 1027 ret = kfd_parse_crat_table(crat_image, 1028 &temp_topology_device_list, 1029 proximity_domain); 1030 if (ret) { 1031 pr_err("Error parsing VCRAT table for CPU\n"); 1032 goto err; 1033 } 1034 } 1035 1036 kdev = list_first_entry(&temp_topology_device_list, 1037 struct kfd_topology_device, list); 1038 kfd_add_perf_to_topology(kdev); 1039 1040 down_write(&topology_lock); 1041 kfd_topology_update_device_list(&temp_topology_device_list, 1042 &topology_device_list); 1043 atomic_set(&topology_crat_proximity_domain, sys_props.num_devices-1); 1044 ret = kfd_topology_update_sysfs(); 1045 up_write(&topology_lock); 1046 1047 if (!ret) { 1048 sys_props.generation_count++; 1049 kfd_update_system_properties(); 1050 kfd_debug_print_topology(); 1051 pr_info("Finished initializing topology\n"); 1052 } else 1053 pr_err("Failed to update topology in sysfs ret=%d\n", ret); 1054 1055 /* For nodes with GPU, this information gets added 1056 * when GPU is detected (kfd_topology_add_device). 1057 */ 1058 if (cpu_only_node) { 1059 /* Add additional information to CPU only node created above */ 1060 down_write(&topology_lock); 1061 kdev = list_first_entry(&topology_device_list, 1062 struct kfd_topology_device, list); 1063 up_write(&topology_lock); 1064 kfd_add_non_crat_information(kdev); 1065 } 1066 1067 err: 1068 kfd_destroy_crat_image(crat_image); 1069 return ret; 1070 } 1071 1072 void kfd_topology_shutdown(void) 1073 { 1074 down_write(&topology_lock); 1075 kfd_topology_release_sysfs(); 1076 kfd_release_live_view(); 1077 up_write(&topology_lock); 1078 } 1079 1080 static uint32_t kfd_generate_gpu_id(struct kfd_dev *gpu) 1081 { 1082 uint32_t hashout; 1083 uint32_t buf[7]; 1084 uint64_t local_mem_size; 1085 int i; 1086 struct kfd_local_mem_info local_mem_info; 1087 1088 if (!gpu) 1089 return 0; 1090 1091 amdgpu_amdkfd_get_local_mem_info(gpu->kgd, &local_mem_info); 1092 1093 local_mem_size = local_mem_info.local_mem_size_private + 1094 local_mem_info.local_mem_size_public; 1095 1096 buf[0] = gpu->pdev->devfn; 1097 buf[1] = gpu->pdev->subsystem_vendor | 1098 (gpu->pdev->subsystem_device << 16); 1099 buf[2] = pci_domain_nr(gpu->pdev->bus); 1100 buf[3] = gpu->pdev->device; 1101 buf[4] = gpu->pdev->bus->number; 1102 buf[5] = lower_32_bits(local_mem_size); 1103 buf[6] = upper_32_bits(local_mem_size); 1104 1105 for (i = 0, hashout = 0; i < 7; i++) 1106 hashout ^= hash_32(buf[i], KFD_GPU_ID_HASH_WIDTH); 1107 1108 return hashout; 1109 } 1110 /* kfd_assign_gpu - Attach @gpu to the correct kfd topology device. If 1111 * the GPU device is not already present in the topology device 1112 * list then return NULL. This means a new topology device has to 1113 * be created for this GPU. 1114 */ 1115 static struct kfd_topology_device *kfd_assign_gpu(struct kfd_dev *gpu) 1116 { 1117 struct kfd_topology_device *dev; 1118 struct kfd_topology_device *out_dev = NULL; 1119 struct kfd_mem_properties *mem; 1120 struct kfd_cache_properties *cache; 1121 struct kfd_iolink_properties *iolink; 1122 1123 down_write(&topology_lock); 1124 list_for_each_entry(dev, &topology_device_list, list) { 1125 /* Discrete GPUs need their own topology device list 1126 * entries. Don't assign them to CPU/APU nodes. 1127 */ 1128 if (!gpu->device_info->needs_iommu_device && 1129 dev->node_props.cpu_cores_count) 1130 continue; 1131 1132 if (!dev->gpu && (dev->node_props.simd_count > 0)) { 1133 dev->gpu = gpu; 1134 out_dev = dev; 1135 1136 list_for_each_entry(mem, &dev->mem_props, list) 1137 mem->gpu = dev->gpu; 1138 list_for_each_entry(cache, &dev->cache_props, list) 1139 cache->gpu = dev->gpu; 1140 list_for_each_entry(iolink, &dev->io_link_props, list) 1141 iolink->gpu = dev->gpu; 1142 break; 1143 } 1144 } 1145 up_write(&topology_lock); 1146 return out_dev; 1147 } 1148 1149 static void kfd_notify_gpu_change(uint32_t gpu_id, int arrival) 1150 { 1151 /* 1152 * TODO: Generate an event for thunk about the arrival/removal 1153 * of the GPU 1154 */ 1155 } 1156 1157 /* kfd_fill_mem_clk_max_info - Since CRAT doesn't have memory clock info, 1158 * patch this after CRAT parsing. 1159 */ 1160 static void kfd_fill_mem_clk_max_info(struct kfd_topology_device *dev) 1161 { 1162 struct kfd_mem_properties *mem; 1163 struct kfd_local_mem_info local_mem_info; 1164 1165 if (!dev) 1166 return; 1167 1168 /* Currently, amdgpu driver (amdgpu_mc) deals only with GPUs with 1169 * single bank of VRAM local memory. 1170 * for dGPUs - VCRAT reports only one bank of Local Memory 1171 * for APUs - If CRAT from ACPI reports more than one bank, then 1172 * all the banks will report the same mem_clk_max information 1173 */ 1174 amdgpu_amdkfd_get_local_mem_info(dev->gpu->kgd, &local_mem_info); 1175 1176 list_for_each_entry(mem, &dev->mem_props, list) 1177 mem->mem_clk_max = local_mem_info.mem_clk_max; 1178 } 1179 1180 static void kfd_fill_iolink_non_crat_info(struct kfd_topology_device *dev) 1181 { 1182 struct kfd_iolink_properties *link, *cpu_link; 1183 struct kfd_topology_device *cpu_dev; 1184 uint32_t cap; 1185 uint32_t cpu_flag = CRAT_IOLINK_FLAGS_ENABLED; 1186 uint32_t flag = CRAT_IOLINK_FLAGS_ENABLED; 1187 1188 if (!dev || !dev->gpu) 1189 return; 1190 1191 pcie_capability_read_dword(dev->gpu->pdev, 1192 PCI_EXP_DEVCAP2, &cap); 1193 1194 if (!(cap & (PCI_EXP_DEVCAP2_ATOMIC_COMP32 | 1195 PCI_EXP_DEVCAP2_ATOMIC_COMP64))) 1196 cpu_flag |= CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT | 1197 CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT; 1198 1199 if (!dev->gpu->pci_atomic_requested || 1200 dev->gpu->device_info->asic_family == CHIP_HAWAII) 1201 flag |= CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT | 1202 CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT; 1203 1204 /* GPU only creates direct links so apply flags setting to all */ 1205 list_for_each_entry(link, &dev->io_link_props, list) { 1206 link->flags = flag; 1207 cpu_dev = kfd_topology_device_by_proximity_domain( 1208 link->node_to); 1209 if (cpu_dev) { 1210 list_for_each_entry(cpu_link, 1211 &cpu_dev->io_link_props, list) 1212 if (cpu_link->node_to == link->node_from) 1213 cpu_link->flags = cpu_flag; 1214 } 1215 } 1216 } 1217 1218 int kfd_topology_add_device(struct kfd_dev *gpu) 1219 { 1220 uint32_t gpu_id; 1221 struct kfd_topology_device *dev; 1222 struct kfd_cu_info cu_info; 1223 int res = 0; 1224 struct list_head temp_topology_device_list; 1225 void *crat_image = NULL; 1226 size_t image_size = 0; 1227 int proximity_domain; 1228 struct amdgpu_ras *ctx; 1229 1230 INIT_LIST_HEAD(&temp_topology_device_list); 1231 1232 gpu_id = kfd_generate_gpu_id(gpu); 1233 1234 pr_debug("Adding new GPU (ID: 0x%x) to topology\n", gpu_id); 1235 1236 proximity_domain = atomic_inc_return(&topology_crat_proximity_domain); 1237 1238 /* Check to see if this gpu device exists in the topology_device_list. 1239 * If so, assign the gpu to that device, 1240 * else create a Virtual CRAT for this gpu device and then parse that 1241 * CRAT to create a new topology device. Once created assign the gpu to 1242 * that topology device 1243 */ 1244 dev = kfd_assign_gpu(gpu); 1245 if (!dev) { 1246 res = kfd_create_crat_image_virtual(&crat_image, &image_size, 1247 COMPUTE_UNIT_GPU, gpu, 1248 proximity_domain); 1249 if (res) { 1250 pr_err("Error creating VCRAT for GPU (ID: 0x%x)\n", 1251 gpu_id); 1252 return res; 1253 } 1254 res = kfd_parse_crat_table(crat_image, 1255 &temp_topology_device_list, 1256 proximity_domain); 1257 if (res) { 1258 pr_err("Error parsing VCRAT for GPU (ID: 0x%x)\n", 1259 gpu_id); 1260 goto err; 1261 } 1262 1263 down_write(&topology_lock); 1264 kfd_topology_update_device_list(&temp_topology_device_list, 1265 &topology_device_list); 1266 1267 /* Update the SYSFS tree, since we added another topology 1268 * device 1269 */ 1270 res = kfd_topology_update_sysfs(); 1271 up_write(&topology_lock); 1272 1273 if (!res) 1274 sys_props.generation_count++; 1275 else 1276 pr_err("Failed to update GPU (ID: 0x%x) to sysfs topology. res=%d\n", 1277 gpu_id, res); 1278 dev = kfd_assign_gpu(gpu); 1279 if (WARN_ON(!dev)) { 1280 res = -ENODEV; 1281 goto err; 1282 } 1283 } 1284 1285 dev->gpu_id = gpu_id; 1286 gpu->id = gpu_id; 1287 1288 /* TODO: Move the following lines to function 1289 * kfd_add_non_crat_information 1290 */ 1291 1292 /* Fill-in additional information that is not available in CRAT but 1293 * needed for the topology 1294 */ 1295 1296 amdgpu_amdkfd_get_cu_info(dev->gpu->kgd, &cu_info); 1297 1298 strncpy(dev->node_props.name, gpu->device_info->asic_name, 1299 KFD_TOPOLOGY_PUBLIC_NAME_SIZE); 1300 1301 dev->node_props.simd_arrays_per_engine = 1302 cu_info.num_shader_arrays_per_engine; 1303 1304 dev->node_props.vendor_id = gpu->pdev->vendor; 1305 dev->node_props.device_id = gpu->pdev->device; 1306 dev->node_props.location_id = pci_dev_id(gpu->pdev); 1307 dev->node_props.max_engine_clk_fcompute = 1308 amdgpu_amdkfd_get_max_engine_clock_in_mhz(dev->gpu->kgd); 1309 dev->node_props.max_engine_clk_ccompute = 1310 cpufreq_quick_get_max(0) / 1000; 1311 dev->node_props.drm_render_minor = 1312 gpu->shared_resources.drm_render_minor; 1313 1314 dev->node_props.hive_id = gpu->hive_id; 1315 dev->node_props.num_sdma_engines = gpu->device_info->num_sdma_engines; 1316 dev->node_props.num_sdma_xgmi_engines = 1317 gpu->device_info->num_xgmi_sdma_engines; 1318 dev->node_props.num_sdma_queues_per_engine = 1319 gpu->device_info->num_sdma_queues_per_engine; 1320 dev->node_props.num_gws = (hws_gws_support && 1321 dev->gpu->dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS) ? 1322 amdgpu_amdkfd_get_num_gws(dev->gpu->kgd) : 0; 1323 dev->node_props.num_cp_queues = get_cp_queues_num(dev->gpu->dqm); 1324 dev->node_props.unique_id = gpu->unique_id; 1325 1326 kfd_fill_mem_clk_max_info(dev); 1327 kfd_fill_iolink_non_crat_info(dev); 1328 1329 switch (dev->gpu->device_info->asic_family) { 1330 case CHIP_KAVERI: 1331 case CHIP_HAWAII: 1332 case CHIP_TONGA: 1333 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_PRE_1_0 << 1334 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) & 1335 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK); 1336 break; 1337 case CHIP_CARRIZO: 1338 case CHIP_FIJI: 1339 case CHIP_POLARIS10: 1340 case CHIP_POLARIS11: 1341 case CHIP_POLARIS12: 1342 case CHIP_VEGAM: 1343 pr_debug("Adding doorbell packet type capability\n"); 1344 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_1_0 << 1345 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) & 1346 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK); 1347 break; 1348 case CHIP_VEGA10: 1349 case CHIP_VEGA12: 1350 case CHIP_VEGA20: 1351 case CHIP_RAVEN: 1352 case CHIP_RENOIR: 1353 case CHIP_ARCTURUS: 1354 case CHIP_NAVI10: 1355 case CHIP_NAVI12: 1356 case CHIP_NAVI14: 1357 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 << 1358 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) & 1359 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK); 1360 break; 1361 default: 1362 WARN(1, "Unexpected ASIC family %u", 1363 dev->gpu->device_info->asic_family); 1364 } 1365 1366 /* 1367 * Overwrite ATS capability according to needs_iommu_device to fix 1368 * potential missing corresponding bit in CRAT of BIOS. 1369 */ 1370 if (dev->gpu->device_info->needs_iommu_device) 1371 dev->node_props.capability |= HSA_CAP_ATS_PRESENT; 1372 else 1373 dev->node_props.capability &= ~HSA_CAP_ATS_PRESENT; 1374 1375 /* Fix errors in CZ CRAT. 1376 * simd_count: Carrizo CRAT reports wrong simd_count, probably 1377 * because it doesn't consider masked out CUs 1378 * max_waves_per_simd: Carrizo reports wrong max_waves_per_simd 1379 */ 1380 if (dev->gpu->device_info->asic_family == CHIP_CARRIZO) { 1381 dev->node_props.simd_count = 1382 cu_info.simd_per_cu * cu_info.cu_active_number; 1383 dev->node_props.max_waves_per_simd = 10; 1384 } 1385 1386 ctx = amdgpu_ras_get_context((struct amdgpu_device *)(dev->gpu->kgd)); 1387 if (ctx) { 1388 /* kfd only concerns sram ecc on GFX/SDMA and HBM ecc on UMC */ 1389 dev->node_props.capability |= 1390 (((ctx->features & BIT(AMDGPU_RAS_BLOCK__SDMA)) != 0) || 1391 ((ctx->features & BIT(AMDGPU_RAS_BLOCK__GFX)) != 0)) ? 1392 HSA_CAP_SRAM_EDCSUPPORTED : 0; 1393 dev->node_props.capability |= ((ctx->features & BIT(AMDGPU_RAS_BLOCK__UMC)) != 0) ? 1394 HSA_CAP_MEM_EDCSUPPORTED : 0; 1395 1396 dev->node_props.capability |= (ctx->features != 0) ? 1397 HSA_CAP_RASEVENTNOTIFY : 0; 1398 } 1399 1400 kfd_debug_print_topology(); 1401 1402 if (!res) 1403 kfd_notify_gpu_change(gpu_id, 1); 1404 err: 1405 kfd_destroy_crat_image(crat_image); 1406 return res; 1407 } 1408 1409 int kfd_topology_remove_device(struct kfd_dev *gpu) 1410 { 1411 struct kfd_topology_device *dev, *tmp; 1412 uint32_t gpu_id; 1413 int res = -ENODEV; 1414 1415 down_write(&topology_lock); 1416 1417 list_for_each_entry_safe(dev, tmp, &topology_device_list, list) 1418 if (dev->gpu == gpu) { 1419 gpu_id = dev->gpu_id; 1420 kfd_remove_sysfs_node_entry(dev); 1421 kfd_release_topology_device(dev); 1422 sys_props.num_devices--; 1423 res = 0; 1424 if (kfd_topology_update_sysfs() < 0) 1425 kfd_topology_release_sysfs(); 1426 break; 1427 } 1428 1429 up_write(&topology_lock); 1430 1431 if (!res) 1432 kfd_notify_gpu_change(gpu_id, 0); 1433 1434 return res; 1435 } 1436 1437 /* kfd_topology_enum_kfd_devices - Enumerate through all devices in KFD 1438 * topology. If GPU device is found @idx, then valid kfd_dev pointer is 1439 * returned through @kdev 1440 * Return - 0: On success (@kdev will be NULL for non GPU nodes) 1441 * -1: If end of list 1442 */ 1443 int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_dev **kdev) 1444 { 1445 1446 struct kfd_topology_device *top_dev; 1447 uint8_t device_idx = 0; 1448 1449 *kdev = NULL; 1450 down_read(&topology_lock); 1451 1452 list_for_each_entry(top_dev, &topology_device_list, list) { 1453 if (device_idx == idx) { 1454 *kdev = top_dev->gpu; 1455 up_read(&topology_lock); 1456 return 0; 1457 } 1458 1459 device_idx++; 1460 } 1461 1462 up_read(&topology_lock); 1463 1464 return -1; 1465 1466 } 1467 1468 static int kfd_cpumask_to_apic_id(const struct cpumask *cpumask) 1469 { 1470 int first_cpu_of_numa_node; 1471 1472 if (!cpumask || cpumask == cpu_none_mask) 1473 return -1; 1474 first_cpu_of_numa_node = cpumask_first(cpumask); 1475 if (first_cpu_of_numa_node >= nr_cpu_ids) 1476 return -1; 1477 #ifdef CONFIG_X86_64 1478 return cpu_data(first_cpu_of_numa_node).apicid; 1479 #else 1480 return first_cpu_of_numa_node; 1481 #endif 1482 } 1483 1484 /* kfd_numa_node_to_apic_id - Returns the APIC ID of the first logical processor 1485 * of the given NUMA node (numa_node_id) 1486 * Return -1 on failure 1487 */ 1488 int kfd_numa_node_to_apic_id(int numa_node_id) 1489 { 1490 if (numa_node_id == -1) { 1491 pr_warn("Invalid NUMA Node. Use online CPU mask\n"); 1492 return kfd_cpumask_to_apic_id(cpu_online_mask); 1493 } 1494 return kfd_cpumask_to_apic_id(cpumask_of_node(numa_node_id)); 1495 } 1496 1497 #if defined(CONFIG_DEBUG_FS) 1498 1499 int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data) 1500 { 1501 struct kfd_topology_device *dev; 1502 unsigned int i = 0; 1503 int r = 0; 1504 1505 down_read(&topology_lock); 1506 1507 list_for_each_entry(dev, &topology_device_list, list) { 1508 if (!dev->gpu) { 1509 i++; 1510 continue; 1511 } 1512 1513 seq_printf(m, "Node %u, gpu_id %x:\n", i++, dev->gpu->id); 1514 r = dqm_debugfs_hqds(m, dev->gpu->dqm); 1515 if (r) 1516 break; 1517 } 1518 1519 up_read(&topology_lock); 1520 1521 return r; 1522 } 1523 1524 int kfd_debugfs_rls_by_device(struct seq_file *m, void *data) 1525 { 1526 struct kfd_topology_device *dev; 1527 unsigned int i = 0; 1528 int r = 0; 1529 1530 down_read(&topology_lock); 1531 1532 list_for_each_entry(dev, &topology_device_list, list) { 1533 if (!dev->gpu) { 1534 i++; 1535 continue; 1536 } 1537 1538 seq_printf(m, "Node %u, gpu_id %x:\n", i++, dev->gpu->id); 1539 r = pm_debugfs_runlist(m, &dev->gpu->dqm->packets); 1540 if (r) 1541 break; 1542 } 1543 1544 up_read(&topology_lock); 1545 1546 return r; 1547 } 1548 1549 #endif 1550