1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/kernel.h> 26 #include <linux/pci.h> 27 #include <linux/errno.h> 28 #include <linux/acpi.h> 29 #include <linux/hash.h> 30 #include <linux/cpufreq.h> 31 #include <linux/log2.h> 32 #include <linux/dmi.h> 33 #include <linux/atomic.h> 34 35 #include "kfd_priv.h" 36 #include "kfd_crat.h" 37 #include "kfd_topology.h" 38 #include "kfd_device_queue_manager.h" 39 #include "kfd_iommu.h" 40 #include "kfd_svm.h" 41 #include "amdgpu_amdkfd.h" 42 #include "amdgpu_ras.h" 43 #include "amdgpu.h" 44 45 /* topology_device_list - Master list of all topology devices */ 46 static struct list_head topology_device_list; 47 static struct kfd_system_properties sys_props; 48 49 static DECLARE_RWSEM(topology_lock); 50 static uint32_t topology_crat_proximity_domain; 51 52 struct kfd_topology_device *kfd_topology_device_by_proximity_domain_no_lock( 53 uint32_t proximity_domain) 54 { 55 struct kfd_topology_device *top_dev; 56 struct kfd_topology_device *device = NULL; 57 58 list_for_each_entry(top_dev, &topology_device_list, list) 59 if (top_dev->proximity_domain == proximity_domain) { 60 device = top_dev; 61 break; 62 } 63 64 return device; 65 } 66 67 struct kfd_topology_device *kfd_topology_device_by_proximity_domain( 68 uint32_t proximity_domain) 69 { 70 struct kfd_topology_device *device = NULL; 71 72 down_read(&topology_lock); 73 74 device = kfd_topology_device_by_proximity_domain_no_lock( 75 proximity_domain); 76 up_read(&topology_lock); 77 78 return device; 79 } 80 81 struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id) 82 { 83 struct kfd_topology_device *top_dev = NULL; 84 struct kfd_topology_device *ret = NULL; 85 86 down_read(&topology_lock); 87 88 list_for_each_entry(top_dev, &topology_device_list, list) 89 if (top_dev->gpu_id == gpu_id) { 90 ret = top_dev; 91 break; 92 } 93 94 up_read(&topology_lock); 95 96 return ret; 97 } 98 99 struct kfd_node *kfd_device_by_id(uint32_t gpu_id) 100 { 101 struct kfd_topology_device *top_dev; 102 103 top_dev = kfd_topology_device_by_id(gpu_id); 104 if (!top_dev) 105 return NULL; 106 107 return top_dev->gpu; 108 } 109 110 struct kfd_node *kfd_device_by_pci_dev(const struct pci_dev *pdev) 111 { 112 struct kfd_topology_device *top_dev; 113 struct kfd_node *device = NULL; 114 115 down_read(&topology_lock); 116 117 list_for_each_entry(top_dev, &topology_device_list, list) 118 if (top_dev->gpu && top_dev->gpu->adev->pdev == pdev) { 119 device = top_dev->gpu; 120 break; 121 } 122 123 up_read(&topology_lock); 124 125 return device; 126 } 127 128 /* Called with write topology_lock acquired */ 129 static void kfd_release_topology_device(struct kfd_topology_device *dev) 130 { 131 struct kfd_mem_properties *mem; 132 struct kfd_cache_properties *cache; 133 struct kfd_iolink_properties *iolink; 134 struct kfd_iolink_properties *p2plink; 135 struct kfd_perf_properties *perf; 136 137 list_del(&dev->list); 138 139 while (dev->mem_props.next != &dev->mem_props) { 140 mem = container_of(dev->mem_props.next, 141 struct kfd_mem_properties, list); 142 list_del(&mem->list); 143 kfree(mem); 144 } 145 146 while (dev->cache_props.next != &dev->cache_props) { 147 cache = container_of(dev->cache_props.next, 148 struct kfd_cache_properties, list); 149 list_del(&cache->list); 150 kfree(cache); 151 } 152 153 while (dev->io_link_props.next != &dev->io_link_props) { 154 iolink = container_of(dev->io_link_props.next, 155 struct kfd_iolink_properties, list); 156 list_del(&iolink->list); 157 kfree(iolink); 158 } 159 160 while (dev->p2p_link_props.next != &dev->p2p_link_props) { 161 p2plink = container_of(dev->p2p_link_props.next, 162 struct kfd_iolink_properties, list); 163 list_del(&p2plink->list); 164 kfree(p2plink); 165 } 166 167 while (dev->perf_props.next != &dev->perf_props) { 168 perf = container_of(dev->perf_props.next, 169 struct kfd_perf_properties, list); 170 list_del(&perf->list); 171 kfree(perf); 172 } 173 174 kfree(dev); 175 } 176 177 void kfd_release_topology_device_list(struct list_head *device_list) 178 { 179 struct kfd_topology_device *dev; 180 181 while (!list_empty(device_list)) { 182 dev = list_first_entry(device_list, 183 struct kfd_topology_device, list); 184 kfd_release_topology_device(dev); 185 } 186 } 187 188 static void kfd_release_live_view(void) 189 { 190 kfd_release_topology_device_list(&topology_device_list); 191 memset(&sys_props, 0, sizeof(sys_props)); 192 } 193 194 struct kfd_topology_device *kfd_create_topology_device( 195 struct list_head *device_list) 196 { 197 struct kfd_topology_device *dev; 198 199 dev = kfd_alloc_struct(dev); 200 if (!dev) { 201 pr_err("No memory to allocate a topology device"); 202 return NULL; 203 } 204 205 INIT_LIST_HEAD(&dev->mem_props); 206 INIT_LIST_HEAD(&dev->cache_props); 207 INIT_LIST_HEAD(&dev->io_link_props); 208 INIT_LIST_HEAD(&dev->p2p_link_props); 209 INIT_LIST_HEAD(&dev->perf_props); 210 211 list_add_tail(&dev->list, device_list); 212 213 return dev; 214 } 215 216 217 #define sysfs_show_gen_prop(buffer, offs, fmt, ...) \ 218 (offs += snprintf(buffer+offs, PAGE_SIZE-offs, \ 219 fmt, __VA_ARGS__)) 220 #define sysfs_show_32bit_prop(buffer, offs, name, value) \ 221 sysfs_show_gen_prop(buffer, offs, "%s %u\n", name, value) 222 #define sysfs_show_64bit_prop(buffer, offs, name, value) \ 223 sysfs_show_gen_prop(buffer, offs, "%s %llu\n", name, value) 224 #define sysfs_show_32bit_val(buffer, offs, value) \ 225 sysfs_show_gen_prop(buffer, offs, "%u\n", value) 226 #define sysfs_show_str_val(buffer, offs, value) \ 227 sysfs_show_gen_prop(buffer, offs, "%s\n", value) 228 229 static ssize_t sysprops_show(struct kobject *kobj, struct attribute *attr, 230 char *buffer) 231 { 232 int offs = 0; 233 234 /* Making sure that the buffer is an empty string */ 235 buffer[0] = 0; 236 237 if (attr == &sys_props.attr_genid) { 238 sysfs_show_32bit_val(buffer, offs, 239 sys_props.generation_count); 240 } else if (attr == &sys_props.attr_props) { 241 sysfs_show_64bit_prop(buffer, offs, "platform_oem", 242 sys_props.platform_oem); 243 sysfs_show_64bit_prop(buffer, offs, "platform_id", 244 sys_props.platform_id); 245 sysfs_show_64bit_prop(buffer, offs, "platform_rev", 246 sys_props.platform_rev); 247 } else { 248 offs = -EINVAL; 249 } 250 251 return offs; 252 } 253 254 static void kfd_topology_kobj_release(struct kobject *kobj) 255 { 256 kfree(kobj); 257 } 258 259 static const struct sysfs_ops sysprops_ops = { 260 .show = sysprops_show, 261 }; 262 263 static const struct kobj_type sysprops_type = { 264 .release = kfd_topology_kobj_release, 265 .sysfs_ops = &sysprops_ops, 266 }; 267 268 static ssize_t iolink_show(struct kobject *kobj, struct attribute *attr, 269 char *buffer) 270 { 271 int offs = 0; 272 struct kfd_iolink_properties *iolink; 273 274 /* Making sure that the buffer is an empty string */ 275 buffer[0] = 0; 276 277 iolink = container_of(attr, struct kfd_iolink_properties, attr); 278 if (iolink->gpu && kfd_devcgroup_check_permission(iolink->gpu)) 279 return -EPERM; 280 sysfs_show_32bit_prop(buffer, offs, "type", iolink->iolink_type); 281 sysfs_show_32bit_prop(buffer, offs, "version_major", iolink->ver_maj); 282 sysfs_show_32bit_prop(buffer, offs, "version_minor", iolink->ver_min); 283 sysfs_show_32bit_prop(buffer, offs, "node_from", iolink->node_from); 284 sysfs_show_32bit_prop(buffer, offs, "node_to", iolink->node_to); 285 sysfs_show_32bit_prop(buffer, offs, "weight", iolink->weight); 286 sysfs_show_32bit_prop(buffer, offs, "min_latency", iolink->min_latency); 287 sysfs_show_32bit_prop(buffer, offs, "max_latency", iolink->max_latency); 288 sysfs_show_32bit_prop(buffer, offs, "min_bandwidth", 289 iolink->min_bandwidth); 290 sysfs_show_32bit_prop(buffer, offs, "max_bandwidth", 291 iolink->max_bandwidth); 292 sysfs_show_32bit_prop(buffer, offs, "recommended_transfer_size", 293 iolink->rec_transfer_size); 294 sysfs_show_32bit_prop(buffer, offs, "flags", iolink->flags); 295 296 return offs; 297 } 298 299 static const struct sysfs_ops iolink_ops = { 300 .show = iolink_show, 301 }; 302 303 static const struct kobj_type iolink_type = { 304 .release = kfd_topology_kobj_release, 305 .sysfs_ops = &iolink_ops, 306 }; 307 308 static ssize_t mem_show(struct kobject *kobj, struct attribute *attr, 309 char *buffer) 310 { 311 int offs = 0; 312 struct kfd_mem_properties *mem; 313 314 /* Making sure that the buffer is an empty string */ 315 buffer[0] = 0; 316 317 mem = container_of(attr, struct kfd_mem_properties, attr); 318 if (mem->gpu && kfd_devcgroup_check_permission(mem->gpu)) 319 return -EPERM; 320 sysfs_show_32bit_prop(buffer, offs, "heap_type", mem->heap_type); 321 sysfs_show_64bit_prop(buffer, offs, "size_in_bytes", 322 mem->size_in_bytes); 323 sysfs_show_32bit_prop(buffer, offs, "flags", mem->flags); 324 sysfs_show_32bit_prop(buffer, offs, "width", mem->width); 325 sysfs_show_32bit_prop(buffer, offs, "mem_clk_max", 326 mem->mem_clk_max); 327 328 return offs; 329 } 330 331 static const struct sysfs_ops mem_ops = { 332 .show = mem_show, 333 }; 334 335 static const struct kobj_type mem_type = { 336 .release = kfd_topology_kobj_release, 337 .sysfs_ops = &mem_ops, 338 }; 339 340 static ssize_t kfd_cache_show(struct kobject *kobj, struct attribute *attr, 341 char *buffer) 342 { 343 int offs = 0; 344 uint32_t i, j; 345 struct kfd_cache_properties *cache; 346 347 /* Making sure that the buffer is an empty string */ 348 buffer[0] = 0; 349 cache = container_of(attr, struct kfd_cache_properties, attr); 350 if (cache->gpu && kfd_devcgroup_check_permission(cache->gpu)) 351 return -EPERM; 352 sysfs_show_32bit_prop(buffer, offs, "processor_id_low", 353 cache->processor_id_low); 354 sysfs_show_32bit_prop(buffer, offs, "level", cache->cache_level); 355 sysfs_show_32bit_prop(buffer, offs, "size", cache->cache_size); 356 sysfs_show_32bit_prop(buffer, offs, "cache_line_size", 357 cache->cacheline_size); 358 sysfs_show_32bit_prop(buffer, offs, "cache_lines_per_tag", 359 cache->cachelines_per_tag); 360 sysfs_show_32bit_prop(buffer, offs, "association", cache->cache_assoc); 361 sysfs_show_32bit_prop(buffer, offs, "latency", cache->cache_latency); 362 sysfs_show_32bit_prop(buffer, offs, "type", cache->cache_type); 363 364 offs += snprintf(buffer+offs, PAGE_SIZE-offs, "sibling_map "); 365 for (i = 0; i < cache->sibling_map_size; i++) 366 for (j = 0; j < sizeof(cache->sibling_map[0])*8; j++) 367 /* Check each bit */ 368 offs += snprintf(buffer+offs, PAGE_SIZE-offs, "%d,", 369 (cache->sibling_map[i] >> j) & 1); 370 371 /* Replace the last "," with end of line */ 372 buffer[offs-1] = '\n'; 373 return offs; 374 } 375 376 static const struct sysfs_ops cache_ops = { 377 .show = kfd_cache_show, 378 }; 379 380 static const struct kobj_type cache_type = { 381 .release = kfd_topology_kobj_release, 382 .sysfs_ops = &cache_ops, 383 }; 384 385 /****** Sysfs of Performance Counters ******/ 386 387 struct kfd_perf_attr { 388 struct kobj_attribute attr; 389 uint32_t data; 390 }; 391 392 static ssize_t perf_show(struct kobject *kobj, struct kobj_attribute *attrs, 393 char *buf) 394 { 395 int offs = 0; 396 struct kfd_perf_attr *attr; 397 398 buf[0] = 0; 399 attr = container_of(attrs, struct kfd_perf_attr, attr); 400 if (!attr->data) /* invalid data for PMC */ 401 return 0; 402 else 403 return sysfs_show_32bit_val(buf, offs, attr->data); 404 } 405 406 #define KFD_PERF_DESC(_name, _data) \ 407 { \ 408 .attr = __ATTR(_name, 0444, perf_show, NULL), \ 409 .data = _data, \ 410 } 411 412 static struct kfd_perf_attr perf_attr_iommu[] = { 413 KFD_PERF_DESC(max_concurrent, 0), 414 KFD_PERF_DESC(num_counters, 0), 415 KFD_PERF_DESC(counter_ids, 0), 416 }; 417 /****************************************/ 418 419 static ssize_t node_show(struct kobject *kobj, struct attribute *attr, 420 char *buffer) 421 { 422 int offs = 0; 423 struct kfd_topology_device *dev; 424 uint32_t log_max_watch_addr; 425 426 /* Making sure that the buffer is an empty string */ 427 buffer[0] = 0; 428 429 if (strcmp(attr->name, "gpu_id") == 0) { 430 dev = container_of(attr, struct kfd_topology_device, 431 attr_gpuid); 432 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu)) 433 return -EPERM; 434 return sysfs_show_32bit_val(buffer, offs, dev->gpu_id); 435 } 436 437 if (strcmp(attr->name, "name") == 0) { 438 dev = container_of(attr, struct kfd_topology_device, 439 attr_name); 440 441 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu)) 442 return -EPERM; 443 return sysfs_show_str_val(buffer, offs, dev->node_props.name); 444 } 445 446 dev = container_of(attr, struct kfd_topology_device, 447 attr_props); 448 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu)) 449 return -EPERM; 450 sysfs_show_32bit_prop(buffer, offs, "cpu_cores_count", 451 dev->node_props.cpu_cores_count); 452 sysfs_show_32bit_prop(buffer, offs, "simd_count", 453 dev->gpu ? (dev->node_props.simd_count * 454 NUM_XCC(dev->gpu->xcc_mask)) : 0); 455 sysfs_show_32bit_prop(buffer, offs, "mem_banks_count", 456 dev->node_props.mem_banks_count); 457 sysfs_show_32bit_prop(buffer, offs, "caches_count", 458 dev->node_props.caches_count); 459 sysfs_show_32bit_prop(buffer, offs, "io_links_count", 460 dev->node_props.io_links_count); 461 sysfs_show_32bit_prop(buffer, offs, "p2p_links_count", 462 dev->node_props.p2p_links_count); 463 sysfs_show_32bit_prop(buffer, offs, "cpu_core_id_base", 464 dev->node_props.cpu_core_id_base); 465 sysfs_show_32bit_prop(buffer, offs, "simd_id_base", 466 dev->node_props.simd_id_base); 467 sysfs_show_32bit_prop(buffer, offs, "max_waves_per_simd", 468 dev->node_props.max_waves_per_simd); 469 sysfs_show_32bit_prop(buffer, offs, "lds_size_in_kb", 470 dev->node_props.lds_size_in_kb); 471 sysfs_show_32bit_prop(buffer, offs, "gds_size_in_kb", 472 dev->node_props.gds_size_in_kb); 473 sysfs_show_32bit_prop(buffer, offs, "num_gws", 474 dev->node_props.num_gws); 475 sysfs_show_32bit_prop(buffer, offs, "wave_front_size", 476 dev->node_props.wave_front_size); 477 sysfs_show_32bit_prop(buffer, offs, "array_count", 478 dev->gpu ? (dev->node_props.array_count * 479 NUM_XCC(dev->gpu->xcc_mask)) : 0); 480 sysfs_show_32bit_prop(buffer, offs, "simd_arrays_per_engine", 481 dev->node_props.simd_arrays_per_engine); 482 sysfs_show_32bit_prop(buffer, offs, "cu_per_simd_array", 483 dev->node_props.cu_per_simd_array); 484 sysfs_show_32bit_prop(buffer, offs, "simd_per_cu", 485 dev->node_props.simd_per_cu); 486 sysfs_show_32bit_prop(buffer, offs, "max_slots_scratch_cu", 487 dev->node_props.max_slots_scratch_cu); 488 sysfs_show_32bit_prop(buffer, offs, "gfx_target_version", 489 dev->node_props.gfx_target_version); 490 sysfs_show_32bit_prop(buffer, offs, "vendor_id", 491 dev->node_props.vendor_id); 492 sysfs_show_32bit_prop(buffer, offs, "device_id", 493 dev->node_props.device_id); 494 sysfs_show_32bit_prop(buffer, offs, "location_id", 495 dev->node_props.location_id); 496 sysfs_show_32bit_prop(buffer, offs, "domain", 497 dev->node_props.domain); 498 sysfs_show_32bit_prop(buffer, offs, "drm_render_minor", 499 dev->node_props.drm_render_minor); 500 sysfs_show_64bit_prop(buffer, offs, "hive_id", 501 dev->node_props.hive_id); 502 sysfs_show_32bit_prop(buffer, offs, "num_sdma_engines", 503 dev->node_props.num_sdma_engines); 504 sysfs_show_32bit_prop(buffer, offs, "num_sdma_xgmi_engines", 505 dev->node_props.num_sdma_xgmi_engines); 506 sysfs_show_32bit_prop(buffer, offs, "num_sdma_queues_per_engine", 507 dev->node_props.num_sdma_queues_per_engine); 508 sysfs_show_32bit_prop(buffer, offs, "num_cp_queues", 509 dev->node_props.num_cp_queues); 510 511 if (dev->gpu) { 512 log_max_watch_addr = 513 __ilog2_u32(dev->gpu->kfd->device_info.num_of_watch_points); 514 515 if (log_max_watch_addr) { 516 dev->node_props.capability |= 517 HSA_CAP_WATCH_POINTS_SUPPORTED; 518 519 dev->node_props.capability |= 520 ((log_max_watch_addr << 521 HSA_CAP_WATCH_POINTS_TOTALBITS_SHIFT) & 522 HSA_CAP_WATCH_POINTS_TOTALBITS_MASK); 523 } 524 525 if (dev->gpu->adev->asic_type == CHIP_TONGA) 526 dev->node_props.capability |= 527 HSA_CAP_AQL_QUEUE_DOUBLE_MAP; 528 529 sysfs_show_32bit_prop(buffer, offs, "max_engine_clk_fcompute", 530 dev->node_props.max_engine_clk_fcompute); 531 532 sysfs_show_64bit_prop(buffer, offs, "local_mem_size", 0ULL); 533 534 sysfs_show_32bit_prop(buffer, offs, "fw_version", 535 dev->gpu->kfd->mec_fw_version); 536 sysfs_show_32bit_prop(buffer, offs, "capability", 537 dev->node_props.capability); 538 sysfs_show_32bit_prop(buffer, offs, "sdma_fw_version", 539 dev->gpu->kfd->sdma_fw_version); 540 sysfs_show_64bit_prop(buffer, offs, "unique_id", 541 dev->gpu->adev->unique_id); 542 sysfs_show_32bit_prop(buffer, offs, "num_xcc", 543 NUM_XCC(dev->gpu->xcc_mask)); 544 } 545 546 return sysfs_show_32bit_prop(buffer, offs, "max_engine_clk_ccompute", 547 cpufreq_quick_get_max(0)/1000); 548 } 549 550 static const struct sysfs_ops node_ops = { 551 .show = node_show, 552 }; 553 554 static const struct kobj_type node_type = { 555 .release = kfd_topology_kobj_release, 556 .sysfs_ops = &node_ops, 557 }; 558 559 static void kfd_remove_sysfs_file(struct kobject *kobj, struct attribute *attr) 560 { 561 sysfs_remove_file(kobj, attr); 562 kobject_del(kobj); 563 kobject_put(kobj); 564 } 565 566 static void kfd_remove_sysfs_node_entry(struct kfd_topology_device *dev) 567 { 568 struct kfd_iolink_properties *p2plink; 569 struct kfd_iolink_properties *iolink; 570 struct kfd_cache_properties *cache; 571 struct kfd_mem_properties *mem; 572 struct kfd_perf_properties *perf; 573 574 if (dev->kobj_iolink) { 575 list_for_each_entry(iolink, &dev->io_link_props, list) 576 if (iolink->kobj) { 577 kfd_remove_sysfs_file(iolink->kobj, 578 &iolink->attr); 579 iolink->kobj = NULL; 580 } 581 kobject_del(dev->kobj_iolink); 582 kobject_put(dev->kobj_iolink); 583 dev->kobj_iolink = NULL; 584 } 585 586 if (dev->kobj_p2plink) { 587 list_for_each_entry(p2plink, &dev->p2p_link_props, list) 588 if (p2plink->kobj) { 589 kfd_remove_sysfs_file(p2plink->kobj, 590 &p2plink->attr); 591 p2plink->kobj = NULL; 592 } 593 kobject_del(dev->kobj_p2plink); 594 kobject_put(dev->kobj_p2plink); 595 dev->kobj_p2plink = NULL; 596 } 597 598 if (dev->kobj_cache) { 599 list_for_each_entry(cache, &dev->cache_props, list) 600 if (cache->kobj) { 601 kfd_remove_sysfs_file(cache->kobj, 602 &cache->attr); 603 cache->kobj = NULL; 604 } 605 kobject_del(dev->kobj_cache); 606 kobject_put(dev->kobj_cache); 607 dev->kobj_cache = NULL; 608 } 609 610 if (dev->kobj_mem) { 611 list_for_each_entry(mem, &dev->mem_props, list) 612 if (mem->kobj) { 613 kfd_remove_sysfs_file(mem->kobj, &mem->attr); 614 mem->kobj = NULL; 615 } 616 kobject_del(dev->kobj_mem); 617 kobject_put(dev->kobj_mem); 618 dev->kobj_mem = NULL; 619 } 620 621 if (dev->kobj_perf) { 622 list_for_each_entry(perf, &dev->perf_props, list) { 623 kfree(perf->attr_group); 624 perf->attr_group = NULL; 625 } 626 kobject_del(dev->kobj_perf); 627 kobject_put(dev->kobj_perf); 628 dev->kobj_perf = NULL; 629 } 630 631 if (dev->kobj_node) { 632 sysfs_remove_file(dev->kobj_node, &dev->attr_gpuid); 633 sysfs_remove_file(dev->kobj_node, &dev->attr_name); 634 sysfs_remove_file(dev->kobj_node, &dev->attr_props); 635 kobject_del(dev->kobj_node); 636 kobject_put(dev->kobj_node); 637 dev->kobj_node = NULL; 638 } 639 } 640 641 static int kfd_build_sysfs_node_entry(struct kfd_topology_device *dev, 642 uint32_t id) 643 { 644 struct kfd_iolink_properties *p2plink; 645 struct kfd_iolink_properties *iolink; 646 struct kfd_cache_properties *cache; 647 struct kfd_mem_properties *mem; 648 struct kfd_perf_properties *perf; 649 int ret; 650 uint32_t i, num_attrs; 651 struct attribute **attrs; 652 653 if (WARN_ON(dev->kobj_node)) 654 return -EEXIST; 655 656 /* 657 * Creating the sysfs folders 658 */ 659 dev->kobj_node = kfd_alloc_struct(dev->kobj_node); 660 if (!dev->kobj_node) 661 return -ENOMEM; 662 663 ret = kobject_init_and_add(dev->kobj_node, &node_type, 664 sys_props.kobj_nodes, "%d", id); 665 if (ret < 0) { 666 kobject_put(dev->kobj_node); 667 return ret; 668 } 669 670 dev->kobj_mem = kobject_create_and_add("mem_banks", dev->kobj_node); 671 if (!dev->kobj_mem) 672 return -ENOMEM; 673 674 dev->kobj_cache = kobject_create_and_add("caches", dev->kobj_node); 675 if (!dev->kobj_cache) 676 return -ENOMEM; 677 678 dev->kobj_iolink = kobject_create_and_add("io_links", dev->kobj_node); 679 if (!dev->kobj_iolink) 680 return -ENOMEM; 681 682 dev->kobj_p2plink = kobject_create_and_add("p2p_links", dev->kobj_node); 683 if (!dev->kobj_p2plink) 684 return -ENOMEM; 685 686 dev->kobj_perf = kobject_create_and_add("perf", dev->kobj_node); 687 if (!dev->kobj_perf) 688 return -ENOMEM; 689 690 /* 691 * Creating sysfs files for node properties 692 */ 693 dev->attr_gpuid.name = "gpu_id"; 694 dev->attr_gpuid.mode = KFD_SYSFS_FILE_MODE; 695 sysfs_attr_init(&dev->attr_gpuid); 696 dev->attr_name.name = "name"; 697 dev->attr_name.mode = KFD_SYSFS_FILE_MODE; 698 sysfs_attr_init(&dev->attr_name); 699 dev->attr_props.name = "properties"; 700 dev->attr_props.mode = KFD_SYSFS_FILE_MODE; 701 sysfs_attr_init(&dev->attr_props); 702 ret = sysfs_create_file(dev->kobj_node, &dev->attr_gpuid); 703 if (ret < 0) 704 return ret; 705 ret = sysfs_create_file(dev->kobj_node, &dev->attr_name); 706 if (ret < 0) 707 return ret; 708 ret = sysfs_create_file(dev->kobj_node, &dev->attr_props); 709 if (ret < 0) 710 return ret; 711 712 i = 0; 713 list_for_each_entry(mem, &dev->mem_props, list) { 714 mem->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 715 if (!mem->kobj) 716 return -ENOMEM; 717 ret = kobject_init_and_add(mem->kobj, &mem_type, 718 dev->kobj_mem, "%d", i); 719 if (ret < 0) { 720 kobject_put(mem->kobj); 721 return ret; 722 } 723 724 mem->attr.name = "properties"; 725 mem->attr.mode = KFD_SYSFS_FILE_MODE; 726 sysfs_attr_init(&mem->attr); 727 ret = sysfs_create_file(mem->kobj, &mem->attr); 728 if (ret < 0) 729 return ret; 730 i++; 731 } 732 733 i = 0; 734 list_for_each_entry(cache, &dev->cache_props, list) { 735 cache->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 736 if (!cache->kobj) 737 return -ENOMEM; 738 ret = kobject_init_and_add(cache->kobj, &cache_type, 739 dev->kobj_cache, "%d", i); 740 if (ret < 0) { 741 kobject_put(cache->kobj); 742 return ret; 743 } 744 745 cache->attr.name = "properties"; 746 cache->attr.mode = KFD_SYSFS_FILE_MODE; 747 sysfs_attr_init(&cache->attr); 748 ret = sysfs_create_file(cache->kobj, &cache->attr); 749 if (ret < 0) 750 return ret; 751 i++; 752 } 753 754 i = 0; 755 list_for_each_entry(iolink, &dev->io_link_props, list) { 756 iolink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 757 if (!iolink->kobj) 758 return -ENOMEM; 759 ret = kobject_init_and_add(iolink->kobj, &iolink_type, 760 dev->kobj_iolink, "%d", i); 761 if (ret < 0) { 762 kobject_put(iolink->kobj); 763 return ret; 764 } 765 766 iolink->attr.name = "properties"; 767 iolink->attr.mode = KFD_SYSFS_FILE_MODE; 768 sysfs_attr_init(&iolink->attr); 769 ret = sysfs_create_file(iolink->kobj, &iolink->attr); 770 if (ret < 0) 771 return ret; 772 i++; 773 } 774 775 i = 0; 776 list_for_each_entry(p2plink, &dev->p2p_link_props, list) { 777 p2plink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 778 if (!p2plink->kobj) 779 return -ENOMEM; 780 ret = kobject_init_and_add(p2plink->kobj, &iolink_type, 781 dev->kobj_p2plink, "%d", i); 782 if (ret < 0) { 783 kobject_put(p2plink->kobj); 784 return ret; 785 } 786 787 p2plink->attr.name = "properties"; 788 p2plink->attr.mode = KFD_SYSFS_FILE_MODE; 789 sysfs_attr_init(&p2plink->attr); 790 ret = sysfs_create_file(p2plink->kobj, &p2plink->attr); 791 if (ret < 0) 792 return ret; 793 i++; 794 } 795 796 /* All hardware blocks have the same number of attributes. */ 797 num_attrs = ARRAY_SIZE(perf_attr_iommu); 798 list_for_each_entry(perf, &dev->perf_props, list) { 799 perf->attr_group = kzalloc(sizeof(struct kfd_perf_attr) 800 * num_attrs + sizeof(struct attribute_group), 801 GFP_KERNEL); 802 if (!perf->attr_group) 803 return -ENOMEM; 804 805 attrs = (struct attribute **)(perf->attr_group + 1); 806 if (!strcmp(perf->block_name, "iommu")) { 807 /* Information of IOMMU's num_counters and counter_ids is shown 808 * under /sys/bus/event_source/devices/amd_iommu. We don't 809 * duplicate here. 810 */ 811 perf_attr_iommu[0].data = perf->max_concurrent; 812 for (i = 0; i < num_attrs; i++) 813 attrs[i] = &perf_attr_iommu[i].attr.attr; 814 } 815 perf->attr_group->name = perf->block_name; 816 perf->attr_group->attrs = attrs; 817 ret = sysfs_create_group(dev->kobj_perf, perf->attr_group); 818 if (ret < 0) 819 return ret; 820 } 821 822 return 0; 823 } 824 825 /* Called with write topology lock acquired */ 826 static int kfd_build_sysfs_node_tree(void) 827 { 828 struct kfd_topology_device *dev; 829 int ret; 830 uint32_t i = 0; 831 832 list_for_each_entry(dev, &topology_device_list, list) { 833 ret = kfd_build_sysfs_node_entry(dev, i); 834 if (ret < 0) 835 return ret; 836 i++; 837 } 838 839 return 0; 840 } 841 842 /* Called with write topology lock acquired */ 843 static void kfd_remove_sysfs_node_tree(void) 844 { 845 struct kfd_topology_device *dev; 846 847 list_for_each_entry(dev, &topology_device_list, list) 848 kfd_remove_sysfs_node_entry(dev); 849 } 850 851 static int kfd_topology_update_sysfs(void) 852 { 853 int ret; 854 855 if (!sys_props.kobj_topology) { 856 sys_props.kobj_topology = 857 kfd_alloc_struct(sys_props.kobj_topology); 858 if (!sys_props.kobj_topology) 859 return -ENOMEM; 860 861 ret = kobject_init_and_add(sys_props.kobj_topology, 862 &sysprops_type, &kfd_device->kobj, 863 "topology"); 864 if (ret < 0) { 865 kobject_put(sys_props.kobj_topology); 866 return ret; 867 } 868 869 sys_props.kobj_nodes = kobject_create_and_add("nodes", 870 sys_props.kobj_topology); 871 if (!sys_props.kobj_nodes) 872 return -ENOMEM; 873 874 sys_props.attr_genid.name = "generation_id"; 875 sys_props.attr_genid.mode = KFD_SYSFS_FILE_MODE; 876 sysfs_attr_init(&sys_props.attr_genid); 877 ret = sysfs_create_file(sys_props.kobj_topology, 878 &sys_props.attr_genid); 879 if (ret < 0) 880 return ret; 881 882 sys_props.attr_props.name = "system_properties"; 883 sys_props.attr_props.mode = KFD_SYSFS_FILE_MODE; 884 sysfs_attr_init(&sys_props.attr_props); 885 ret = sysfs_create_file(sys_props.kobj_topology, 886 &sys_props.attr_props); 887 if (ret < 0) 888 return ret; 889 } 890 891 kfd_remove_sysfs_node_tree(); 892 893 return kfd_build_sysfs_node_tree(); 894 } 895 896 static void kfd_topology_release_sysfs(void) 897 { 898 kfd_remove_sysfs_node_tree(); 899 if (sys_props.kobj_topology) { 900 sysfs_remove_file(sys_props.kobj_topology, 901 &sys_props.attr_genid); 902 sysfs_remove_file(sys_props.kobj_topology, 903 &sys_props.attr_props); 904 if (sys_props.kobj_nodes) { 905 kobject_del(sys_props.kobj_nodes); 906 kobject_put(sys_props.kobj_nodes); 907 sys_props.kobj_nodes = NULL; 908 } 909 kobject_del(sys_props.kobj_topology); 910 kobject_put(sys_props.kobj_topology); 911 sys_props.kobj_topology = NULL; 912 } 913 } 914 915 /* Called with write topology_lock acquired */ 916 static void kfd_topology_update_device_list(struct list_head *temp_list, 917 struct list_head *master_list) 918 { 919 while (!list_empty(temp_list)) { 920 list_move_tail(temp_list->next, master_list); 921 sys_props.num_devices++; 922 } 923 } 924 925 static void kfd_debug_print_topology(void) 926 { 927 struct kfd_topology_device *dev; 928 929 down_read(&topology_lock); 930 931 dev = list_last_entry(&topology_device_list, 932 struct kfd_topology_device, list); 933 if (dev) { 934 if (dev->node_props.cpu_cores_count && 935 dev->node_props.simd_count) { 936 pr_info("Topology: Add APU node [0x%0x:0x%0x]\n", 937 dev->node_props.device_id, 938 dev->node_props.vendor_id); 939 } else if (dev->node_props.cpu_cores_count) 940 pr_info("Topology: Add CPU node\n"); 941 else if (dev->node_props.simd_count) 942 pr_info("Topology: Add dGPU node [0x%0x:0x%0x]\n", 943 dev->node_props.device_id, 944 dev->node_props.vendor_id); 945 } 946 up_read(&topology_lock); 947 } 948 949 /* Helper function for intializing platform_xx members of 950 * kfd_system_properties. Uses OEM info from the last CPU/APU node. 951 */ 952 static void kfd_update_system_properties(void) 953 { 954 struct kfd_topology_device *dev; 955 956 down_read(&topology_lock); 957 dev = list_last_entry(&topology_device_list, 958 struct kfd_topology_device, list); 959 if (dev) { 960 sys_props.platform_id = 961 (*((uint64_t *)dev->oem_id)) & CRAT_OEMID_64BIT_MASK; 962 sys_props.platform_oem = *((uint64_t *)dev->oem_table_id); 963 sys_props.platform_rev = dev->oem_revision; 964 } 965 up_read(&topology_lock); 966 } 967 968 static void find_system_memory(const struct dmi_header *dm, 969 void *private) 970 { 971 struct kfd_mem_properties *mem; 972 u16 mem_width, mem_clock; 973 struct kfd_topology_device *kdev = 974 (struct kfd_topology_device *)private; 975 const u8 *dmi_data = (const u8 *)(dm + 1); 976 977 if (dm->type == DMI_ENTRY_MEM_DEVICE && dm->length >= 0x15) { 978 mem_width = (u16)(*(const u16 *)(dmi_data + 0x6)); 979 mem_clock = (u16)(*(const u16 *)(dmi_data + 0x11)); 980 list_for_each_entry(mem, &kdev->mem_props, list) { 981 if (mem_width != 0xFFFF && mem_width != 0) 982 mem->width = mem_width; 983 if (mem_clock != 0) 984 mem->mem_clk_max = mem_clock; 985 } 986 } 987 } 988 989 /* 990 * Performance counters information is not part of CRAT but we would like to 991 * put them in the sysfs under topology directory for Thunk to get the data. 992 * This function is called before updating the sysfs. 993 */ 994 static int kfd_add_perf_to_topology(struct kfd_topology_device *kdev) 995 { 996 /* These are the only counters supported so far */ 997 return kfd_iommu_add_perf_counters(kdev); 998 } 999 1000 /* kfd_add_non_crat_information - Add information that is not currently 1001 * defined in CRAT but is necessary for KFD topology 1002 * @dev - topology device to which addition info is added 1003 */ 1004 static void kfd_add_non_crat_information(struct kfd_topology_device *kdev) 1005 { 1006 /* Check if CPU only node. */ 1007 if (!kdev->gpu) { 1008 /* Add system memory information */ 1009 dmi_walk(find_system_memory, kdev); 1010 } 1011 /* TODO: For GPU node, rearrange code from kfd_topology_add_device */ 1012 } 1013 1014 /* kfd_is_acpi_crat_invalid - CRAT from ACPI is valid only for AMD APU devices. 1015 * Ignore CRAT for all other devices. AMD APU is identified if both CPU 1016 * and GPU cores are present. 1017 * @device_list - topology device list created by parsing ACPI CRAT table. 1018 * @return - TRUE if invalid, FALSE is valid. 1019 */ 1020 static bool kfd_is_acpi_crat_invalid(struct list_head *device_list) 1021 { 1022 struct kfd_topology_device *dev; 1023 1024 list_for_each_entry(dev, device_list, list) { 1025 if (dev->node_props.cpu_cores_count && 1026 dev->node_props.simd_count) 1027 return false; 1028 } 1029 pr_info("Ignoring ACPI CRAT on non-APU system\n"); 1030 return true; 1031 } 1032 1033 int kfd_topology_init(void) 1034 { 1035 void *crat_image = NULL; 1036 size_t image_size = 0; 1037 int ret; 1038 struct list_head temp_topology_device_list; 1039 int cpu_only_node = 0; 1040 struct kfd_topology_device *kdev; 1041 int proximity_domain; 1042 1043 /* topology_device_list - Master list of all topology devices 1044 * temp_topology_device_list - temporary list created while parsing CRAT 1045 * or VCRAT. Once parsing is complete the contents of list is moved to 1046 * topology_device_list 1047 */ 1048 1049 /* Initialize the head for the both the lists */ 1050 INIT_LIST_HEAD(&topology_device_list); 1051 INIT_LIST_HEAD(&temp_topology_device_list); 1052 init_rwsem(&topology_lock); 1053 1054 memset(&sys_props, 0, sizeof(sys_props)); 1055 1056 /* Proximity domains in ACPI CRAT tables start counting at 1057 * 0. The same should be true for virtual CRAT tables created 1058 * at this stage. GPUs added later in kfd_topology_add_device 1059 * use a counter. 1060 */ 1061 proximity_domain = 0; 1062 1063 /* 1064 * Get the CRAT image from the ACPI. If ACPI doesn't have one 1065 * or if ACPI CRAT is invalid create a virtual CRAT. 1066 * NOTE: The current implementation expects all AMD APUs to have 1067 * CRAT. If no CRAT is available, it is assumed to be a CPU 1068 */ 1069 ret = kfd_create_crat_image_acpi(&crat_image, &image_size); 1070 if (!ret) { 1071 ret = kfd_parse_crat_table(crat_image, 1072 &temp_topology_device_list, 1073 proximity_domain); 1074 if (ret || 1075 kfd_is_acpi_crat_invalid(&temp_topology_device_list)) { 1076 kfd_release_topology_device_list( 1077 &temp_topology_device_list); 1078 kfd_destroy_crat_image(crat_image); 1079 crat_image = NULL; 1080 } 1081 } 1082 1083 if (!crat_image) { 1084 ret = kfd_create_crat_image_virtual(&crat_image, &image_size, 1085 COMPUTE_UNIT_CPU, NULL, 1086 proximity_domain); 1087 cpu_only_node = 1; 1088 if (ret) { 1089 pr_err("Error creating VCRAT table for CPU\n"); 1090 return ret; 1091 } 1092 1093 ret = kfd_parse_crat_table(crat_image, 1094 &temp_topology_device_list, 1095 proximity_domain); 1096 if (ret) { 1097 pr_err("Error parsing VCRAT table for CPU\n"); 1098 goto err; 1099 } 1100 } 1101 1102 kdev = list_first_entry(&temp_topology_device_list, 1103 struct kfd_topology_device, list); 1104 kfd_add_perf_to_topology(kdev); 1105 1106 down_write(&topology_lock); 1107 kfd_topology_update_device_list(&temp_topology_device_list, 1108 &topology_device_list); 1109 topology_crat_proximity_domain = sys_props.num_devices-1; 1110 ret = kfd_topology_update_sysfs(); 1111 up_write(&topology_lock); 1112 1113 if (!ret) { 1114 sys_props.generation_count++; 1115 kfd_update_system_properties(); 1116 kfd_debug_print_topology(); 1117 } else 1118 pr_err("Failed to update topology in sysfs ret=%d\n", ret); 1119 1120 /* For nodes with GPU, this information gets added 1121 * when GPU is detected (kfd_topology_add_device). 1122 */ 1123 if (cpu_only_node) { 1124 /* Add additional information to CPU only node created above */ 1125 down_write(&topology_lock); 1126 kdev = list_first_entry(&topology_device_list, 1127 struct kfd_topology_device, list); 1128 up_write(&topology_lock); 1129 kfd_add_non_crat_information(kdev); 1130 } 1131 1132 err: 1133 kfd_destroy_crat_image(crat_image); 1134 return ret; 1135 } 1136 1137 void kfd_topology_shutdown(void) 1138 { 1139 down_write(&topology_lock); 1140 kfd_topology_release_sysfs(); 1141 kfd_release_live_view(); 1142 up_write(&topology_lock); 1143 } 1144 1145 static uint32_t kfd_generate_gpu_id(struct kfd_node *gpu) 1146 { 1147 uint32_t hashout; 1148 uint32_t buf[8]; 1149 uint64_t local_mem_size; 1150 int i; 1151 1152 if (!gpu) 1153 return 0; 1154 1155 local_mem_size = gpu->local_mem_info.local_mem_size_private + 1156 gpu->local_mem_info.local_mem_size_public; 1157 buf[0] = gpu->adev->pdev->devfn; 1158 buf[1] = gpu->adev->pdev->subsystem_vendor | 1159 (gpu->adev->pdev->subsystem_device << 16); 1160 buf[2] = pci_domain_nr(gpu->adev->pdev->bus); 1161 buf[3] = gpu->adev->pdev->device; 1162 buf[4] = gpu->adev->pdev->bus->number; 1163 buf[5] = lower_32_bits(local_mem_size); 1164 buf[6] = upper_32_bits(local_mem_size); 1165 buf[7] = (ffs(gpu->xcc_mask) - 1) | (NUM_XCC(gpu->xcc_mask) << 16); 1166 1167 for (i = 0, hashout = 0; i < 8; i++) 1168 hashout ^= hash_32(buf[i], KFD_GPU_ID_HASH_WIDTH); 1169 1170 return hashout; 1171 } 1172 /* kfd_assign_gpu - Attach @gpu to the correct kfd topology device. If 1173 * the GPU device is not already present in the topology device 1174 * list then return NULL. This means a new topology device has to 1175 * be created for this GPU. 1176 */ 1177 static struct kfd_topology_device *kfd_assign_gpu(struct kfd_node *gpu) 1178 { 1179 struct kfd_topology_device *dev; 1180 struct kfd_topology_device *out_dev = NULL; 1181 struct kfd_mem_properties *mem; 1182 struct kfd_cache_properties *cache; 1183 struct kfd_iolink_properties *iolink; 1184 struct kfd_iolink_properties *p2plink; 1185 1186 list_for_each_entry(dev, &topology_device_list, list) { 1187 /* Discrete GPUs need their own topology device list 1188 * entries. Don't assign them to CPU/APU nodes. 1189 */ 1190 if (!gpu->kfd->use_iommu_v2 && 1191 dev->node_props.cpu_cores_count) 1192 continue; 1193 1194 if (!dev->gpu && (dev->node_props.simd_count > 0)) { 1195 dev->gpu = gpu; 1196 out_dev = dev; 1197 1198 list_for_each_entry(mem, &dev->mem_props, list) 1199 mem->gpu = dev->gpu; 1200 list_for_each_entry(cache, &dev->cache_props, list) 1201 cache->gpu = dev->gpu; 1202 list_for_each_entry(iolink, &dev->io_link_props, list) 1203 iolink->gpu = dev->gpu; 1204 list_for_each_entry(p2plink, &dev->p2p_link_props, list) 1205 p2plink->gpu = dev->gpu; 1206 break; 1207 } 1208 } 1209 return out_dev; 1210 } 1211 1212 static void kfd_notify_gpu_change(uint32_t gpu_id, int arrival) 1213 { 1214 /* 1215 * TODO: Generate an event for thunk about the arrival/removal 1216 * of the GPU 1217 */ 1218 } 1219 1220 /* kfd_fill_mem_clk_max_info - Since CRAT doesn't have memory clock info, 1221 * patch this after CRAT parsing. 1222 */ 1223 static void kfd_fill_mem_clk_max_info(struct kfd_topology_device *dev) 1224 { 1225 struct kfd_mem_properties *mem; 1226 struct kfd_local_mem_info local_mem_info; 1227 1228 if (!dev) 1229 return; 1230 1231 /* Currently, amdgpu driver (amdgpu_mc) deals only with GPUs with 1232 * single bank of VRAM local memory. 1233 * for dGPUs - VCRAT reports only one bank of Local Memory 1234 * for APUs - If CRAT from ACPI reports more than one bank, then 1235 * all the banks will report the same mem_clk_max information 1236 */ 1237 amdgpu_amdkfd_get_local_mem_info(dev->gpu->adev, &local_mem_info, 1238 dev->gpu->xcp); 1239 1240 list_for_each_entry(mem, &dev->mem_props, list) 1241 mem->mem_clk_max = local_mem_info.mem_clk_max; 1242 } 1243 1244 static void kfd_set_iolink_no_atomics(struct kfd_topology_device *dev, 1245 struct kfd_topology_device *target_gpu_dev, 1246 struct kfd_iolink_properties *link) 1247 { 1248 /* xgmi always supports atomics between links. */ 1249 if (link->iolink_type == CRAT_IOLINK_TYPE_XGMI) 1250 return; 1251 1252 /* check pcie support to set cpu(dev) flags for target_gpu_dev link. */ 1253 if (target_gpu_dev) { 1254 uint32_t cap; 1255 1256 pcie_capability_read_dword(target_gpu_dev->gpu->adev->pdev, 1257 PCI_EXP_DEVCAP2, &cap); 1258 1259 if (!(cap & (PCI_EXP_DEVCAP2_ATOMIC_COMP32 | 1260 PCI_EXP_DEVCAP2_ATOMIC_COMP64))) 1261 link->flags |= CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT | 1262 CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT; 1263 /* set gpu (dev) flags. */ 1264 } else { 1265 if (!dev->gpu->kfd->pci_atomic_requested || 1266 dev->gpu->adev->asic_type == CHIP_HAWAII) 1267 link->flags |= CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT | 1268 CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT; 1269 } 1270 } 1271 1272 static void kfd_set_iolink_non_coherent(struct kfd_topology_device *to_dev, 1273 struct kfd_iolink_properties *outbound_link, 1274 struct kfd_iolink_properties *inbound_link) 1275 { 1276 /* CPU -> GPU with PCIe */ 1277 if (!to_dev->gpu && 1278 inbound_link->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS) 1279 inbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT; 1280 1281 if (to_dev->gpu) { 1282 /* GPU <-> GPU with PCIe and 1283 * Vega20 with XGMI 1284 */ 1285 if (inbound_link->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS || 1286 (inbound_link->iolink_type == CRAT_IOLINK_TYPE_XGMI && 1287 KFD_GC_VERSION(to_dev->gpu) == IP_VERSION(9, 4, 0))) { 1288 outbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT; 1289 inbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT; 1290 } 1291 } 1292 } 1293 1294 static void kfd_fill_iolink_non_crat_info(struct kfd_topology_device *dev) 1295 { 1296 struct kfd_iolink_properties *link, *inbound_link; 1297 struct kfd_topology_device *peer_dev; 1298 1299 if (!dev || !dev->gpu) 1300 return; 1301 1302 /* GPU only creates direct links so apply flags setting to all */ 1303 list_for_each_entry(link, &dev->io_link_props, list) { 1304 link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1305 kfd_set_iolink_no_atomics(dev, NULL, link); 1306 peer_dev = kfd_topology_device_by_proximity_domain( 1307 link->node_to); 1308 1309 if (!peer_dev) 1310 continue; 1311 1312 /* Include the CPU peer in GPU hive if connected over xGMI. */ 1313 if (!peer_dev->gpu && 1314 link->iolink_type == CRAT_IOLINK_TYPE_XGMI) { 1315 /* 1316 * If the GPU is not part of a GPU hive, use its pci 1317 * device location as the hive ID to bind with the CPU. 1318 */ 1319 if (!dev->node_props.hive_id) 1320 dev->node_props.hive_id = pci_dev_id(dev->gpu->adev->pdev); 1321 peer_dev->node_props.hive_id = dev->node_props.hive_id; 1322 } 1323 1324 list_for_each_entry(inbound_link, &peer_dev->io_link_props, 1325 list) { 1326 if (inbound_link->node_to != link->node_from) 1327 continue; 1328 1329 inbound_link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1330 kfd_set_iolink_no_atomics(peer_dev, dev, inbound_link); 1331 kfd_set_iolink_non_coherent(peer_dev, link, inbound_link); 1332 } 1333 } 1334 1335 /* Create indirect links so apply flags setting to all */ 1336 list_for_each_entry(link, &dev->p2p_link_props, list) { 1337 link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1338 kfd_set_iolink_no_atomics(dev, NULL, link); 1339 peer_dev = kfd_topology_device_by_proximity_domain( 1340 link->node_to); 1341 1342 if (!peer_dev) 1343 continue; 1344 1345 list_for_each_entry(inbound_link, &peer_dev->p2p_link_props, 1346 list) { 1347 if (inbound_link->node_to != link->node_from) 1348 continue; 1349 1350 inbound_link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1351 kfd_set_iolink_no_atomics(peer_dev, dev, inbound_link); 1352 kfd_set_iolink_non_coherent(peer_dev, link, inbound_link); 1353 } 1354 } 1355 } 1356 1357 static int kfd_build_p2p_node_entry(struct kfd_topology_device *dev, 1358 struct kfd_iolink_properties *p2plink) 1359 { 1360 int ret; 1361 1362 p2plink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 1363 if (!p2plink->kobj) 1364 return -ENOMEM; 1365 1366 ret = kobject_init_and_add(p2plink->kobj, &iolink_type, 1367 dev->kobj_p2plink, "%d", dev->node_props.p2p_links_count - 1); 1368 if (ret < 0) { 1369 kobject_put(p2plink->kobj); 1370 return ret; 1371 } 1372 1373 p2plink->attr.name = "properties"; 1374 p2plink->attr.mode = KFD_SYSFS_FILE_MODE; 1375 sysfs_attr_init(&p2plink->attr); 1376 ret = sysfs_create_file(p2plink->kobj, &p2plink->attr); 1377 if (ret < 0) 1378 return ret; 1379 1380 return 0; 1381 } 1382 1383 static int kfd_create_indirect_link_prop(struct kfd_topology_device *kdev, int gpu_node) 1384 { 1385 struct kfd_iolink_properties *gpu_link, *tmp_link, *cpu_link; 1386 struct kfd_iolink_properties *props = NULL, *props2 = NULL; 1387 struct kfd_topology_device *cpu_dev; 1388 int ret = 0; 1389 int i, num_cpu; 1390 1391 num_cpu = 0; 1392 list_for_each_entry(cpu_dev, &topology_device_list, list) { 1393 if (cpu_dev->gpu) 1394 break; 1395 num_cpu++; 1396 } 1397 1398 gpu_link = list_first_entry(&kdev->io_link_props, 1399 struct kfd_iolink_properties, list); 1400 if (!gpu_link) 1401 return -ENOMEM; 1402 1403 for (i = 0; i < num_cpu; i++) { 1404 /* CPU <--> GPU */ 1405 if (gpu_link->node_to == i) 1406 continue; 1407 1408 /* find CPU <--> CPU links */ 1409 cpu_link = NULL; 1410 cpu_dev = kfd_topology_device_by_proximity_domain(i); 1411 if (cpu_dev) { 1412 list_for_each_entry(tmp_link, 1413 &cpu_dev->io_link_props, list) { 1414 if (tmp_link->node_to == gpu_link->node_to) { 1415 cpu_link = tmp_link; 1416 break; 1417 } 1418 } 1419 } 1420 1421 if (!cpu_link) 1422 return -ENOMEM; 1423 1424 /* CPU <--> CPU <--> GPU, GPU node*/ 1425 props = kfd_alloc_struct(props); 1426 if (!props) 1427 return -ENOMEM; 1428 1429 memcpy(props, gpu_link, sizeof(struct kfd_iolink_properties)); 1430 props->weight = gpu_link->weight + cpu_link->weight; 1431 props->min_latency = gpu_link->min_latency + cpu_link->min_latency; 1432 props->max_latency = gpu_link->max_latency + cpu_link->max_latency; 1433 props->min_bandwidth = min(gpu_link->min_bandwidth, cpu_link->min_bandwidth); 1434 props->max_bandwidth = min(gpu_link->max_bandwidth, cpu_link->max_bandwidth); 1435 1436 props->node_from = gpu_node; 1437 props->node_to = i; 1438 kdev->node_props.p2p_links_count++; 1439 list_add_tail(&props->list, &kdev->p2p_link_props); 1440 ret = kfd_build_p2p_node_entry(kdev, props); 1441 if (ret < 0) 1442 return ret; 1443 1444 /* for small Bar, no CPU --> GPU in-direct links */ 1445 if (kfd_dev_is_large_bar(kdev->gpu)) { 1446 /* CPU <--> CPU <--> GPU, CPU node*/ 1447 props2 = kfd_alloc_struct(props2); 1448 if (!props2) 1449 return -ENOMEM; 1450 1451 memcpy(props2, props, sizeof(struct kfd_iolink_properties)); 1452 props2->node_from = i; 1453 props2->node_to = gpu_node; 1454 props2->kobj = NULL; 1455 cpu_dev->node_props.p2p_links_count++; 1456 list_add_tail(&props2->list, &cpu_dev->p2p_link_props); 1457 ret = kfd_build_p2p_node_entry(cpu_dev, props2); 1458 if (ret < 0) 1459 return ret; 1460 } 1461 } 1462 return ret; 1463 } 1464 1465 #if defined(CONFIG_HSA_AMD_P2P) 1466 static int kfd_add_peer_prop(struct kfd_topology_device *kdev, 1467 struct kfd_topology_device *peer, int from, int to) 1468 { 1469 struct kfd_iolink_properties *props = NULL; 1470 struct kfd_iolink_properties *iolink1, *iolink2, *iolink3; 1471 struct kfd_topology_device *cpu_dev; 1472 int ret = 0; 1473 1474 if (!amdgpu_device_is_peer_accessible( 1475 kdev->gpu->adev, 1476 peer->gpu->adev)) 1477 return ret; 1478 1479 iolink1 = list_first_entry(&kdev->io_link_props, 1480 struct kfd_iolink_properties, list); 1481 if (!iolink1) 1482 return -ENOMEM; 1483 1484 iolink2 = list_first_entry(&peer->io_link_props, 1485 struct kfd_iolink_properties, list); 1486 if (!iolink2) 1487 return -ENOMEM; 1488 1489 props = kfd_alloc_struct(props); 1490 if (!props) 1491 return -ENOMEM; 1492 1493 memcpy(props, iolink1, sizeof(struct kfd_iolink_properties)); 1494 1495 props->weight = iolink1->weight + iolink2->weight; 1496 props->min_latency = iolink1->min_latency + iolink2->min_latency; 1497 props->max_latency = iolink1->max_latency + iolink2->max_latency; 1498 props->min_bandwidth = min(iolink1->min_bandwidth, iolink2->min_bandwidth); 1499 props->max_bandwidth = min(iolink2->max_bandwidth, iolink2->max_bandwidth); 1500 1501 if (iolink1->node_to != iolink2->node_to) { 1502 /* CPU->CPU link*/ 1503 cpu_dev = kfd_topology_device_by_proximity_domain(iolink1->node_to); 1504 if (cpu_dev) { 1505 list_for_each_entry(iolink3, &cpu_dev->io_link_props, list) 1506 if (iolink3->node_to == iolink2->node_to) 1507 break; 1508 1509 props->weight += iolink3->weight; 1510 props->min_latency += iolink3->min_latency; 1511 props->max_latency += iolink3->max_latency; 1512 props->min_bandwidth = min(props->min_bandwidth, 1513 iolink3->min_bandwidth); 1514 props->max_bandwidth = min(props->max_bandwidth, 1515 iolink3->max_bandwidth); 1516 } else { 1517 WARN(1, "CPU node not found"); 1518 } 1519 } 1520 1521 props->node_from = from; 1522 props->node_to = to; 1523 peer->node_props.p2p_links_count++; 1524 list_add_tail(&props->list, &peer->p2p_link_props); 1525 ret = kfd_build_p2p_node_entry(peer, props); 1526 1527 return ret; 1528 } 1529 #endif 1530 1531 static int kfd_dev_create_p2p_links(void) 1532 { 1533 struct kfd_topology_device *dev; 1534 struct kfd_topology_device *new_dev; 1535 #if defined(CONFIG_HSA_AMD_P2P) 1536 uint32_t i; 1537 #endif 1538 uint32_t k; 1539 int ret = 0; 1540 1541 k = 0; 1542 list_for_each_entry(dev, &topology_device_list, list) 1543 k++; 1544 if (k < 2) 1545 return 0; 1546 1547 new_dev = list_last_entry(&topology_device_list, struct kfd_topology_device, list); 1548 if (WARN_ON(!new_dev->gpu)) 1549 return 0; 1550 1551 k--; 1552 1553 /* create in-direct links */ 1554 ret = kfd_create_indirect_link_prop(new_dev, k); 1555 if (ret < 0) 1556 goto out; 1557 1558 /* create p2p links */ 1559 #if defined(CONFIG_HSA_AMD_P2P) 1560 i = 0; 1561 list_for_each_entry(dev, &topology_device_list, list) { 1562 if (dev == new_dev) 1563 break; 1564 if (!dev->gpu || !dev->gpu->adev || 1565 (dev->gpu->kfd->hive_id && 1566 dev->gpu->kfd->hive_id == new_dev->gpu->kfd->hive_id)) 1567 goto next; 1568 1569 /* check if node(s) is/are peer accessible in one direction or bi-direction */ 1570 ret = kfd_add_peer_prop(new_dev, dev, i, k); 1571 if (ret < 0) 1572 goto out; 1573 1574 ret = kfd_add_peer_prop(dev, new_dev, k, i); 1575 if (ret < 0) 1576 goto out; 1577 next: 1578 i++; 1579 } 1580 #endif 1581 1582 out: 1583 return ret; 1584 } 1585 1586 /* Helper function. See kfd_fill_gpu_cache_info for parameter description */ 1587 static int fill_in_l1_pcache(struct kfd_cache_properties **props_ext, 1588 struct kfd_gpu_cache_info *pcache_info, 1589 struct kfd_cu_info *cu_info, 1590 int cu_bitmask, 1591 int cache_type, unsigned int cu_processor_id, 1592 int cu_block) 1593 { 1594 unsigned int cu_sibling_map_mask; 1595 int first_active_cu; 1596 struct kfd_cache_properties *pcache = NULL; 1597 1598 cu_sibling_map_mask = cu_bitmask; 1599 cu_sibling_map_mask >>= cu_block; 1600 cu_sibling_map_mask &= ((1 << pcache_info[cache_type].num_cu_shared) - 1); 1601 first_active_cu = ffs(cu_sibling_map_mask); 1602 1603 /* CU could be inactive. In case of shared cache find the first active 1604 * CU. and incase of non-shared cache check if the CU is inactive. If 1605 * inactive active skip it 1606 */ 1607 if (first_active_cu) { 1608 pcache = kfd_alloc_struct(pcache); 1609 if (!pcache) 1610 return -ENOMEM; 1611 1612 memset(pcache, 0, sizeof(struct kfd_cache_properties)); 1613 pcache->processor_id_low = cu_processor_id + (first_active_cu - 1); 1614 pcache->cache_level = pcache_info[cache_type].cache_level; 1615 pcache->cache_size = pcache_info[cache_type].cache_size; 1616 1617 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_DATA_CACHE) 1618 pcache->cache_type |= HSA_CACHE_TYPE_DATA; 1619 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_INST_CACHE) 1620 pcache->cache_type |= HSA_CACHE_TYPE_INSTRUCTION; 1621 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_CPU_CACHE) 1622 pcache->cache_type |= HSA_CACHE_TYPE_CPU; 1623 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_SIMD_CACHE) 1624 pcache->cache_type |= HSA_CACHE_TYPE_HSACU; 1625 1626 /* Sibling map is w.r.t processor_id_low, so shift out 1627 * inactive CU 1628 */ 1629 cu_sibling_map_mask = 1630 cu_sibling_map_mask >> (first_active_cu - 1); 1631 1632 pcache->sibling_map[0] = (uint8_t)(cu_sibling_map_mask & 0xFF); 1633 pcache->sibling_map[1] = 1634 (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF); 1635 pcache->sibling_map[2] = 1636 (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF); 1637 pcache->sibling_map[3] = 1638 (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF); 1639 1640 pcache->sibling_map_size = 4; 1641 *props_ext = pcache; 1642 1643 return 0; 1644 } 1645 return 1; 1646 } 1647 1648 /* Helper function. See kfd_fill_gpu_cache_info for parameter description */ 1649 static int fill_in_l2_l3_pcache(struct kfd_cache_properties **props_ext, 1650 struct kfd_gpu_cache_info *pcache_info, 1651 struct kfd_cu_info *cu_info, 1652 int cache_type, unsigned int cu_processor_id) 1653 { 1654 unsigned int cu_sibling_map_mask; 1655 int first_active_cu; 1656 int i, j, k; 1657 struct kfd_cache_properties *pcache = NULL; 1658 1659 cu_sibling_map_mask = cu_info->cu_bitmap[0][0]; 1660 cu_sibling_map_mask &= 1661 ((1 << pcache_info[cache_type].num_cu_shared) - 1); 1662 first_active_cu = ffs(cu_sibling_map_mask); 1663 1664 /* CU could be inactive. In case of shared cache find the first active 1665 * CU. and incase of non-shared cache check if the CU is inactive. If 1666 * inactive active skip it 1667 */ 1668 if (first_active_cu) { 1669 pcache = kfd_alloc_struct(pcache); 1670 if (!pcache) 1671 return -ENOMEM; 1672 1673 memset(pcache, 0, sizeof(struct kfd_cache_properties)); 1674 pcache->processor_id_low = cu_processor_id 1675 + (first_active_cu - 1); 1676 pcache->cache_level = pcache_info[cache_type].cache_level; 1677 pcache->cache_size = pcache_info[cache_type].cache_size; 1678 1679 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_DATA_CACHE) 1680 pcache->cache_type |= HSA_CACHE_TYPE_DATA; 1681 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_INST_CACHE) 1682 pcache->cache_type |= HSA_CACHE_TYPE_INSTRUCTION; 1683 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_CPU_CACHE) 1684 pcache->cache_type |= HSA_CACHE_TYPE_CPU; 1685 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_SIMD_CACHE) 1686 pcache->cache_type |= HSA_CACHE_TYPE_HSACU; 1687 1688 /* Sibling map is w.r.t processor_id_low, so shift out 1689 * inactive CU 1690 */ 1691 cu_sibling_map_mask = cu_sibling_map_mask >> (first_active_cu - 1); 1692 k = 0; 1693 1694 for (i = 0; i < cu_info->num_shader_engines; i++) { 1695 for (j = 0; j < cu_info->num_shader_arrays_per_engine; j++) { 1696 pcache->sibling_map[k] = (uint8_t)(cu_sibling_map_mask & 0xFF); 1697 pcache->sibling_map[k+1] = (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF); 1698 pcache->sibling_map[k+2] = (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF); 1699 pcache->sibling_map[k+3] = (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF); 1700 k += 4; 1701 1702 cu_sibling_map_mask = cu_info->cu_bitmap[i % 4][j + i / 4]; 1703 cu_sibling_map_mask &= ((1 << pcache_info[cache_type].num_cu_shared) - 1); 1704 } 1705 } 1706 pcache->sibling_map_size = k; 1707 *props_ext = pcache; 1708 return 0; 1709 } 1710 return 1; 1711 } 1712 1713 #define KFD_MAX_CACHE_TYPES 6 1714 1715 /* kfd_fill_cache_non_crat_info - Fill GPU cache info using kfd_gpu_cache_info 1716 * tables 1717 */ 1718 static void kfd_fill_cache_non_crat_info(struct kfd_topology_device *dev, struct kfd_node *kdev) 1719 { 1720 struct kfd_gpu_cache_info *pcache_info = NULL; 1721 int i, j, k; 1722 int ct = 0; 1723 unsigned int cu_processor_id; 1724 int ret; 1725 unsigned int num_cu_shared; 1726 struct kfd_cu_info cu_info; 1727 struct kfd_cu_info *pcu_info; 1728 int gpu_processor_id; 1729 struct kfd_cache_properties *props_ext; 1730 int num_of_entries = 0; 1731 int num_of_cache_types = 0; 1732 struct kfd_gpu_cache_info cache_info[KFD_MAX_CACHE_TYPES]; 1733 1734 amdgpu_amdkfd_get_cu_info(kdev->adev, &cu_info); 1735 pcu_info = &cu_info; 1736 1737 gpu_processor_id = dev->node_props.simd_id_base; 1738 1739 pcache_info = cache_info; 1740 num_of_cache_types = kfd_get_gpu_cache_info(kdev, &pcache_info); 1741 if (!num_of_cache_types) { 1742 pr_warn("no cache info found\n"); 1743 return; 1744 } 1745 1746 /* For each type of cache listed in the kfd_gpu_cache_info table, 1747 * go through all available Compute Units. 1748 * The [i,j,k] loop will 1749 * if kfd_gpu_cache_info.num_cu_shared = 1 1750 * will parse through all available CU 1751 * If (kfd_gpu_cache_info.num_cu_shared != 1) 1752 * then it will consider only one CU from 1753 * the shared unit 1754 */ 1755 for (ct = 0; ct < num_of_cache_types; ct++) { 1756 cu_processor_id = gpu_processor_id; 1757 if (pcache_info[ct].cache_level == 1) { 1758 for (i = 0; i < pcu_info->num_shader_engines; i++) { 1759 for (j = 0; j < pcu_info->num_shader_arrays_per_engine; j++) { 1760 for (k = 0; k < pcu_info->num_cu_per_sh; k += pcache_info[ct].num_cu_shared) { 1761 1762 ret = fill_in_l1_pcache(&props_ext, pcache_info, pcu_info, 1763 pcu_info->cu_bitmap[i % 4][j + i / 4], ct, 1764 cu_processor_id, k); 1765 1766 if (ret < 0) 1767 break; 1768 1769 if (!ret) { 1770 num_of_entries++; 1771 list_add_tail(&props_ext->list, &dev->cache_props); 1772 } 1773 1774 /* Move to next CU block */ 1775 num_cu_shared = ((k + pcache_info[ct].num_cu_shared) <= 1776 pcu_info->num_cu_per_sh) ? 1777 pcache_info[ct].num_cu_shared : 1778 (pcu_info->num_cu_per_sh - k); 1779 cu_processor_id += num_cu_shared; 1780 } 1781 } 1782 } 1783 } else { 1784 ret = fill_in_l2_l3_pcache(&props_ext, pcache_info, 1785 pcu_info, ct, cu_processor_id); 1786 1787 if (ret < 0) 1788 break; 1789 1790 if (!ret) { 1791 num_of_entries++; 1792 list_add_tail(&props_ext->list, &dev->cache_props); 1793 } 1794 } 1795 } 1796 dev->node_props.caches_count += num_of_entries; 1797 pr_debug("Added [%d] GPU cache entries\n", num_of_entries); 1798 } 1799 1800 static int kfd_topology_add_device_locked(struct kfd_node *gpu, uint32_t gpu_id, 1801 struct kfd_topology_device **dev) 1802 { 1803 int proximity_domain = ++topology_crat_proximity_domain; 1804 struct list_head temp_topology_device_list; 1805 void *crat_image = NULL; 1806 size_t image_size = 0; 1807 int res; 1808 1809 res = kfd_create_crat_image_virtual(&crat_image, &image_size, 1810 COMPUTE_UNIT_GPU, gpu, 1811 proximity_domain); 1812 if (res) { 1813 pr_err("Error creating VCRAT for GPU (ID: 0x%x)\n", 1814 gpu_id); 1815 topology_crat_proximity_domain--; 1816 goto err; 1817 } 1818 1819 INIT_LIST_HEAD(&temp_topology_device_list); 1820 1821 res = kfd_parse_crat_table(crat_image, 1822 &temp_topology_device_list, 1823 proximity_domain); 1824 if (res) { 1825 pr_err("Error parsing VCRAT for GPU (ID: 0x%x)\n", 1826 gpu_id); 1827 topology_crat_proximity_domain--; 1828 goto err; 1829 } 1830 1831 kfd_topology_update_device_list(&temp_topology_device_list, 1832 &topology_device_list); 1833 1834 *dev = kfd_assign_gpu(gpu); 1835 if (WARN_ON(!*dev)) { 1836 res = -ENODEV; 1837 goto err; 1838 } 1839 1840 /* Fill the cache affinity information here for the GPUs 1841 * using VCRAT 1842 */ 1843 kfd_fill_cache_non_crat_info(*dev, gpu); 1844 1845 /* Update the SYSFS tree, since we added another topology 1846 * device 1847 */ 1848 res = kfd_topology_update_sysfs(); 1849 if (!res) 1850 sys_props.generation_count++; 1851 else 1852 pr_err("Failed to update GPU (ID: 0x%x) to sysfs topology. res=%d\n", 1853 gpu_id, res); 1854 1855 err: 1856 kfd_destroy_crat_image(crat_image); 1857 return res; 1858 } 1859 1860 int kfd_topology_add_device(struct kfd_node *gpu) 1861 { 1862 uint32_t gpu_id; 1863 struct kfd_topology_device *dev; 1864 struct kfd_cu_info cu_info; 1865 int res = 0; 1866 int i; 1867 const char *asic_name = amdgpu_asic_name[gpu->adev->asic_type]; 1868 1869 gpu_id = kfd_generate_gpu_id(gpu); 1870 pr_debug("Adding new GPU (ID: 0x%x) to topology\n", gpu_id); 1871 1872 /* Check to see if this gpu device exists in the topology_device_list. 1873 * If so, assign the gpu to that device, 1874 * else create a Virtual CRAT for this gpu device and then parse that 1875 * CRAT to create a new topology device. Once created assign the gpu to 1876 * that topology device 1877 */ 1878 down_write(&topology_lock); 1879 dev = kfd_assign_gpu(gpu); 1880 if (!dev) 1881 res = kfd_topology_add_device_locked(gpu, gpu_id, &dev); 1882 up_write(&topology_lock); 1883 if (res) 1884 return res; 1885 1886 dev->gpu_id = gpu_id; 1887 gpu->id = gpu_id; 1888 1889 kfd_dev_create_p2p_links(); 1890 1891 /* TODO: Move the following lines to function 1892 * kfd_add_non_crat_information 1893 */ 1894 1895 /* Fill-in additional information that is not available in CRAT but 1896 * needed for the topology 1897 */ 1898 1899 amdgpu_amdkfd_get_cu_info(dev->gpu->adev, &cu_info); 1900 1901 for (i = 0; i < KFD_TOPOLOGY_PUBLIC_NAME_SIZE-1; i++) { 1902 dev->node_props.name[i] = __tolower(asic_name[i]); 1903 if (asic_name[i] == '\0') 1904 break; 1905 } 1906 dev->node_props.name[i] = '\0'; 1907 1908 dev->node_props.simd_arrays_per_engine = 1909 cu_info.num_shader_arrays_per_engine; 1910 1911 dev->node_props.gfx_target_version = 1912 gpu->kfd->device_info.gfx_target_version; 1913 dev->node_props.vendor_id = gpu->adev->pdev->vendor; 1914 dev->node_props.device_id = gpu->adev->pdev->device; 1915 dev->node_props.capability |= 1916 ((dev->gpu->adev->rev_id << HSA_CAP_ASIC_REVISION_SHIFT) & 1917 HSA_CAP_ASIC_REVISION_MASK); 1918 1919 dev->node_props.location_id = pci_dev_id(gpu->adev->pdev); 1920 if (KFD_GC_VERSION(dev->gpu->kfd) == IP_VERSION(9, 4, 3)) 1921 dev->node_props.location_id |= dev->gpu->node_id; 1922 1923 dev->node_props.domain = pci_domain_nr(gpu->adev->pdev->bus); 1924 dev->node_props.max_engine_clk_fcompute = 1925 amdgpu_amdkfd_get_max_engine_clock_in_mhz(dev->gpu->adev); 1926 dev->node_props.max_engine_clk_ccompute = 1927 cpufreq_quick_get_max(0) / 1000; 1928 1929 if (gpu->xcp) 1930 dev->node_props.drm_render_minor = gpu->xcp->ddev->render->index; 1931 else 1932 dev->node_props.drm_render_minor = 1933 gpu->kfd->shared_resources.drm_render_minor; 1934 1935 dev->node_props.hive_id = gpu->kfd->hive_id; 1936 dev->node_props.num_sdma_engines = kfd_get_num_sdma_engines(gpu); 1937 dev->node_props.num_sdma_xgmi_engines = 1938 kfd_get_num_xgmi_sdma_engines(gpu); 1939 dev->node_props.num_sdma_queues_per_engine = 1940 gpu->kfd->device_info.num_sdma_queues_per_engine - 1941 gpu->kfd->device_info.num_reserved_sdma_queues_per_engine; 1942 dev->node_props.num_gws = (dev->gpu->gws && 1943 dev->gpu->dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS) ? 1944 dev->gpu->adev->gds.gws_size : 0; 1945 dev->node_props.num_cp_queues = get_cp_queues_num(dev->gpu->dqm); 1946 1947 kfd_fill_mem_clk_max_info(dev); 1948 kfd_fill_iolink_non_crat_info(dev); 1949 1950 switch (dev->gpu->adev->asic_type) { 1951 case CHIP_KAVERI: 1952 case CHIP_HAWAII: 1953 case CHIP_TONGA: 1954 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_PRE_1_0 << 1955 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) & 1956 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK); 1957 break; 1958 case CHIP_CARRIZO: 1959 case CHIP_FIJI: 1960 case CHIP_POLARIS10: 1961 case CHIP_POLARIS11: 1962 case CHIP_POLARIS12: 1963 case CHIP_VEGAM: 1964 pr_debug("Adding doorbell packet type capability\n"); 1965 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_1_0 << 1966 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) & 1967 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK); 1968 break; 1969 default: 1970 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(9, 0, 1)) 1971 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 << 1972 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) & 1973 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK); 1974 else 1975 WARN(1, "Unexpected ASIC family %u", 1976 dev->gpu->adev->asic_type); 1977 } 1978 1979 /* 1980 * Overwrite ATS capability according to needs_iommu_device to fix 1981 * potential missing corresponding bit in CRAT of BIOS. 1982 */ 1983 if (dev->gpu->kfd->use_iommu_v2) 1984 dev->node_props.capability |= HSA_CAP_ATS_PRESENT; 1985 else 1986 dev->node_props.capability &= ~HSA_CAP_ATS_PRESENT; 1987 1988 /* Fix errors in CZ CRAT. 1989 * simd_count: Carrizo CRAT reports wrong simd_count, probably 1990 * because it doesn't consider masked out CUs 1991 * max_waves_per_simd: Carrizo reports wrong max_waves_per_simd 1992 */ 1993 if (dev->gpu->adev->asic_type == CHIP_CARRIZO) { 1994 dev->node_props.simd_count = 1995 cu_info.simd_per_cu * cu_info.cu_active_number; 1996 dev->node_props.max_waves_per_simd = 10; 1997 } 1998 1999 /* kfd only concerns sram ecc on GFX and HBM ecc on UMC */ 2000 dev->node_props.capability |= 2001 ((dev->gpu->adev->ras_enabled & BIT(AMDGPU_RAS_BLOCK__GFX)) != 0) ? 2002 HSA_CAP_SRAM_EDCSUPPORTED : 0; 2003 dev->node_props.capability |= 2004 ((dev->gpu->adev->ras_enabled & BIT(AMDGPU_RAS_BLOCK__UMC)) != 0) ? 2005 HSA_CAP_MEM_EDCSUPPORTED : 0; 2006 2007 if (KFD_GC_VERSION(dev->gpu) != IP_VERSION(9, 0, 1)) 2008 dev->node_props.capability |= (dev->gpu->adev->ras_enabled != 0) ? 2009 HSA_CAP_RASEVENTNOTIFY : 0; 2010 2011 if (KFD_IS_SVM_API_SUPPORTED(dev->gpu->adev)) 2012 dev->node_props.capability |= HSA_CAP_SVMAPI_SUPPORTED; 2013 2014 kfd_debug_print_topology(); 2015 2016 kfd_notify_gpu_change(gpu_id, 1); 2017 2018 return 0; 2019 } 2020 2021 /** 2022 * kfd_topology_update_io_links() - Update IO links after device removal. 2023 * @proximity_domain: Proximity domain value of the dev being removed. 2024 * 2025 * The topology list currently is arranged in increasing order of 2026 * proximity domain. 2027 * 2028 * Two things need to be done when a device is removed: 2029 * 1. All the IO links to this device need to be removed. 2030 * 2. All nodes after the current device node need to move 2031 * up once this device node is removed from the topology 2032 * list. As a result, the proximity domain values for 2033 * all nodes after the node being deleted reduce by 1. 2034 * This would also cause the proximity domain values for 2035 * io links to be updated based on new proximity domain 2036 * values. 2037 * 2038 * Context: The caller must hold write topology_lock. 2039 */ 2040 static void kfd_topology_update_io_links(int proximity_domain) 2041 { 2042 struct kfd_topology_device *dev; 2043 struct kfd_iolink_properties *iolink, *p2plink, *tmp; 2044 2045 list_for_each_entry(dev, &topology_device_list, list) { 2046 if (dev->proximity_domain > proximity_domain) 2047 dev->proximity_domain--; 2048 2049 list_for_each_entry_safe(iolink, tmp, &dev->io_link_props, list) { 2050 /* 2051 * If there is an io link to the dev being deleted 2052 * then remove that IO link also. 2053 */ 2054 if (iolink->node_to == proximity_domain) { 2055 list_del(&iolink->list); 2056 dev->node_props.io_links_count--; 2057 } else { 2058 if (iolink->node_from > proximity_domain) 2059 iolink->node_from--; 2060 if (iolink->node_to > proximity_domain) 2061 iolink->node_to--; 2062 } 2063 } 2064 2065 list_for_each_entry_safe(p2plink, tmp, &dev->p2p_link_props, list) { 2066 /* 2067 * If there is a p2p link to the dev being deleted 2068 * then remove that p2p link also. 2069 */ 2070 if (p2plink->node_to == proximity_domain) { 2071 list_del(&p2plink->list); 2072 dev->node_props.p2p_links_count--; 2073 } else { 2074 if (p2plink->node_from > proximity_domain) 2075 p2plink->node_from--; 2076 if (p2plink->node_to > proximity_domain) 2077 p2plink->node_to--; 2078 } 2079 } 2080 } 2081 } 2082 2083 int kfd_topology_remove_device(struct kfd_node *gpu) 2084 { 2085 struct kfd_topology_device *dev, *tmp; 2086 uint32_t gpu_id; 2087 int res = -ENODEV; 2088 int i = 0; 2089 2090 down_write(&topology_lock); 2091 2092 list_for_each_entry_safe(dev, tmp, &topology_device_list, list) { 2093 if (dev->gpu == gpu) { 2094 gpu_id = dev->gpu_id; 2095 kfd_remove_sysfs_node_entry(dev); 2096 kfd_release_topology_device(dev); 2097 sys_props.num_devices--; 2098 kfd_topology_update_io_links(i); 2099 topology_crat_proximity_domain = sys_props.num_devices-1; 2100 sys_props.generation_count++; 2101 res = 0; 2102 if (kfd_topology_update_sysfs() < 0) 2103 kfd_topology_release_sysfs(); 2104 break; 2105 } 2106 i++; 2107 } 2108 2109 up_write(&topology_lock); 2110 2111 if (!res) 2112 kfd_notify_gpu_change(gpu_id, 0); 2113 2114 return res; 2115 } 2116 2117 /* kfd_topology_enum_kfd_devices - Enumerate through all devices in KFD 2118 * topology. If GPU device is found @idx, then valid kfd_dev pointer is 2119 * returned through @kdev 2120 * Return - 0: On success (@kdev will be NULL for non GPU nodes) 2121 * -1: If end of list 2122 */ 2123 int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_node **kdev) 2124 { 2125 2126 struct kfd_topology_device *top_dev; 2127 uint8_t device_idx = 0; 2128 2129 *kdev = NULL; 2130 down_read(&topology_lock); 2131 2132 list_for_each_entry(top_dev, &topology_device_list, list) { 2133 if (device_idx == idx) { 2134 *kdev = top_dev->gpu; 2135 up_read(&topology_lock); 2136 return 0; 2137 } 2138 2139 device_idx++; 2140 } 2141 2142 up_read(&topology_lock); 2143 2144 return -1; 2145 2146 } 2147 2148 static int kfd_cpumask_to_apic_id(const struct cpumask *cpumask) 2149 { 2150 int first_cpu_of_numa_node; 2151 2152 if (!cpumask || cpumask == cpu_none_mask) 2153 return -1; 2154 first_cpu_of_numa_node = cpumask_first(cpumask); 2155 if (first_cpu_of_numa_node >= nr_cpu_ids) 2156 return -1; 2157 #ifdef CONFIG_X86_64 2158 return cpu_data(first_cpu_of_numa_node).apicid; 2159 #else 2160 return first_cpu_of_numa_node; 2161 #endif 2162 } 2163 2164 /* kfd_numa_node_to_apic_id - Returns the APIC ID of the first logical processor 2165 * of the given NUMA node (numa_node_id) 2166 * Return -1 on failure 2167 */ 2168 int kfd_numa_node_to_apic_id(int numa_node_id) 2169 { 2170 if (numa_node_id == -1) { 2171 pr_warn("Invalid NUMA Node. Use online CPU mask\n"); 2172 return kfd_cpumask_to_apic_id(cpu_online_mask); 2173 } 2174 return kfd_cpumask_to_apic_id(cpumask_of_node(numa_node_id)); 2175 } 2176 2177 void kfd_double_confirm_iommu_support(struct kfd_dev *gpu) 2178 { 2179 struct kfd_topology_device *dev; 2180 2181 gpu->use_iommu_v2 = false; 2182 2183 if (!gpu->device_info.needs_iommu_device) 2184 return; 2185 2186 down_read(&topology_lock); 2187 2188 /* Only use IOMMUv2 if there is an APU topology node with no GPU 2189 * assigned yet. This GPU will be assigned to it. 2190 */ 2191 list_for_each_entry(dev, &topology_device_list, list) 2192 if (dev->node_props.cpu_cores_count && 2193 dev->node_props.simd_count && 2194 !dev->gpu) 2195 gpu->use_iommu_v2 = true; 2196 2197 up_read(&topology_lock); 2198 } 2199 2200 #if defined(CONFIG_DEBUG_FS) 2201 2202 int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data) 2203 { 2204 struct kfd_topology_device *dev; 2205 unsigned int i = 0; 2206 int r = 0; 2207 2208 down_read(&topology_lock); 2209 2210 list_for_each_entry(dev, &topology_device_list, list) { 2211 if (!dev->gpu) { 2212 i++; 2213 continue; 2214 } 2215 2216 seq_printf(m, "Node %u, gpu_id %x:\n", i++, dev->gpu->id); 2217 r = dqm_debugfs_hqds(m, dev->gpu->dqm); 2218 if (r) 2219 break; 2220 } 2221 2222 up_read(&topology_lock); 2223 2224 return r; 2225 } 2226 2227 int kfd_debugfs_rls_by_device(struct seq_file *m, void *data) 2228 { 2229 struct kfd_topology_device *dev; 2230 unsigned int i = 0; 2231 int r = 0; 2232 2233 down_read(&topology_lock); 2234 2235 list_for_each_entry(dev, &topology_device_list, list) { 2236 if (!dev->gpu) { 2237 i++; 2238 continue; 2239 } 2240 2241 seq_printf(m, "Node %u, gpu_id %x:\n", i++, dev->gpu->id); 2242 r = pm_debugfs_runlist(m, &dev->gpu->dqm->packet_mgr); 2243 if (r) 2244 break; 2245 } 2246 2247 up_read(&topology_lock); 2248 2249 return r; 2250 } 2251 2252 #endif 2253