1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <drm/ttm/ttm_tt.h> 27 #include <drm/drm_exec.h> 28 29 #include "amdgpu_sync.h" 30 #include "amdgpu_object.h" 31 #include "amdgpu_vm.h" 32 #include "amdgpu_hmm.h" 33 #include "amdgpu.h" 34 #include "amdgpu_xgmi.h" 35 #include "kfd_priv.h" 36 #include "kfd_svm.h" 37 #include "kfd_migrate.h" 38 #include "kfd_smi_events.h" 39 40 #ifdef dev_fmt 41 #undef dev_fmt 42 #endif 43 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 44 45 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 46 47 /* Long enough to ensure no retry fault comes after svm range is restored and 48 * page table is updated. 49 */ 50 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 51 #define dynamic_svm_range_dump(svms) \ 52 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms) 53 54 /* Giant svm range split into smaller ranges based on this, it is decided using 55 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 56 * power of 2MB. 57 */ 58 static uint64_t max_svm_range_pages; 59 60 struct criu_svm_metadata { 61 struct list_head list; 62 struct kfd_criu_svm_range_priv_data data; 63 }; 64 65 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 66 static bool 67 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 68 const struct mmu_notifier_range *range, 69 unsigned long cur_seq); 70 static int 71 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 72 uint64_t *bo_s, uint64_t *bo_l); 73 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 74 .invalidate = svm_range_cpu_invalidate_pagetables, 75 }; 76 77 /** 78 * svm_range_unlink - unlink svm_range from lists and interval tree 79 * @prange: svm range structure to be removed 80 * 81 * Remove the svm_range from the svms and svm_bo lists and the svms 82 * interval tree. 83 * 84 * Context: The caller must hold svms->lock 85 */ 86 static void svm_range_unlink(struct svm_range *prange) 87 { 88 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 89 prange, prange->start, prange->last); 90 91 if (prange->svm_bo) { 92 spin_lock(&prange->svm_bo->list_lock); 93 list_del(&prange->svm_bo_list); 94 spin_unlock(&prange->svm_bo->list_lock); 95 } 96 97 list_del(&prange->list); 98 if (prange->it_node.start != 0 && prange->it_node.last != 0) 99 interval_tree_remove(&prange->it_node, &prange->svms->objects); 100 } 101 102 static void 103 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 104 { 105 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 106 prange, prange->start, prange->last); 107 108 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 109 prange->start << PAGE_SHIFT, 110 prange->npages << PAGE_SHIFT, 111 &svm_range_mn_ops); 112 } 113 114 /** 115 * svm_range_add_to_svms - add svm range to svms 116 * @prange: svm range structure to be added 117 * 118 * Add the svm range to svms interval tree and link list 119 * 120 * Context: The caller must hold svms->lock 121 */ 122 static void svm_range_add_to_svms(struct svm_range *prange) 123 { 124 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 125 prange, prange->start, prange->last); 126 127 list_move_tail(&prange->list, &prange->svms->list); 128 prange->it_node.start = prange->start; 129 prange->it_node.last = prange->last; 130 interval_tree_insert(&prange->it_node, &prange->svms->objects); 131 } 132 133 static void svm_range_remove_notifier(struct svm_range *prange) 134 { 135 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 136 prange->svms, prange, 137 prange->notifier.interval_tree.start >> PAGE_SHIFT, 138 prange->notifier.interval_tree.last >> PAGE_SHIFT); 139 140 if (prange->notifier.interval_tree.start != 0 && 141 prange->notifier.interval_tree.last != 0) 142 mmu_interval_notifier_remove(&prange->notifier); 143 } 144 145 static bool 146 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 147 { 148 return dma_addr && !dma_mapping_error(dev, dma_addr) && 149 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 150 } 151 152 static int 153 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 154 unsigned long offset, unsigned long npages, 155 unsigned long *hmm_pfns, uint32_t gpuidx) 156 { 157 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 158 dma_addr_t *addr = prange->dma_addr[gpuidx]; 159 struct device *dev = adev->dev; 160 struct page *page; 161 int i, r; 162 163 if (!addr) { 164 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 165 if (!addr) 166 return -ENOMEM; 167 prange->dma_addr[gpuidx] = addr; 168 } 169 170 addr += offset; 171 for (i = 0; i < npages; i++) { 172 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 173 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 174 175 page = hmm_pfn_to_page(hmm_pfns[i]); 176 if (is_zone_device_page(page)) { 177 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 178 179 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 180 bo_adev->vm_manager.vram_base_offset - 181 bo_adev->kfd.pgmap.range.start; 182 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 183 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 184 continue; 185 } 186 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 187 r = dma_mapping_error(dev, addr[i]); 188 if (r) { 189 dev_err(dev, "failed %d dma_map_page\n", r); 190 return r; 191 } 192 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 193 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 194 } 195 return 0; 196 } 197 198 static int 199 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 200 unsigned long offset, unsigned long npages, 201 unsigned long *hmm_pfns) 202 { 203 struct kfd_process *p; 204 uint32_t gpuidx; 205 int r; 206 207 p = container_of(prange->svms, struct kfd_process, svms); 208 209 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 210 struct kfd_process_device *pdd; 211 212 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 213 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 214 if (!pdd) { 215 pr_debug("failed to find device idx %d\n", gpuidx); 216 return -EINVAL; 217 } 218 219 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 220 hmm_pfns, gpuidx); 221 if (r) 222 break; 223 } 224 225 return r; 226 } 227 228 void svm_range_dma_unmap(struct device *dev, dma_addr_t *dma_addr, 229 unsigned long offset, unsigned long npages) 230 { 231 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 232 int i; 233 234 if (!dma_addr) 235 return; 236 237 for (i = offset; i < offset + npages; i++) { 238 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 239 continue; 240 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 241 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 242 dma_addr[i] = 0; 243 } 244 } 245 246 void svm_range_free_dma_mappings(struct svm_range *prange, bool unmap_dma) 247 { 248 struct kfd_process_device *pdd; 249 dma_addr_t *dma_addr; 250 struct device *dev; 251 struct kfd_process *p; 252 uint32_t gpuidx; 253 254 p = container_of(prange->svms, struct kfd_process, svms); 255 256 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 257 dma_addr = prange->dma_addr[gpuidx]; 258 if (!dma_addr) 259 continue; 260 261 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 262 if (!pdd) { 263 pr_debug("failed to find device idx %d\n", gpuidx); 264 continue; 265 } 266 dev = &pdd->dev->adev->pdev->dev; 267 if (unmap_dma) 268 svm_range_dma_unmap(dev, dma_addr, 0, prange->npages); 269 kvfree(dma_addr); 270 prange->dma_addr[gpuidx] = NULL; 271 } 272 } 273 274 static void svm_range_free(struct svm_range *prange, bool do_unmap) 275 { 276 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 277 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 278 279 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 280 prange->start, prange->last); 281 282 svm_range_vram_node_free(prange); 283 svm_range_free_dma_mappings(prange, do_unmap); 284 285 if (do_unmap && !p->xnack_enabled) { 286 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 287 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 288 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 289 } 290 mutex_destroy(&prange->lock); 291 mutex_destroy(&prange->migrate_mutex); 292 kfree(prange); 293 } 294 295 static void 296 svm_range_set_default_attributes(int32_t *location, int32_t *prefetch_loc, 297 uint8_t *granularity, uint32_t *flags) 298 { 299 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 300 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 301 *granularity = 9; 302 *flags = 303 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 304 } 305 306 static struct 307 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 308 uint64_t last, bool update_mem_usage) 309 { 310 uint64_t size = last - start + 1; 311 struct svm_range *prange; 312 struct kfd_process *p; 313 314 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 315 if (!prange) 316 return NULL; 317 318 p = container_of(svms, struct kfd_process, svms); 319 if (!p->xnack_enabled && update_mem_usage && 320 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 321 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) { 322 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 323 kfree(prange); 324 return NULL; 325 } 326 prange->npages = size; 327 prange->svms = svms; 328 prange->start = start; 329 prange->last = last; 330 INIT_LIST_HEAD(&prange->list); 331 INIT_LIST_HEAD(&prange->update_list); 332 INIT_LIST_HEAD(&prange->svm_bo_list); 333 INIT_LIST_HEAD(&prange->deferred_list); 334 INIT_LIST_HEAD(&prange->child_list); 335 atomic_set(&prange->invalid, 0); 336 prange->validate_timestamp = 0; 337 mutex_init(&prange->migrate_mutex); 338 mutex_init(&prange->lock); 339 340 if (p->xnack_enabled) 341 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 342 MAX_GPU_INSTANCE); 343 344 svm_range_set_default_attributes(&prange->preferred_loc, 345 &prange->prefetch_loc, 346 &prange->granularity, &prange->flags); 347 348 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 349 350 return prange; 351 } 352 353 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 354 { 355 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 356 return false; 357 358 return true; 359 } 360 361 static void svm_range_bo_release(struct kref *kref) 362 { 363 struct svm_range_bo *svm_bo; 364 365 svm_bo = container_of(kref, struct svm_range_bo, kref); 366 pr_debug("svm_bo 0x%p\n", svm_bo); 367 368 spin_lock(&svm_bo->list_lock); 369 while (!list_empty(&svm_bo->range_list)) { 370 struct svm_range *prange = 371 list_first_entry(&svm_bo->range_list, 372 struct svm_range, svm_bo_list); 373 /* list_del_init tells a concurrent svm_range_vram_node_new when 374 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 375 */ 376 list_del_init(&prange->svm_bo_list); 377 spin_unlock(&svm_bo->list_lock); 378 379 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 380 prange->start, prange->last); 381 mutex_lock(&prange->lock); 382 prange->svm_bo = NULL; 383 mutex_unlock(&prange->lock); 384 385 spin_lock(&svm_bo->list_lock); 386 } 387 spin_unlock(&svm_bo->list_lock); 388 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) { 389 /* We're not in the eviction worker. 390 * Signal the fence and synchronize with any 391 * pending eviction work. 392 */ 393 dma_fence_signal(&svm_bo->eviction_fence->base); 394 cancel_work_sync(&svm_bo->eviction_work); 395 } 396 dma_fence_put(&svm_bo->eviction_fence->base); 397 amdgpu_bo_unref(&svm_bo->bo); 398 kfree(svm_bo); 399 } 400 401 static void svm_range_bo_wq_release(struct work_struct *work) 402 { 403 struct svm_range_bo *svm_bo; 404 405 svm_bo = container_of(work, struct svm_range_bo, release_work); 406 svm_range_bo_release(&svm_bo->kref); 407 } 408 409 static void svm_range_bo_release_async(struct kref *kref) 410 { 411 struct svm_range_bo *svm_bo; 412 413 svm_bo = container_of(kref, struct svm_range_bo, kref); 414 pr_debug("svm_bo 0x%p\n", svm_bo); 415 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 416 schedule_work(&svm_bo->release_work); 417 } 418 419 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 420 { 421 kref_put(&svm_bo->kref, svm_range_bo_release_async); 422 } 423 424 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 425 { 426 if (svm_bo) 427 kref_put(&svm_bo->kref, svm_range_bo_release); 428 } 429 430 static bool 431 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 432 { 433 mutex_lock(&prange->lock); 434 if (!prange->svm_bo) { 435 mutex_unlock(&prange->lock); 436 return false; 437 } 438 if (prange->ttm_res) { 439 /* We still have a reference, all is well */ 440 mutex_unlock(&prange->lock); 441 return true; 442 } 443 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 444 /* 445 * Migrate from GPU to GPU, remove range from source svm_bo->node 446 * range list, and return false to allocate svm_bo from destination 447 * node. 448 */ 449 if (prange->svm_bo->node != node) { 450 mutex_unlock(&prange->lock); 451 452 spin_lock(&prange->svm_bo->list_lock); 453 list_del_init(&prange->svm_bo_list); 454 spin_unlock(&prange->svm_bo->list_lock); 455 456 svm_range_bo_unref(prange->svm_bo); 457 return false; 458 } 459 if (READ_ONCE(prange->svm_bo->evicting)) { 460 struct dma_fence *f; 461 struct svm_range_bo *svm_bo; 462 /* The BO is getting evicted, 463 * we need to get a new one 464 */ 465 mutex_unlock(&prange->lock); 466 svm_bo = prange->svm_bo; 467 f = dma_fence_get(&svm_bo->eviction_fence->base); 468 svm_range_bo_unref(prange->svm_bo); 469 /* wait for the fence to avoid long spin-loop 470 * at list_empty_careful 471 */ 472 dma_fence_wait(f, false); 473 dma_fence_put(f); 474 } else { 475 /* The BO was still around and we got 476 * a new reference to it 477 */ 478 mutex_unlock(&prange->lock); 479 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 480 prange->svms, prange->start, prange->last); 481 482 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 483 return true; 484 } 485 486 } else { 487 mutex_unlock(&prange->lock); 488 } 489 490 /* We need a new svm_bo. Spin-loop to wait for concurrent 491 * svm_range_bo_release to finish removing this range from 492 * its range list. After this, it is safe to reuse the 493 * svm_bo pointer and svm_bo_list head. 494 */ 495 while (!list_empty_careful(&prange->svm_bo_list)) 496 ; 497 498 return false; 499 } 500 501 static struct svm_range_bo *svm_range_bo_new(void) 502 { 503 struct svm_range_bo *svm_bo; 504 505 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 506 if (!svm_bo) 507 return NULL; 508 509 kref_init(&svm_bo->kref); 510 INIT_LIST_HEAD(&svm_bo->range_list); 511 spin_lock_init(&svm_bo->list_lock); 512 513 return svm_bo; 514 } 515 516 int 517 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 518 bool clear) 519 { 520 struct amdgpu_bo_param bp; 521 struct svm_range_bo *svm_bo; 522 struct amdgpu_bo_user *ubo; 523 struct amdgpu_bo *bo; 524 struct kfd_process *p; 525 struct mm_struct *mm; 526 int r; 527 528 p = container_of(prange->svms, struct kfd_process, svms); 529 pr_debug("pasid: %x svms 0x%p [0x%lx 0x%lx]\n", p->pasid, prange->svms, 530 prange->start, prange->last); 531 532 if (svm_range_validate_svm_bo(node, prange)) 533 return 0; 534 535 svm_bo = svm_range_bo_new(); 536 if (!svm_bo) { 537 pr_debug("failed to alloc svm bo\n"); 538 return -ENOMEM; 539 } 540 mm = get_task_mm(p->lead_thread); 541 if (!mm) { 542 pr_debug("failed to get mm\n"); 543 kfree(svm_bo); 544 return -ESRCH; 545 } 546 svm_bo->node = node; 547 svm_bo->eviction_fence = 548 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 549 mm, 550 svm_bo); 551 mmput(mm); 552 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 553 svm_bo->evicting = 0; 554 memset(&bp, 0, sizeof(bp)); 555 bp.size = prange->npages * PAGE_SIZE; 556 bp.byte_align = PAGE_SIZE; 557 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 558 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 559 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 560 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 561 bp.type = ttm_bo_type_device; 562 bp.resv = NULL; 563 if (node->xcp) 564 bp.xcp_id_plus1 = node->xcp->id + 1; 565 566 r = amdgpu_bo_create_user(node->adev, &bp, &ubo); 567 if (r) { 568 pr_debug("failed %d to create bo\n", r); 569 goto create_bo_failed; 570 } 571 bo = &ubo->bo; 572 573 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n", 574 bo->tbo.resource->start << PAGE_SHIFT, bp.size, 575 bp.xcp_id_plus1 - 1); 576 577 r = amdgpu_bo_reserve(bo, true); 578 if (r) { 579 pr_debug("failed %d to reserve bo\n", r); 580 goto reserve_bo_failed; 581 } 582 583 if (clear) { 584 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 585 if (r) { 586 pr_debug("failed %d to sync bo\n", r); 587 amdgpu_bo_unreserve(bo); 588 goto reserve_bo_failed; 589 } 590 } 591 592 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 593 if (r) { 594 pr_debug("failed %d to reserve bo\n", r); 595 amdgpu_bo_unreserve(bo); 596 goto reserve_bo_failed; 597 } 598 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 599 600 amdgpu_bo_unreserve(bo); 601 602 svm_bo->bo = bo; 603 prange->svm_bo = svm_bo; 604 prange->ttm_res = bo->tbo.resource; 605 prange->offset = 0; 606 607 spin_lock(&svm_bo->list_lock); 608 list_add(&prange->svm_bo_list, &svm_bo->range_list); 609 spin_unlock(&svm_bo->list_lock); 610 611 return 0; 612 613 reserve_bo_failed: 614 amdgpu_bo_unref(&bo); 615 create_bo_failed: 616 dma_fence_put(&svm_bo->eviction_fence->base); 617 kfree(svm_bo); 618 prange->ttm_res = NULL; 619 620 return r; 621 } 622 623 void svm_range_vram_node_free(struct svm_range *prange) 624 { 625 svm_range_bo_unref(prange->svm_bo); 626 prange->ttm_res = NULL; 627 } 628 629 struct kfd_node * 630 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 631 { 632 struct kfd_process *p; 633 struct kfd_process_device *pdd; 634 635 p = container_of(prange->svms, struct kfd_process, svms); 636 pdd = kfd_process_device_data_by_id(p, gpu_id); 637 if (!pdd) { 638 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 639 return NULL; 640 } 641 642 return pdd->dev; 643 } 644 645 struct kfd_process_device * 646 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 647 { 648 struct kfd_process *p; 649 650 p = container_of(prange->svms, struct kfd_process, svms); 651 652 return kfd_get_process_device_data(node, p); 653 } 654 655 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 656 { 657 struct ttm_operation_ctx ctx = { false, false }; 658 659 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 660 661 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 662 } 663 664 static int 665 svm_range_check_attr(struct kfd_process *p, 666 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 667 { 668 uint32_t i; 669 670 for (i = 0; i < nattr; i++) { 671 uint32_t val = attrs[i].value; 672 int gpuidx = MAX_GPU_INSTANCE; 673 674 switch (attrs[i].type) { 675 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 676 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 677 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 678 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 679 break; 680 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 681 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 682 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 683 break; 684 case KFD_IOCTL_SVM_ATTR_ACCESS: 685 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 686 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 687 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 688 break; 689 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 690 break; 691 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 692 break; 693 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 694 break; 695 default: 696 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 697 return -EINVAL; 698 } 699 700 if (gpuidx < 0) { 701 pr_debug("no GPU 0x%x found\n", val); 702 return -EINVAL; 703 } else if (gpuidx < MAX_GPU_INSTANCE && 704 !test_bit(gpuidx, p->svms.bitmap_supported)) { 705 pr_debug("GPU 0x%x not supported\n", val); 706 return -EINVAL; 707 } 708 } 709 710 return 0; 711 } 712 713 static void 714 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 715 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 716 bool *update_mapping) 717 { 718 uint32_t i; 719 int gpuidx; 720 721 for (i = 0; i < nattr; i++) { 722 switch (attrs[i].type) { 723 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 724 prange->preferred_loc = attrs[i].value; 725 break; 726 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 727 prange->prefetch_loc = attrs[i].value; 728 break; 729 case KFD_IOCTL_SVM_ATTR_ACCESS: 730 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 731 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 732 if (!p->xnack_enabled) 733 *update_mapping = true; 734 735 gpuidx = kfd_process_gpuidx_from_gpuid(p, 736 attrs[i].value); 737 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 738 bitmap_clear(prange->bitmap_access, gpuidx, 1); 739 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 740 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 741 bitmap_set(prange->bitmap_access, gpuidx, 1); 742 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 743 } else { 744 bitmap_clear(prange->bitmap_access, gpuidx, 1); 745 bitmap_set(prange->bitmap_aip, gpuidx, 1); 746 } 747 break; 748 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 749 *update_mapping = true; 750 prange->flags |= attrs[i].value; 751 break; 752 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 753 *update_mapping = true; 754 prange->flags &= ~attrs[i].value; 755 break; 756 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 757 prange->granularity = attrs[i].value; 758 break; 759 default: 760 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 761 } 762 } 763 } 764 765 static bool 766 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 767 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 768 { 769 uint32_t i; 770 int gpuidx; 771 772 for (i = 0; i < nattr; i++) { 773 switch (attrs[i].type) { 774 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 775 if (prange->preferred_loc != attrs[i].value) 776 return false; 777 break; 778 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 779 /* Prefetch should always trigger a migration even 780 * if the value of the attribute didn't change. 781 */ 782 return false; 783 case KFD_IOCTL_SVM_ATTR_ACCESS: 784 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 785 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 786 gpuidx = kfd_process_gpuidx_from_gpuid(p, 787 attrs[i].value); 788 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 789 if (test_bit(gpuidx, prange->bitmap_access) || 790 test_bit(gpuidx, prange->bitmap_aip)) 791 return false; 792 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 793 if (!test_bit(gpuidx, prange->bitmap_access)) 794 return false; 795 } else { 796 if (!test_bit(gpuidx, prange->bitmap_aip)) 797 return false; 798 } 799 break; 800 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 801 if ((prange->flags & attrs[i].value) != attrs[i].value) 802 return false; 803 break; 804 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 805 if ((prange->flags & attrs[i].value) != 0) 806 return false; 807 break; 808 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 809 if (prange->granularity != attrs[i].value) 810 return false; 811 break; 812 default: 813 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 814 } 815 } 816 817 return !prange->is_error_flag; 818 } 819 820 /** 821 * svm_range_debug_dump - print all range information from svms 822 * @svms: svm range list header 823 * 824 * debug output svm range start, end, prefetch location from svms 825 * interval tree and link list 826 * 827 * Context: The caller must hold svms->lock 828 */ 829 static void svm_range_debug_dump(struct svm_range_list *svms) 830 { 831 struct interval_tree_node *node; 832 struct svm_range *prange; 833 834 pr_debug("dump svms 0x%p list\n", svms); 835 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 836 837 list_for_each_entry(prange, &svms->list, list) { 838 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 839 prange, prange->start, prange->npages, 840 prange->start + prange->npages - 1, 841 prange->actual_loc); 842 } 843 844 pr_debug("dump svms 0x%p interval tree\n", svms); 845 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 846 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 847 while (node) { 848 prange = container_of(node, struct svm_range, it_node); 849 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 850 prange, prange->start, prange->npages, 851 prange->start + prange->npages - 1, 852 prange->actual_loc); 853 node = interval_tree_iter_next(node, 0, ~0ULL); 854 } 855 } 856 857 static void * 858 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements, 859 uint64_t offset) 860 { 861 unsigned char *dst; 862 863 dst = kvmalloc_array(num_elements, size, GFP_KERNEL); 864 if (!dst) 865 return NULL; 866 memcpy(dst, (unsigned char *)psrc + offset, num_elements * size); 867 868 return (void *)dst; 869 } 870 871 static int 872 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src) 873 { 874 int i; 875 876 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 877 if (!src->dma_addr[i]) 878 continue; 879 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i], 880 sizeof(*src->dma_addr[i]), src->npages, 0); 881 if (!dst->dma_addr[i]) 882 return -ENOMEM; 883 } 884 885 return 0; 886 } 887 888 static int 889 svm_range_split_array(void *ppnew, void *ppold, size_t size, 890 uint64_t old_start, uint64_t old_n, 891 uint64_t new_start, uint64_t new_n) 892 { 893 unsigned char *new, *old, *pold; 894 uint64_t d; 895 896 if (!ppold) 897 return 0; 898 pold = *(unsigned char **)ppold; 899 if (!pold) 900 return 0; 901 902 d = (new_start - old_start) * size; 903 new = svm_range_copy_array(pold, size, new_n, d); 904 if (!new) 905 return -ENOMEM; 906 d = (new_start == old_start) ? new_n * size : 0; 907 old = svm_range_copy_array(pold, size, old_n, d); 908 if (!old) { 909 kvfree(new); 910 return -ENOMEM; 911 } 912 kvfree(pold); 913 *(void **)ppold = old; 914 *(void **)ppnew = new; 915 916 return 0; 917 } 918 919 static int 920 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 921 uint64_t start, uint64_t last) 922 { 923 uint64_t npages = last - start + 1; 924 int i, r; 925 926 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 927 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 928 sizeof(*old->dma_addr[i]), old->start, 929 npages, new->start, new->npages); 930 if (r) 931 return r; 932 } 933 934 return 0; 935 } 936 937 static int 938 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 939 uint64_t start, uint64_t last) 940 { 941 uint64_t npages = last - start + 1; 942 943 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 944 new->svms, new, new->start, start, last); 945 946 if (new->start == old->start) { 947 new->offset = old->offset; 948 old->offset += new->npages; 949 } else { 950 new->offset = old->offset + npages; 951 } 952 953 new->svm_bo = svm_range_bo_ref(old->svm_bo); 954 new->ttm_res = old->ttm_res; 955 956 spin_lock(&new->svm_bo->list_lock); 957 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 958 spin_unlock(&new->svm_bo->list_lock); 959 960 return 0; 961 } 962 963 /** 964 * svm_range_split_adjust - split range and adjust 965 * 966 * @new: new range 967 * @old: the old range 968 * @start: the old range adjust to start address in pages 969 * @last: the old range adjust to last address in pages 970 * 971 * Copy system memory dma_addr or vram ttm_res in old range to new 972 * range from new_start up to size new->npages, the remaining old range is from 973 * start to last 974 * 975 * Return: 976 * 0 - OK, -ENOMEM - out of memory 977 */ 978 static int 979 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 980 uint64_t start, uint64_t last) 981 { 982 int r; 983 984 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 985 new->svms, new->start, old->start, old->last, start, last); 986 987 if (new->start < old->start || 988 new->last > old->last) { 989 WARN_ONCE(1, "invalid new range start or last\n"); 990 return -EINVAL; 991 } 992 993 r = svm_range_split_pages(new, old, start, last); 994 if (r) 995 return r; 996 997 if (old->actual_loc && old->ttm_res) { 998 r = svm_range_split_nodes(new, old, start, last); 999 if (r) 1000 return r; 1001 } 1002 1003 old->npages = last - start + 1; 1004 old->start = start; 1005 old->last = last; 1006 new->flags = old->flags; 1007 new->preferred_loc = old->preferred_loc; 1008 new->prefetch_loc = old->prefetch_loc; 1009 new->actual_loc = old->actual_loc; 1010 new->granularity = old->granularity; 1011 new->mapped_to_gpu = old->mapped_to_gpu; 1012 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1013 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1014 1015 return 0; 1016 } 1017 1018 /** 1019 * svm_range_split - split a range in 2 ranges 1020 * 1021 * @prange: the svm range to split 1022 * @start: the remaining range start address in pages 1023 * @last: the remaining range last address in pages 1024 * @new: the result new range generated 1025 * 1026 * Two cases only: 1027 * case 1: if start == prange->start 1028 * prange ==> prange[start, last] 1029 * new range [last + 1, prange->last] 1030 * 1031 * case 2: if last == prange->last 1032 * prange ==> prange[start, last] 1033 * new range [prange->start, start - 1] 1034 * 1035 * Return: 1036 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1037 */ 1038 static int 1039 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1040 struct svm_range **new) 1041 { 1042 uint64_t old_start = prange->start; 1043 uint64_t old_last = prange->last; 1044 struct svm_range_list *svms; 1045 int r = 0; 1046 1047 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1048 old_start, old_last, start, last); 1049 1050 if (old_start != start && old_last != last) 1051 return -EINVAL; 1052 if (start < old_start || last > old_last) 1053 return -EINVAL; 1054 1055 svms = prange->svms; 1056 if (old_start == start) 1057 *new = svm_range_new(svms, last + 1, old_last, false); 1058 else 1059 *new = svm_range_new(svms, old_start, start - 1, false); 1060 if (!*new) 1061 return -ENOMEM; 1062 1063 r = svm_range_split_adjust(*new, prange, start, last); 1064 if (r) { 1065 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1066 r, old_start, old_last, start, last); 1067 svm_range_free(*new, false); 1068 *new = NULL; 1069 } 1070 1071 return r; 1072 } 1073 1074 static int 1075 svm_range_split_tail(struct svm_range *prange, 1076 uint64_t new_last, struct list_head *insert_list) 1077 { 1078 struct svm_range *tail; 1079 int r = svm_range_split(prange, prange->start, new_last, &tail); 1080 1081 if (!r) 1082 list_add(&tail->list, insert_list); 1083 return r; 1084 } 1085 1086 static int 1087 svm_range_split_head(struct svm_range *prange, 1088 uint64_t new_start, struct list_head *insert_list) 1089 { 1090 struct svm_range *head; 1091 int r = svm_range_split(prange, new_start, prange->last, &head); 1092 1093 if (!r) 1094 list_add(&head->list, insert_list); 1095 return r; 1096 } 1097 1098 static void 1099 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm, 1100 struct svm_range *pchild, enum svm_work_list_ops op) 1101 { 1102 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1103 pchild, pchild->start, pchild->last, prange, op); 1104 1105 pchild->work_item.mm = mm; 1106 pchild->work_item.op = op; 1107 list_add_tail(&pchild->child_list, &prange->child_list); 1108 } 1109 1110 /** 1111 * svm_range_split_by_granularity - collect ranges within granularity boundary 1112 * 1113 * @p: the process with svms list 1114 * @mm: mm structure 1115 * @addr: the vm fault address in pages, to split the prange 1116 * @parent: parent range if prange is from child list 1117 * @prange: prange to split 1118 * 1119 * Trims @prange to be a single aligned block of prange->granularity if 1120 * possible. The head and tail are added to the child_list in @parent. 1121 * 1122 * Context: caller must hold mmap_read_lock and prange->lock 1123 * 1124 * Return: 1125 * 0 - OK, otherwise error code 1126 */ 1127 int 1128 svm_range_split_by_granularity(struct kfd_process *p, struct mm_struct *mm, 1129 unsigned long addr, struct svm_range *parent, 1130 struct svm_range *prange) 1131 { 1132 struct svm_range *head, *tail; 1133 unsigned long start, last, size; 1134 int r; 1135 1136 /* Align splited range start and size to granularity size, then a single 1137 * PTE will be used for whole range, this reduces the number of PTE 1138 * updated and the L1 TLB space used for translation. 1139 */ 1140 size = 1UL << prange->granularity; 1141 start = ALIGN_DOWN(addr, size); 1142 last = ALIGN(addr + 1, size) - 1; 1143 1144 pr_debug("svms 0x%p split [0x%lx 0x%lx] to [0x%lx 0x%lx] size 0x%lx\n", 1145 prange->svms, prange->start, prange->last, start, last, size); 1146 1147 if (start > prange->start) { 1148 r = svm_range_split(prange, start, prange->last, &head); 1149 if (r) 1150 return r; 1151 svm_range_add_child(parent, mm, head, SVM_OP_ADD_RANGE); 1152 } 1153 1154 if (last < prange->last) { 1155 r = svm_range_split(prange, prange->start, last, &tail); 1156 if (r) 1157 return r; 1158 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 1159 } 1160 1161 /* xnack on, update mapping on GPUs with ACCESS_IN_PLACE */ 1162 if (p->xnack_enabled && prange->work_item.op == SVM_OP_ADD_RANGE) { 1163 prange->work_item.op = SVM_OP_ADD_RANGE_AND_MAP; 1164 pr_debug("change prange 0x%p [0x%lx 0x%lx] op %d\n", 1165 prange, prange->start, prange->last, 1166 SVM_OP_ADD_RANGE_AND_MAP); 1167 } 1168 return 0; 1169 } 1170 static bool 1171 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1172 { 1173 return (node_a->adev == node_b->adev || 1174 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1175 } 1176 1177 static uint64_t 1178 svm_range_get_pte_flags(struct kfd_node *node, 1179 struct svm_range *prange, int domain) 1180 { 1181 struct kfd_node *bo_node; 1182 uint32_t flags = prange->flags; 1183 uint32_t mapping_flags = 0; 1184 uint64_t pte_flags; 1185 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1186 bool coherent = flags & KFD_IOCTL_SVM_FLAG_COHERENT; 1187 bool uncached = false; /*flags & KFD_IOCTL_SVM_FLAG_UNCACHED;*/ 1188 unsigned int mtype_local; 1189 1190 if (domain == SVM_RANGE_VRAM_DOMAIN) 1191 bo_node = prange->svm_bo->node; 1192 1193 switch (node->adev->ip_versions[GC_HWIP][0]) { 1194 case IP_VERSION(9, 4, 1): 1195 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1196 if (bo_node == node) { 1197 mapping_flags |= coherent ? 1198 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1199 } else { 1200 mapping_flags |= coherent ? 1201 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1202 if (svm_nodes_in_same_hive(node, bo_node)) 1203 snoop = true; 1204 } 1205 } else { 1206 mapping_flags |= coherent ? 1207 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1208 } 1209 break; 1210 case IP_VERSION(9, 4, 2): 1211 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1212 if (bo_node == node) { 1213 mapping_flags |= coherent ? 1214 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1215 if (node->adev->gmc.xgmi.connected_to_cpu) 1216 snoop = true; 1217 } else { 1218 mapping_flags |= coherent ? 1219 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1220 if (svm_nodes_in_same_hive(node, bo_node)) 1221 snoop = true; 1222 } 1223 } else { 1224 mapping_flags |= coherent ? 1225 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1226 } 1227 break; 1228 case IP_VERSION(9, 4, 3): 1229 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1230 (amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW); 1231 snoop = true; 1232 if (uncached) { 1233 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1234 } else if (domain == SVM_RANGE_VRAM_DOMAIN) { 1235 /* local HBM region close to partition */ 1236 if (bo_node->adev == node->adev && 1237 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1238 mapping_flags |= mtype_local; 1239 /* local HBM region far from partition or remote XGMI GPU */ 1240 else if (svm_nodes_in_same_hive(bo_node, node)) 1241 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1242 /* PCIe P2P */ 1243 else 1244 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1245 /* system memory accessed by the APU */ 1246 } else if (node->adev->flags & AMD_IS_APU) { 1247 /* On NUMA systems, locality is determined per-page 1248 * in amdgpu_gmc_override_vm_pte_flags 1249 */ 1250 if (num_possible_nodes() <= 1) 1251 mapping_flags |= mtype_local; 1252 else 1253 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1254 /* system memory accessed by the dGPU */ 1255 } else { 1256 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1257 } 1258 break; 1259 default: 1260 mapping_flags |= coherent ? 1261 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1262 } 1263 1264 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE; 1265 1266 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO) 1267 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE; 1268 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1269 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1270 1271 pte_flags = AMDGPU_PTE_VALID; 1272 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1273 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1274 1275 pte_flags |= amdgpu_gem_va_map_flags(node->adev, mapping_flags); 1276 return pte_flags; 1277 } 1278 1279 static int 1280 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1281 uint64_t start, uint64_t last, 1282 struct dma_fence **fence) 1283 { 1284 uint64_t init_pte_value = 0; 1285 1286 pr_debug("[0x%llx 0x%llx]\n", start, last); 1287 1288 return amdgpu_vm_update_range(adev, vm, false, true, true, NULL, start, 1289 last, init_pte_value, 0, 0, NULL, NULL, 1290 fence); 1291 } 1292 1293 static int 1294 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1295 unsigned long last, uint32_t trigger) 1296 { 1297 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1298 struct kfd_process_device *pdd; 1299 struct dma_fence *fence = NULL; 1300 struct kfd_process *p; 1301 uint32_t gpuidx; 1302 int r = 0; 1303 1304 if (!prange->mapped_to_gpu) { 1305 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1306 prange, prange->start, prange->last); 1307 return 0; 1308 } 1309 1310 if (prange->start == start && prange->last == last) { 1311 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1312 prange->mapped_to_gpu = false; 1313 } 1314 1315 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1316 MAX_GPU_INSTANCE); 1317 p = container_of(prange->svms, struct kfd_process, svms); 1318 1319 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1320 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1321 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1322 if (!pdd) { 1323 pr_debug("failed to find device idx %d\n", gpuidx); 1324 return -EINVAL; 1325 } 1326 1327 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1328 start, last, trigger); 1329 1330 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1331 drm_priv_to_vm(pdd->drm_priv), 1332 start, last, &fence); 1333 if (r) 1334 break; 1335 1336 if (fence) { 1337 r = dma_fence_wait(fence, false); 1338 dma_fence_put(fence); 1339 fence = NULL; 1340 if (r) 1341 break; 1342 } 1343 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1344 } 1345 1346 return r; 1347 } 1348 1349 static int 1350 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1351 unsigned long offset, unsigned long npages, bool readonly, 1352 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1353 struct dma_fence **fence, bool flush_tlb) 1354 { 1355 struct amdgpu_device *adev = pdd->dev->adev; 1356 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1357 uint64_t pte_flags; 1358 unsigned long last_start; 1359 int last_domain; 1360 int r = 0; 1361 int64_t i, j; 1362 1363 last_start = prange->start + offset; 1364 1365 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1366 last_start, last_start + npages - 1, readonly); 1367 1368 for (i = offset; i < offset + npages; i++) { 1369 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1370 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1371 1372 /* Collect all pages in the same address range and memory domain 1373 * that can be mapped with a single call to update mapping. 1374 */ 1375 if (i < offset + npages - 1 && 1376 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1377 continue; 1378 1379 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1380 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1381 1382 pte_flags = svm_range_get_pte_flags(pdd->dev, prange, last_domain); 1383 if (readonly) 1384 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1385 1386 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1387 prange->svms, last_start, prange->start + i, 1388 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1389 pte_flags); 1390 1391 /* For dGPU mode, we use same vm_manager to allocate VRAM for 1392 * different memory partition based on fpfn/lpfn, we should use 1393 * same vm_manager.vram_base_offset regardless memory partition. 1394 */ 1395 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, NULL, 1396 last_start, prange->start + i, 1397 pte_flags, 1398 (last_start - prange->start) << PAGE_SHIFT, 1399 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1400 NULL, dma_addr, &vm->last_update); 1401 1402 for (j = last_start - prange->start; j <= i; j++) 1403 dma_addr[j] |= last_domain; 1404 1405 if (r) { 1406 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1407 goto out; 1408 } 1409 last_start = prange->start + i + 1; 1410 } 1411 1412 r = amdgpu_vm_update_pdes(adev, vm, false); 1413 if (r) { 1414 pr_debug("failed %d to update directories 0x%lx\n", r, 1415 prange->start); 1416 goto out; 1417 } 1418 1419 if (fence) 1420 *fence = dma_fence_get(vm->last_update); 1421 1422 out: 1423 return r; 1424 } 1425 1426 static int 1427 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1428 unsigned long npages, bool readonly, 1429 unsigned long *bitmap, bool wait, bool flush_tlb) 1430 { 1431 struct kfd_process_device *pdd; 1432 struct amdgpu_device *bo_adev = NULL; 1433 struct kfd_process *p; 1434 struct dma_fence *fence = NULL; 1435 uint32_t gpuidx; 1436 int r = 0; 1437 1438 if (prange->svm_bo && prange->ttm_res) 1439 bo_adev = prange->svm_bo->node->adev; 1440 1441 p = container_of(prange->svms, struct kfd_process, svms); 1442 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1443 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1444 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1445 if (!pdd) { 1446 pr_debug("failed to find device idx %d\n", gpuidx); 1447 return -EINVAL; 1448 } 1449 1450 pdd = kfd_bind_process_to_device(pdd->dev, p); 1451 if (IS_ERR(pdd)) 1452 return -EINVAL; 1453 1454 if (bo_adev && pdd->dev->adev != bo_adev && 1455 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1456 pr_debug("cannot map to device idx %d\n", gpuidx); 1457 continue; 1458 } 1459 1460 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1461 prange->dma_addr[gpuidx], 1462 bo_adev, wait ? &fence : NULL, 1463 flush_tlb); 1464 if (r) 1465 break; 1466 1467 if (fence) { 1468 r = dma_fence_wait(fence, false); 1469 dma_fence_put(fence); 1470 fence = NULL; 1471 if (r) { 1472 pr_debug("failed %d to dma fence wait\n", r); 1473 break; 1474 } 1475 } 1476 1477 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1478 } 1479 1480 return r; 1481 } 1482 1483 struct svm_validate_context { 1484 struct kfd_process *process; 1485 struct svm_range *prange; 1486 bool intr; 1487 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1488 struct drm_exec exec; 1489 }; 1490 1491 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) 1492 { 1493 struct kfd_process_device *pdd; 1494 struct amdgpu_vm *vm; 1495 uint32_t gpuidx; 1496 int r; 1497 1498 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0); 1499 drm_exec_until_all_locked(&ctx->exec) { 1500 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1501 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1502 if (!pdd) { 1503 pr_debug("failed to find device idx %d\n", gpuidx); 1504 r = -EINVAL; 1505 goto unreserve_out; 1506 } 1507 vm = drm_priv_to_vm(pdd->drm_priv); 1508 1509 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2); 1510 drm_exec_retry_on_contention(&ctx->exec); 1511 if (unlikely(r)) { 1512 pr_debug("failed %d to reserve bo\n", r); 1513 goto unreserve_out; 1514 } 1515 } 1516 } 1517 1518 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1519 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1520 if (!pdd) { 1521 pr_debug("failed to find device idx %d\n", gpuidx); 1522 r = -EINVAL; 1523 goto unreserve_out; 1524 } 1525 1526 r = amdgpu_vm_validate_pt_bos(pdd->dev->adev, 1527 drm_priv_to_vm(pdd->drm_priv), 1528 svm_range_bo_validate, NULL); 1529 if (r) { 1530 pr_debug("failed %d validate pt bos\n", r); 1531 goto unreserve_out; 1532 } 1533 } 1534 1535 return 0; 1536 1537 unreserve_out: 1538 drm_exec_fini(&ctx->exec); 1539 return r; 1540 } 1541 1542 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1543 { 1544 drm_exec_fini(&ctx->exec); 1545 } 1546 1547 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1548 { 1549 struct kfd_process_device *pdd; 1550 1551 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1552 if (!pdd) 1553 return NULL; 1554 1555 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1556 } 1557 1558 /* 1559 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1560 * 1561 * To prevent concurrent destruction or change of range attributes, the 1562 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1563 * because that would block concurrent evictions and lead to deadlocks. To 1564 * serialize concurrent migrations or validations of the same range, the 1565 * prange->migrate_mutex must be held. 1566 * 1567 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1568 * eviction fence. 1569 * 1570 * The following sequence ensures race-free validation and GPU mapping: 1571 * 1572 * 1. Reserve page table (and SVM BO if range is in VRAM) 1573 * 2. hmm_range_fault to get page addresses (if system memory) 1574 * 3. DMA-map pages (if system memory) 1575 * 4-a. Take notifier lock 1576 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1577 * 4-c. Check that the range was not split or otherwise invalidated 1578 * 4-d. Update GPU page table 1579 * 4.e. Release notifier lock 1580 * 5. Release page table (and SVM BO) reservation 1581 */ 1582 static int svm_range_validate_and_map(struct mm_struct *mm, 1583 struct svm_range *prange, int32_t gpuidx, 1584 bool intr, bool wait, bool flush_tlb) 1585 { 1586 struct svm_validate_context *ctx; 1587 unsigned long start, end, addr; 1588 struct kfd_process *p; 1589 void *owner; 1590 int32_t idx; 1591 int r = 0; 1592 1593 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL); 1594 if (!ctx) 1595 return -ENOMEM; 1596 ctx->process = container_of(prange->svms, struct kfd_process, svms); 1597 ctx->prange = prange; 1598 ctx->intr = intr; 1599 1600 if (gpuidx < MAX_GPU_INSTANCE) { 1601 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE); 1602 bitmap_set(ctx->bitmap, gpuidx, 1); 1603 } else if (ctx->process->xnack_enabled) { 1604 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1605 1606 /* If prefetch range to GPU, or GPU retry fault migrate range to 1607 * GPU, which has ACCESS attribute to the range, create mapping 1608 * on that GPU. 1609 */ 1610 if (prange->actual_loc) { 1611 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process, 1612 prange->actual_loc); 1613 if (gpuidx < 0) { 1614 WARN_ONCE(1, "failed get device by id 0x%x\n", 1615 prange->actual_loc); 1616 r = -EINVAL; 1617 goto free_ctx; 1618 } 1619 if (test_bit(gpuidx, prange->bitmap_access)) 1620 bitmap_set(ctx->bitmap, gpuidx, 1); 1621 } 1622 } else { 1623 bitmap_or(ctx->bitmap, prange->bitmap_access, 1624 prange->bitmap_aip, MAX_GPU_INSTANCE); 1625 } 1626 1627 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1628 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1629 if (!prange->mapped_to_gpu || 1630 bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1631 r = 0; 1632 goto free_ctx; 1633 } 1634 } 1635 1636 if (prange->actual_loc && !prange->ttm_res) { 1637 /* This should never happen. actual_loc gets set by 1638 * svm_migrate_ram_to_vram after allocating a BO. 1639 */ 1640 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1641 r = -EINVAL; 1642 goto free_ctx; 1643 } 1644 1645 svm_range_reserve_bos(ctx, intr); 1646 1647 p = container_of(prange->svms, struct kfd_process, svms); 1648 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap, 1649 MAX_GPU_INSTANCE)); 1650 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) { 1651 if (kfd_svm_page_owner(p, idx) != owner) { 1652 owner = NULL; 1653 break; 1654 } 1655 } 1656 1657 start = prange->start << PAGE_SHIFT; 1658 end = (prange->last + 1) << PAGE_SHIFT; 1659 for (addr = start; addr < end && !r; ) { 1660 struct hmm_range *hmm_range; 1661 struct vm_area_struct *vma; 1662 unsigned long next; 1663 unsigned long offset; 1664 unsigned long npages; 1665 bool readonly; 1666 1667 vma = vma_lookup(mm, addr); 1668 if (!vma) { 1669 r = -EFAULT; 1670 goto unreserve_out; 1671 } 1672 readonly = !(vma->vm_flags & VM_WRITE); 1673 1674 next = min(vma->vm_end, end); 1675 npages = (next - addr) >> PAGE_SHIFT; 1676 WRITE_ONCE(p->svms.faulting_task, current); 1677 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1678 readonly, owner, NULL, 1679 &hmm_range); 1680 WRITE_ONCE(p->svms.faulting_task, NULL); 1681 if (r) { 1682 pr_debug("failed %d to get svm range pages\n", r); 1683 goto unreserve_out; 1684 } 1685 1686 offset = (addr - start) >> PAGE_SHIFT; 1687 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages, 1688 hmm_range->hmm_pfns); 1689 if (r) { 1690 pr_debug("failed %d to dma map range\n", r); 1691 goto unreserve_out; 1692 } 1693 1694 svm_range_lock(prange); 1695 if (amdgpu_hmm_range_get_pages_done(hmm_range)) { 1696 pr_debug("hmm update the range, need validate again\n"); 1697 r = -EAGAIN; 1698 goto unlock_out; 1699 } 1700 if (!list_empty(&prange->child_list)) { 1701 pr_debug("range split by unmap in parallel, validate again\n"); 1702 r = -EAGAIN; 1703 goto unlock_out; 1704 } 1705 1706 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1707 ctx->bitmap, wait, flush_tlb); 1708 1709 unlock_out: 1710 svm_range_unlock(prange); 1711 1712 addr = next; 1713 } 1714 1715 if (addr == end) { 1716 prange->validated_once = true; 1717 prange->mapped_to_gpu = true; 1718 } 1719 1720 unreserve_out: 1721 svm_range_unreserve_bos(ctx); 1722 1723 prange->is_error_flag = !!r; 1724 if (!r) 1725 prange->validate_timestamp = ktime_get_boottime(); 1726 1727 free_ctx: 1728 kfree(ctx); 1729 1730 return r; 1731 } 1732 1733 /** 1734 * svm_range_list_lock_and_flush_work - flush pending deferred work 1735 * 1736 * @svms: the svm range list 1737 * @mm: the mm structure 1738 * 1739 * Context: Returns with mmap write lock held, pending deferred work flushed 1740 * 1741 */ 1742 void 1743 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1744 struct mm_struct *mm) 1745 { 1746 retry_flush_work: 1747 flush_work(&svms->deferred_list_work); 1748 mmap_write_lock(mm); 1749 1750 if (list_empty(&svms->deferred_range_list)) 1751 return; 1752 mmap_write_unlock(mm); 1753 pr_debug("retry flush\n"); 1754 goto retry_flush_work; 1755 } 1756 1757 static void svm_range_restore_work(struct work_struct *work) 1758 { 1759 struct delayed_work *dwork = to_delayed_work(work); 1760 struct amdkfd_process_info *process_info; 1761 struct svm_range_list *svms; 1762 struct svm_range *prange; 1763 struct kfd_process *p; 1764 struct mm_struct *mm; 1765 int evicted_ranges; 1766 int invalid; 1767 int r; 1768 1769 svms = container_of(dwork, struct svm_range_list, restore_work); 1770 evicted_ranges = atomic_read(&svms->evicted_ranges); 1771 if (!evicted_ranges) 1772 return; 1773 1774 pr_debug("restore svm ranges\n"); 1775 1776 p = container_of(svms, struct kfd_process, svms); 1777 process_info = p->kgd_process_info; 1778 1779 /* Keep mm reference when svm_range_validate_and_map ranges */ 1780 mm = get_task_mm(p->lead_thread); 1781 if (!mm) { 1782 pr_debug("svms 0x%p process mm gone\n", svms); 1783 return; 1784 } 1785 1786 mutex_lock(&process_info->lock); 1787 svm_range_list_lock_and_flush_work(svms, mm); 1788 mutex_lock(&svms->lock); 1789 1790 evicted_ranges = atomic_read(&svms->evicted_ranges); 1791 1792 list_for_each_entry(prange, &svms->list, list) { 1793 invalid = atomic_read(&prange->invalid); 1794 if (!invalid) 1795 continue; 1796 1797 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1798 prange->svms, prange, prange->start, prange->last, 1799 invalid); 1800 1801 /* 1802 * If range is migrating, wait for migration is done. 1803 */ 1804 mutex_lock(&prange->migrate_mutex); 1805 1806 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 1807 false, true, false); 1808 if (r) 1809 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1810 prange->start); 1811 1812 mutex_unlock(&prange->migrate_mutex); 1813 if (r) 1814 goto out_reschedule; 1815 1816 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1817 goto out_reschedule; 1818 } 1819 1820 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1821 evicted_ranges) 1822 goto out_reschedule; 1823 1824 evicted_ranges = 0; 1825 1826 r = kgd2kfd_resume_mm(mm); 1827 if (r) { 1828 /* No recovery from this failure. Probably the CP is 1829 * hanging. No point trying again. 1830 */ 1831 pr_debug("failed %d to resume KFD\n", r); 1832 } 1833 1834 pr_debug("restore svm ranges successfully\n"); 1835 1836 out_reschedule: 1837 mutex_unlock(&svms->lock); 1838 mmap_write_unlock(mm); 1839 mutex_unlock(&process_info->lock); 1840 1841 /* If validation failed, reschedule another attempt */ 1842 if (evicted_ranges) { 1843 pr_debug("reschedule to restore svm range\n"); 1844 schedule_delayed_work(&svms->restore_work, 1845 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1846 1847 kfd_smi_event_queue_restore_rescheduled(mm); 1848 } 1849 mmput(mm); 1850 } 1851 1852 /** 1853 * svm_range_evict - evict svm range 1854 * @prange: svm range structure 1855 * @mm: current process mm_struct 1856 * @start: starting process queue number 1857 * @last: last process queue number 1858 * @event: mmu notifier event when range is evicted or migrated 1859 * 1860 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1861 * return to let CPU evict the buffer and proceed CPU pagetable update. 1862 * 1863 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1864 * If invalidation happens while restore work is running, restore work will 1865 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1866 * the queues. 1867 */ 1868 static int 1869 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1870 unsigned long start, unsigned long last, 1871 enum mmu_notifier_event event) 1872 { 1873 struct svm_range_list *svms = prange->svms; 1874 struct svm_range *pchild; 1875 struct kfd_process *p; 1876 int r = 0; 1877 1878 p = container_of(svms, struct kfd_process, svms); 1879 1880 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1881 svms, prange->start, prange->last, start, last); 1882 1883 if (!p->xnack_enabled || 1884 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 1885 int evicted_ranges; 1886 bool mapped = prange->mapped_to_gpu; 1887 1888 list_for_each_entry(pchild, &prange->child_list, child_list) { 1889 if (!pchild->mapped_to_gpu) 1890 continue; 1891 mapped = true; 1892 mutex_lock_nested(&pchild->lock, 1); 1893 if (pchild->start <= last && pchild->last >= start) { 1894 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 1895 pchild->start, pchild->last); 1896 atomic_inc(&pchild->invalid); 1897 } 1898 mutex_unlock(&pchild->lock); 1899 } 1900 1901 if (!mapped) 1902 return r; 1903 1904 if (prange->start <= last && prange->last >= start) 1905 atomic_inc(&prange->invalid); 1906 1907 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 1908 if (evicted_ranges != 1) 1909 return r; 1910 1911 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 1912 prange->svms, prange->start, prange->last); 1913 1914 /* First eviction, stop the queues */ 1915 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 1916 if (r) 1917 pr_debug("failed to quiesce KFD\n"); 1918 1919 pr_debug("schedule to restore svm %p ranges\n", svms); 1920 schedule_delayed_work(&svms->restore_work, 1921 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1922 } else { 1923 unsigned long s, l; 1924 uint32_t trigger; 1925 1926 if (event == MMU_NOTIFY_MIGRATE) 1927 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 1928 else 1929 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 1930 1931 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 1932 prange->svms, start, last); 1933 list_for_each_entry(pchild, &prange->child_list, child_list) { 1934 mutex_lock_nested(&pchild->lock, 1); 1935 s = max(start, pchild->start); 1936 l = min(last, pchild->last); 1937 if (l >= s) 1938 svm_range_unmap_from_gpus(pchild, s, l, trigger); 1939 mutex_unlock(&pchild->lock); 1940 } 1941 s = max(start, prange->start); 1942 l = min(last, prange->last); 1943 if (l >= s) 1944 svm_range_unmap_from_gpus(prange, s, l, trigger); 1945 } 1946 1947 return r; 1948 } 1949 1950 static struct svm_range *svm_range_clone(struct svm_range *old) 1951 { 1952 struct svm_range *new; 1953 1954 new = svm_range_new(old->svms, old->start, old->last, false); 1955 if (!new) 1956 return NULL; 1957 if (svm_range_copy_dma_addrs(new, old)) { 1958 svm_range_free(new, false); 1959 return NULL; 1960 } 1961 if (old->svm_bo) { 1962 new->ttm_res = old->ttm_res; 1963 new->offset = old->offset; 1964 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1965 spin_lock(&new->svm_bo->list_lock); 1966 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1967 spin_unlock(&new->svm_bo->list_lock); 1968 } 1969 new->flags = old->flags; 1970 new->preferred_loc = old->preferred_loc; 1971 new->prefetch_loc = old->prefetch_loc; 1972 new->actual_loc = old->actual_loc; 1973 new->granularity = old->granularity; 1974 new->mapped_to_gpu = old->mapped_to_gpu; 1975 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1976 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1977 1978 return new; 1979 } 1980 1981 void svm_range_set_max_pages(struct amdgpu_device *adev) 1982 { 1983 uint64_t max_pages; 1984 uint64_t pages, _pages; 1985 uint64_t min_pages = 0; 1986 int i, id; 1987 1988 for (i = 0; i < adev->kfd.dev->num_nodes; i++) { 1989 if (adev->kfd.dev->nodes[i]->xcp) 1990 id = adev->kfd.dev->nodes[i]->xcp->id; 1991 else 1992 id = -1; 1993 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17; 1994 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 1995 pages = rounddown_pow_of_two(pages); 1996 min_pages = min_not_zero(min_pages, pages); 1997 } 1998 1999 do { 2000 max_pages = READ_ONCE(max_svm_range_pages); 2001 _pages = min_not_zero(max_pages, min_pages); 2002 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 2003 } 2004 2005 static int 2006 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 2007 uint64_t max_pages, struct list_head *insert_list, 2008 struct list_head *update_list) 2009 { 2010 struct svm_range *prange; 2011 uint64_t l; 2012 2013 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 2014 max_pages, start, last); 2015 2016 while (last >= start) { 2017 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 2018 2019 prange = svm_range_new(svms, start, l, true); 2020 if (!prange) 2021 return -ENOMEM; 2022 list_add(&prange->list, insert_list); 2023 list_add(&prange->update_list, update_list); 2024 2025 start = l + 1; 2026 } 2027 return 0; 2028 } 2029 2030 /** 2031 * svm_range_add - add svm range and handle overlap 2032 * @p: the range add to this process svms 2033 * @start: page size aligned 2034 * @size: page size aligned 2035 * @nattr: number of attributes 2036 * @attrs: array of attributes 2037 * @update_list: output, the ranges need validate and update GPU mapping 2038 * @insert_list: output, the ranges need insert to svms 2039 * @remove_list: output, the ranges are replaced and need remove from svms 2040 * 2041 * Check if the virtual address range has overlap with any existing ranges, 2042 * split partly overlapping ranges and add new ranges in the gaps. All changes 2043 * should be applied to the range_list and interval tree transactionally. If 2044 * any range split or allocation fails, the entire update fails. Therefore any 2045 * existing overlapping svm_ranges are cloned and the original svm_ranges left 2046 * unchanged. 2047 * 2048 * If the transaction succeeds, the caller can update and insert clones and 2049 * new ranges, then free the originals. 2050 * 2051 * Otherwise the caller can free the clones and new ranges, while the old 2052 * svm_ranges remain unchanged. 2053 * 2054 * Context: Process context, caller must hold svms->lock 2055 * 2056 * Return: 2057 * 0 - OK, otherwise error code 2058 */ 2059 static int 2060 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2061 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2062 struct list_head *update_list, struct list_head *insert_list, 2063 struct list_head *remove_list) 2064 { 2065 unsigned long last = start + size - 1UL; 2066 struct svm_range_list *svms = &p->svms; 2067 struct interval_tree_node *node; 2068 struct svm_range *prange; 2069 struct svm_range *tmp; 2070 struct list_head new_list; 2071 int r = 0; 2072 2073 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2074 2075 INIT_LIST_HEAD(update_list); 2076 INIT_LIST_HEAD(insert_list); 2077 INIT_LIST_HEAD(remove_list); 2078 INIT_LIST_HEAD(&new_list); 2079 2080 node = interval_tree_iter_first(&svms->objects, start, last); 2081 while (node) { 2082 struct interval_tree_node *next; 2083 unsigned long next_start; 2084 2085 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2086 node->last); 2087 2088 prange = container_of(node, struct svm_range, it_node); 2089 next = interval_tree_iter_next(node, start, last); 2090 next_start = min(node->last, last) + 1; 2091 2092 if (svm_range_is_same_attrs(p, prange, nattr, attrs)) { 2093 /* nothing to do */ 2094 } else if (node->start < start || node->last > last) { 2095 /* node intersects the update range and its attributes 2096 * will change. Clone and split it, apply updates only 2097 * to the overlapping part 2098 */ 2099 struct svm_range *old = prange; 2100 2101 prange = svm_range_clone(old); 2102 if (!prange) { 2103 r = -ENOMEM; 2104 goto out; 2105 } 2106 2107 list_add(&old->update_list, remove_list); 2108 list_add(&prange->list, insert_list); 2109 list_add(&prange->update_list, update_list); 2110 2111 if (node->start < start) { 2112 pr_debug("change old range start\n"); 2113 r = svm_range_split_head(prange, start, 2114 insert_list); 2115 if (r) 2116 goto out; 2117 } 2118 if (node->last > last) { 2119 pr_debug("change old range last\n"); 2120 r = svm_range_split_tail(prange, last, 2121 insert_list); 2122 if (r) 2123 goto out; 2124 } 2125 } else { 2126 /* The node is contained within start..last, 2127 * just update it 2128 */ 2129 list_add(&prange->update_list, update_list); 2130 } 2131 2132 /* insert a new node if needed */ 2133 if (node->start > start) { 2134 r = svm_range_split_new(svms, start, node->start - 1, 2135 READ_ONCE(max_svm_range_pages), 2136 &new_list, update_list); 2137 if (r) 2138 goto out; 2139 } 2140 2141 node = next; 2142 start = next_start; 2143 } 2144 2145 /* add a final range at the end if needed */ 2146 if (start <= last) 2147 r = svm_range_split_new(svms, start, last, 2148 READ_ONCE(max_svm_range_pages), 2149 &new_list, update_list); 2150 2151 out: 2152 if (r) { 2153 list_for_each_entry_safe(prange, tmp, insert_list, list) 2154 svm_range_free(prange, false); 2155 list_for_each_entry_safe(prange, tmp, &new_list, list) 2156 svm_range_free(prange, true); 2157 } else { 2158 list_splice(&new_list, insert_list); 2159 } 2160 2161 return r; 2162 } 2163 2164 static void 2165 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2166 struct svm_range *prange) 2167 { 2168 unsigned long start; 2169 unsigned long last; 2170 2171 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2172 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2173 2174 if (prange->start == start && prange->last == last) 2175 return; 2176 2177 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2178 prange->svms, prange, start, last, prange->start, 2179 prange->last); 2180 2181 if (start != 0 && last != 0) { 2182 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2183 svm_range_remove_notifier(prange); 2184 } 2185 prange->it_node.start = prange->start; 2186 prange->it_node.last = prange->last; 2187 2188 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2189 svm_range_add_notifier_locked(mm, prange); 2190 } 2191 2192 static void 2193 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2194 struct mm_struct *mm) 2195 { 2196 switch (prange->work_item.op) { 2197 case SVM_OP_NULL: 2198 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2199 svms, prange, prange->start, prange->last); 2200 break; 2201 case SVM_OP_UNMAP_RANGE: 2202 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2203 svms, prange, prange->start, prange->last); 2204 svm_range_unlink(prange); 2205 svm_range_remove_notifier(prange); 2206 svm_range_free(prange, true); 2207 break; 2208 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2209 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2210 svms, prange, prange->start, prange->last); 2211 svm_range_update_notifier_and_interval_tree(mm, prange); 2212 break; 2213 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2214 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2215 svms, prange, prange->start, prange->last); 2216 svm_range_update_notifier_and_interval_tree(mm, prange); 2217 /* TODO: implement deferred validation and mapping */ 2218 break; 2219 case SVM_OP_ADD_RANGE: 2220 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2221 prange->start, prange->last); 2222 svm_range_add_to_svms(prange); 2223 svm_range_add_notifier_locked(mm, prange); 2224 break; 2225 case SVM_OP_ADD_RANGE_AND_MAP: 2226 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2227 prange, prange->start, prange->last); 2228 svm_range_add_to_svms(prange); 2229 svm_range_add_notifier_locked(mm, prange); 2230 /* TODO: implement deferred validation and mapping */ 2231 break; 2232 default: 2233 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2234 prange->work_item.op); 2235 } 2236 } 2237 2238 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2239 { 2240 struct kfd_process_device *pdd; 2241 struct kfd_process *p; 2242 int drain; 2243 uint32_t i; 2244 2245 p = container_of(svms, struct kfd_process, svms); 2246 2247 restart: 2248 drain = atomic_read(&svms->drain_pagefaults); 2249 if (!drain) 2250 return; 2251 2252 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2253 pdd = p->pdds[i]; 2254 if (!pdd) 2255 continue; 2256 2257 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2258 2259 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2260 pdd->dev->adev->irq.retry_cam_enabled ? 2261 &pdd->dev->adev->irq.ih : 2262 &pdd->dev->adev->irq.ih1); 2263 2264 if (pdd->dev->adev->irq.retry_cam_enabled) 2265 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2266 &pdd->dev->adev->irq.ih_soft); 2267 2268 2269 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2270 } 2271 if (atomic_cmpxchg(&svms->drain_pagefaults, drain, 0) != drain) 2272 goto restart; 2273 } 2274 2275 static void svm_range_deferred_list_work(struct work_struct *work) 2276 { 2277 struct svm_range_list *svms; 2278 struct svm_range *prange; 2279 struct mm_struct *mm; 2280 2281 svms = container_of(work, struct svm_range_list, deferred_list_work); 2282 pr_debug("enter svms 0x%p\n", svms); 2283 2284 spin_lock(&svms->deferred_list_lock); 2285 while (!list_empty(&svms->deferred_range_list)) { 2286 prange = list_first_entry(&svms->deferred_range_list, 2287 struct svm_range, deferred_list); 2288 spin_unlock(&svms->deferred_list_lock); 2289 2290 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2291 prange->start, prange->last, prange->work_item.op); 2292 2293 mm = prange->work_item.mm; 2294 retry: 2295 mmap_write_lock(mm); 2296 2297 /* Checking for the need to drain retry faults must be inside 2298 * mmap write lock to serialize with munmap notifiers. 2299 */ 2300 if (unlikely(atomic_read(&svms->drain_pagefaults))) { 2301 mmap_write_unlock(mm); 2302 svm_range_drain_retry_fault(svms); 2303 goto retry; 2304 } 2305 2306 /* Remove from deferred_list must be inside mmap write lock, for 2307 * two race cases: 2308 * 1. unmap_from_cpu may change work_item.op and add the range 2309 * to deferred_list again, cause use after free bug. 2310 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2311 * lock and continue because deferred_list is empty, but 2312 * deferred_list work is actually waiting for mmap lock. 2313 */ 2314 spin_lock(&svms->deferred_list_lock); 2315 list_del_init(&prange->deferred_list); 2316 spin_unlock(&svms->deferred_list_lock); 2317 2318 mutex_lock(&svms->lock); 2319 mutex_lock(&prange->migrate_mutex); 2320 while (!list_empty(&prange->child_list)) { 2321 struct svm_range *pchild; 2322 2323 pchild = list_first_entry(&prange->child_list, 2324 struct svm_range, child_list); 2325 pr_debug("child prange 0x%p op %d\n", pchild, 2326 pchild->work_item.op); 2327 list_del_init(&pchild->child_list); 2328 svm_range_handle_list_op(svms, pchild, mm); 2329 } 2330 mutex_unlock(&prange->migrate_mutex); 2331 2332 svm_range_handle_list_op(svms, prange, mm); 2333 mutex_unlock(&svms->lock); 2334 mmap_write_unlock(mm); 2335 2336 /* Pairs with mmget in svm_range_add_list_work */ 2337 mmput(mm); 2338 2339 spin_lock(&svms->deferred_list_lock); 2340 } 2341 spin_unlock(&svms->deferred_list_lock); 2342 pr_debug("exit svms 0x%p\n", svms); 2343 } 2344 2345 void 2346 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2347 struct mm_struct *mm, enum svm_work_list_ops op) 2348 { 2349 spin_lock(&svms->deferred_list_lock); 2350 /* if prange is on the deferred list */ 2351 if (!list_empty(&prange->deferred_list)) { 2352 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2353 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2354 if (op != SVM_OP_NULL && 2355 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2356 prange->work_item.op = op; 2357 } else { 2358 prange->work_item.op = op; 2359 2360 /* Pairs with mmput in deferred_list_work */ 2361 mmget(mm); 2362 prange->work_item.mm = mm; 2363 list_add_tail(&prange->deferred_list, 2364 &prange->svms->deferred_range_list); 2365 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2366 prange, prange->start, prange->last, op); 2367 } 2368 spin_unlock(&svms->deferred_list_lock); 2369 } 2370 2371 void schedule_deferred_list_work(struct svm_range_list *svms) 2372 { 2373 spin_lock(&svms->deferred_list_lock); 2374 if (!list_empty(&svms->deferred_range_list)) 2375 schedule_work(&svms->deferred_list_work); 2376 spin_unlock(&svms->deferred_list_lock); 2377 } 2378 2379 static void 2380 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent, 2381 struct svm_range *prange, unsigned long start, 2382 unsigned long last) 2383 { 2384 struct svm_range *head; 2385 struct svm_range *tail; 2386 2387 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2388 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2389 prange->start, prange->last); 2390 return; 2391 } 2392 if (start > prange->last || last < prange->start) 2393 return; 2394 2395 head = tail = prange; 2396 if (start > prange->start) 2397 svm_range_split(prange, prange->start, start - 1, &tail); 2398 if (last < tail->last) 2399 svm_range_split(tail, last + 1, tail->last, &head); 2400 2401 if (head != prange && tail != prange) { 2402 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2403 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 2404 } else if (tail != prange) { 2405 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE); 2406 } else if (head != prange) { 2407 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2408 } else if (parent != prange) { 2409 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2410 } 2411 } 2412 2413 static void 2414 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2415 unsigned long start, unsigned long last) 2416 { 2417 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2418 struct svm_range_list *svms; 2419 struct svm_range *pchild; 2420 struct kfd_process *p; 2421 unsigned long s, l; 2422 bool unmap_parent; 2423 2424 p = kfd_lookup_process_by_mm(mm); 2425 if (!p) 2426 return; 2427 svms = &p->svms; 2428 2429 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2430 prange, prange->start, prange->last, start, last); 2431 2432 /* Make sure pending page faults are drained in the deferred worker 2433 * before the range is freed to avoid straggler interrupts on 2434 * unmapped memory causing "phantom faults". 2435 */ 2436 atomic_inc(&svms->drain_pagefaults); 2437 2438 unmap_parent = start <= prange->start && last >= prange->last; 2439 2440 list_for_each_entry(pchild, &prange->child_list, child_list) { 2441 mutex_lock_nested(&pchild->lock, 1); 2442 s = max(start, pchild->start); 2443 l = min(last, pchild->last); 2444 if (l >= s) 2445 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2446 svm_range_unmap_split(mm, prange, pchild, start, last); 2447 mutex_unlock(&pchild->lock); 2448 } 2449 s = max(start, prange->start); 2450 l = min(last, prange->last); 2451 if (l >= s) 2452 svm_range_unmap_from_gpus(prange, s, l, trigger); 2453 svm_range_unmap_split(mm, prange, prange, start, last); 2454 2455 if (unmap_parent) 2456 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2457 else 2458 svm_range_add_list_work(svms, prange, mm, 2459 SVM_OP_UPDATE_RANGE_NOTIFIER); 2460 schedule_deferred_list_work(svms); 2461 2462 kfd_unref_process(p); 2463 } 2464 2465 /** 2466 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2467 * @mni: mmu_interval_notifier struct 2468 * @range: mmu_notifier_range struct 2469 * @cur_seq: value to pass to mmu_interval_set_seq() 2470 * 2471 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2472 * is from migration, or CPU page invalidation callback. 2473 * 2474 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2475 * work thread, and split prange if only part of prange is unmapped. 2476 * 2477 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2478 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2479 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2480 * update GPU mapping to recover. 2481 * 2482 * Context: mmap lock, notifier_invalidate_start lock are held 2483 * for invalidate event, prange lock is held if this is from migration 2484 */ 2485 static bool 2486 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2487 const struct mmu_notifier_range *range, 2488 unsigned long cur_seq) 2489 { 2490 struct svm_range *prange; 2491 unsigned long start; 2492 unsigned long last; 2493 2494 if (range->event == MMU_NOTIFY_RELEASE) 2495 return true; 2496 if (!mmget_not_zero(mni->mm)) 2497 return true; 2498 2499 start = mni->interval_tree.start; 2500 last = mni->interval_tree.last; 2501 start = max(start, range->start) >> PAGE_SHIFT; 2502 last = min(last, range->end - 1) >> PAGE_SHIFT; 2503 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2504 start, last, range->start >> PAGE_SHIFT, 2505 (range->end - 1) >> PAGE_SHIFT, 2506 mni->interval_tree.start >> PAGE_SHIFT, 2507 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2508 2509 prange = container_of(mni, struct svm_range, notifier); 2510 2511 svm_range_lock(prange); 2512 mmu_interval_set_seq(mni, cur_seq); 2513 2514 switch (range->event) { 2515 case MMU_NOTIFY_UNMAP: 2516 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2517 break; 2518 default: 2519 svm_range_evict(prange, mni->mm, start, last, range->event); 2520 break; 2521 } 2522 2523 svm_range_unlock(prange); 2524 mmput(mni->mm); 2525 2526 return true; 2527 } 2528 2529 /** 2530 * svm_range_from_addr - find svm range from fault address 2531 * @svms: svm range list header 2532 * @addr: address to search range interval tree, in pages 2533 * @parent: parent range if range is on child list 2534 * 2535 * Context: The caller must hold svms->lock 2536 * 2537 * Return: the svm_range found or NULL 2538 */ 2539 struct svm_range * 2540 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2541 struct svm_range **parent) 2542 { 2543 struct interval_tree_node *node; 2544 struct svm_range *prange; 2545 struct svm_range *pchild; 2546 2547 node = interval_tree_iter_first(&svms->objects, addr, addr); 2548 if (!node) 2549 return NULL; 2550 2551 prange = container_of(node, struct svm_range, it_node); 2552 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2553 addr, prange->start, prange->last, node->start, node->last); 2554 2555 if (addr >= prange->start && addr <= prange->last) { 2556 if (parent) 2557 *parent = prange; 2558 return prange; 2559 } 2560 list_for_each_entry(pchild, &prange->child_list, child_list) 2561 if (addr >= pchild->start && addr <= pchild->last) { 2562 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2563 addr, pchild->start, pchild->last); 2564 if (parent) 2565 *parent = prange; 2566 return pchild; 2567 } 2568 2569 return NULL; 2570 } 2571 2572 /* svm_range_best_restore_location - decide the best fault restore location 2573 * @prange: svm range structure 2574 * @adev: the GPU on which vm fault happened 2575 * 2576 * This is only called when xnack is on, to decide the best location to restore 2577 * the range mapping after GPU vm fault. Caller uses the best location to do 2578 * migration if actual loc is not best location, then update GPU page table 2579 * mapping to the best location. 2580 * 2581 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2582 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2583 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2584 * if range actual loc is cpu, best_loc is cpu 2585 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2586 * range actual loc. 2587 * Otherwise, GPU no access, best_loc is -1. 2588 * 2589 * Return: 2590 * -1 means vm fault GPU no access 2591 * 0 for CPU or GPU id 2592 */ 2593 static int32_t 2594 svm_range_best_restore_location(struct svm_range *prange, 2595 struct kfd_node *node, 2596 int32_t *gpuidx) 2597 { 2598 struct kfd_node *bo_node, *preferred_node; 2599 struct kfd_process *p; 2600 uint32_t gpuid; 2601 int r; 2602 2603 p = container_of(prange->svms, struct kfd_process, svms); 2604 2605 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2606 if (r < 0) { 2607 pr_debug("failed to get gpuid from kgd\n"); 2608 return -1; 2609 } 2610 2611 if (node->adev->gmc.is_app_apu) 2612 return 0; 2613 2614 if (prange->preferred_loc == gpuid || 2615 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2616 return prange->preferred_loc; 2617 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2618 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2619 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2620 return prange->preferred_loc; 2621 /* fall through */ 2622 } 2623 2624 if (test_bit(*gpuidx, prange->bitmap_access)) 2625 return gpuid; 2626 2627 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2628 if (!prange->actual_loc) 2629 return 0; 2630 2631 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2632 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2633 return prange->actual_loc; 2634 else 2635 return 0; 2636 } 2637 2638 return -1; 2639 } 2640 2641 static int 2642 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2643 unsigned long *start, unsigned long *last, 2644 bool *is_heap_stack) 2645 { 2646 struct vm_area_struct *vma; 2647 struct interval_tree_node *node; 2648 unsigned long start_limit, end_limit; 2649 2650 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2651 if (!vma) { 2652 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2653 return -EFAULT; 2654 } 2655 2656 *is_heap_stack = (vma->vm_start <= vma->vm_mm->brk && 2657 vma->vm_end >= vma->vm_mm->start_brk) || 2658 (vma->vm_start <= vma->vm_mm->start_stack && 2659 vma->vm_end >= vma->vm_mm->start_stack); 2660 2661 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2662 (unsigned long)ALIGN_DOWN(addr, 2UL << 8)); 2663 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2664 (unsigned long)ALIGN(addr + 1, 2UL << 8)); 2665 /* First range that starts after the fault address */ 2666 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2667 if (node) { 2668 end_limit = min(end_limit, node->start); 2669 /* Last range that ends before the fault address */ 2670 node = container_of(rb_prev(&node->rb), 2671 struct interval_tree_node, rb); 2672 } else { 2673 /* Last range must end before addr because 2674 * there was no range after addr 2675 */ 2676 node = container_of(rb_last(&p->svms.objects.rb_root), 2677 struct interval_tree_node, rb); 2678 } 2679 if (node) { 2680 if (node->last >= addr) { 2681 WARN(1, "Overlap with prev node and page fault addr\n"); 2682 return -EFAULT; 2683 } 2684 start_limit = max(start_limit, node->last + 1); 2685 } 2686 2687 *start = start_limit; 2688 *last = end_limit - 1; 2689 2690 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2691 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2692 *start, *last, *is_heap_stack); 2693 2694 return 0; 2695 } 2696 2697 static int 2698 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2699 uint64_t *bo_s, uint64_t *bo_l) 2700 { 2701 struct amdgpu_bo_va_mapping *mapping; 2702 struct interval_tree_node *node; 2703 struct amdgpu_bo *bo = NULL; 2704 unsigned long userptr; 2705 uint32_t i; 2706 int r; 2707 2708 for (i = 0; i < p->n_pdds; i++) { 2709 struct amdgpu_vm *vm; 2710 2711 if (!p->pdds[i]->drm_priv) 2712 continue; 2713 2714 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2715 r = amdgpu_bo_reserve(vm->root.bo, false); 2716 if (r) 2717 return r; 2718 2719 /* Check userptr by searching entire vm->va interval tree */ 2720 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2721 while (node) { 2722 mapping = container_of((struct rb_node *)node, 2723 struct amdgpu_bo_va_mapping, rb); 2724 bo = mapping->bo_va->base.bo; 2725 2726 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2727 start << PAGE_SHIFT, 2728 last << PAGE_SHIFT, 2729 &userptr)) { 2730 node = interval_tree_iter_next(node, 0, ~0ULL); 2731 continue; 2732 } 2733 2734 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2735 start, last); 2736 if (bo_s && bo_l) { 2737 *bo_s = userptr >> PAGE_SHIFT; 2738 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2739 } 2740 amdgpu_bo_unreserve(vm->root.bo); 2741 return -EADDRINUSE; 2742 } 2743 amdgpu_bo_unreserve(vm->root.bo); 2744 } 2745 return 0; 2746 } 2747 2748 static struct 2749 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2750 struct kfd_process *p, 2751 struct mm_struct *mm, 2752 int64_t addr) 2753 { 2754 struct svm_range *prange = NULL; 2755 unsigned long start, last; 2756 uint32_t gpuid, gpuidx; 2757 bool is_heap_stack; 2758 uint64_t bo_s = 0; 2759 uint64_t bo_l = 0; 2760 int r; 2761 2762 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2763 &is_heap_stack)) 2764 return NULL; 2765 2766 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2767 if (r != -EADDRINUSE) 2768 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2769 2770 if (r == -EADDRINUSE) { 2771 if (addr >= bo_s && addr <= bo_l) 2772 return NULL; 2773 2774 /* Create one page svm range if 2MB range overlapping */ 2775 start = addr; 2776 last = addr; 2777 } 2778 2779 prange = svm_range_new(&p->svms, start, last, true); 2780 if (!prange) { 2781 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2782 return NULL; 2783 } 2784 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2785 pr_debug("failed to get gpuid from kgd\n"); 2786 svm_range_free(prange, true); 2787 return NULL; 2788 } 2789 2790 if (is_heap_stack) 2791 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2792 2793 svm_range_add_to_svms(prange); 2794 svm_range_add_notifier_locked(mm, prange); 2795 2796 return prange; 2797 } 2798 2799 /* svm_range_skip_recover - decide if prange can be recovered 2800 * @prange: svm range structure 2801 * 2802 * GPU vm retry fault handle skip recover the range for cases: 2803 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2804 * deferred list work will drain the stale fault before free the prange. 2805 * 2. prange is on deferred list to add interval notifier after split, or 2806 * 3. prange is child range, it is split from parent prange, recover later 2807 * after interval notifier is added. 2808 * 2809 * Return: true to skip recover, false to recover 2810 */ 2811 static bool svm_range_skip_recover(struct svm_range *prange) 2812 { 2813 struct svm_range_list *svms = prange->svms; 2814 2815 spin_lock(&svms->deferred_list_lock); 2816 if (list_empty(&prange->deferred_list) && 2817 list_empty(&prange->child_list)) { 2818 spin_unlock(&svms->deferred_list_lock); 2819 return false; 2820 } 2821 spin_unlock(&svms->deferred_list_lock); 2822 2823 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2824 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2825 svms, prange, prange->start, prange->last); 2826 return true; 2827 } 2828 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2829 prange->work_item.op == SVM_OP_ADD_RANGE) { 2830 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2831 svms, prange, prange->start, prange->last); 2832 return true; 2833 } 2834 return false; 2835 } 2836 2837 static void 2838 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 2839 int32_t gpuidx) 2840 { 2841 struct kfd_process_device *pdd; 2842 2843 /* fault is on different page of same range 2844 * or fault is skipped to recover later 2845 * or fault is on invalid virtual address 2846 */ 2847 if (gpuidx == MAX_GPU_INSTANCE) { 2848 uint32_t gpuid; 2849 int r; 2850 2851 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 2852 if (r < 0) 2853 return; 2854 } 2855 2856 /* fault is recovered 2857 * or fault cannot recover because GPU no access on the range 2858 */ 2859 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2860 if (pdd) 2861 WRITE_ONCE(pdd->faults, pdd->faults + 1); 2862 } 2863 2864 static bool 2865 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 2866 { 2867 unsigned long requested = VM_READ; 2868 2869 if (write_fault) 2870 requested |= VM_WRITE; 2871 2872 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 2873 vma->vm_flags); 2874 return (vma->vm_flags & requested) == requested; 2875 } 2876 2877 int 2878 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 2879 uint32_t vmid, uint32_t node_id, 2880 uint64_t addr, bool write_fault) 2881 { 2882 struct mm_struct *mm = NULL; 2883 struct svm_range_list *svms; 2884 struct svm_range *prange; 2885 struct kfd_process *p; 2886 ktime_t timestamp = ktime_get_boottime(); 2887 struct kfd_node *node; 2888 int32_t best_loc; 2889 int32_t gpuidx = MAX_GPU_INSTANCE; 2890 bool write_locked = false; 2891 struct vm_area_struct *vma; 2892 bool migration = false; 2893 int r = 0; 2894 2895 if (!KFD_IS_SVM_API_SUPPORTED(adev)) { 2896 pr_debug("device does not support SVM\n"); 2897 return -EFAULT; 2898 } 2899 2900 p = kfd_lookup_process_by_pasid(pasid); 2901 if (!p) { 2902 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 2903 return 0; 2904 } 2905 svms = &p->svms; 2906 2907 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 2908 2909 if (atomic_read(&svms->drain_pagefaults)) { 2910 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 2911 r = 0; 2912 goto out; 2913 } 2914 2915 if (!p->xnack_enabled) { 2916 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 2917 r = -EFAULT; 2918 goto out; 2919 } 2920 2921 /* p->lead_thread is available as kfd_process_wq_release flush the work 2922 * before releasing task ref. 2923 */ 2924 mm = get_task_mm(p->lead_thread); 2925 if (!mm) { 2926 pr_debug("svms 0x%p failed to get mm\n", svms); 2927 r = 0; 2928 goto out; 2929 } 2930 2931 node = kfd_node_by_irq_ids(adev, node_id, vmid); 2932 if (!node) { 2933 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 2934 vmid); 2935 r = -EFAULT; 2936 goto out; 2937 } 2938 mmap_read_lock(mm); 2939 retry_write_locked: 2940 mutex_lock(&svms->lock); 2941 prange = svm_range_from_addr(svms, addr, NULL); 2942 if (!prange) { 2943 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 2944 svms, addr); 2945 if (!write_locked) { 2946 /* Need the write lock to create new range with MMU notifier. 2947 * Also flush pending deferred work to make sure the interval 2948 * tree is up to date before we add a new range 2949 */ 2950 mutex_unlock(&svms->lock); 2951 mmap_read_unlock(mm); 2952 mmap_write_lock(mm); 2953 write_locked = true; 2954 goto retry_write_locked; 2955 } 2956 prange = svm_range_create_unregistered_range(node, p, mm, addr); 2957 if (!prange) { 2958 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 2959 svms, addr); 2960 mmap_write_downgrade(mm); 2961 r = -EFAULT; 2962 goto out_unlock_svms; 2963 } 2964 } 2965 if (write_locked) 2966 mmap_write_downgrade(mm); 2967 2968 mutex_lock(&prange->migrate_mutex); 2969 2970 if (svm_range_skip_recover(prange)) { 2971 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 2972 r = 0; 2973 goto out_unlock_range; 2974 } 2975 2976 /* skip duplicate vm fault on different pages of same range */ 2977 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 2978 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 2979 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 2980 svms, prange->start, prange->last); 2981 r = 0; 2982 goto out_unlock_range; 2983 } 2984 2985 /* __do_munmap removed VMA, return success as we are handling stale 2986 * retry fault. 2987 */ 2988 vma = vma_lookup(mm, addr << PAGE_SHIFT); 2989 if (!vma) { 2990 pr_debug("address 0x%llx VMA is removed\n", addr); 2991 r = 0; 2992 goto out_unlock_range; 2993 } 2994 2995 if (!svm_fault_allowed(vma, write_fault)) { 2996 pr_debug("fault addr 0x%llx no %s permission\n", addr, 2997 write_fault ? "write" : "read"); 2998 r = -EPERM; 2999 goto out_unlock_range; 3000 } 3001 3002 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 3003 if (best_loc == -1) { 3004 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 3005 svms, prange->start, prange->last); 3006 r = -EACCES; 3007 goto out_unlock_range; 3008 } 3009 3010 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 3011 svms, prange->start, prange->last, best_loc, 3012 prange->actual_loc); 3013 3014 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr, 3015 write_fault, timestamp); 3016 3017 if (prange->actual_loc != best_loc) { 3018 migration = true; 3019 if (best_loc) { 3020 r = svm_migrate_to_vram(prange, best_loc, mm, 3021 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 3022 if (r) { 3023 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 3024 r, addr); 3025 /* Fallback to system memory if migration to 3026 * VRAM failed 3027 */ 3028 if (prange->actual_loc) 3029 r = svm_migrate_vram_to_ram(prange, mm, 3030 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, 3031 NULL); 3032 else 3033 r = 0; 3034 } 3035 } else { 3036 r = svm_migrate_vram_to_ram(prange, mm, 3037 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, 3038 NULL); 3039 } 3040 if (r) { 3041 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 3042 r, svms, prange->start, prange->last); 3043 goto out_unlock_range; 3044 } 3045 } 3046 3047 r = svm_range_validate_and_map(mm, prange, gpuidx, false, false, false); 3048 if (r) 3049 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 3050 r, svms, prange->start, prange->last); 3051 3052 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr, 3053 migration); 3054 3055 out_unlock_range: 3056 mutex_unlock(&prange->migrate_mutex); 3057 out_unlock_svms: 3058 mutex_unlock(&svms->lock); 3059 mmap_read_unlock(mm); 3060 3061 svm_range_count_fault(node, p, gpuidx); 3062 3063 mmput(mm); 3064 out: 3065 kfd_unref_process(p); 3066 3067 if (r == -EAGAIN) { 3068 pr_debug("recover vm fault later\n"); 3069 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3070 r = 0; 3071 } 3072 return r; 3073 } 3074 3075 int 3076 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3077 { 3078 struct svm_range *prange, *pchild; 3079 uint64_t reserved_size = 0; 3080 uint64_t size; 3081 int r = 0; 3082 3083 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3084 3085 mutex_lock(&p->svms.lock); 3086 3087 list_for_each_entry(prange, &p->svms.list, list) { 3088 svm_range_lock(prange); 3089 list_for_each_entry(pchild, &prange->child_list, child_list) { 3090 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3091 if (xnack_enabled) { 3092 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3093 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3094 } else { 3095 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3096 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3097 if (r) 3098 goto out_unlock; 3099 reserved_size += size; 3100 } 3101 } 3102 3103 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3104 if (xnack_enabled) { 3105 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3106 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3107 } else { 3108 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3109 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3110 if (r) 3111 goto out_unlock; 3112 reserved_size += size; 3113 } 3114 out_unlock: 3115 svm_range_unlock(prange); 3116 if (r) 3117 break; 3118 } 3119 3120 if (r) 3121 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3122 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3123 else 3124 /* Change xnack mode must be inside svms lock, to avoid race with 3125 * svm_range_deferred_list_work unreserve memory in parallel. 3126 */ 3127 p->xnack_enabled = xnack_enabled; 3128 3129 mutex_unlock(&p->svms.lock); 3130 return r; 3131 } 3132 3133 void svm_range_list_fini(struct kfd_process *p) 3134 { 3135 struct svm_range *prange; 3136 struct svm_range *next; 3137 3138 pr_debug("pasid 0x%x svms 0x%p\n", p->pasid, &p->svms); 3139 3140 cancel_delayed_work_sync(&p->svms.restore_work); 3141 3142 /* Ensure list work is finished before process is destroyed */ 3143 flush_work(&p->svms.deferred_list_work); 3144 3145 /* 3146 * Ensure no retry fault comes in afterwards, as page fault handler will 3147 * not find kfd process and take mm lock to recover fault. 3148 */ 3149 atomic_inc(&p->svms.drain_pagefaults); 3150 svm_range_drain_retry_fault(&p->svms); 3151 3152 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3153 svm_range_unlink(prange); 3154 svm_range_remove_notifier(prange); 3155 svm_range_free(prange, true); 3156 } 3157 3158 mutex_destroy(&p->svms.lock); 3159 3160 pr_debug("pasid 0x%x svms 0x%p done\n", p->pasid, &p->svms); 3161 } 3162 3163 int svm_range_list_init(struct kfd_process *p) 3164 { 3165 struct svm_range_list *svms = &p->svms; 3166 int i; 3167 3168 svms->objects = RB_ROOT_CACHED; 3169 mutex_init(&svms->lock); 3170 INIT_LIST_HEAD(&svms->list); 3171 atomic_set(&svms->evicted_ranges, 0); 3172 atomic_set(&svms->drain_pagefaults, 0); 3173 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3174 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3175 INIT_LIST_HEAD(&svms->deferred_range_list); 3176 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3177 spin_lock_init(&svms->deferred_list_lock); 3178 3179 for (i = 0; i < p->n_pdds; i++) 3180 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev)) 3181 bitmap_set(svms->bitmap_supported, i, 1); 3182 3183 return 0; 3184 } 3185 3186 /** 3187 * svm_range_check_vm - check if virtual address range mapped already 3188 * @p: current kfd_process 3189 * @start: range start address, in pages 3190 * @last: range last address, in pages 3191 * @bo_s: mapping start address in pages if address range already mapped 3192 * @bo_l: mapping last address in pages if address range already mapped 3193 * 3194 * The purpose is to avoid virtual address ranges already allocated by 3195 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3196 * It looks for each pdd in the kfd_process. 3197 * 3198 * Context: Process context 3199 * 3200 * Return 0 - OK, if the range is not mapped. 3201 * Otherwise error code: 3202 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3203 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3204 * a signal. Release all buffer reservations and return to user-space. 3205 */ 3206 static int 3207 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3208 uint64_t *bo_s, uint64_t *bo_l) 3209 { 3210 struct amdgpu_bo_va_mapping *mapping; 3211 struct interval_tree_node *node; 3212 uint32_t i; 3213 int r; 3214 3215 for (i = 0; i < p->n_pdds; i++) { 3216 struct amdgpu_vm *vm; 3217 3218 if (!p->pdds[i]->drm_priv) 3219 continue; 3220 3221 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3222 r = amdgpu_bo_reserve(vm->root.bo, false); 3223 if (r) 3224 return r; 3225 3226 node = interval_tree_iter_first(&vm->va, start, last); 3227 if (node) { 3228 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3229 start, last); 3230 mapping = container_of((struct rb_node *)node, 3231 struct amdgpu_bo_va_mapping, rb); 3232 if (bo_s && bo_l) { 3233 *bo_s = mapping->start; 3234 *bo_l = mapping->last; 3235 } 3236 amdgpu_bo_unreserve(vm->root.bo); 3237 return -EADDRINUSE; 3238 } 3239 amdgpu_bo_unreserve(vm->root.bo); 3240 } 3241 3242 return 0; 3243 } 3244 3245 /** 3246 * svm_range_is_valid - check if virtual address range is valid 3247 * @p: current kfd_process 3248 * @start: range start address, in pages 3249 * @size: range size, in pages 3250 * 3251 * Valid virtual address range means it belongs to one or more VMAs 3252 * 3253 * Context: Process context 3254 * 3255 * Return: 3256 * 0 - OK, otherwise error code 3257 */ 3258 static int 3259 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3260 { 3261 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3262 struct vm_area_struct *vma; 3263 unsigned long end; 3264 unsigned long start_unchg = start; 3265 3266 start <<= PAGE_SHIFT; 3267 end = start + (size << PAGE_SHIFT); 3268 do { 3269 vma = vma_lookup(p->mm, start); 3270 if (!vma || (vma->vm_flags & device_vma)) 3271 return -EFAULT; 3272 start = min(end, vma->vm_end); 3273 } while (start < end); 3274 3275 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3276 NULL); 3277 } 3278 3279 /** 3280 * svm_range_best_prefetch_location - decide the best prefetch location 3281 * @prange: svm range structure 3282 * 3283 * For xnack off: 3284 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3285 * can be CPU or GPU. 3286 * 3287 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3288 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3289 * the best prefetch location is always CPU, because GPU can not have coherent 3290 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3291 * 3292 * For xnack on: 3293 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3294 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3295 * 3296 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3297 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3298 * prefetch location is always CPU. 3299 * 3300 * Context: Process context 3301 * 3302 * Return: 3303 * 0 for CPU or GPU id 3304 */ 3305 static uint32_t 3306 svm_range_best_prefetch_location(struct svm_range *prange) 3307 { 3308 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3309 uint32_t best_loc = prange->prefetch_loc; 3310 struct kfd_process_device *pdd; 3311 struct kfd_node *bo_node; 3312 struct kfd_process *p; 3313 uint32_t gpuidx; 3314 3315 p = container_of(prange->svms, struct kfd_process, svms); 3316 3317 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3318 goto out; 3319 3320 bo_node = svm_range_get_node_by_id(prange, best_loc); 3321 if (!bo_node) { 3322 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3323 best_loc = 0; 3324 goto out; 3325 } 3326 3327 if (bo_node->adev->gmc.is_app_apu) { 3328 best_loc = 0; 3329 goto out; 3330 } 3331 3332 if (p->xnack_enabled) 3333 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3334 else 3335 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3336 MAX_GPU_INSTANCE); 3337 3338 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3339 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3340 if (!pdd) { 3341 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3342 continue; 3343 } 3344 3345 if (pdd->dev->adev == bo_node->adev) 3346 continue; 3347 3348 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3349 best_loc = 0; 3350 break; 3351 } 3352 } 3353 3354 out: 3355 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3356 p->xnack_enabled, &p->svms, prange->start, prange->last, 3357 best_loc); 3358 3359 return best_loc; 3360 } 3361 3362 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3363 * @mm: current process mm_struct 3364 * @prange: svm range structure 3365 * @migrated: output, true if migration is triggered 3366 * 3367 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3368 * from ram to vram. 3369 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3370 * from vram to ram. 3371 * 3372 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3373 * and restore work: 3374 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3375 * stops all queues, schedule restore work 3376 * 2. svm_range_restore_work wait for migration is done by 3377 * a. svm_range_validate_vram takes prange->migrate_mutex 3378 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3379 * 3. restore work update mappings of GPU, resume all queues. 3380 * 3381 * Context: Process context 3382 * 3383 * Return: 3384 * 0 - OK, otherwise - error code of migration 3385 */ 3386 static int 3387 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3388 bool *migrated) 3389 { 3390 uint32_t best_loc; 3391 int r = 0; 3392 3393 *migrated = false; 3394 best_loc = svm_range_best_prefetch_location(prange); 3395 3396 if (best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3397 best_loc == prange->actual_loc) 3398 return 0; 3399 3400 if (!best_loc) { 3401 r = svm_migrate_vram_to_ram(prange, mm, 3402 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3403 *migrated = !r; 3404 return r; 3405 } 3406 3407 r = svm_migrate_to_vram(prange, best_loc, mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3408 *migrated = !r; 3409 3410 return r; 3411 } 3412 3413 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3414 { 3415 if (!fence) 3416 return -EINVAL; 3417 3418 if (dma_fence_is_signaled(&fence->base)) 3419 return 0; 3420 3421 if (fence->svm_bo) { 3422 WRITE_ONCE(fence->svm_bo->evicting, 1); 3423 schedule_work(&fence->svm_bo->eviction_work); 3424 } 3425 3426 return 0; 3427 } 3428 3429 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3430 { 3431 struct svm_range_bo *svm_bo; 3432 struct mm_struct *mm; 3433 int r = 0; 3434 3435 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3436 if (!svm_bo_ref_unless_zero(svm_bo)) 3437 return; /* svm_bo was freed while eviction was pending */ 3438 3439 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3440 mm = svm_bo->eviction_fence->mm; 3441 } else { 3442 svm_range_bo_unref(svm_bo); 3443 return; 3444 } 3445 3446 mmap_read_lock(mm); 3447 spin_lock(&svm_bo->list_lock); 3448 while (!list_empty(&svm_bo->range_list) && !r) { 3449 struct svm_range *prange = 3450 list_first_entry(&svm_bo->range_list, 3451 struct svm_range, svm_bo_list); 3452 int retries = 3; 3453 3454 list_del_init(&prange->svm_bo_list); 3455 spin_unlock(&svm_bo->list_lock); 3456 3457 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3458 prange->start, prange->last); 3459 3460 mutex_lock(&prange->migrate_mutex); 3461 do { 3462 r = svm_migrate_vram_to_ram(prange, mm, 3463 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3464 } while (!r && prange->actual_loc && --retries); 3465 3466 if (!r && prange->actual_loc) 3467 pr_info_once("Migration failed during eviction"); 3468 3469 if (!prange->actual_loc) { 3470 mutex_lock(&prange->lock); 3471 prange->svm_bo = NULL; 3472 mutex_unlock(&prange->lock); 3473 } 3474 mutex_unlock(&prange->migrate_mutex); 3475 3476 spin_lock(&svm_bo->list_lock); 3477 } 3478 spin_unlock(&svm_bo->list_lock); 3479 mmap_read_unlock(mm); 3480 mmput(mm); 3481 3482 dma_fence_signal(&svm_bo->eviction_fence->base); 3483 3484 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3485 * has been called in svm_migrate_vram_to_ram 3486 */ 3487 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3488 svm_range_bo_unref(svm_bo); 3489 } 3490 3491 static int 3492 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3493 uint64_t start, uint64_t size, uint32_t nattr, 3494 struct kfd_ioctl_svm_attribute *attrs) 3495 { 3496 struct amdkfd_process_info *process_info = p->kgd_process_info; 3497 struct list_head update_list; 3498 struct list_head insert_list; 3499 struct list_head remove_list; 3500 struct svm_range_list *svms; 3501 struct svm_range *prange; 3502 struct svm_range *next; 3503 bool update_mapping = false; 3504 bool flush_tlb; 3505 int r = 0; 3506 3507 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3508 p->pasid, &p->svms, start, start + size - 1, size); 3509 3510 r = svm_range_check_attr(p, nattr, attrs); 3511 if (r) 3512 return r; 3513 3514 svms = &p->svms; 3515 3516 mutex_lock(&process_info->lock); 3517 3518 svm_range_list_lock_and_flush_work(svms, mm); 3519 3520 r = svm_range_is_valid(p, start, size); 3521 if (r) { 3522 pr_debug("invalid range r=%d\n", r); 3523 mmap_write_unlock(mm); 3524 goto out; 3525 } 3526 3527 mutex_lock(&svms->lock); 3528 3529 /* Add new range and split existing ranges as needed */ 3530 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3531 &insert_list, &remove_list); 3532 if (r) { 3533 mutex_unlock(&svms->lock); 3534 mmap_write_unlock(mm); 3535 goto out; 3536 } 3537 /* Apply changes as a transaction */ 3538 list_for_each_entry_safe(prange, next, &insert_list, list) { 3539 svm_range_add_to_svms(prange); 3540 svm_range_add_notifier_locked(mm, prange); 3541 } 3542 list_for_each_entry(prange, &update_list, update_list) { 3543 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3544 /* TODO: unmap ranges from GPU that lost access */ 3545 } 3546 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3547 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3548 prange->svms, prange, prange->start, 3549 prange->last); 3550 svm_range_unlink(prange); 3551 svm_range_remove_notifier(prange); 3552 svm_range_free(prange, false); 3553 } 3554 3555 mmap_write_downgrade(mm); 3556 /* Trigger migrations and revalidate and map to GPUs as needed. If 3557 * this fails we may be left with partially completed actions. There 3558 * is no clean way of rolling back to the previous state in such a 3559 * case because the rollback wouldn't be guaranteed to work either. 3560 */ 3561 list_for_each_entry(prange, &update_list, update_list) { 3562 bool migrated; 3563 3564 mutex_lock(&prange->migrate_mutex); 3565 3566 r = svm_range_trigger_migration(mm, prange, &migrated); 3567 if (r) 3568 goto out_unlock_range; 3569 3570 if (migrated && (!p->xnack_enabled || 3571 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3572 prange->mapped_to_gpu) { 3573 pr_debug("restore_work will update mappings of GPUs\n"); 3574 mutex_unlock(&prange->migrate_mutex); 3575 continue; 3576 } 3577 3578 if (!migrated && !update_mapping) { 3579 mutex_unlock(&prange->migrate_mutex); 3580 continue; 3581 } 3582 3583 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3584 3585 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 3586 true, true, flush_tlb); 3587 if (r) 3588 pr_debug("failed %d to map svm range\n", r); 3589 3590 out_unlock_range: 3591 mutex_unlock(&prange->migrate_mutex); 3592 if (r) 3593 break; 3594 } 3595 3596 dynamic_svm_range_dump(svms); 3597 3598 mutex_unlock(&svms->lock); 3599 mmap_read_unlock(mm); 3600 out: 3601 mutex_unlock(&process_info->lock); 3602 3603 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid, 3604 &p->svms, start, start + size - 1, r); 3605 3606 return r; 3607 } 3608 3609 static int 3610 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3611 uint64_t start, uint64_t size, uint32_t nattr, 3612 struct kfd_ioctl_svm_attribute *attrs) 3613 { 3614 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3615 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3616 bool get_preferred_loc = false; 3617 bool get_prefetch_loc = false; 3618 bool get_granularity = false; 3619 bool get_accessible = false; 3620 bool get_flags = false; 3621 uint64_t last = start + size - 1UL; 3622 uint8_t granularity = 0xff; 3623 struct interval_tree_node *node; 3624 struct svm_range_list *svms; 3625 struct svm_range *prange; 3626 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3627 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3628 uint32_t flags_and = 0xffffffff; 3629 uint32_t flags_or = 0; 3630 int gpuidx; 3631 uint32_t i; 3632 int r = 0; 3633 3634 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3635 start + size - 1, nattr); 3636 3637 /* Flush pending deferred work to avoid racing with deferred actions from 3638 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3639 * can still race with get_attr because we don't hold the mmap lock. But that 3640 * would be a race condition in the application anyway, and undefined 3641 * behaviour is acceptable in that case. 3642 */ 3643 flush_work(&p->svms.deferred_list_work); 3644 3645 mmap_read_lock(mm); 3646 r = svm_range_is_valid(p, start, size); 3647 mmap_read_unlock(mm); 3648 if (r) { 3649 pr_debug("invalid range r=%d\n", r); 3650 return r; 3651 } 3652 3653 for (i = 0; i < nattr; i++) { 3654 switch (attrs[i].type) { 3655 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3656 get_preferred_loc = true; 3657 break; 3658 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3659 get_prefetch_loc = true; 3660 break; 3661 case KFD_IOCTL_SVM_ATTR_ACCESS: 3662 get_accessible = true; 3663 break; 3664 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3665 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3666 get_flags = true; 3667 break; 3668 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3669 get_granularity = true; 3670 break; 3671 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3672 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3673 fallthrough; 3674 default: 3675 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3676 return -EINVAL; 3677 } 3678 } 3679 3680 svms = &p->svms; 3681 3682 mutex_lock(&svms->lock); 3683 3684 node = interval_tree_iter_first(&svms->objects, start, last); 3685 if (!node) { 3686 pr_debug("range attrs not found return default values\n"); 3687 svm_range_set_default_attributes(&location, &prefetch_loc, 3688 &granularity, &flags_and); 3689 flags_or = flags_and; 3690 if (p->xnack_enabled) 3691 bitmap_copy(bitmap_access, svms->bitmap_supported, 3692 MAX_GPU_INSTANCE); 3693 else 3694 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3695 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3696 goto fill_values; 3697 } 3698 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3699 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3700 3701 while (node) { 3702 struct interval_tree_node *next; 3703 3704 prange = container_of(node, struct svm_range, it_node); 3705 next = interval_tree_iter_next(node, start, last); 3706 3707 if (get_preferred_loc) { 3708 if (prange->preferred_loc == 3709 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3710 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3711 location != prange->preferred_loc)) { 3712 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3713 get_preferred_loc = false; 3714 } else { 3715 location = prange->preferred_loc; 3716 } 3717 } 3718 if (get_prefetch_loc) { 3719 if (prange->prefetch_loc == 3720 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3721 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3722 prefetch_loc != prange->prefetch_loc)) { 3723 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3724 get_prefetch_loc = false; 3725 } else { 3726 prefetch_loc = prange->prefetch_loc; 3727 } 3728 } 3729 if (get_accessible) { 3730 bitmap_and(bitmap_access, bitmap_access, 3731 prange->bitmap_access, MAX_GPU_INSTANCE); 3732 bitmap_and(bitmap_aip, bitmap_aip, 3733 prange->bitmap_aip, MAX_GPU_INSTANCE); 3734 } 3735 if (get_flags) { 3736 flags_and &= prange->flags; 3737 flags_or |= prange->flags; 3738 } 3739 3740 if (get_granularity && prange->granularity < granularity) 3741 granularity = prange->granularity; 3742 3743 node = next; 3744 } 3745 fill_values: 3746 mutex_unlock(&svms->lock); 3747 3748 for (i = 0; i < nattr; i++) { 3749 switch (attrs[i].type) { 3750 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3751 attrs[i].value = location; 3752 break; 3753 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3754 attrs[i].value = prefetch_loc; 3755 break; 3756 case KFD_IOCTL_SVM_ATTR_ACCESS: 3757 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3758 attrs[i].value); 3759 if (gpuidx < 0) { 3760 pr_debug("invalid gpuid %x\n", attrs[i].value); 3761 return -EINVAL; 3762 } 3763 if (test_bit(gpuidx, bitmap_access)) 3764 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3765 else if (test_bit(gpuidx, bitmap_aip)) 3766 attrs[i].type = 3767 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3768 else 3769 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3770 break; 3771 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3772 attrs[i].value = flags_and; 3773 break; 3774 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3775 attrs[i].value = ~flags_or; 3776 break; 3777 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3778 attrs[i].value = (uint32_t)granularity; 3779 break; 3780 } 3781 } 3782 3783 return 0; 3784 } 3785 3786 int kfd_criu_resume_svm(struct kfd_process *p) 3787 { 3788 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3789 int nattr_common = 4, nattr_accessibility = 1; 3790 struct criu_svm_metadata *criu_svm_md = NULL; 3791 struct svm_range_list *svms = &p->svms; 3792 struct criu_svm_metadata *next = NULL; 3793 uint32_t set_flags = 0xffffffff; 3794 int i, j, num_attrs, ret = 0; 3795 uint64_t set_attr_size; 3796 struct mm_struct *mm; 3797 3798 if (list_empty(&svms->criu_svm_metadata_list)) { 3799 pr_debug("No SVM data from CRIU restore stage 2\n"); 3800 return ret; 3801 } 3802 3803 mm = get_task_mm(p->lead_thread); 3804 if (!mm) { 3805 pr_err("failed to get mm for the target process\n"); 3806 return -ESRCH; 3807 } 3808 3809 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 3810 3811 i = j = 0; 3812 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 3813 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 3814 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 3815 3816 for (j = 0; j < num_attrs; j++) { 3817 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 3818 i, j, criu_svm_md->data.attrs[j].type, 3819 i, j, criu_svm_md->data.attrs[j].value); 3820 switch (criu_svm_md->data.attrs[j].type) { 3821 /* During Checkpoint operation, the query for 3822 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 3823 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 3824 * not used by the range which was checkpointed. Care 3825 * must be taken to not restore with an invalid value 3826 * otherwise the gpuidx value will be invalid and 3827 * set_attr would eventually fail so just replace those 3828 * with another dummy attribute such as 3829 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 3830 */ 3831 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3832 if (criu_svm_md->data.attrs[j].value == 3833 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 3834 criu_svm_md->data.attrs[j].type = 3835 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3836 criu_svm_md->data.attrs[j].value = 0; 3837 } 3838 break; 3839 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3840 set_flags = criu_svm_md->data.attrs[j].value; 3841 break; 3842 default: 3843 break; 3844 } 3845 } 3846 3847 /* CLR_FLAGS is not available via get_attr during checkpoint but 3848 * it needs to be inserted before restoring the ranges so 3849 * allocate extra space for it before calling set_attr 3850 */ 3851 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3852 (num_attrs + 1); 3853 set_attr_new = krealloc(set_attr, set_attr_size, 3854 GFP_KERNEL); 3855 if (!set_attr_new) { 3856 ret = -ENOMEM; 3857 goto exit; 3858 } 3859 set_attr = set_attr_new; 3860 3861 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 3862 sizeof(struct kfd_ioctl_svm_attribute)); 3863 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 3864 set_attr[num_attrs].value = ~set_flags; 3865 3866 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 3867 criu_svm_md->data.size, num_attrs + 1, 3868 set_attr); 3869 if (ret) { 3870 pr_err("CRIU: failed to set range attributes\n"); 3871 goto exit; 3872 } 3873 3874 i++; 3875 } 3876 exit: 3877 kfree(set_attr); 3878 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 3879 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 3880 criu_svm_md->data.start_addr); 3881 kfree(criu_svm_md); 3882 } 3883 3884 mmput(mm); 3885 return ret; 3886 3887 } 3888 3889 int kfd_criu_restore_svm(struct kfd_process *p, 3890 uint8_t __user *user_priv_ptr, 3891 uint64_t *priv_data_offset, 3892 uint64_t max_priv_data_size) 3893 { 3894 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 3895 int nattr_common = 4, nattr_accessibility = 1; 3896 struct criu_svm_metadata *criu_svm_md = NULL; 3897 struct svm_range_list *svms = &p->svms; 3898 uint32_t num_devices; 3899 int ret = 0; 3900 3901 num_devices = p->n_pdds; 3902 /* Handle one SVM range object at a time, also the number of gpus are 3903 * assumed to be same on the restore node, checking must be done while 3904 * evaluating the topology earlier 3905 */ 3906 3907 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 3908 (nattr_common + nattr_accessibility * num_devices); 3909 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 3910 3911 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 3912 svm_attrs_size; 3913 3914 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 3915 if (!criu_svm_md) { 3916 pr_err("failed to allocate memory to store svm metadata\n"); 3917 return -ENOMEM; 3918 } 3919 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 3920 ret = -EINVAL; 3921 goto exit; 3922 } 3923 3924 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 3925 svm_priv_data_size); 3926 if (ret) { 3927 ret = -EFAULT; 3928 goto exit; 3929 } 3930 *priv_data_offset += svm_priv_data_size; 3931 3932 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 3933 3934 return 0; 3935 3936 3937 exit: 3938 kfree(criu_svm_md); 3939 return ret; 3940 } 3941 3942 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 3943 uint64_t *svm_priv_data_size) 3944 { 3945 uint64_t total_size, accessibility_size, common_attr_size; 3946 int nattr_common = 4, nattr_accessibility = 1; 3947 int num_devices = p->n_pdds; 3948 struct svm_range_list *svms; 3949 struct svm_range *prange; 3950 uint32_t count = 0; 3951 3952 *svm_priv_data_size = 0; 3953 3954 svms = &p->svms; 3955 if (!svms) 3956 return -EINVAL; 3957 3958 mutex_lock(&svms->lock); 3959 list_for_each_entry(prange, &svms->list, list) { 3960 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 3961 prange, prange->start, prange->npages, 3962 prange->start + prange->npages - 1); 3963 count++; 3964 } 3965 mutex_unlock(&svms->lock); 3966 3967 *num_svm_ranges = count; 3968 /* Only the accessbility attributes need to be queried for all the gpus 3969 * individually, remaining ones are spanned across the entire process 3970 * regardless of the various gpu nodes. Of the remaining attributes, 3971 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 3972 * 3973 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 3974 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 3975 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 3976 * KFD_IOCTL_SVM_ATTR_GRANULARITY 3977 * 3978 * ** ACCESSBILITY ATTRIBUTES ** 3979 * (Considered as one, type is altered during query, value is gpuid) 3980 * KFD_IOCTL_SVM_ATTR_ACCESS 3981 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 3982 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 3983 */ 3984 if (*num_svm_ranges > 0) { 3985 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3986 nattr_common; 3987 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 3988 nattr_accessibility * num_devices; 3989 3990 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 3991 common_attr_size + accessibility_size; 3992 3993 *svm_priv_data_size = *num_svm_ranges * total_size; 3994 } 3995 3996 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 3997 *svm_priv_data_size); 3998 return 0; 3999 } 4000 4001 int kfd_criu_checkpoint_svm(struct kfd_process *p, 4002 uint8_t __user *user_priv_data, 4003 uint64_t *priv_data_offset) 4004 { 4005 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 4006 struct kfd_ioctl_svm_attribute *query_attr = NULL; 4007 uint64_t svm_priv_data_size, query_attr_size = 0; 4008 int index, nattr_common = 4, ret = 0; 4009 struct svm_range_list *svms; 4010 int num_devices = p->n_pdds; 4011 struct svm_range *prange; 4012 struct mm_struct *mm; 4013 4014 svms = &p->svms; 4015 if (!svms) 4016 return -EINVAL; 4017 4018 mm = get_task_mm(p->lead_thread); 4019 if (!mm) { 4020 pr_err("failed to get mm for the target process\n"); 4021 return -ESRCH; 4022 } 4023 4024 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4025 (nattr_common + num_devices); 4026 4027 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 4028 if (!query_attr) { 4029 ret = -ENOMEM; 4030 goto exit; 4031 } 4032 4033 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 4034 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 4035 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4036 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 4037 4038 for (index = 0; index < num_devices; index++) { 4039 struct kfd_process_device *pdd = p->pdds[index]; 4040 4041 query_attr[index + nattr_common].type = 4042 KFD_IOCTL_SVM_ATTR_ACCESS; 4043 query_attr[index + nattr_common].value = pdd->user_gpu_id; 4044 } 4045 4046 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 4047 4048 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 4049 if (!svm_priv) { 4050 ret = -ENOMEM; 4051 goto exit_query; 4052 } 4053 4054 index = 0; 4055 list_for_each_entry(prange, &svms->list, list) { 4056 4057 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 4058 svm_priv->start_addr = prange->start; 4059 svm_priv->size = prange->npages; 4060 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 4061 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 4062 prange, prange->start, prange->npages, 4063 prange->start + prange->npages - 1, 4064 prange->npages * PAGE_SIZE); 4065 4066 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 4067 svm_priv->size, 4068 (nattr_common + num_devices), 4069 svm_priv->attrs); 4070 if (ret) { 4071 pr_err("CRIU: failed to obtain range attributes\n"); 4072 goto exit_priv; 4073 } 4074 4075 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4076 svm_priv_data_size)) { 4077 pr_err("Failed to copy svm priv to user\n"); 4078 ret = -EFAULT; 4079 goto exit_priv; 4080 } 4081 4082 *priv_data_offset += svm_priv_data_size; 4083 4084 } 4085 4086 4087 exit_priv: 4088 kfree(svm_priv); 4089 exit_query: 4090 kfree(query_attr); 4091 exit: 4092 mmput(mm); 4093 return ret; 4094 } 4095 4096 int 4097 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4098 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4099 { 4100 struct mm_struct *mm = current->mm; 4101 int r; 4102 4103 start >>= PAGE_SHIFT; 4104 size >>= PAGE_SHIFT; 4105 4106 switch (op) { 4107 case KFD_IOCTL_SVM_OP_SET_ATTR: 4108 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4109 break; 4110 case KFD_IOCTL_SVM_OP_GET_ATTR: 4111 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4112 break; 4113 default: 4114 r = EINVAL; 4115 break; 4116 } 4117 4118 return r; 4119 } 4120