1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <linux/dynamic_debug.h> 27 #include <drm/ttm/ttm_tt.h> 28 #include <drm/drm_exec.h> 29 30 #include "amdgpu_sync.h" 31 #include "amdgpu_object.h" 32 #include "amdgpu_vm.h" 33 #include "amdgpu_hmm.h" 34 #include "amdgpu.h" 35 #include "amdgpu_xgmi.h" 36 #include "kfd_priv.h" 37 #include "kfd_svm.h" 38 #include "kfd_migrate.h" 39 #include "kfd_smi_events.h" 40 41 #ifdef dev_fmt 42 #undef dev_fmt 43 #endif 44 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 45 46 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 47 48 /* Long enough to ensure no retry fault comes after svm range is restored and 49 * page table is updated. 50 */ 51 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 52 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) 53 #define dynamic_svm_range_dump(svms) \ 54 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms) 55 #else 56 #define dynamic_svm_range_dump(svms) \ 57 do { if (0) svm_range_debug_dump(svms); } while (0) 58 #endif 59 60 /* Giant svm range split into smaller ranges based on this, it is decided using 61 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 62 * power of 2MB. 63 */ 64 static uint64_t max_svm_range_pages; 65 66 struct criu_svm_metadata { 67 struct list_head list; 68 struct kfd_criu_svm_range_priv_data data; 69 }; 70 71 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 72 static bool 73 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 74 const struct mmu_notifier_range *range, 75 unsigned long cur_seq); 76 static int 77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 78 uint64_t *bo_s, uint64_t *bo_l); 79 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 80 .invalidate = svm_range_cpu_invalidate_pagetables, 81 }; 82 83 /** 84 * svm_range_unlink - unlink svm_range from lists and interval tree 85 * @prange: svm range structure to be removed 86 * 87 * Remove the svm_range from the svms and svm_bo lists and the svms 88 * interval tree. 89 * 90 * Context: The caller must hold svms->lock 91 */ 92 static void svm_range_unlink(struct svm_range *prange) 93 { 94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 95 prange, prange->start, prange->last); 96 97 if (prange->svm_bo) { 98 spin_lock(&prange->svm_bo->list_lock); 99 list_del(&prange->svm_bo_list); 100 spin_unlock(&prange->svm_bo->list_lock); 101 } 102 103 list_del(&prange->list); 104 if (prange->it_node.start != 0 && prange->it_node.last != 0) 105 interval_tree_remove(&prange->it_node, &prange->svms->objects); 106 } 107 108 static void 109 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 110 { 111 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 112 prange, prange->start, prange->last); 113 114 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 115 prange->start << PAGE_SHIFT, 116 prange->npages << PAGE_SHIFT, 117 &svm_range_mn_ops); 118 } 119 120 /** 121 * svm_range_add_to_svms - add svm range to svms 122 * @prange: svm range structure to be added 123 * 124 * Add the svm range to svms interval tree and link list 125 * 126 * Context: The caller must hold svms->lock 127 */ 128 static void svm_range_add_to_svms(struct svm_range *prange) 129 { 130 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 131 prange, prange->start, prange->last); 132 133 list_move_tail(&prange->list, &prange->svms->list); 134 prange->it_node.start = prange->start; 135 prange->it_node.last = prange->last; 136 interval_tree_insert(&prange->it_node, &prange->svms->objects); 137 } 138 139 static void svm_range_remove_notifier(struct svm_range *prange) 140 { 141 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 142 prange->svms, prange, 143 prange->notifier.interval_tree.start >> PAGE_SHIFT, 144 prange->notifier.interval_tree.last >> PAGE_SHIFT); 145 146 if (prange->notifier.interval_tree.start != 0 && 147 prange->notifier.interval_tree.last != 0) 148 mmu_interval_notifier_remove(&prange->notifier); 149 } 150 151 static bool 152 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 153 { 154 return dma_addr && !dma_mapping_error(dev, dma_addr) && 155 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 156 } 157 158 static int 159 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 160 unsigned long offset, unsigned long npages, 161 unsigned long *hmm_pfns, uint32_t gpuidx) 162 { 163 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 164 dma_addr_t *addr = prange->dma_addr[gpuidx]; 165 struct device *dev = adev->dev; 166 struct page *page; 167 int i, r; 168 169 if (!addr) { 170 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 171 if (!addr) 172 return -ENOMEM; 173 prange->dma_addr[gpuidx] = addr; 174 } 175 176 addr += offset; 177 for (i = 0; i < npages; i++) { 178 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 179 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 180 181 page = hmm_pfn_to_page(hmm_pfns[i]); 182 if (is_zone_device_page(page)) { 183 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 184 185 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 186 bo_adev->vm_manager.vram_base_offset - 187 bo_adev->kfd.pgmap.range.start; 188 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 189 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 190 continue; 191 } 192 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 193 r = dma_mapping_error(dev, addr[i]); 194 if (r) { 195 dev_err(dev, "failed %d dma_map_page\n", r); 196 return r; 197 } 198 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 199 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 200 } 201 return 0; 202 } 203 204 static int 205 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 206 unsigned long offset, unsigned long npages, 207 unsigned long *hmm_pfns) 208 { 209 struct kfd_process *p; 210 uint32_t gpuidx; 211 int r; 212 213 p = container_of(prange->svms, struct kfd_process, svms); 214 215 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 216 struct kfd_process_device *pdd; 217 218 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 219 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 220 if (!pdd) { 221 pr_debug("failed to find device idx %d\n", gpuidx); 222 return -EINVAL; 223 } 224 225 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 226 hmm_pfns, gpuidx); 227 if (r) 228 break; 229 } 230 231 return r; 232 } 233 234 void svm_range_dma_unmap(struct device *dev, dma_addr_t *dma_addr, 235 unsigned long offset, unsigned long npages) 236 { 237 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 238 int i; 239 240 if (!dma_addr) 241 return; 242 243 for (i = offset; i < offset + npages; i++) { 244 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 245 continue; 246 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 247 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 248 dma_addr[i] = 0; 249 } 250 } 251 252 void svm_range_free_dma_mappings(struct svm_range *prange, bool unmap_dma) 253 { 254 struct kfd_process_device *pdd; 255 dma_addr_t *dma_addr; 256 struct device *dev; 257 struct kfd_process *p; 258 uint32_t gpuidx; 259 260 p = container_of(prange->svms, struct kfd_process, svms); 261 262 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 263 dma_addr = prange->dma_addr[gpuidx]; 264 if (!dma_addr) 265 continue; 266 267 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 268 if (!pdd) { 269 pr_debug("failed to find device idx %d\n", gpuidx); 270 continue; 271 } 272 dev = &pdd->dev->adev->pdev->dev; 273 if (unmap_dma) 274 svm_range_dma_unmap(dev, dma_addr, 0, prange->npages); 275 kvfree(dma_addr); 276 prange->dma_addr[gpuidx] = NULL; 277 } 278 } 279 280 static void svm_range_free(struct svm_range *prange, bool do_unmap) 281 { 282 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 283 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 284 285 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 286 prange->start, prange->last); 287 288 svm_range_vram_node_free(prange); 289 svm_range_free_dma_mappings(prange, do_unmap); 290 291 if (do_unmap && !p->xnack_enabled) { 292 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 293 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 294 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 295 } 296 mutex_destroy(&prange->lock); 297 mutex_destroy(&prange->migrate_mutex); 298 kfree(prange); 299 } 300 301 static void 302 svm_range_set_default_attributes(int32_t *location, int32_t *prefetch_loc, 303 uint8_t *granularity, uint32_t *flags) 304 { 305 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 306 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 307 *granularity = 9; 308 *flags = 309 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 310 } 311 312 static struct 313 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 314 uint64_t last, bool update_mem_usage) 315 { 316 uint64_t size = last - start + 1; 317 struct svm_range *prange; 318 struct kfd_process *p; 319 320 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 321 if (!prange) 322 return NULL; 323 324 p = container_of(svms, struct kfd_process, svms); 325 if (!p->xnack_enabled && update_mem_usage && 326 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 327 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) { 328 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 329 kfree(prange); 330 return NULL; 331 } 332 prange->npages = size; 333 prange->svms = svms; 334 prange->start = start; 335 prange->last = last; 336 INIT_LIST_HEAD(&prange->list); 337 INIT_LIST_HEAD(&prange->update_list); 338 INIT_LIST_HEAD(&prange->svm_bo_list); 339 INIT_LIST_HEAD(&prange->deferred_list); 340 INIT_LIST_HEAD(&prange->child_list); 341 atomic_set(&prange->invalid, 0); 342 prange->validate_timestamp = 0; 343 mutex_init(&prange->migrate_mutex); 344 mutex_init(&prange->lock); 345 346 if (p->xnack_enabled) 347 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 348 MAX_GPU_INSTANCE); 349 350 svm_range_set_default_attributes(&prange->preferred_loc, 351 &prange->prefetch_loc, 352 &prange->granularity, &prange->flags); 353 354 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 355 356 return prange; 357 } 358 359 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 360 { 361 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 362 return false; 363 364 return true; 365 } 366 367 static void svm_range_bo_release(struct kref *kref) 368 { 369 struct svm_range_bo *svm_bo; 370 371 svm_bo = container_of(kref, struct svm_range_bo, kref); 372 pr_debug("svm_bo 0x%p\n", svm_bo); 373 374 spin_lock(&svm_bo->list_lock); 375 while (!list_empty(&svm_bo->range_list)) { 376 struct svm_range *prange = 377 list_first_entry(&svm_bo->range_list, 378 struct svm_range, svm_bo_list); 379 /* list_del_init tells a concurrent svm_range_vram_node_new when 380 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 381 */ 382 list_del_init(&prange->svm_bo_list); 383 spin_unlock(&svm_bo->list_lock); 384 385 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 386 prange->start, prange->last); 387 mutex_lock(&prange->lock); 388 prange->svm_bo = NULL; 389 mutex_unlock(&prange->lock); 390 391 spin_lock(&svm_bo->list_lock); 392 } 393 spin_unlock(&svm_bo->list_lock); 394 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) { 395 /* We're not in the eviction worker. 396 * Signal the fence and synchronize with any 397 * pending eviction work. 398 */ 399 dma_fence_signal(&svm_bo->eviction_fence->base); 400 cancel_work_sync(&svm_bo->eviction_work); 401 } 402 dma_fence_put(&svm_bo->eviction_fence->base); 403 amdgpu_bo_unref(&svm_bo->bo); 404 kfree(svm_bo); 405 } 406 407 static void svm_range_bo_wq_release(struct work_struct *work) 408 { 409 struct svm_range_bo *svm_bo; 410 411 svm_bo = container_of(work, struct svm_range_bo, release_work); 412 svm_range_bo_release(&svm_bo->kref); 413 } 414 415 static void svm_range_bo_release_async(struct kref *kref) 416 { 417 struct svm_range_bo *svm_bo; 418 419 svm_bo = container_of(kref, struct svm_range_bo, kref); 420 pr_debug("svm_bo 0x%p\n", svm_bo); 421 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 422 schedule_work(&svm_bo->release_work); 423 } 424 425 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 426 { 427 kref_put(&svm_bo->kref, svm_range_bo_release_async); 428 } 429 430 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 431 { 432 if (svm_bo) 433 kref_put(&svm_bo->kref, svm_range_bo_release); 434 } 435 436 static bool 437 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 438 { 439 mutex_lock(&prange->lock); 440 if (!prange->svm_bo) { 441 mutex_unlock(&prange->lock); 442 return false; 443 } 444 if (prange->ttm_res) { 445 /* We still have a reference, all is well */ 446 mutex_unlock(&prange->lock); 447 return true; 448 } 449 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 450 /* 451 * Migrate from GPU to GPU, remove range from source svm_bo->node 452 * range list, and return false to allocate svm_bo from destination 453 * node. 454 */ 455 if (prange->svm_bo->node != node) { 456 mutex_unlock(&prange->lock); 457 458 spin_lock(&prange->svm_bo->list_lock); 459 list_del_init(&prange->svm_bo_list); 460 spin_unlock(&prange->svm_bo->list_lock); 461 462 svm_range_bo_unref(prange->svm_bo); 463 return false; 464 } 465 if (READ_ONCE(prange->svm_bo->evicting)) { 466 struct dma_fence *f; 467 struct svm_range_bo *svm_bo; 468 /* The BO is getting evicted, 469 * we need to get a new one 470 */ 471 mutex_unlock(&prange->lock); 472 svm_bo = prange->svm_bo; 473 f = dma_fence_get(&svm_bo->eviction_fence->base); 474 svm_range_bo_unref(prange->svm_bo); 475 /* wait for the fence to avoid long spin-loop 476 * at list_empty_careful 477 */ 478 dma_fence_wait(f, false); 479 dma_fence_put(f); 480 } else { 481 /* The BO was still around and we got 482 * a new reference to it 483 */ 484 mutex_unlock(&prange->lock); 485 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 486 prange->svms, prange->start, prange->last); 487 488 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 489 return true; 490 } 491 492 } else { 493 mutex_unlock(&prange->lock); 494 } 495 496 /* We need a new svm_bo. Spin-loop to wait for concurrent 497 * svm_range_bo_release to finish removing this range from 498 * its range list. After this, it is safe to reuse the 499 * svm_bo pointer and svm_bo_list head. 500 */ 501 while (!list_empty_careful(&prange->svm_bo_list)) 502 ; 503 504 return false; 505 } 506 507 static struct svm_range_bo *svm_range_bo_new(void) 508 { 509 struct svm_range_bo *svm_bo; 510 511 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 512 if (!svm_bo) 513 return NULL; 514 515 kref_init(&svm_bo->kref); 516 INIT_LIST_HEAD(&svm_bo->range_list); 517 spin_lock_init(&svm_bo->list_lock); 518 519 return svm_bo; 520 } 521 522 int 523 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 524 bool clear) 525 { 526 struct amdgpu_bo_param bp; 527 struct svm_range_bo *svm_bo; 528 struct amdgpu_bo_user *ubo; 529 struct amdgpu_bo *bo; 530 struct kfd_process *p; 531 struct mm_struct *mm; 532 int r; 533 534 p = container_of(prange->svms, struct kfd_process, svms); 535 pr_debug("pasid: %x svms 0x%p [0x%lx 0x%lx]\n", p->pasid, prange->svms, 536 prange->start, prange->last); 537 538 if (svm_range_validate_svm_bo(node, prange)) 539 return 0; 540 541 svm_bo = svm_range_bo_new(); 542 if (!svm_bo) { 543 pr_debug("failed to alloc svm bo\n"); 544 return -ENOMEM; 545 } 546 mm = get_task_mm(p->lead_thread); 547 if (!mm) { 548 pr_debug("failed to get mm\n"); 549 kfree(svm_bo); 550 return -ESRCH; 551 } 552 svm_bo->node = node; 553 svm_bo->eviction_fence = 554 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 555 mm, 556 svm_bo); 557 mmput(mm); 558 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 559 svm_bo->evicting = 0; 560 memset(&bp, 0, sizeof(bp)); 561 bp.size = prange->npages * PAGE_SIZE; 562 bp.byte_align = PAGE_SIZE; 563 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 564 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 565 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 566 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 567 bp.type = ttm_bo_type_device; 568 bp.resv = NULL; 569 if (node->xcp) 570 bp.xcp_id_plus1 = node->xcp->id + 1; 571 572 r = amdgpu_bo_create_user(node->adev, &bp, &ubo); 573 if (r) { 574 pr_debug("failed %d to create bo\n", r); 575 goto create_bo_failed; 576 } 577 bo = &ubo->bo; 578 579 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n", 580 bo->tbo.resource->start << PAGE_SHIFT, bp.size, 581 bp.xcp_id_plus1 - 1); 582 583 r = amdgpu_bo_reserve(bo, true); 584 if (r) { 585 pr_debug("failed %d to reserve bo\n", r); 586 goto reserve_bo_failed; 587 } 588 589 if (clear) { 590 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 591 if (r) { 592 pr_debug("failed %d to sync bo\n", r); 593 amdgpu_bo_unreserve(bo); 594 goto reserve_bo_failed; 595 } 596 } 597 598 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 599 if (r) { 600 pr_debug("failed %d to reserve bo\n", r); 601 amdgpu_bo_unreserve(bo); 602 goto reserve_bo_failed; 603 } 604 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 605 606 amdgpu_bo_unreserve(bo); 607 608 svm_bo->bo = bo; 609 prange->svm_bo = svm_bo; 610 prange->ttm_res = bo->tbo.resource; 611 prange->offset = 0; 612 613 spin_lock(&svm_bo->list_lock); 614 list_add(&prange->svm_bo_list, &svm_bo->range_list); 615 spin_unlock(&svm_bo->list_lock); 616 617 return 0; 618 619 reserve_bo_failed: 620 amdgpu_bo_unref(&bo); 621 create_bo_failed: 622 dma_fence_put(&svm_bo->eviction_fence->base); 623 kfree(svm_bo); 624 prange->ttm_res = NULL; 625 626 return r; 627 } 628 629 void svm_range_vram_node_free(struct svm_range *prange) 630 { 631 svm_range_bo_unref(prange->svm_bo); 632 prange->ttm_res = NULL; 633 } 634 635 struct kfd_node * 636 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 637 { 638 struct kfd_process *p; 639 struct kfd_process_device *pdd; 640 641 p = container_of(prange->svms, struct kfd_process, svms); 642 pdd = kfd_process_device_data_by_id(p, gpu_id); 643 if (!pdd) { 644 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 645 return NULL; 646 } 647 648 return pdd->dev; 649 } 650 651 struct kfd_process_device * 652 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 653 { 654 struct kfd_process *p; 655 656 p = container_of(prange->svms, struct kfd_process, svms); 657 658 return kfd_get_process_device_data(node, p); 659 } 660 661 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 662 { 663 struct ttm_operation_ctx ctx = { false, false }; 664 665 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 666 667 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 668 } 669 670 static int 671 svm_range_check_attr(struct kfd_process *p, 672 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 673 { 674 uint32_t i; 675 676 for (i = 0; i < nattr; i++) { 677 uint32_t val = attrs[i].value; 678 int gpuidx = MAX_GPU_INSTANCE; 679 680 switch (attrs[i].type) { 681 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 682 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 683 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 684 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 685 break; 686 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 687 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 688 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 689 break; 690 case KFD_IOCTL_SVM_ATTR_ACCESS: 691 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 692 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 693 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 694 break; 695 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 696 break; 697 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 698 break; 699 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 700 break; 701 default: 702 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 703 return -EINVAL; 704 } 705 706 if (gpuidx < 0) { 707 pr_debug("no GPU 0x%x found\n", val); 708 return -EINVAL; 709 } else if (gpuidx < MAX_GPU_INSTANCE && 710 !test_bit(gpuidx, p->svms.bitmap_supported)) { 711 pr_debug("GPU 0x%x not supported\n", val); 712 return -EINVAL; 713 } 714 } 715 716 return 0; 717 } 718 719 static void 720 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 721 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 722 bool *update_mapping) 723 { 724 uint32_t i; 725 int gpuidx; 726 727 for (i = 0; i < nattr; i++) { 728 switch (attrs[i].type) { 729 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 730 prange->preferred_loc = attrs[i].value; 731 break; 732 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 733 prange->prefetch_loc = attrs[i].value; 734 break; 735 case KFD_IOCTL_SVM_ATTR_ACCESS: 736 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 737 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 738 if (!p->xnack_enabled) 739 *update_mapping = true; 740 741 gpuidx = kfd_process_gpuidx_from_gpuid(p, 742 attrs[i].value); 743 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 744 bitmap_clear(prange->bitmap_access, gpuidx, 1); 745 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 746 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 747 bitmap_set(prange->bitmap_access, gpuidx, 1); 748 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 749 } else { 750 bitmap_clear(prange->bitmap_access, gpuidx, 1); 751 bitmap_set(prange->bitmap_aip, gpuidx, 1); 752 } 753 break; 754 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 755 *update_mapping = true; 756 prange->flags |= attrs[i].value; 757 break; 758 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 759 *update_mapping = true; 760 prange->flags &= ~attrs[i].value; 761 break; 762 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 763 prange->granularity = attrs[i].value; 764 break; 765 default: 766 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 767 } 768 } 769 } 770 771 static bool 772 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 773 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 774 { 775 uint32_t i; 776 int gpuidx; 777 778 for (i = 0; i < nattr; i++) { 779 switch (attrs[i].type) { 780 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 781 if (prange->preferred_loc != attrs[i].value) 782 return false; 783 break; 784 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 785 /* Prefetch should always trigger a migration even 786 * if the value of the attribute didn't change. 787 */ 788 return false; 789 case KFD_IOCTL_SVM_ATTR_ACCESS: 790 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 791 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 792 gpuidx = kfd_process_gpuidx_from_gpuid(p, 793 attrs[i].value); 794 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 795 if (test_bit(gpuidx, prange->bitmap_access) || 796 test_bit(gpuidx, prange->bitmap_aip)) 797 return false; 798 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 799 if (!test_bit(gpuidx, prange->bitmap_access)) 800 return false; 801 } else { 802 if (!test_bit(gpuidx, prange->bitmap_aip)) 803 return false; 804 } 805 break; 806 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 807 if ((prange->flags & attrs[i].value) != attrs[i].value) 808 return false; 809 break; 810 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 811 if ((prange->flags & attrs[i].value) != 0) 812 return false; 813 break; 814 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 815 if (prange->granularity != attrs[i].value) 816 return false; 817 break; 818 default: 819 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 820 } 821 } 822 823 return !prange->is_error_flag; 824 } 825 826 /** 827 * svm_range_debug_dump - print all range information from svms 828 * @svms: svm range list header 829 * 830 * debug output svm range start, end, prefetch location from svms 831 * interval tree and link list 832 * 833 * Context: The caller must hold svms->lock 834 */ 835 static void svm_range_debug_dump(struct svm_range_list *svms) 836 { 837 struct interval_tree_node *node; 838 struct svm_range *prange; 839 840 pr_debug("dump svms 0x%p list\n", svms); 841 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 842 843 list_for_each_entry(prange, &svms->list, list) { 844 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 845 prange, prange->start, prange->npages, 846 prange->start + prange->npages - 1, 847 prange->actual_loc); 848 } 849 850 pr_debug("dump svms 0x%p interval tree\n", svms); 851 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 852 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 853 while (node) { 854 prange = container_of(node, struct svm_range, it_node); 855 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 856 prange, prange->start, prange->npages, 857 prange->start + prange->npages - 1, 858 prange->actual_loc); 859 node = interval_tree_iter_next(node, 0, ~0ULL); 860 } 861 } 862 863 static void * 864 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements, 865 uint64_t offset) 866 { 867 unsigned char *dst; 868 869 dst = kvmalloc_array(num_elements, size, GFP_KERNEL); 870 if (!dst) 871 return NULL; 872 memcpy(dst, (unsigned char *)psrc + offset, num_elements * size); 873 874 return (void *)dst; 875 } 876 877 static int 878 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src) 879 { 880 int i; 881 882 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 883 if (!src->dma_addr[i]) 884 continue; 885 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i], 886 sizeof(*src->dma_addr[i]), src->npages, 0); 887 if (!dst->dma_addr[i]) 888 return -ENOMEM; 889 } 890 891 return 0; 892 } 893 894 static int 895 svm_range_split_array(void *ppnew, void *ppold, size_t size, 896 uint64_t old_start, uint64_t old_n, 897 uint64_t new_start, uint64_t new_n) 898 { 899 unsigned char *new, *old, *pold; 900 uint64_t d; 901 902 if (!ppold) 903 return 0; 904 pold = *(unsigned char **)ppold; 905 if (!pold) 906 return 0; 907 908 d = (new_start - old_start) * size; 909 new = svm_range_copy_array(pold, size, new_n, d); 910 if (!new) 911 return -ENOMEM; 912 d = (new_start == old_start) ? new_n * size : 0; 913 old = svm_range_copy_array(pold, size, old_n, d); 914 if (!old) { 915 kvfree(new); 916 return -ENOMEM; 917 } 918 kvfree(pold); 919 *(void **)ppold = old; 920 *(void **)ppnew = new; 921 922 return 0; 923 } 924 925 static int 926 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 927 uint64_t start, uint64_t last) 928 { 929 uint64_t npages = last - start + 1; 930 int i, r; 931 932 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 933 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 934 sizeof(*old->dma_addr[i]), old->start, 935 npages, new->start, new->npages); 936 if (r) 937 return r; 938 } 939 940 return 0; 941 } 942 943 static int 944 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 945 uint64_t start, uint64_t last) 946 { 947 uint64_t npages = last - start + 1; 948 949 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 950 new->svms, new, new->start, start, last); 951 952 if (new->start == old->start) { 953 new->offset = old->offset; 954 old->offset += new->npages; 955 } else { 956 new->offset = old->offset + npages; 957 } 958 959 new->svm_bo = svm_range_bo_ref(old->svm_bo); 960 new->ttm_res = old->ttm_res; 961 962 spin_lock(&new->svm_bo->list_lock); 963 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 964 spin_unlock(&new->svm_bo->list_lock); 965 966 return 0; 967 } 968 969 /** 970 * svm_range_split_adjust - split range and adjust 971 * 972 * @new: new range 973 * @old: the old range 974 * @start: the old range adjust to start address in pages 975 * @last: the old range adjust to last address in pages 976 * 977 * Copy system memory dma_addr or vram ttm_res in old range to new 978 * range from new_start up to size new->npages, the remaining old range is from 979 * start to last 980 * 981 * Return: 982 * 0 - OK, -ENOMEM - out of memory 983 */ 984 static int 985 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 986 uint64_t start, uint64_t last) 987 { 988 int r; 989 990 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 991 new->svms, new->start, old->start, old->last, start, last); 992 993 if (new->start < old->start || 994 new->last > old->last) { 995 WARN_ONCE(1, "invalid new range start or last\n"); 996 return -EINVAL; 997 } 998 999 r = svm_range_split_pages(new, old, start, last); 1000 if (r) 1001 return r; 1002 1003 if (old->actual_loc && old->ttm_res) { 1004 r = svm_range_split_nodes(new, old, start, last); 1005 if (r) 1006 return r; 1007 } 1008 1009 old->npages = last - start + 1; 1010 old->start = start; 1011 old->last = last; 1012 new->flags = old->flags; 1013 new->preferred_loc = old->preferred_loc; 1014 new->prefetch_loc = old->prefetch_loc; 1015 new->actual_loc = old->actual_loc; 1016 new->granularity = old->granularity; 1017 new->mapped_to_gpu = old->mapped_to_gpu; 1018 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1019 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1020 1021 return 0; 1022 } 1023 1024 /** 1025 * svm_range_split - split a range in 2 ranges 1026 * 1027 * @prange: the svm range to split 1028 * @start: the remaining range start address in pages 1029 * @last: the remaining range last address in pages 1030 * @new: the result new range generated 1031 * 1032 * Two cases only: 1033 * case 1: if start == prange->start 1034 * prange ==> prange[start, last] 1035 * new range [last + 1, prange->last] 1036 * 1037 * case 2: if last == prange->last 1038 * prange ==> prange[start, last] 1039 * new range [prange->start, start - 1] 1040 * 1041 * Return: 1042 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1043 */ 1044 static int 1045 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1046 struct svm_range **new) 1047 { 1048 uint64_t old_start = prange->start; 1049 uint64_t old_last = prange->last; 1050 struct svm_range_list *svms; 1051 int r = 0; 1052 1053 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1054 old_start, old_last, start, last); 1055 1056 if (old_start != start && old_last != last) 1057 return -EINVAL; 1058 if (start < old_start || last > old_last) 1059 return -EINVAL; 1060 1061 svms = prange->svms; 1062 if (old_start == start) 1063 *new = svm_range_new(svms, last + 1, old_last, false); 1064 else 1065 *new = svm_range_new(svms, old_start, start - 1, false); 1066 if (!*new) 1067 return -ENOMEM; 1068 1069 r = svm_range_split_adjust(*new, prange, start, last); 1070 if (r) { 1071 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1072 r, old_start, old_last, start, last); 1073 svm_range_free(*new, false); 1074 *new = NULL; 1075 } 1076 1077 return r; 1078 } 1079 1080 static int 1081 svm_range_split_tail(struct svm_range *prange, 1082 uint64_t new_last, struct list_head *insert_list) 1083 { 1084 struct svm_range *tail; 1085 int r = svm_range_split(prange, prange->start, new_last, &tail); 1086 1087 if (!r) 1088 list_add(&tail->list, insert_list); 1089 return r; 1090 } 1091 1092 static int 1093 svm_range_split_head(struct svm_range *prange, 1094 uint64_t new_start, struct list_head *insert_list) 1095 { 1096 struct svm_range *head; 1097 int r = svm_range_split(prange, new_start, prange->last, &head); 1098 1099 if (!r) 1100 list_add(&head->list, insert_list); 1101 return r; 1102 } 1103 1104 static void 1105 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm, 1106 struct svm_range *pchild, enum svm_work_list_ops op) 1107 { 1108 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1109 pchild, pchild->start, pchild->last, prange, op); 1110 1111 pchild->work_item.mm = mm; 1112 pchild->work_item.op = op; 1113 list_add_tail(&pchild->child_list, &prange->child_list); 1114 } 1115 1116 /** 1117 * svm_range_split_by_granularity - collect ranges within granularity boundary 1118 * 1119 * @p: the process with svms list 1120 * @mm: mm structure 1121 * @addr: the vm fault address in pages, to split the prange 1122 * @parent: parent range if prange is from child list 1123 * @prange: prange to split 1124 * 1125 * Trims @prange to be a single aligned block of prange->granularity if 1126 * possible. The head and tail are added to the child_list in @parent. 1127 * 1128 * Context: caller must hold mmap_read_lock and prange->lock 1129 * 1130 * Return: 1131 * 0 - OK, otherwise error code 1132 */ 1133 int 1134 svm_range_split_by_granularity(struct kfd_process *p, struct mm_struct *mm, 1135 unsigned long addr, struct svm_range *parent, 1136 struct svm_range *prange) 1137 { 1138 struct svm_range *head, *tail; 1139 unsigned long start, last, size; 1140 int r; 1141 1142 /* Align splited range start and size to granularity size, then a single 1143 * PTE will be used for whole range, this reduces the number of PTE 1144 * updated and the L1 TLB space used for translation. 1145 */ 1146 size = 1UL << prange->granularity; 1147 start = ALIGN_DOWN(addr, size); 1148 last = ALIGN(addr + 1, size) - 1; 1149 1150 pr_debug("svms 0x%p split [0x%lx 0x%lx] to [0x%lx 0x%lx] size 0x%lx\n", 1151 prange->svms, prange->start, prange->last, start, last, size); 1152 1153 if (start > prange->start) { 1154 r = svm_range_split(prange, start, prange->last, &head); 1155 if (r) 1156 return r; 1157 svm_range_add_child(parent, mm, head, SVM_OP_ADD_RANGE); 1158 } 1159 1160 if (last < prange->last) { 1161 r = svm_range_split(prange, prange->start, last, &tail); 1162 if (r) 1163 return r; 1164 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 1165 } 1166 1167 /* xnack on, update mapping on GPUs with ACCESS_IN_PLACE */ 1168 if (p->xnack_enabled && prange->work_item.op == SVM_OP_ADD_RANGE) { 1169 prange->work_item.op = SVM_OP_ADD_RANGE_AND_MAP; 1170 pr_debug("change prange 0x%p [0x%lx 0x%lx] op %d\n", 1171 prange, prange->start, prange->last, 1172 SVM_OP_ADD_RANGE_AND_MAP); 1173 } 1174 return 0; 1175 } 1176 static bool 1177 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1178 { 1179 return (node_a->adev == node_b->adev || 1180 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1181 } 1182 1183 static uint64_t 1184 svm_range_get_pte_flags(struct kfd_node *node, 1185 struct svm_range *prange, int domain) 1186 { 1187 struct kfd_node *bo_node; 1188 uint32_t flags = prange->flags; 1189 uint32_t mapping_flags = 0; 1190 uint64_t pte_flags; 1191 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1192 bool coherent = flags & KFD_IOCTL_SVM_FLAG_COHERENT; 1193 bool uncached = false; /*flags & KFD_IOCTL_SVM_FLAG_UNCACHED;*/ 1194 unsigned int mtype_local; 1195 1196 if (domain == SVM_RANGE_VRAM_DOMAIN) 1197 bo_node = prange->svm_bo->node; 1198 1199 switch (node->adev->ip_versions[GC_HWIP][0]) { 1200 case IP_VERSION(9, 4, 1): 1201 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1202 if (bo_node == node) { 1203 mapping_flags |= coherent ? 1204 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1205 } else { 1206 mapping_flags |= coherent ? 1207 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1208 if (svm_nodes_in_same_hive(node, bo_node)) 1209 snoop = true; 1210 } 1211 } else { 1212 mapping_flags |= coherent ? 1213 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1214 } 1215 break; 1216 case IP_VERSION(9, 4, 2): 1217 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1218 if (bo_node == node) { 1219 mapping_flags |= coherent ? 1220 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1221 if (node->adev->gmc.xgmi.connected_to_cpu) 1222 snoop = true; 1223 } else { 1224 mapping_flags |= coherent ? 1225 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1226 if (svm_nodes_in_same_hive(node, bo_node)) 1227 snoop = true; 1228 } 1229 } else { 1230 mapping_flags |= coherent ? 1231 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1232 } 1233 break; 1234 case IP_VERSION(9, 4, 3): 1235 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1236 (amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW); 1237 snoop = true; 1238 if (uncached) { 1239 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1240 } else if (domain == SVM_RANGE_VRAM_DOMAIN) { 1241 /* local HBM region close to partition */ 1242 if (bo_node->adev == node->adev && 1243 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1244 mapping_flags |= mtype_local; 1245 /* local HBM region far from partition or remote XGMI GPU */ 1246 else if (svm_nodes_in_same_hive(bo_node, node)) 1247 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1248 /* PCIe P2P */ 1249 else 1250 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1251 /* system memory accessed by the APU */ 1252 } else if (node->adev->flags & AMD_IS_APU) { 1253 /* On NUMA systems, locality is determined per-page 1254 * in amdgpu_gmc_override_vm_pte_flags 1255 */ 1256 if (num_possible_nodes() <= 1) 1257 mapping_flags |= mtype_local; 1258 else 1259 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1260 /* system memory accessed by the dGPU */ 1261 } else { 1262 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1263 } 1264 break; 1265 default: 1266 mapping_flags |= coherent ? 1267 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1268 } 1269 1270 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE; 1271 1272 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO) 1273 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE; 1274 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1275 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1276 1277 pte_flags = AMDGPU_PTE_VALID; 1278 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1279 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1280 1281 pte_flags |= amdgpu_gem_va_map_flags(node->adev, mapping_flags); 1282 return pte_flags; 1283 } 1284 1285 static int 1286 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1287 uint64_t start, uint64_t last, 1288 struct dma_fence **fence) 1289 { 1290 uint64_t init_pte_value = 0; 1291 1292 pr_debug("[0x%llx 0x%llx]\n", start, last); 1293 1294 return amdgpu_vm_update_range(adev, vm, false, true, true, NULL, start, 1295 last, init_pte_value, 0, 0, NULL, NULL, 1296 fence); 1297 } 1298 1299 static int 1300 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1301 unsigned long last, uint32_t trigger) 1302 { 1303 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1304 struct kfd_process_device *pdd; 1305 struct dma_fence *fence = NULL; 1306 struct kfd_process *p; 1307 uint32_t gpuidx; 1308 int r = 0; 1309 1310 if (!prange->mapped_to_gpu) { 1311 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1312 prange, prange->start, prange->last); 1313 return 0; 1314 } 1315 1316 if (prange->start == start && prange->last == last) { 1317 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1318 prange->mapped_to_gpu = false; 1319 } 1320 1321 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1322 MAX_GPU_INSTANCE); 1323 p = container_of(prange->svms, struct kfd_process, svms); 1324 1325 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1326 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1327 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1328 if (!pdd) { 1329 pr_debug("failed to find device idx %d\n", gpuidx); 1330 return -EINVAL; 1331 } 1332 1333 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1334 start, last, trigger); 1335 1336 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1337 drm_priv_to_vm(pdd->drm_priv), 1338 start, last, &fence); 1339 if (r) 1340 break; 1341 1342 if (fence) { 1343 r = dma_fence_wait(fence, false); 1344 dma_fence_put(fence); 1345 fence = NULL; 1346 if (r) 1347 break; 1348 } 1349 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1350 } 1351 1352 return r; 1353 } 1354 1355 static int 1356 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1357 unsigned long offset, unsigned long npages, bool readonly, 1358 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1359 struct dma_fence **fence, bool flush_tlb) 1360 { 1361 struct amdgpu_device *adev = pdd->dev->adev; 1362 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1363 uint64_t pte_flags; 1364 unsigned long last_start; 1365 int last_domain; 1366 int r = 0; 1367 int64_t i, j; 1368 1369 last_start = prange->start + offset; 1370 1371 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1372 last_start, last_start + npages - 1, readonly); 1373 1374 for (i = offset; i < offset + npages; i++) { 1375 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1376 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1377 1378 /* Collect all pages in the same address range and memory domain 1379 * that can be mapped with a single call to update mapping. 1380 */ 1381 if (i < offset + npages - 1 && 1382 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1383 continue; 1384 1385 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1386 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1387 1388 pte_flags = svm_range_get_pte_flags(pdd->dev, prange, last_domain); 1389 if (readonly) 1390 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1391 1392 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1393 prange->svms, last_start, prange->start + i, 1394 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1395 pte_flags); 1396 1397 /* For dGPU mode, we use same vm_manager to allocate VRAM for 1398 * different memory partition based on fpfn/lpfn, we should use 1399 * same vm_manager.vram_base_offset regardless memory partition. 1400 */ 1401 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, NULL, 1402 last_start, prange->start + i, 1403 pte_flags, 1404 (last_start - prange->start) << PAGE_SHIFT, 1405 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1406 NULL, dma_addr, &vm->last_update); 1407 1408 for (j = last_start - prange->start; j <= i; j++) 1409 dma_addr[j] |= last_domain; 1410 1411 if (r) { 1412 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1413 goto out; 1414 } 1415 last_start = prange->start + i + 1; 1416 } 1417 1418 r = amdgpu_vm_update_pdes(adev, vm, false); 1419 if (r) { 1420 pr_debug("failed %d to update directories 0x%lx\n", r, 1421 prange->start); 1422 goto out; 1423 } 1424 1425 if (fence) 1426 *fence = dma_fence_get(vm->last_update); 1427 1428 out: 1429 return r; 1430 } 1431 1432 static int 1433 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1434 unsigned long npages, bool readonly, 1435 unsigned long *bitmap, bool wait, bool flush_tlb) 1436 { 1437 struct kfd_process_device *pdd; 1438 struct amdgpu_device *bo_adev = NULL; 1439 struct kfd_process *p; 1440 struct dma_fence *fence = NULL; 1441 uint32_t gpuidx; 1442 int r = 0; 1443 1444 if (prange->svm_bo && prange->ttm_res) 1445 bo_adev = prange->svm_bo->node->adev; 1446 1447 p = container_of(prange->svms, struct kfd_process, svms); 1448 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1449 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1450 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1451 if (!pdd) { 1452 pr_debug("failed to find device idx %d\n", gpuidx); 1453 return -EINVAL; 1454 } 1455 1456 pdd = kfd_bind_process_to_device(pdd->dev, p); 1457 if (IS_ERR(pdd)) 1458 return -EINVAL; 1459 1460 if (bo_adev && pdd->dev->adev != bo_adev && 1461 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1462 pr_debug("cannot map to device idx %d\n", gpuidx); 1463 continue; 1464 } 1465 1466 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1467 prange->dma_addr[gpuidx], 1468 bo_adev, wait ? &fence : NULL, 1469 flush_tlb); 1470 if (r) 1471 break; 1472 1473 if (fence) { 1474 r = dma_fence_wait(fence, false); 1475 dma_fence_put(fence); 1476 fence = NULL; 1477 if (r) { 1478 pr_debug("failed %d to dma fence wait\n", r); 1479 break; 1480 } 1481 } 1482 1483 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1484 } 1485 1486 return r; 1487 } 1488 1489 struct svm_validate_context { 1490 struct kfd_process *process; 1491 struct svm_range *prange; 1492 bool intr; 1493 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1494 struct drm_exec exec; 1495 }; 1496 1497 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) 1498 { 1499 struct kfd_process_device *pdd; 1500 struct amdgpu_vm *vm; 1501 uint32_t gpuidx; 1502 int r; 1503 1504 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0); 1505 drm_exec_until_all_locked(&ctx->exec) { 1506 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1507 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1508 if (!pdd) { 1509 pr_debug("failed to find device idx %d\n", gpuidx); 1510 r = -EINVAL; 1511 goto unreserve_out; 1512 } 1513 vm = drm_priv_to_vm(pdd->drm_priv); 1514 1515 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2); 1516 drm_exec_retry_on_contention(&ctx->exec); 1517 if (unlikely(r)) { 1518 pr_debug("failed %d to reserve bo\n", r); 1519 goto unreserve_out; 1520 } 1521 } 1522 } 1523 1524 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1525 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1526 if (!pdd) { 1527 pr_debug("failed to find device idx %d\n", gpuidx); 1528 r = -EINVAL; 1529 goto unreserve_out; 1530 } 1531 1532 r = amdgpu_vm_validate_pt_bos(pdd->dev->adev, 1533 drm_priv_to_vm(pdd->drm_priv), 1534 svm_range_bo_validate, NULL); 1535 if (r) { 1536 pr_debug("failed %d validate pt bos\n", r); 1537 goto unreserve_out; 1538 } 1539 } 1540 1541 return 0; 1542 1543 unreserve_out: 1544 drm_exec_fini(&ctx->exec); 1545 return r; 1546 } 1547 1548 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1549 { 1550 drm_exec_fini(&ctx->exec); 1551 } 1552 1553 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1554 { 1555 struct kfd_process_device *pdd; 1556 1557 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1558 if (!pdd) 1559 return NULL; 1560 1561 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1562 } 1563 1564 /* 1565 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1566 * 1567 * To prevent concurrent destruction or change of range attributes, the 1568 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1569 * because that would block concurrent evictions and lead to deadlocks. To 1570 * serialize concurrent migrations or validations of the same range, the 1571 * prange->migrate_mutex must be held. 1572 * 1573 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1574 * eviction fence. 1575 * 1576 * The following sequence ensures race-free validation and GPU mapping: 1577 * 1578 * 1. Reserve page table (and SVM BO if range is in VRAM) 1579 * 2. hmm_range_fault to get page addresses (if system memory) 1580 * 3. DMA-map pages (if system memory) 1581 * 4-a. Take notifier lock 1582 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1583 * 4-c. Check that the range was not split or otherwise invalidated 1584 * 4-d. Update GPU page table 1585 * 4.e. Release notifier lock 1586 * 5. Release page table (and SVM BO) reservation 1587 */ 1588 static int svm_range_validate_and_map(struct mm_struct *mm, 1589 struct svm_range *prange, int32_t gpuidx, 1590 bool intr, bool wait, bool flush_tlb) 1591 { 1592 struct svm_validate_context *ctx; 1593 unsigned long start, end, addr; 1594 struct kfd_process *p; 1595 void *owner; 1596 int32_t idx; 1597 int r = 0; 1598 1599 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL); 1600 if (!ctx) 1601 return -ENOMEM; 1602 ctx->process = container_of(prange->svms, struct kfd_process, svms); 1603 ctx->prange = prange; 1604 ctx->intr = intr; 1605 1606 if (gpuidx < MAX_GPU_INSTANCE) { 1607 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE); 1608 bitmap_set(ctx->bitmap, gpuidx, 1); 1609 } else if (ctx->process->xnack_enabled) { 1610 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1611 1612 /* If prefetch range to GPU, or GPU retry fault migrate range to 1613 * GPU, which has ACCESS attribute to the range, create mapping 1614 * on that GPU. 1615 */ 1616 if (prange->actual_loc) { 1617 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process, 1618 prange->actual_loc); 1619 if (gpuidx < 0) { 1620 WARN_ONCE(1, "failed get device by id 0x%x\n", 1621 prange->actual_loc); 1622 r = -EINVAL; 1623 goto free_ctx; 1624 } 1625 if (test_bit(gpuidx, prange->bitmap_access)) 1626 bitmap_set(ctx->bitmap, gpuidx, 1); 1627 } 1628 } else { 1629 bitmap_or(ctx->bitmap, prange->bitmap_access, 1630 prange->bitmap_aip, MAX_GPU_INSTANCE); 1631 } 1632 1633 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1634 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1635 if (!prange->mapped_to_gpu || 1636 bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1637 r = 0; 1638 goto free_ctx; 1639 } 1640 } 1641 1642 if (prange->actual_loc && !prange->ttm_res) { 1643 /* This should never happen. actual_loc gets set by 1644 * svm_migrate_ram_to_vram after allocating a BO. 1645 */ 1646 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1647 r = -EINVAL; 1648 goto free_ctx; 1649 } 1650 1651 svm_range_reserve_bos(ctx, intr); 1652 1653 p = container_of(prange->svms, struct kfd_process, svms); 1654 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap, 1655 MAX_GPU_INSTANCE)); 1656 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) { 1657 if (kfd_svm_page_owner(p, idx) != owner) { 1658 owner = NULL; 1659 break; 1660 } 1661 } 1662 1663 start = prange->start << PAGE_SHIFT; 1664 end = (prange->last + 1) << PAGE_SHIFT; 1665 for (addr = start; addr < end && !r; ) { 1666 struct hmm_range *hmm_range; 1667 struct vm_area_struct *vma; 1668 unsigned long next; 1669 unsigned long offset; 1670 unsigned long npages; 1671 bool readonly; 1672 1673 vma = vma_lookup(mm, addr); 1674 if (!vma) { 1675 r = -EFAULT; 1676 goto unreserve_out; 1677 } 1678 readonly = !(vma->vm_flags & VM_WRITE); 1679 1680 next = min(vma->vm_end, end); 1681 npages = (next - addr) >> PAGE_SHIFT; 1682 WRITE_ONCE(p->svms.faulting_task, current); 1683 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1684 readonly, owner, NULL, 1685 &hmm_range); 1686 WRITE_ONCE(p->svms.faulting_task, NULL); 1687 if (r) { 1688 pr_debug("failed %d to get svm range pages\n", r); 1689 goto unreserve_out; 1690 } 1691 1692 offset = (addr - start) >> PAGE_SHIFT; 1693 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages, 1694 hmm_range->hmm_pfns); 1695 if (r) { 1696 pr_debug("failed %d to dma map range\n", r); 1697 goto unreserve_out; 1698 } 1699 1700 svm_range_lock(prange); 1701 if (amdgpu_hmm_range_get_pages_done(hmm_range)) { 1702 pr_debug("hmm update the range, need validate again\n"); 1703 r = -EAGAIN; 1704 goto unlock_out; 1705 } 1706 if (!list_empty(&prange->child_list)) { 1707 pr_debug("range split by unmap in parallel, validate again\n"); 1708 r = -EAGAIN; 1709 goto unlock_out; 1710 } 1711 1712 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1713 ctx->bitmap, wait, flush_tlb); 1714 1715 unlock_out: 1716 svm_range_unlock(prange); 1717 1718 addr = next; 1719 } 1720 1721 if (addr == end) { 1722 prange->validated_once = true; 1723 prange->mapped_to_gpu = true; 1724 } 1725 1726 unreserve_out: 1727 svm_range_unreserve_bos(ctx); 1728 1729 prange->is_error_flag = !!r; 1730 if (!r) 1731 prange->validate_timestamp = ktime_get_boottime(); 1732 1733 free_ctx: 1734 kfree(ctx); 1735 1736 return r; 1737 } 1738 1739 /** 1740 * svm_range_list_lock_and_flush_work - flush pending deferred work 1741 * 1742 * @svms: the svm range list 1743 * @mm: the mm structure 1744 * 1745 * Context: Returns with mmap write lock held, pending deferred work flushed 1746 * 1747 */ 1748 void 1749 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1750 struct mm_struct *mm) 1751 { 1752 retry_flush_work: 1753 flush_work(&svms->deferred_list_work); 1754 mmap_write_lock(mm); 1755 1756 if (list_empty(&svms->deferred_range_list)) 1757 return; 1758 mmap_write_unlock(mm); 1759 pr_debug("retry flush\n"); 1760 goto retry_flush_work; 1761 } 1762 1763 static void svm_range_restore_work(struct work_struct *work) 1764 { 1765 struct delayed_work *dwork = to_delayed_work(work); 1766 struct amdkfd_process_info *process_info; 1767 struct svm_range_list *svms; 1768 struct svm_range *prange; 1769 struct kfd_process *p; 1770 struct mm_struct *mm; 1771 int evicted_ranges; 1772 int invalid; 1773 int r; 1774 1775 svms = container_of(dwork, struct svm_range_list, restore_work); 1776 evicted_ranges = atomic_read(&svms->evicted_ranges); 1777 if (!evicted_ranges) 1778 return; 1779 1780 pr_debug("restore svm ranges\n"); 1781 1782 p = container_of(svms, struct kfd_process, svms); 1783 process_info = p->kgd_process_info; 1784 1785 /* Keep mm reference when svm_range_validate_and_map ranges */ 1786 mm = get_task_mm(p->lead_thread); 1787 if (!mm) { 1788 pr_debug("svms 0x%p process mm gone\n", svms); 1789 return; 1790 } 1791 1792 mutex_lock(&process_info->lock); 1793 svm_range_list_lock_and_flush_work(svms, mm); 1794 mutex_lock(&svms->lock); 1795 1796 evicted_ranges = atomic_read(&svms->evicted_ranges); 1797 1798 list_for_each_entry(prange, &svms->list, list) { 1799 invalid = atomic_read(&prange->invalid); 1800 if (!invalid) 1801 continue; 1802 1803 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1804 prange->svms, prange, prange->start, prange->last, 1805 invalid); 1806 1807 /* 1808 * If range is migrating, wait for migration is done. 1809 */ 1810 mutex_lock(&prange->migrate_mutex); 1811 1812 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 1813 false, true, false); 1814 if (r) 1815 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1816 prange->start); 1817 1818 mutex_unlock(&prange->migrate_mutex); 1819 if (r) 1820 goto out_reschedule; 1821 1822 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1823 goto out_reschedule; 1824 } 1825 1826 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1827 evicted_ranges) 1828 goto out_reschedule; 1829 1830 evicted_ranges = 0; 1831 1832 r = kgd2kfd_resume_mm(mm); 1833 if (r) { 1834 /* No recovery from this failure. Probably the CP is 1835 * hanging. No point trying again. 1836 */ 1837 pr_debug("failed %d to resume KFD\n", r); 1838 } 1839 1840 pr_debug("restore svm ranges successfully\n"); 1841 1842 out_reschedule: 1843 mutex_unlock(&svms->lock); 1844 mmap_write_unlock(mm); 1845 mutex_unlock(&process_info->lock); 1846 1847 /* If validation failed, reschedule another attempt */ 1848 if (evicted_ranges) { 1849 pr_debug("reschedule to restore svm range\n"); 1850 schedule_delayed_work(&svms->restore_work, 1851 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1852 1853 kfd_smi_event_queue_restore_rescheduled(mm); 1854 } 1855 mmput(mm); 1856 } 1857 1858 /** 1859 * svm_range_evict - evict svm range 1860 * @prange: svm range structure 1861 * @mm: current process mm_struct 1862 * @start: starting process queue number 1863 * @last: last process queue number 1864 * @event: mmu notifier event when range is evicted or migrated 1865 * 1866 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1867 * return to let CPU evict the buffer and proceed CPU pagetable update. 1868 * 1869 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1870 * If invalidation happens while restore work is running, restore work will 1871 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1872 * the queues. 1873 */ 1874 static int 1875 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1876 unsigned long start, unsigned long last, 1877 enum mmu_notifier_event event) 1878 { 1879 struct svm_range_list *svms = prange->svms; 1880 struct svm_range *pchild; 1881 struct kfd_process *p; 1882 int r = 0; 1883 1884 p = container_of(svms, struct kfd_process, svms); 1885 1886 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1887 svms, prange->start, prange->last, start, last); 1888 1889 if (!p->xnack_enabled || 1890 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 1891 int evicted_ranges; 1892 bool mapped = prange->mapped_to_gpu; 1893 1894 list_for_each_entry(pchild, &prange->child_list, child_list) { 1895 if (!pchild->mapped_to_gpu) 1896 continue; 1897 mapped = true; 1898 mutex_lock_nested(&pchild->lock, 1); 1899 if (pchild->start <= last && pchild->last >= start) { 1900 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 1901 pchild->start, pchild->last); 1902 atomic_inc(&pchild->invalid); 1903 } 1904 mutex_unlock(&pchild->lock); 1905 } 1906 1907 if (!mapped) 1908 return r; 1909 1910 if (prange->start <= last && prange->last >= start) 1911 atomic_inc(&prange->invalid); 1912 1913 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 1914 if (evicted_ranges != 1) 1915 return r; 1916 1917 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 1918 prange->svms, prange->start, prange->last); 1919 1920 /* First eviction, stop the queues */ 1921 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 1922 if (r) 1923 pr_debug("failed to quiesce KFD\n"); 1924 1925 pr_debug("schedule to restore svm %p ranges\n", svms); 1926 schedule_delayed_work(&svms->restore_work, 1927 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1928 } else { 1929 unsigned long s, l; 1930 uint32_t trigger; 1931 1932 if (event == MMU_NOTIFY_MIGRATE) 1933 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 1934 else 1935 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 1936 1937 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 1938 prange->svms, start, last); 1939 list_for_each_entry(pchild, &prange->child_list, child_list) { 1940 mutex_lock_nested(&pchild->lock, 1); 1941 s = max(start, pchild->start); 1942 l = min(last, pchild->last); 1943 if (l >= s) 1944 svm_range_unmap_from_gpus(pchild, s, l, trigger); 1945 mutex_unlock(&pchild->lock); 1946 } 1947 s = max(start, prange->start); 1948 l = min(last, prange->last); 1949 if (l >= s) 1950 svm_range_unmap_from_gpus(prange, s, l, trigger); 1951 } 1952 1953 return r; 1954 } 1955 1956 static struct svm_range *svm_range_clone(struct svm_range *old) 1957 { 1958 struct svm_range *new; 1959 1960 new = svm_range_new(old->svms, old->start, old->last, false); 1961 if (!new) 1962 return NULL; 1963 if (svm_range_copy_dma_addrs(new, old)) { 1964 svm_range_free(new, false); 1965 return NULL; 1966 } 1967 if (old->svm_bo) { 1968 new->ttm_res = old->ttm_res; 1969 new->offset = old->offset; 1970 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1971 spin_lock(&new->svm_bo->list_lock); 1972 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1973 spin_unlock(&new->svm_bo->list_lock); 1974 } 1975 new->flags = old->flags; 1976 new->preferred_loc = old->preferred_loc; 1977 new->prefetch_loc = old->prefetch_loc; 1978 new->actual_loc = old->actual_loc; 1979 new->granularity = old->granularity; 1980 new->mapped_to_gpu = old->mapped_to_gpu; 1981 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1982 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1983 1984 return new; 1985 } 1986 1987 void svm_range_set_max_pages(struct amdgpu_device *adev) 1988 { 1989 uint64_t max_pages; 1990 uint64_t pages, _pages; 1991 uint64_t min_pages = 0; 1992 int i, id; 1993 1994 for (i = 0; i < adev->kfd.dev->num_nodes; i++) { 1995 if (adev->kfd.dev->nodes[i]->xcp) 1996 id = adev->kfd.dev->nodes[i]->xcp->id; 1997 else 1998 id = -1; 1999 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17; 2000 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 2001 pages = rounddown_pow_of_two(pages); 2002 min_pages = min_not_zero(min_pages, pages); 2003 } 2004 2005 do { 2006 max_pages = READ_ONCE(max_svm_range_pages); 2007 _pages = min_not_zero(max_pages, min_pages); 2008 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 2009 } 2010 2011 static int 2012 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 2013 uint64_t max_pages, struct list_head *insert_list, 2014 struct list_head *update_list) 2015 { 2016 struct svm_range *prange; 2017 uint64_t l; 2018 2019 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 2020 max_pages, start, last); 2021 2022 while (last >= start) { 2023 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 2024 2025 prange = svm_range_new(svms, start, l, true); 2026 if (!prange) 2027 return -ENOMEM; 2028 list_add(&prange->list, insert_list); 2029 list_add(&prange->update_list, update_list); 2030 2031 start = l + 1; 2032 } 2033 return 0; 2034 } 2035 2036 /** 2037 * svm_range_add - add svm range and handle overlap 2038 * @p: the range add to this process svms 2039 * @start: page size aligned 2040 * @size: page size aligned 2041 * @nattr: number of attributes 2042 * @attrs: array of attributes 2043 * @update_list: output, the ranges need validate and update GPU mapping 2044 * @insert_list: output, the ranges need insert to svms 2045 * @remove_list: output, the ranges are replaced and need remove from svms 2046 * 2047 * Check if the virtual address range has overlap with any existing ranges, 2048 * split partly overlapping ranges and add new ranges in the gaps. All changes 2049 * should be applied to the range_list and interval tree transactionally. If 2050 * any range split or allocation fails, the entire update fails. Therefore any 2051 * existing overlapping svm_ranges are cloned and the original svm_ranges left 2052 * unchanged. 2053 * 2054 * If the transaction succeeds, the caller can update and insert clones and 2055 * new ranges, then free the originals. 2056 * 2057 * Otherwise the caller can free the clones and new ranges, while the old 2058 * svm_ranges remain unchanged. 2059 * 2060 * Context: Process context, caller must hold svms->lock 2061 * 2062 * Return: 2063 * 0 - OK, otherwise error code 2064 */ 2065 static int 2066 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2067 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2068 struct list_head *update_list, struct list_head *insert_list, 2069 struct list_head *remove_list) 2070 { 2071 unsigned long last = start + size - 1UL; 2072 struct svm_range_list *svms = &p->svms; 2073 struct interval_tree_node *node; 2074 struct svm_range *prange; 2075 struct svm_range *tmp; 2076 struct list_head new_list; 2077 int r = 0; 2078 2079 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2080 2081 INIT_LIST_HEAD(update_list); 2082 INIT_LIST_HEAD(insert_list); 2083 INIT_LIST_HEAD(remove_list); 2084 INIT_LIST_HEAD(&new_list); 2085 2086 node = interval_tree_iter_first(&svms->objects, start, last); 2087 while (node) { 2088 struct interval_tree_node *next; 2089 unsigned long next_start; 2090 2091 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2092 node->last); 2093 2094 prange = container_of(node, struct svm_range, it_node); 2095 next = interval_tree_iter_next(node, start, last); 2096 next_start = min(node->last, last) + 1; 2097 2098 if (svm_range_is_same_attrs(p, prange, nattr, attrs)) { 2099 /* nothing to do */ 2100 } else if (node->start < start || node->last > last) { 2101 /* node intersects the update range and its attributes 2102 * will change. Clone and split it, apply updates only 2103 * to the overlapping part 2104 */ 2105 struct svm_range *old = prange; 2106 2107 prange = svm_range_clone(old); 2108 if (!prange) { 2109 r = -ENOMEM; 2110 goto out; 2111 } 2112 2113 list_add(&old->update_list, remove_list); 2114 list_add(&prange->list, insert_list); 2115 list_add(&prange->update_list, update_list); 2116 2117 if (node->start < start) { 2118 pr_debug("change old range start\n"); 2119 r = svm_range_split_head(prange, start, 2120 insert_list); 2121 if (r) 2122 goto out; 2123 } 2124 if (node->last > last) { 2125 pr_debug("change old range last\n"); 2126 r = svm_range_split_tail(prange, last, 2127 insert_list); 2128 if (r) 2129 goto out; 2130 } 2131 } else { 2132 /* The node is contained within start..last, 2133 * just update it 2134 */ 2135 list_add(&prange->update_list, update_list); 2136 } 2137 2138 /* insert a new node if needed */ 2139 if (node->start > start) { 2140 r = svm_range_split_new(svms, start, node->start - 1, 2141 READ_ONCE(max_svm_range_pages), 2142 &new_list, update_list); 2143 if (r) 2144 goto out; 2145 } 2146 2147 node = next; 2148 start = next_start; 2149 } 2150 2151 /* add a final range at the end if needed */ 2152 if (start <= last) 2153 r = svm_range_split_new(svms, start, last, 2154 READ_ONCE(max_svm_range_pages), 2155 &new_list, update_list); 2156 2157 out: 2158 if (r) { 2159 list_for_each_entry_safe(prange, tmp, insert_list, list) 2160 svm_range_free(prange, false); 2161 list_for_each_entry_safe(prange, tmp, &new_list, list) 2162 svm_range_free(prange, true); 2163 } else { 2164 list_splice(&new_list, insert_list); 2165 } 2166 2167 return r; 2168 } 2169 2170 static void 2171 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2172 struct svm_range *prange) 2173 { 2174 unsigned long start; 2175 unsigned long last; 2176 2177 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2178 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2179 2180 if (prange->start == start && prange->last == last) 2181 return; 2182 2183 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2184 prange->svms, prange, start, last, prange->start, 2185 prange->last); 2186 2187 if (start != 0 && last != 0) { 2188 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2189 svm_range_remove_notifier(prange); 2190 } 2191 prange->it_node.start = prange->start; 2192 prange->it_node.last = prange->last; 2193 2194 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2195 svm_range_add_notifier_locked(mm, prange); 2196 } 2197 2198 static void 2199 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2200 struct mm_struct *mm) 2201 { 2202 switch (prange->work_item.op) { 2203 case SVM_OP_NULL: 2204 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2205 svms, prange, prange->start, prange->last); 2206 break; 2207 case SVM_OP_UNMAP_RANGE: 2208 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2209 svms, prange, prange->start, prange->last); 2210 svm_range_unlink(prange); 2211 svm_range_remove_notifier(prange); 2212 svm_range_free(prange, true); 2213 break; 2214 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2215 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2216 svms, prange, prange->start, prange->last); 2217 svm_range_update_notifier_and_interval_tree(mm, prange); 2218 break; 2219 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2220 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2221 svms, prange, prange->start, prange->last); 2222 svm_range_update_notifier_and_interval_tree(mm, prange); 2223 /* TODO: implement deferred validation and mapping */ 2224 break; 2225 case SVM_OP_ADD_RANGE: 2226 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2227 prange->start, prange->last); 2228 svm_range_add_to_svms(prange); 2229 svm_range_add_notifier_locked(mm, prange); 2230 break; 2231 case SVM_OP_ADD_RANGE_AND_MAP: 2232 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2233 prange, prange->start, prange->last); 2234 svm_range_add_to_svms(prange); 2235 svm_range_add_notifier_locked(mm, prange); 2236 /* TODO: implement deferred validation and mapping */ 2237 break; 2238 default: 2239 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2240 prange->work_item.op); 2241 } 2242 } 2243 2244 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2245 { 2246 struct kfd_process_device *pdd; 2247 struct kfd_process *p; 2248 int drain; 2249 uint32_t i; 2250 2251 p = container_of(svms, struct kfd_process, svms); 2252 2253 restart: 2254 drain = atomic_read(&svms->drain_pagefaults); 2255 if (!drain) 2256 return; 2257 2258 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2259 pdd = p->pdds[i]; 2260 if (!pdd) 2261 continue; 2262 2263 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2264 2265 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2266 pdd->dev->adev->irq.retry_cam_enabled ? 2267 &pdd->dev->adev->irq.ih : 2268 &pdd->dev->adev->irq.ih1); 2269 2270 if (pdd->dev->adev->irq.retry_cam_enabled) 2271 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2272 &pdd->dev->adev->irq.ih_soft); 2273 2274 2275 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2276 } 2277 if (atomic_cmpxchg(&svms->drain_pagefaults, drain, 0) != drain) 2278 goto restart; 2279 } 2280 2281 static void svm_range_deferred_list_work(struct work_struct *work) 2282 { 2283 struct svm_range_list *svms; 2284 struct svm_range *prange; 2285 struct mm_struct *mm; 2286 2287 svms = container_of(work, struct svm_range_list, deferred_list_work); 2288 pr_debug("enter svms 0x%p\n", svms); 2289 2290 spin_lock(&svms->deferred_list_lock); 2291 while (!list_empty(&svms->deferred_range_list)) { 2292 prange = list_first_entry(&svms->deferred_range_list, 2293 struct svm_range, deferred_list); 2294 spin_unlock(&svms->deferred_list_lock); 2295 2296 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2297 prange->start, prange->last, prange->work_item.op); 2298 2299 mm = prange->work_item.mm; 2300 retry: 2301 mmap_write_lock(mm); 2302 2303 /* Checking for the need to drain retry faults must be inside 2304 * mmap write lock to serialize with munmap notifiers. 2305 */ 2306 if (unlikely(atomic_read(&svms->drain_pagefaults))) { 2307 mmap_write_unlock(mm); 2308 svm_range_drain_retry_fault(svms); 2309 goto retry; 2310 } 2311 2312 /* Remove from deferred_list must be inside mmap write lock, for 2313 * two race cases: 2314 * 1. unmap_from_cpu may change work_item.op and add the range 2315 * to deferred_list again, cause use after free bug. 2316 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2317 * lock and continue because deferred_list is empty, but 2318 * deferred_list work is actually waiting for mmap lock. 2319 */ 2320 spin_lock(&svms->deferred_list_lock); 2321 list_del_init(&prange->deferred_list); 2322 spin_unlock(&svms->deferred_list_lock); 2323 2324 mutex_lock(&svms->lock); 2325 mutex_lock(&prange->migrate_mutex); 2326 while (!list_empty(&prange->child_list)) { 2327 struct svm_range *pchild; 2328 2329 pchild = list_first_entry(&prange->child_list, 2330 struct svm_range, child_list); 2331 pr_debug("child prange 0x%p op %d\n", pchild, 2332 pchild->work_item.op); 2333 list_del_init(&pchild->child_list); 2334 svm_range_handle_list_op(svms, pchild, mm); 2335 } 2336 mutex_unlock(&prange->migrate_mutex); 2337 2338 svm_range_handle_list_op(svms, prange, mm); 2339 mutex_unlock(&svms->lock); 2340 mmap_write_unlock(mm); 2341 2342 /* Pairs with mmget in svm_range_add_list_work */ 2343 mmput(mm); 2344 2345 spin_lock(&svms->deferred_list_lock); 2346 } 2347 spin_unlock(&svms->deferred_list_lock); 2348 pr_debug("exit svms 0x%p\n", svms); 2349 } 2350 2351 void 2352 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2353 struct mm_struct *mm, enum svm_work_list_ops op) 2354 { 2355 spin_lock(&svms->deferred_list_lock); 2356 /* if prange is on the deferred list */ 2357 if (!list_empty(&prange->deferred_list)) { 2358 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2359 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2360 if (op != SVM_OP_NULL && 2361 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2362 prange->work_item.op = op; 2363 } else { 2364 prange->work_item.op = op; 2365 2366 /* Pairs with mmput in deferred_list_work */ 2367 mmget(mm); 2368 prange->work_item.mm = mm; 2369 list_add_tail(&prange->deferred_list, 2370 &prange->svms->deferred_range_list); 2371 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2372 prange, prange->start, prange->last, op); 2373 } 2374 spin_unlock(&svms->deferred_list_lock); 2375 } 2376 2377 void schedule_deferred_list_work(struct svm_range_list *svms) 2378 { 2379 spin_lock(&svms->deferred_list_lock); 2380 if (!list_empty(&svms->deferred_range_list)) 2381 schedule_work(&svms->deferred_list_work); 2382 spin_unlock(&svms->deferred_list_lock); 2383 } 2384 2385 static void 2386 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent, 2387 struct svm_range *prange, unsigned long start, 2388 unsigned long last) 2389 { 2390 struct svm_range *head; 2391 struct svm_range *tail; 2392 2393 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2394 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2395 prange->start, prange->last); 2396 return; 2397 } 2398 if (start > prange->last || last < prange->start) 2399 return; 2400 2401 head = tail = prange; 2402 if (start > prange->start) 2403 svm_range_split(prange, prange->start, start - 1, &tail); 2404 if (last < tail->last) 2405 svm_range_split(tail, last + 1, tail->last, &head); 2406 2407 if (head != prange && tail != prange) { 2408 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2409 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 2410 } else if (tail != prange) { 2411 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE); 2412 } else if (head != prange) { 2413 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2414 } else if (parent != prange) { 2415 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2416 } 2417 } 2418 2419 static void 2420 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2421 unsigned long start, unsigned long last) 2422 { 2423 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2424 struct svm_range_list *svms; 2425 struct svm_range *pchild; 2426 struct kfd_process *p; 2427 unsigned long s, l; 2428 bool unmap_parent; 2429 2430 p = kfd_lookup_process_by_mm(mm); 2431 if (!p) 2432 return; 2433 svms = &p->svms; 2434 2435 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2436 prange, prange->start, prange->last, start, last); 2437 2438 /* Make sure pending page faults are drained in the deferred worker 2439 * before the range is freed to avoid straggler interrupts on 2440 * unmapped memory causing "phantom faults". 2441 */ 2442 atomic_inc(&svms->drain_pagefaults); 2443 2444 unmap_parent = start <= prange->start && last >= prange->last; 2445 2446 list_for_each_entry(pchild, &prange->child_list, child_list) { 2447 mutex_lock_nested(&pchild->lock, 1); 2448 s = max(start, pchild->start); 2449 l = min(last, pchild->last); 2450 if (l >= s) 2451 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2452 svm_range_unmap_split(mm, prange, pchild, start, last); 2453 mutex_unlock(&pchild->lock); 2454 } 2455 s = max(start, prange->start); 2456 l = min(last, prange->last); 2457 if (l >= s) 2458 svm_range_unmap_from_gpus(prange, s, l, trigger); 2459 svm_range_unmap_split(mm, prange, prange, start, last); 2460 2461 if (unmap_parent) 2462 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2463 else 2464 svm_range_add_list_work(svms, prange, mm, 2465 SVM_OP_UPDATE_RANGE_NOTIFIER); 2466 schedule_deferred_list_work(svms); 2467 2468 kfd_unref_process(p); 2469 } 2470 2471 /** 2472 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2473 * @mni: mmu_interval_notifier struct 2474 * @range: mmu_notifier_range struct 2475 * @cur_seq: value to pass to mmu_interval_set_seq() 2476 * 2477 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2478 * is from migration, or CPU page invalidation callback. 2479 * 2480 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2481 * work thread, and split prange if only part of prange is unmapped. 2482 * 2483 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2484 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2485 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2486 * update GPU mapping to recover. 2487 * 2488 * Context: mmap lock, notifier_invalidate_start lock are held 2489 * for invalidate event, prange lock is held if this is from migration 2490 */ 2491 static bool 2492 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2493 const struct mmu_notifier_range *range, 2494 unsigned long cur_seq) 2495 { 2496 struct svm_range *prange; 2497 unsigned long start; 2498 unsigned long last; 2499 2500 if (range->event == MMU_NOTIFY_RELEASE) 2501 return true; 2502 if (!mmget_not_zero(mni->mm)) 2503 return true; 2504 2505 start = mni->interval_tree.start; 2506 last = mni->interval_tree.last; 2507 start = max(start, range->start) >> PAGE_SHIFT; 2508 last = min(last, range->end - 1) >> PAGE_SHIFT; 2509 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2510 start, last, range->start >> PAGE_SHIFT, 2511 (range->end - 1) >> PAGE_SHIFT, 2512 mni->interval_tree.start >> PAGE_SHIFT, 2513 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2514 2515 prange = container_of(mni, struct svm_range, notifier); 2516 2517 svm_range_lock(prange); 2518 mmu_interval_set_seq(mni, cur_seq); 2519 2520 switch (range->event) { 2521 case MMU_NOTIFY_UNMAP: 2522 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2523 break; 2524 default: 2525 svm_range_evict(prange, mni->mm, start, last, range->event); 2526 break; 2527 } 2528 2529 svm_range_unlock(prange); 2530 mmput(mni->mm); 2531 2532 return true; 2533 } 2534 2535 /** 2536 * svm_range_from_addr - find svm range from fault address 2537 * @svms: svm range list header 2538 * @addr: address to search range interval tree, in pages 2539 * @parent: parent range if range is on child list 2540 * 2541 * Context: The caller must hold svms->lock 2542 * 2543 * Return: the svm_range found or NULL 2544 */ 2545 struct svm_range * 2546 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2547 struct svm_range **parent) 2548 { 2549 struct interval_tree_node *node; 2550 struct svm_range *prange; 2551 struct svm_range *pchild; 2552 2553 node = interval_tree_iter_first(&svms->objects, addr, addr); 2554 if (!node) 2555 return NULL; 2556 2557 prange = container_of(node, struct svm_range, it_node); 2558 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2559 addr, prange->start, prange->last, node->start, node->last); 2560 2561 if (addr >= prange->start && addr <= prange->last) { 2562 if (parent) 2563 *parent = prange; 2564 return prange; 2565 } 2566 list_for_each_entry(pchild, &prange->child_list, child_list) 2567 if (addr >= pchild->start && addr <= pchild->last) { 2568 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2569 addr, pchild->start, pchild->last); 2570 if (parent) 2571 *parent = prange; 2572 return pchild; 2573 } 2574 2575 return NULL; 2576 } 2577 2578 /* svm_range_best_restore_location - decide the best fault restore location 2579 * @prange: svm range structure 2580 * @adev: the GPU on which vm fault happened 2581 * 2582 * This is only called when xnack is on, to decide the best location to restore 2583 * the range mapping after GPU vm fault. Caller uses the best location to do 2584 * migration if actual loc is not best location, then update GPU page table 2585 * mapping to the best location. 2586 * 2587 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2588 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2589 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2590 * if range actual loc is cpu, best_loc is cpu 2591 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2592 * range actual loc. 2593 * Otherwise, GPU no access, best_loc is -1. 2594 * 2595 * Return: 2596 * -1 means vm fault GPU no access 2597 * 0 for CPU or GPU id 2598 */ 2599 static int32_t 2600 svm_range_best_restore_location(struct svm_range *prange, 2601 struct kfd_node *node, 2602 int32_t *gpuidx) 2603 { 2604 struct kfd_node *bo_node, *preferred_node; 2605 struct kfd_process *p; 2606 uint32_t gpuid; 2607 int r; 2608 2609 p = container_of(prange->svms, struct kfd_process, svms); 2610 2611 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2612 if (r < 0) { 2613 pr_debug("failed to get gpuid from kgd\n"); 2614 return -1; 2615 } 2616 2617 if (node->adev->gmc.is_app_apu) 2618 return 0; 2619 2620 if (prange->preferred_loc == gpuid || 2621 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2622 return prange->preferred_loc; 2623 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2624 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2625 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2626 return prange->preferred_loc; 2627 /* fall through */ 2628 } 2629 2630 if (test_bit(*gpuidx, prange->bitmap_access)) 2631 return gpuid; 2632 2633 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2634 if (!prange->actual_loc) 2635 return 0; 2636 2637 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2638 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2639 return prange->actual_loc; 2640 else 2641 return 0; 2642 } 2643 2644 return -1; 2645 } 2646 2647 static int 2648 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2649 unsigned long *start, unsigned long *last, 2650 bool *is_heap_stack) 2651 { 2652 struct vm_area_struct *vma; 2653 struct interval_tree_node *node; 2654 unsigned long start_limit, end_limit; 2655 2656 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2657 if (!vma) { 2658 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2659 return -EFAULT; 2660 } 2661 2662 *is_heap_stack = (vma->vm_start <= vma->vm_mm->brk && 2663 vma->vm_end >= vma->vm_mm->start_brk) || 2664 (vma->vm_start <= vma->vm_mm->start_stack && 2665 vma->vm_end >= vma->vm_mm->start_stack); 2666 2667 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2668 (unsigned long)ALIGN_DOWN(addr, 2UL << 8)); 2669 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2670 (unsigned long)ALIGN(addr + 1, 2UL << 8)); 2671 /* First range that starts after the fault address */ 2672 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2673 if (node) { 2674 end_limit = min(end_limit, node->start); 2675 /* Last range that ends before the fault address */ 2676 node = container_of(rb_prev(&node->rb), 2677 struct interval_tree_node, rb); 2678 } else { 2679 /* Last range must end before addr because 2680 * there was no range after addr 2681 */ 2682 node = container_of(rb_last(&p->svms.objects.rb_root), 2683 struct interval_tree_node, rb); 2684 } 2685 if (node) { 2686 if (node->last >= addr) { 2687 WARN(1, "Overlap with prev node and page fault addr\n"); 2688 return -EFAULT; 2689 } 2690 start_limit = max(start_limit, node->last + 1); 2691 } 2692 2693 *start = start_limit; 2694 *last = end_limit - 1; 2695 2696 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2697 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2698 *start, *last, *is_heap_stack); 2699 2700 return 0; 2701 } 2702 2703 static int 2704 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2705 uint64_t *bo_s, uint64_t *bo_l) 2706 { 2707 struct amdgpu_bo_va_mapping *mapping; 2708 struct interval_tree_node *node; 2709 struct amdgpu_bo *bo = NULL; 2710 unsigned long userptr; 2711 uint32_t i; 2712 int r; 2713 2714 for (i = 0; i < p->n_pdds; i++) { 2715 struct amdgpu_vm *vm; 2716 2717 if (!p->pdds[i]->drm_priv) 2718 continue; 2719 2720 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2721 r = amdgpu_bo_reserve(vm->root.bo, false); 2722 if (r) 2723 return r; 2724 2725 /* Check userptr by searching entire vm->va interval tree */ 2726 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2727 while (node) { 2728 mapping = container_of((struct rb_node *)node, 2729 struct amdgpu_bo_va_mapping, rb); 2730 bo = mapping->bo_va->base.bo; 2731 2732 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2733 start << PAGE_SHIFT, 2734 last << PAGE_SHIFT, 2735 &userptr)) { 2736 node = interval_tree_iter_next(node, 0, ~0ULL); 2737 continue; 2738 } 2739 2740 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2741 start, last); 2742 if (bo_s && bo_l) { 2743 *bo_s = userptr >> PAGE_SHIFT; 2744 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2745 } 2746 amdgpu_bo_unreserve(vm->root.bo); 2747 return -EADDRINUSE; 2748 } 2749 amdgpu_bo_unreserve(vm->root.bo); 2750 } 2751 return 0; 2752 } 2753 2754 static struct 2755 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2756 struct kfd_process *p, 2757 struct mm_struct *mm, 2758 int64_t addr) 2759 { 2760 struct svm_range *prange = NULL; 2761 unsigned long start, last; 2762 uint32_t gpuid, gpuidx; 2763 bool is_heap_stack; 2764 uint64_t bo_s = 0; 2765 uint64_t bo_l = 0; 2766 int r; 2767 2768 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2769 &is_heap_stack)) 2770 return NULL; 2771 2772 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2773 if (r != -EADDRINUSE) 2774 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2775 2776 if (r == -EADDRINUSE) { 2777 if (addr >= bo_s && addr <= bo_l) 2778 return NULL; 2779 2780 /* Create one page svm range if 2MB range overlapping */ 2781 start = addr; 2782 last = addr; 2783 } 2784 2785 prange = svm_range_new(&p->svms, start, last, true); 2786 if (!prange) { 2787 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2788 return NULL; 2789 } 2790 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2791 pr_debug("failed to get gpuid from kgd\n"); 2792 svm_range_free(prange, true); 2793 return NULL; 2794 } 2795 2796 if (is_heap_stack) 2797 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2798 2799 svm_range_add_to_svms(prange); 2800 svm_range_add_notifier_locked(mm, prange); 2801 2802 return prange; 2803 } 2804 2805 /* svm_range_skip_recover - decide if prange can be recovered 2806 * @prange: svm range structure 2807 * 2808 * GPU vm retry fault handle skip recover the range for cases: 2809 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2810 * deferred list work will drain the stale fault before free the prange. 2811 * 2. prange is on deferred list to add interval notifier after split, or 2812 * 3. prange is child range, it is split from parent prange, recover later 2813 * after interval notifier is added. 2814 * 2815 * Return: true to skip recover, false to recover 2816 */ 2817 static bool svm_range_skip_recover(struct svm_range *prange) 2818 { 2819 struct svm_range_list *svms = prange->svms; 2820 2821 spin_lock(&svms->deferred_list_lock); 2822 if (list_empty(&prange->deferred_list) && 2823 list_empty(&prange->child_list)) { 2824 spin_unlock(&svms->deferred_list_lock); 2825 return false; 2826 } 2827 spin_unlock(&svms->deferred_list_lock); 2828 2829 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2830 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2831 svms, prange, prange->start, prange->last); 2832 return true; 2833 } 2834 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2835 prange->work_item.op == SVM_OP_ADD_RANGE) { 2836 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2837 svms, prange, prange->start, prange->last); 2838 return true; 2839 } 2840 return false; 2841 } 2842 2843 static void 2844 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 2845 int32_t gpuidx) 2846 { 2847 struct kfd_process_device *pdd; 2848 2849 /* fault is on different page of same range 2850 * or fault is skipped to recover later 2851 * or fault is on invalid virtual address 2852 */ 2853 if (gpuidx == MAX_GPU_INSTANCE) { 2854 uint32_t gpuid; 2855 int r; 2856 2857 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 2858 if (r < 0) 2859 return; 2860 } 2861 2862 /* fault is recovered 2863 * or fault cannot recover because GPU no access on the range 2864 */ 2865 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2866 if (pdd) 2867 WRITE_ONCE(pdd->faults, pdd->faults + 1); 2868 } 2869 2870 static bool 2871 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 2872 { 2873 unsigned long requested = VM_READ; 2874 2875 if (write_fault) 2876 requested |= VM_WRITE; 2877 2878 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 2879 vma->vm_flags); 2880 return (vma->vm_flags & requested) == requested; 2881 } 2882 2883 int 2884 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 2885 uint32_t vmid, uint32_t node_id, 2886 uint64_t addr, bool write_fault) 2887 { 2888 struct mm_struct *mm = NULL; 2889 struct svm_range_list *svms; 2890 struct svm_range *prange; 2891 struct kfd_process *p; 2892 ktime_t timestamp = ktime_get_boottime(); 2893 struct kfd_node *node; 2894 int32_t best_loc; 2895 int32_t gpuidx = MAX_GPU_INSTANCE; 2896 bool write_locked = false; 2897 struct vm_area_struct *vma; 2898 bool migration = false; 2899 int r = 0; 2900 2901 if (!KFD_IS_SVM_API_SUPPORTED(adev)) { 2902 pr_debug("device does not support SVM\n"); 2903 return -EFAULT; 2904 } 2905 2906 p = kfd_lookup_process_by_pasid(pasid); 2907 if (!p) { 2908 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 2909 return 0; 2910 } 2911 svms = &p->svms; 2912 2913 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 2914 2915 if (atomic_read(&svms->drain_pagefaults)) { 2916 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 2917 r = 0; 2918 goto out; 2919 } 2920 2921 if (!p->xnack_enabled) { 2922 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 2923 r = -EFAULT; 2924 goto out; 2925 } 2926 2927 /* p->lead_thread is available as kfd_process_wq_release flush the work 2928 * before releasing task ref. 2929 */ 2930 mm = get_task_mm(p->lead_thread); 2931 if (!mm) { 2932 pr_debug("svms 0x%p failed to get mm\n", svms); 2933 r = 0; 2934 goto out; 2935 } 2936 2937 node = kfd_node_by_irq_ids(adev, node_id, vmid); 2938 if (!node) { 2939 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 2940 vmid); 2941 r = -EFAULT; 2942 goto out; 2943 } 2944 mmap_read_lock(mm); 2945 retry_write_locked: 2946 mutex_lock(&svms->lock); 2947 prange = svm_range_from_addr(svms, addr, NULL); 2948 if (!prange) { 2949 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 2950 svms, addr); 2951 if (!write_locked) { 2952 /* Need the write lock to create new range with MMU notifier. 2953 * Also flush pending deferred work to make sure the interval 2954 * tree is up to date before we add a new range 2955 */ 2956 mutex_unlock(&svms->lock); 2957 mmap_read_unlock(mm); 2958 mmap_write_lock(mm); 2959 write_locked = true; 2960 goto retry_write_locked; 2961 } 2962 prange = svm_range_create_unregistered_range(node, p, mm, addr); 2963 if (!prange) { 2964 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 2965 svms, addr); 2966 mmap_write_downgrade(mm); 2967 r = -EFAULT; 2968 goto out_unlock_svms; 2969 } 2970 } 2971 if (write_locked) 2972 mmap_write_downgrade(mm); 2973 2974 mutex_lock(&prange->migrate_mutex); 2975 2976 if (svm_range_skip_recover(prange)) { 2977 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 2978 r = 0; 2979 goto out_unlock_range; 2980 } 2981 2982 /* skip duplicate vm fault on different pages of same range */ 2983 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 2984 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 2985 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 2986 svms, prange->start, prange->last); 2987 r = 0; 2988 goto out_unlock_range; 2989 } 2990 2991 /* __do_munmap removed VMA, return success as we are handling stale 2992 * retry fault. 2993 */ 2994 vma = vma_lookup(mm, addr << PAGE_SHIFT); 2995 if (!vma) { 2996 pr_debug("address 0x%llx VMA is removed\n", addr); 2997 r = 0; 2998 goto out_unlock_range; 2999 } 3000 3001 if (!svm_fault_allowed(vma, write_fault)) { 3002 pr_debug("fault addr 0x%llx no %s permission\n", addr, 3003 write_fault ? "write" : "read"); 3004 r = -EPERM; 3005 goto out_unlock_range; 3006 } 3007 3008 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 3009 if (best_loc == -1) { 3010 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 3011 svms, prange->start, prange->last); 3012 r = -EACCES; 3013 goto out_unlock_range; 3014 } 3015 3016 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 3017 svms, prange->start, prange->last, best_loc, 3018 prange->actual_loc); 3019 3020 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr, 3021 write_fault, timestamp); 3022 3023 if (prange->actual_loc != best_loc) { 3024 migration = true; 3025 if (best_loc) { 3026 r = svm_migrate_to_vram(prange, best_loc, mm, 3027 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 3028 if (r) { 3029 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 3030 r, addr); 3031 /* Fallback to system memory if migration to 3032 * VRAM failed 3033 */ 3034 if (prange->actual_loc) 3035 r = svm_migrate_vram_to_ram(prange, mm, 3036 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, 3037 NULL); 3038 else 3039 r = 0; 3040 } 3041 } else { 3042 r = svm_migrate_vram_to_ram(prange, mm, 3043 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, 3044 NULL); 3045 } 3046 if (r) { 3047 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 3048 r, svms, prange->start, prange->last); 3049 goto out_unlock_range; 3050 } 3051 } 3052 3053 r = svm_range_validate_and_map(mm, prange, gpuidx, false, false, false); 3054 if (r) 3055 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 3056 r, svms, prange->start, prange->last); 3057 3058 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr, 3059 migration); 3060 3061 out_unlock_range: 3062 mutex_unlock(&prange->migrate_mutex); 3063 out_unlock_svms: 3064 mutex_unlock(&svms->lock); 3065 mmap_read_unlock(mm); 3066 3067 svm_range_count_fault(node, p, gpuidx); 3068 3069 mmput(mm); 3070 out: 3071 kfd_unref_process(p); 3072 3073 if (r == -EAGAIN) { 3074 pr_debug("recover vm fault later\n"); 3075 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3076 r = 0; 3077 } 3078 return r; 3079 } 3080 3081 int 3082 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3083 { 3084 struct svm_range *prange, *pchild; 3085 uint64_t reserved_size = 0; 3086 uint64_t size; 3087 int r = 0; 3088 3089 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3090 3091 mutex_lock(&p->svms.lock); 3092 3093 list_for_each_entry(prange, &p->svms.list, list) { 3094 svm_range_lock(prange); 3095 list_for_each_entry(pchild, &prange->child_list, child_list) { 3096 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3097 if (xnack_enabled) { 3098 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3099 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3100 } else { 3101 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3102 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3103 if (r) 3104 goto out_unlock; 3105 reserved_size += size; 3106 } 3107 } 3108 3109 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3110 if (xnack_enabled) { 3111 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3112 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3113 } else { 3114 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3115 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3116 if (r) 3117 goto out_unlock; 3118 reserved_size += size; 3119 } 3120 out_unlock: 3121 svm_range_unlock(prange); 3122 if (r) 3123 break; 3124 } 3125 3126 if (r) 3127 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3128 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3129 else 3130 /* Change xnack mode must be inside svms lock, to avoid race with 3131 * svm_range_deferred_list_work unreserve memory in parallel. 3132 */ 3133 p->xnack_enabled = xnack_enabled; 3134 3135 mutex_unlock(&p->svms.lock); 3136 return r; 3137 } 3138 3139 void svm_range_list_fini(struct kfd_process *p) 3140 { 3141 struct svm_range *prange; 3142 struct svm_range *next; 3143 3144 pr_debug("pasid 0x%x svms 0x%p\n", p->pasid, &p->svms); 3145 3146 cancel_delayed_work_sync(&p->svms.restore_work); 3147 3148 /* Ensure list work is finished before process is destroyed */ 3149 flush_work(&p->svms.deferred_list_work); 3150 3151 /* 3152 * Ensure no retry fault comes in afterwards, as page fault handler will 3153 * not find kfd process and take mm lock to recover fault. 3154 */ 3155 atomic_inc(&p->svms.drain_pagefaults); 3156 svm_range_drain_retry_fault(&p->svms); 3157 3158 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3159 svm_range_unlink(prange); 3160 svm_range_remove_notifier(prange); 3161 svm_range_free(prange, true); 3162 } 3163 3164 mutex_destroy(&p->svms.lock); 3165 3166 pr_debug("pasid 0x%x svms 0x%p done\n", p->pasid, &p->svms); 3167 } 3168 3169 int svm_range_list_init(struct kfd_process *p) 3170 { 3171 struct svm_range_list *svms = &p->svms; 3172 int i; 3173 3174 svms->objects = RB_ROOT_CACHED; 3175 mutex_init(&svms->lock); 3176 INIT_LIST_HEAD(&svms->list); 3177 atomic_set(&svms->evicted_ranges, 0); 3178 atomic_set(&svms->drain_pagefaults, 0); 3179 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3180 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3181 INIT_LIST_HEAD(&svms->deferred_range_list); 3182 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3183 spin_lock_init(&svms->deferred_list_lock); 3184 3185 for (i = 0; i < p->n_pdds; i++) 3186 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev)) 3187 bitmap_set(svms->bitmap_supported, i, 1); 3188 3189 return 0; 3190 } 3191 3192 /** 3193 * svm_range_check_vm - check if virtual address range mapped already 3194 * @p: current kfd_process 3195 * @start: range start address, in pages 3196 * @last: range last address, in pages 3197 * @bo_s: mapping start address in pages if address range already mapped 3198 * @bo_l: mapping last address in pages if address range already mapped 3199 * 3200 * The purpose is to avoid virtual address ranges already allocated by 3201 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3202 * It looks for each pdd in the kfd_process. 3203 * 3204 * Context: Process context 3205 * 3206 * Return 0 - OK, if the range is not mapped. 3207 * Otherwise error code: 3208 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3209 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3210 * a signal. Release all buffer reservations and return to user-space. 3211 */ 3212 static int 3213 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3214 uint64_t *bo_s, uint64_t *bo_l) 3215 { 3216 struct amdgpu_bo_va_mapping *mapping; 3217 struct interval_tree_node *node; 3218 uint32_t i; 3219 int r; 3220 3221 for (i = 0; i < p->n_pdds; i++) { 3222 struct amdgpu_vm *vm; 3223 3224 if (!p->pdds[i]->drm_priv) 3225 continue; 3226 3227 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3228 r = amdgpu_bo_reserve(vm->root.bo, false); 3229 if (r) 3230 return r; 3231 3232 node = interval_tree_iter_first(&vm->va, start, last); 3233 if (node) { 3234 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3235 start, last); 3236 mapping = container_of((struct rb_node *)node, 3237 struct amdgpu_bo_va_mapping, rb); 3238 if (bo_s && bo_l) { 3239 *bo_s = mapping->start; 3240 *bo_l = mapping->last; 3241 } 3242 amdgpu_bo_unreserve(vm->root.bo); 3243 return -EADDRINUSE; 3244 } 3245 amdgpu_bo_unreserve(vm->root.bo); 3246 } 3247 3248 return 0; 3249 } 3250 3251 /** 3252 * svm_range_is_valid - check if virtual address range is valid 3253 * @p: current kfd_process 3254 * @start: range start address, in pages 3255 * @size: range size, in pages 3256 * 3257 * Valid virtual address range means it belongs to one or more VMAs 3258 * 3259 * Context: Process context 3260 * 3261 * Return: 3262 * 0 - OK, otherwise error code 3263 */ 3264 static int 3265 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3266 { 3267 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3268 struct vm_area_struct *vma; 3269 unsigned long end; 3270 unsigned long start_unchg = start; 3271 3272 start <<= PAGE_SHIFT; 3273 end = start + (size << PAGE_SHIFT); 3274 do { 3275 vma = vma_lookup(p->mm, start); 3276 if (!vma || (vma->vm_flags & device_vma)) 3277 return -EFAULT; 3278 start = min(end, vma->vm_end); 3279 } while (start < end); 3280 3281 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3282 NULL); 3283 } 3284 3285 /** 3286 * svm_range_best_prefetch_location - decide the best prefetch location 3287 * @prange: svm range structure 3288 * 3289 * For xnack off: 3290 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3291 * can be CPU or GPU. 3292 * 3293 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3294 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3295 * the best prefetch location is always CPU, because GPU can not have coherent 3296 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3297 * 3298 * For xnack on: 3299 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3300 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3301 * 3302 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3303 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3304 * prefetch location is always CPU. 3305 * 3306 * Context: Process context 3307 * 3308 * Return: 3309 * 0 for CPU or GPU id 3310 */ 3311 static uint32_t 3312 svm_range_best_prefetch_location(struct svm_range *prange) 3313 { 3314 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3315 uint32_t best_loc = prange->prefetch_loc; 3316 struct kfd_process_device *pdd; 3317 struct kfd_node *bo_node; 3318 struct kfd_process *p; 3319 uint32_t gpuidx; 3320 3321 p = container_of(prange->svms, struct kfd_process, svms); 3322 3323 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3324 goto out; 3325 3326 bo_node = svm_range_get_node_by_id(prange, best_loc); 3327 if (!bo_node) { 3328 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3329 best_loc = 0; 3330 goto out; 3331 } 3332 3333 if (bo_node->adev->gmc.is_app_apu) { 3334 best_loc = 0; 3335 goto out; 3336 } 3337 3338 if (p->xnack_enabled) 3339 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3340 else 3341 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3342 MAX_GPU_INSTANCE); 3343 3344 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3345 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3346 if (!pdd) { 3347 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3348 continue; 3349 } 3350 3351 if (pdd->dev->adev == bo_node->adev) 3352 continue; 3353 3354 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3355 best_loc = 0; 3356 break; 3357 } 3358 } 3359 3360 out: 3361 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3362 p->xnack_enabled, &p->svms, prange->start, prange->last, 3363 best_loc); 3364 3365 return best_loc; 3366 } 3367 3368 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3369 * @mm: current process mm_struct 3370 * @prange: svm range structure 3371 * @migrated: output, true if migration is triggered 3372 * 3373 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3374 * from ram to vram. 3375 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3376 * from vram to ram. 3377 * 3378 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3379 * and restore work: 3380 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3381 * stops all queues, schedule restore work 3382 * 2. svm_range_restore_work wait for migration is done by 3383 * a. svm_range_validate_vram takes prange->migrate_mutex 3384 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3385 * 3. restore work update mappings of GPU, resume all queues. 3386 * 3387 * Context: Process context 3388 * 3389 * Return: 3390 * 0 - OK, otherwise - error code of migration 3391 */ 3392 static int 3393 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3394 bool *migrated) 3395 { 3396 uint32_t best_loc; 3397 int r = 0; 3398 3399 *migrated = false; 3400 best_loc = svm_range_best_prefetch_location(prange); 3401 3402 if (best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3403 best_loc == prange->actual_loc) 3404 return 0; 3405 3406 if (!best_loc) { 3407 r = svm_migrate_vram_to_ram(prange, mm, 3408 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3409 *migrated = !r; 3410 return r; 3411 } 3412 3413 r = svm_migrate_to_vram(prange, best_loc, mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3414 *migrated = !r; 3415 3416 return r; 3417 } 3418 3419 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3420 { 3421 if (!fence) 3422 return -EINVAL; 3423 3424 if (dma_fence_is_signaled(&fence->base)) 3425 return 0; 3426 3427 if (fence->svm_bo) { 3428 WRITE_ONCE(fence->svm_bo->evicting, 1); 3429 schedule_work(&fence->svm_bo->eviction_work); 3430 } 3431 3432 return 0; 3433 } 3434 3435 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3436 { 3437 struct svm_range_bo *svm_bo; 3438 struct mm_struct *mm; 3439 int r = 0; 3440 3441 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3442 if (!svm_bo_ref_unless_zero(svm_bo)) 3443 return; /* svm_bo was freed while eviction was pending */ 3444 3445 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3446 mm = svm_bo->eviction_fence->mm; 3447 } else { 3448 svm_range_bo_unref(svm_bo); 3449 return; 3450 } 3451 3452 mmap_read_lock(mm); 3453 spin_lock(&svm_bo->list_lock); 3454 while (!list_empty(&svm_bo->range_list) && !r) { 3455 struct svm_range *prange = 3456 list_first_entry(&svm_bo->range_list, 3457 struct svm_range, svm_bo_list); 3458 int retries = 3; 3459 3460 list_del_init(&prange->svm_bo_list); 3461 spin_unlock(&svm_bo->list_lock); 3462 3463 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3464 prange->start, prange->last); 3465 3466 mutex_lock(&prange->migrate_mutex); 3467 do { 3468 r = svm_migrate_vram_to_ram(prange, mm, 3469 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3470 } while (!r && prange->actual_loc && --retries); 3471 3472 if (!r && prange->actual_loc) 3473 pr_info_once("Migration failed during eviction"); 3474 3475 if (!prange->actual_loc) { 3476 mutex_lock(&prange->lock); 3477 prange->svm_bo = NULL; 3478 mutex_unlock(&prange->lock); 3479 } 3480 mutex_unlock(&prange->migrate_mutex); 3481 3482 spin_lock(&svm_bo->list_lock); 3483 } 3484 spin_unlock(&svm_bo->list_lock); 3485 mmap_read_unlock(mm); 3486 mmput(mm); 3487 3488 dma_fence_signal(&svm_bo->eviction_fence->base); 3489 3490 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3491 * has been called in svm_migrate_vram_to_ram 3492 */ 3493 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3494 svm_range_bo_unref(svm_bo); 3495 } 3496 3497 static int 3498 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3499 uint64_t start, uint64_t size, uint32_t nattr, 3500 struct kfd_ioctl_svm_attribute *attrs) 3501 { 3502 struct amdkfd_process_info *process_info = p->kgd_process_info; 3503 struct list_head update_list; 3504 struct list_head insert_list; 3505 struct list_head remove_list; 3506 struct svm_range_list *svms; 3507 struct svm_range *prange; 3508 struct svm_range *next; 3509 bool update_mapping = false; 3510 bool flush_tlb; 3511 int r = 0; 3512 3513 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3514 p->pasid, &p->svms, start, start + size - 1, size); 3515 3516 r = svm_range_check_attr(p, nattr, attrs); 3517 if (r) 3518 return r; 3519 3520 svms = &p->svms; 3521 3522 mutex_lock(&process_info->lock); 3523 3524 svm_range_list_lock_and_flush_work(svms, mm); 3525 3526 r = svm_range_is_valid(p, start, size); 3527 if (r) { 3528 pr_debug("invalid range r=%d\n", r); 3529 mmap_write_unlock(mm); 3530 goto out; 3531 } 3532 3533 mutex_lock(&svms->lock); 3534 3535 /* Add new range and split existing ranges as needed */ 3536 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3537 &insert_list, &remove_list); 3538 if (r) { 3539 mutex_unlock(&svms->lock); 3540 mmap_write_unlock(mm); 3541 goto out; 3542 } 3543 /* Apply changes as a transaction */ 3544 list_for_each_entry_safe(prange, next, &insert_list, list) { 3545 svm_range_add_to_svms(prange); 3546 svm_range_add_notifier_locked(mm, prange); 3547 } 3548 list_for_each_entry(prange, &update_list, update_list) { 3549 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3550 /* TODO: unmap ranges from GPU that lost access */ 3551 } 3552 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3553 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3554 prange->svms, prange, prange->start, 3555 prange->last); 3556 svm_range_unlink(prange); 3557 svm_range_remove_notifier(prange); 3558 svm_range_free(prange, false); 3559 } 3560 3561 mmap_write_downgrade(mm); 3562 /* Trigger migrations and revalidate and map to GPUs as needed. If 3563 * this fails we may be left with partially completed actions. There 3564 * is no clean way of rolling back to the previous state in such a 3565 * case because the rollback wouldn't be guaranteed to work either. 3566 */ 3567 list_for_each_entry(prange, &update_list, update_list) { 3568 bool migrated; 3569 3570 mutex_lock(&prange->migrate_mutex); 3571 3572 r = svm_range_trigger_migration(mm, prange, &migrated); 3573 if (r) 3574 goto out_unlock_range; 3575 3576 if (migrated && (!p->xnack_enabled || 3577 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3578 prange->mapped_to_gpu) { 3579 pr_debug("restore_work will update mappings of GPUs\n"); 3580 mutex_unlock(&prange->migrate_mutex); 3581 continue; 3582 } 3583 3584 if (!migrated && !update_mapping) { 3585 mutex_unlock(&prange->migrate_mutex); 3586 continue; 3587 } 3588 3589 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3590 3591 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 3592 true, true, flush_tlb); 3593 if (r) 3594 pr_debug("failed %d to map svm range\n", r); 3595 3596 out_unlock_range: 3597 mutex_unlock(&prange->migrate_mutex); 3598 if (r) 3599 break; 3600 } 3601 3602 dynamic_svm_range_dump(svms); 3603 3604 mutex_unlock(&svms->lock); 3605 mmap_read_unlock(mm); 3606 out: 3607 mutex_unlock(&process_info->lock); 3608 3609 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid, 3610 &p->svms, start, start + size - 1, r); 3611 3612 return r; 3613 } 3614 3615 static int 3616 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3617 uint64_t start, uint64_t size, uint32_t nattr, 3618 struct kfd_ioctl_svm_attribute *attrs) 3619 { 3620 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3621 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3622 bool get_preferred_loc = false; 3623 bool get_prefetch_loc = false; 3624 bool get_granularity = false; 3625 bool get_accessible = false; 3626 bool get_flags = false; 3627 uint64_t last = start + size - 1UL; 3628 uint8_t granularity = 0xff; 3629 struct interval_tree_node *node; 3630 struct svm_range_list *svms; 3631 struct svm_range *prange; 3632 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3633 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3634 uint32_t flags_and = 0xffffffff; 3635 uint32_t flags_or = 0; 3636 int gpuidx; 3637 uint32_t i; 3638 int r = 0; 3639 3640 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3641 start + size - 1, nattr); 3642 3643 /* Flush pending deferred work to avoid racing with deferred actions from 3644 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3645 * can still race with get_attr because we don't hold the mmap lock. But that 3646 * would be a race condition in the application anyway, and undefined 3647 * behaviour is acceptable in that case. 3648 */ 3649 flush_work(&p->svms.deferred_list_work); 3650 3651 mmap_read_lock(mm); 3652 r = svm_range_is_valid(p, start, size); 3653 mmap_read_unlock(mm); 3654 if (r) { 3655 pr_debug("invalid range r=%d\n", r); 3656 return r; 3657 } 3658 3659 for (i = 0; i < nattr; i++) { 3660 switch (attrs[i].type) { 3661 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3662 get_preferred_loc = true; 3663 break; 3664 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3665 get_prefetch_loc = true; 3666 break; 3667 case KFD_IOCTL_SVM_ATTR_ACCESS: 3668 get_accessible = true; 3669 break; 3670 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3671 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3672 get_flags = true; 3673 break; 3674 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3675 get_granularity = true; 3676 break; 3677 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3678 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3679 fallthrough; 3680 default: 3681 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3682 return -EINVAL; 3683 } 3684 } 3685 3686 svms = &p->svms; 3687 3688 mutex_lock(&svms->lock); 3689 3690 node = interval_tree_iter_first(&svms->objects, start, last); 3691 if (!node) { 3692 pr_debug("range attrs not found return default values\n"); 3693 svm_range_set_default_attributes(&location, &prefetch_loc, 3694 &granularity, &flags_and); 3695 flags_or = flags_and; 3696 if (p->xnack_enabled) 3697 bitmap_copy(bitmap_access, svms->bitmap_supported, 3698 MAX_GPU_INSTANCE); 3699 else 3700 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3701 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3702 goto fill_values; 3703 } 3704 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3705 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3706 3707 while (node) { 3708 struct interval_tree_node *next; 3709 3710 prange = container_of(node, struct svm_range, it_node); 3711 next = interval_tree_iter_next(node, start, last); 3712 3713 if (get_preferred_loc) { 3714 if (prange->preferred_loc == 3715 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3716 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3717 location != prange->preferred_loc)) { 3718 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3719 get_preferred_loc = false; 3720 } else { 3721 location = prange->preferred_loc; 3722 } 3723 } 3724 if (get_prefetch_loc) { 3725 if (prange->prefetch_loc == 3726 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3727 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3728 prefetch_loc != prange->prefetch_loc)) { 3729 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3730 get_prefetch_loc = false; 3731 } else { 3732 prefetch_loc = prange->prefetch_loc; 3733 } 3734 } 3735 if (get_accessible) { 3736 bitmap_and(bitmap_access, bitmap_access, 3737 prange->bitmap_access, MAX_GPU_INSTANCE); 3738 bitmap_and(bitmap_aip, bitmap_aip, 3739 prange->bitmap_aip, MAX_GPU_INSTANCE); 3740 } 3741 if (get_flags) { 3742 flags_and &= prange->flags; 3743 flags_or |= prange->flags; 3744 } 3745 3746 if (get_granularity && prange->granularity < granularity) 3747 granularity = prange->granularity; 3748 3749 node = next; 3750 } 3751 fill_values: 3752 mutex_unlock(&svms->lock); 3753 3754 for (i = 0; i < nattr; i++) { 3755 switch (attrs[i].type) { 3756 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3757 attrs[i].value = location; 3758 break; 3759 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3760 attrs[i].value = prefetch_loc; 3761 break; 3762 case KFD_IOCTL_SVM_ATTR_ACCESS: 3763 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3764 attrs[i].value); 3765 if (gpuidx < 0) { 3766 pr_debug("invalid gpuid %x\n", attrs[i].value); 3767 return -EINVAL; 3768 } 3769 if (test_bit(gpuidx, bitmap_access)) 3770 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3771 else if (test_bit(gpuidx, bitmap_aip)) 3772 attrs[i].type = 3773 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3774 else 3775 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3776 break; 3777 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3778 attrs[i].value = flags_and; 3779 break; 3780 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3781 attrs[i].value = ~flags_or; 3782 break; 3783 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3784 attrs[i].value = (uint32_t)granularity; 3785 break; 3786 } 3787 } 3788 3789 return 0; 3790 } 3791 3792 int kfd_criu_resume_svm(struct kfd_process *p) 3793 { 3794 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3795 int nattr_common = 4, nattr_accessibility = 1; 3796 struct criu_svm_metadata *criu_svm_md = NULL; 3797 struct svm_range_list *svms = &p->svms; 3798 struct criu_svm_metadata *next = NULL; 3799 uint32_t set_flags = 0xffffffff; 3800 int i, j, num_attrs, ret = 0; 3801 uint64_t set_attr_size; 3802 struct mm_struct *mm; 3803 3804 if (list_empty(&svms->criu_svm_metadata_list)) { 3805 pr_debug("No SVM data from CRIU restore stage 2\n"); 3806 return ret; 3807 } 3808 3809 mm = get_task_mm(p->lead_thread); 3810 if (!mm) { 3811 pr_err("failed to get mm for the target process\n"); 3812 return -ESRCH; 3813 } 3814 3815 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 3816 3817 i = j = 0; 3818 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 3819 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 3820 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 3821 3822 for (j = 0; j < num_attrs; j++) { 3823 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 3824 i, j, criu_svm_md->data.attrs[j].type, 3825 i, j, criu_svm_md->data.attrs[j].value); 3826 switch (criu_svm_md->data.attrs[j].type) { 3827 /* During Checkpoint operation, the query for 3828 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 3829 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 3830 * not used by the range which was checkpointed. Care 3831 * must be taken to not restore with an invalid value 3832 * otherwise the gpuidx value will be invalid and 3833 * set_attr would eventually fail so just replace those 3834 * with another dummy attribute such as 3835 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 3836 */ 3837 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3838 if (criu_svm_md->data.attrs[j].value == 3839 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 3840 criu_svm_md->data.attrs[j].type = 3841 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3842 criu_svm_md->data.attrs[j].value = 0; 3843 } 3844 break; 3845 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3846 set_flags = criu_svm_md->data.attrs[j].value; 3847 break; 3848 default: 3849 break; 3850 } 3851 } 3852 3853 /* CLR_FLAGS is not available via get_attr during checkpoint but 3854 * it needs to be inserted before restoring the ranges so 3855 * allocate extra space for it before calling set_attr 3856 */ 3857 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3858 (num_attrs + 1); 3859 set_attr_new = krealloc(set_attr, set_attr_size, 3860 GFP_KERNEL); 3861 if (!set_attr_new) { 3862 ret = -ENOMEM; 3863 goto exit; 3864 } 3865 set_attr = set_attr_new; 3866 3867 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 3868 sizeof(struct kfd_ioctl_svm_attribute)); 3869 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 3870 set_attr[num_attrs].value = ~set_flags; 3871 3872 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 3873 criu_svm_md->data.size, num_attrs + 1, 3874 set_attr); 3875 if (ret) { 3876 pr_err("CRIU: failed to set range attributes\n"); 3877 goto exit; 3878 } 3879 3880 i++; 3881 } 3882 exit: 3883 kfree(set_attr); 3884 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 3885 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 3886 criu_svm_md->data.start_addr); 3887 kfree(criu_svm_md); 3888 } 3889 3890 mmput(mm); 3891 return ret; 3892 3893 } 3894 3895 int kfd_criu_restore_svm(struct kfd_process *p, 3896 uint8_t __user *user_priv_ptr, 3897 uint64_t *priv_data_offset, 3898 uint64_t max_priv_data_size) 3899 { 3900 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 3901 int nattr_common = 4, nattr_accessibility = 1; 3902 struct criu_svm_metadata *criu_svm_md = NULL; 3903 struct svm_range_list *svms = &p->svms; 3904 uint32_t num_devices; 3905 int ret = 0; 3906 3907 num_devices = p->n_pdds; 3908 /* Handle one SVM range object at a time, also the number of gpus are 3909 * assumed to be same on the restore node, checking must be done while 3910 * evaluating the topology earlier 3911 */ 3912 3913 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 3914 (nattr_common + nattr_accessibility * num_devices); 3915 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 3916 3917 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 3918 svm_attrs_size; 3919 3920 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 3921 if (!criu_svm_md) { 3922 pr_err("failed to allocate memory to store svm metadata\n"); 3923 return -ENOMEM; 3924 } 3925 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 3926 ret = -EINVAL; 3927 goto exit; 3928 } 3929 3930 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 3931 svm_priv_data_size); 3932 if (ret) { 3933 ret = -EFAULT; 3934 goto exit; 3935 } 3936 *priv_data_offset += svm_priv_data_size; 3937 3938 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 3939 3940 return 0; 3941 3942 3943 exit: 3944 kfree(criu_svm_md); 3945 return ret; 3946 } 3947 3948 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 3949 uint64_t *svm_priv_data_size) 3950 { 3951 uint64_t total_size, accessibility_size, common_attr_size; 3952 int nattr_common = 4, nattr_accessibility = 1; 3953 int num_devices = p->n_pdds; 3954 struct svm_range_list *svms; 3955 struct svm_range *prange; 3956 uint32_t count = 0; 3957 3958 *svm_priv_data_size = 0; 3959 3960 svms = &p->svms; 3961 if (!svms) 3962 return -EINVAL; 3963 3964 mutex_lock(&svms->lock); 3965 list_for_each_entry(prange, &svms->list, list) { 3966 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 3967 prange, prange->start, prange->npages, 3968 prange->start + prange->npages - 1); 3969 count++; 3970 } 3971 mutex_unlock(&svms->lock); 3972 3973 *num_svm_ranges = count; 3974 /* Only the accessbility attributes need to be queried for all the gpus 3975 * individually, remaining ones are spanned across the entire process 3976 * regardless of the various gpu nodes. Of the remaining attributes, 3977 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 3978 * 3979 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 3980 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 3981 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 3982 * KFD_IOCTL_SVM_ATTR_GRANULARITY 3983 * 3984 * ** ACCESSBILITY ATTRIBUTES ** 3985 * (Considered as one, type is altered during query, value is gpuid) 3986 * KFD_IOCTL_SVM_ATTR_ACCESS 3987 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 3988 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 3989 */ 3990 if (*num_svm_ranges > 0) { 3991 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3992 nattr_common; 3993 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 3994 nattr_accessibility * num_devices; 3995 3996 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 3997 common_attr_size + accessibility_size; 3998 3999 *svm_priv_data_size = *num_svm_ranges * total_size; 4000 } 4001 4002 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 4003 *svm_priv_data_size); 4004 return 0; 4005 } 4006 4007 int kfd_criu_checkpoint_svm(struct kfd_process *p, 4008 uint8_t __user *user_priv_data, 4009 uint64_t *priv_data_offset) 4010 { 4011 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 4012 struct kfd_ioctl_svm_attribute *query_attr = NULL; 4013 uint64_t svm_priv_data_size, query_attr_size = 0; 4014 int index, nattr_common = 4, ret = 0; 4015 struct svm_range_list *svms; 4016 int num_devices = p->n_pdds; 4017 struct svm_range *prange; 4018 struct mm_struct *mm; 4019 4020 svms = &p->svms; 4021 if (!svms) 4022 return -EINVAL; 4023 4024 mm = get_task_mm(p->lead_thread); 4025 if (!mm) { 4026 pr_err("failed to get mm for the target process\n"); 4027 return -ESRCH; 4028 } 4029 4030 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4031 (nattr_common + num_devices); 4032 4033 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 4034 if (!query_attr) { 4035 ret = -ENOMEM; 4036 goto exit; 4037 } 4038 4039 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 4040 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 4041 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4042 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 4043 4044 for (index = 0; index < num_devices; index++) { 4045 struct kfd_process_device *pdd = p->pdds[index]; 4046 4047 query_attr[index + nattr_common].type = 4048 KFD_IOCTL_SVM_ATTR_ACCESS; 4049 query_attr[index + nattr_common].value = pdd->user_gpu_id; 4050 } 4051 4052 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 4053 4054 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 4055 if (!svm_priv) { 4056 ret = -ENOMEM; 4057 goto exit_query; 4058 } 4059 4060 index = 0; 4061 list_for_each_entry(prange, &svms->list, list) { 4062 4063 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 4064 svm_priv->start_addr = prange->start; 4065 svm_priv->size = prange->npages; 4066 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 4067 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 4068 prange, prange->start, prange->npages, 4069 prange->start + prange->npages - 1, 4070 prange->npages * PAGE_SIZE); 4071 4072 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 4073 svm_priv->size, 4074 (nattr_common + num_devices), 4075 svm_priv->attrs); 4076 if (ret) { 4077 pr_err("CRIU: failed to obtain range attributes\n"); 4078 goto exit_priv; 4079 } 4080 4081 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4082 svm_priv_data_size)) { 4083 pr_err("Failed to copy svm priv to user\n"); 4084 ret = -EFAULT; 4085 goto exit_priv; 4086 } 4087 4088 *priv_data_offset += svm_priv_data_size; 4089 4090 } 4091 4092 4093 exit_priv: 4094 kfree(svm_priv); 4095 exit_query: 4096 kfree(query_attr); 4097 exit: 4098 mmput(mm); 4099 return ret; 4100 } 4101 4102 int 4103 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4104 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4105 { 4106 struct mm_struct *mm = current->mm; 4107 int r; 4108 4109 start >>= PAGE_SHIFT; 4110 size >>= PAGE_SHIFT; 4111 4112 switch (op) { 4113 case KFD_IOCTL_SVM_OP_SET_ATTR: 4114 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4115 break; 4116 case KFD_IOCTL_SVM_OP_GET_ATTR: 4117 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4118 break; 4119 default: 4120 r = EINVAL; 4121 break; 4122 } 4123 4124 return r; 4125 } 4126