1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <drm/ttm/ttm_tt.h> 27 #include "amdgpu_sync.h" 28 #include "amdgpu_object.h" 29 #include "amdgpu_vm.h" 30 #include "amdgpu_hmm.h" 31 #include "amdgpu.h" 32 #include "amdgpu_xgmi.h" 33 #include "kfd_priv.h" 34 #include "kfd_svm.h" 35 #include "kfd_migrate.h" 36 #include "kfd_smi_events.h" 37 38 #ifdef dev_fmt 39 #undef dev_fmt 40 #endif 41 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 42 43 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 44 45 /* Long enough to ensure no retry fault comes after svm range is restored and 46 * page table is updated. 47 */ 48 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 49 50 /* Giant svm range split into smaller ranges based on this, it is decided using 51 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 52 * power of 2MB. 53 */ 54 static uint64_t max_svm_range_pages; 55 56 struct criu_svm_metadata { 57 struct list_head list; 58 struct kfd_criu_svm_range_priv_data data; 59 }; 60 61 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 62 static bool 63 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 64 const struct mmu_notifier_range *range, 65 unsigned long cur_seq); 66 static int 67 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 68 uint64_t *bo_s, uint64_t *bo_l); 69 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 70 .invalidate = svm_range_cpu_invalidate_pagetables, 71 }; 72 73 /** 74 * svm_range_unlink - unlink svm_range from lists and interval tree 75 * @prange: svm range structure to be removed 76 * 77 * Remove the svm_range from the svms and svm_bo lists and the svms 78 * interval tree. 79 * 80 * Context: The caller must hold svms->lock 81 */ 82 static void svm_range_unlink(struct svm_range *prange) 83 { 84 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 85 prange, prange->start, prange->last); 86 87 if (prange->svm_bo) { 88 spin_lock(&prange->svm_bo->list_lock); 89 list_del(&prange->svm_bo_list); 90 spin_unlock(&prange->svm_bo->list_lock); 91 } 92 93 list_del(&prange->list); 94 if (prange->it_node.start != 0 && prange->it_node.last != 0) 95 interval_tree_remove(&prange->it_node, &prange->svms->objects); 96 } 97 98 static void 99 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 100 { 101 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 102 prange, prange->start, prange->last); 103 104 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 105 prange->start << PAGE_SHIFT, 106 prange->npages << PAGE_SHIFT, 107 &svm_range_mn_ops); 108 } 109 110 /** 111 * svm_range_add_to_svms - add svm range to svms 112 * @prange: svm range structure to be added 113 * 114 * Add the svm range to svms interval tree and link list 115 * 116 * Context: The caller must hold svms->lock 117 */ 118 static void svm_range_add_to_svms(struct svm_range *prange) 119 { 120 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 121 prange, prange->start, prange->last); 122 123 list_move_tail(&prange->list, &prange->svms->list); 124 prange->it_node.start = prange->start; 125 prange->it_node.last = prange->last; 126 interval_tree_insert(&prange->it_node, &prange->svms->objects); 127 } 128 129 static void svm_range_remove_notifier(struct svm_range *prange) 130 { 131 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 132 prange->svms, prange, 133 prange->notifier.interval_tree.start >> PAGE_SHIFT, 134 prange->notifier.interval_tree.last >> PAGE_SHIFT); 135 136 if (prange->notifier.interval_tree.start != 0 && 137 prange->notifier.interval_tree.last != 0) 138 mmu_interval_notifier_remove(&prange->notifier); 139 } 140 141 static bool 142 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 143 { 144 return dma_addr && !dma_mapping_error(dev, dma_addr) && 145 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 146 } 147 148 static int 149 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 150 unsigned long offset, unsigned long npages, 151 unsigned long *hmm_pfns, uint32_t gpuidx) 152 { 153 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 154 dma_addr_t *addr = prange->dma_addr[gpuidx]; 155 struct device *dev = adev->dev; 156 struct page *page; 157 int i, r; 158 159 if (!addr) { 160 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 161 if (!addr) 162 return -ENOMEM; 163 prange->dma_addr[gpuidx] = addr; 164 } 165 166 addr += offset; 167 for (i = 0; i < npages; i++) { 168 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 169 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 170 171 page = hmm_pfn_to_page(hmm_pfns[i]); 172 if (is_zone_device_page(page)) { 173 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 174 175 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 176 bo_adev->vm_manager.vram_base_offset - 177 bo_adev->kfd.dev->pgmap.range.start; 178 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 179 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 180 continue; 181 } 182 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 183 r = dma_mapping_error(dev, addr[i]); 184 if (r) { 185 dev_err(dev, "failed %d dma_map_page\n", r); 186 return r; 187 } 188 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 189 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 190 } 191 return 0; 192 } 193 194 static int 195 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 196 unsigned long offset, unsigned long npages, 197 unsigned long *hmm_pfns) 198 { 199 struct kfd_process *p; 200 uint32_t gpuidx; 201 int r; 202 203 p = container_of(prange->svms, struct kfd_process, svms); 204 205 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 206 struct kfd_process_device *pdd; 207 208 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 209 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 210 if (!pdd) { 211 pr_debug("failed to find device idx %d\n", gpuidx); 212 return -EINVAL; 213 } 214 215 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 216 hmm_pfns, gpuidx); 217 if (r) 218 break; 219 } 220 221 return r; 222 } 223 224 void svm_range_dma_unmap(struct device *dev, dma_addr_t *dma_addr, 225 unsigned long offset, unsigned long npages) 226 { 227 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 228 int i; 229 230 if (!dma_addr) 231 return; 232 233 for (i = offset; i < offset + npages; i++) { 234 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 235 continue; 236 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 237 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 238 dma_addr[i] = 0; 239 } 240 } 241 242 void svm_range_free_dma_mappings(struct svm_range *prange) 243 { 244 struct kfd_process_device *pdd; 245 dma_addr_t *dma_addr; 246 struct device *dev; 247 struct kfd_process *p; 248 uint32_t gpuidx; 249 250 p = container_of(prange->svms, struct kfd_process, svms); 251 252 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 253 dma_addr = prange->dma_addr[gpuidx]; 254 if (!dma_addr) 255 continue; 256 257 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 258 if (!pdd) { 259 pr_debug("failed to find device idx %d\n", gpuidx); 260 continue; 261 } 262 dev = &pdd->dev->adev->pdev->dev; 263 svm_range_dma_unmap(dev, dma_addr, 0, prange->npages); 264 kvfree(dma_addr); 265 prange->dma_addr[gpuidx] = NULL; 266 } 267 } 268 269 static void svm_range_free(struct svm_range *prange, bool update_mem_usage) 270 { 271 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 272 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 273 274 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 275 prange->start, prange->last); 276 277 svm_range_vram_node_free(prange); 278 svm_range_free_dma_mappings(prange); 279 280 if (update_mem_usage && !p->xnack_enabled) { 281 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 282 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 283 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR); 284 } 285 mutex_destroy(&prange->lock); 286 mutex_destroy(&prange->migrate_mutex); 287 kfree(prange); 288 } 289 290 static void 291 svm_range_set_default_attributes(int32_t *location, int32_t *prefetch_loc, 292 uint8_t *granularity, uint32_t *flags) 293 { 294 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 295 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 296 *granularity = 9; 297 *flags = 298 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 299 } 300 301 static struct 302 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 303 uint64_t last, bool update_mem_usage) 304 { 305 uint64_t size = last - start + 1; 306 struct svm_range *prange; 307 struct kfd_process *p; 308 309 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 310 if (!prange) 311 return NULL; 312 313 p = container_of(svms, struct kfd_process, svms); 314 if (!p->xnack_enabled && update_mem_usage && 315 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 316 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR)) { 317 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 318 kfree(prange); 319 return NULL; 320 } 321 prange->npages = size; 322 prange->svms = svms; 323 prange->start = start; 324 prange->last = last; 325 INIT_LIST_HEAD(&prange->list); 326 INIT_LIST_HEAD(&prange->update_list); 327 INIT_LIST_HEAD(&prange->svm_bo_list); 328 INIT_LIST_HEAD(&prange->deferred_list); 329 INIT_LIST_HEAD(&prange->child_list); 330 atomic_set(&prange->invalid, 0); 331 prange->validate_timestamp = 0; 332 mutex_init(&prange->migrate_mutex); 333 mutex_init(&prange->lock); 334 335 if (p->xnack_enabled) 336 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 337 MAX_GPU_INSTANCE); 338 339 svm_range_set_default_attributes(&prange->preferred_loc, 340 &prange->prefetch_loc, 341 &prange->granularity, &prange->flags); 342 343 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 344 345 return prange; 346 } 347 348 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 349 { 350 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 351 return false; 352 353 return true; 354 } 355 356 static void svm_range_bo_release(struct kref *kref) 357 { 358 struct svm_range_bo *svm_bo; 359 360 svm_bo = container_of(kref, struct svm_range_bo, kref); 361 pr_debug("svm_bo 0x%p\n", svm_bo); 362 363 spin_lock(&svm_bo->list_lock); 364 while (!list_empty(&svm_bo->range_list)) { 365 struct svm_range *prange = 366 list_first_entry(&svm_bo->range_list, 367 struct svm_range, svm_bo_list); 368 /* list_del_init tells a concurrent svm_range_vram_node_new when 369 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 370 */ 371 list_del_init(&prange->svm_bo_list); 372 spin_unlock(&svm_bo->list_lock); 373 374 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 375 prange->start, prange->last); 376 mutex_lock(&prange->lock); 377 prange->svm_bo = NULL; 378 mutex_unlock(&prange->lock); 379 380 spin_lock(&svm_bo->list_lock); 381 } 382 spin_unlock(&svm_bo->list_lock); 383 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) { 384 /* We're not in the eviction worker. 385 * Signal the fence and synchronize with any 386 * pending eviction work. 387 */ 388 dma_fence_signal(&svm_bo->eviction_fence->base); 389 cancel_work_sync(&svm_bo->eviction_work); 390 } 391 dma_fence_put(&svm_bo->eviction_fence->base); 392 amdgpu_bo_unref(&svm_bo->bo); 393 kfree(svm_bo); 394 } 395 396 static void svm_range_bo_wq_release(struct work_struct *work) 397 { 398 struct svm_range_bo *svm_bo; 399 400 svm_bo = container_of(work, struct svm_range_bo, release_work); 401 svm_range_bo_release(&svm_bo->kref); 402 } 403 404 static void svm_range_bo_release_async(struct kref *kref) 405 { 406 struct svm_range_bo *svm_bo; 407 408 svm_bo = container_of(kref, struct svm_range_bo, kref); 409 pr_debug("svm_bo 0x%p\n", svm_bo); 410 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 411 schedule_work(&svm_bo->release_work); 412 } 413 414 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 415 { 416 kref_put(&svm_bo->kref, svm_range_bo_release_async); 417 } 418 419 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 420 { 421 if (svm_bo) 422 kref_put(&svm_bo->kref, svm_range_bo_release); 423 } 424 425 static bool 426 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 427 { 428 mutex_lock(&prange->lock); 429 if (!prange->svm_bo) { 430 mutex_unlock(&prange->lock); 431 return false; 432 } 433 if (prange->ttm_res) { 434 /* We still have a reference, all is well */ 435 mutex_unlock(&prange->lock); 436 return true; 437 } 438 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 439 /* 440 * Migrate from GPU to GPU, remove range from source svm_bo->node 441 * range list, and return false to allocate svm_bo from destination 442 * node. 443 */ 444 if (prange->svm_bo->node != node) { 445 mutex_unlock(&prange->lock); 446 447 spin_lock(&prange->svm_bo->list_lock); 448 list_del_init(&prange->svm_bo_list); 449 spin_unlock(&prange->svm_bo->list_lock); 450 451 svm_range_bo_unref(prange->svm_bo); 452 return false; 453 } 454 if (READ_ONCE(prange->svm_bo->evicting)) { 455 struct dma_fence *f; 456 struct svm_range_bo *svm_bo; 457 /* The BO is getting evicted, 458 * we need to get a new one 459 */ 460 mutex_unlock(&prange->lock); 461 svm_bo = prange->svm_bo; 462 f = dma_fence_get(&svm_bo->eviction_fence->base); 463 svm_range_bo_unref(prange->svm_bo); 464 /* wait for the fence to avoid long spin-loop 465 * at list_empty_careful 466 */ 467 dma_fence_wait(f, false); 468 dma_fence_put(f); 469 } else { 470 /* The BO was still around and we got 471 * a new reference to it 472 */ 473 mutex_unlock(&prange->lock); 474 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 475 prange->svms, prange->start, prange->last); 476 477 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 478 return true; 479 } 480 481 } else { 482 mutex_unlock(&prange->lock); 483 } 484 485 /* We need a new svm_bo. Spin-loop to wait for concurrent 486 * svm_range_bo_release to finish removing this range from 487 * its range list. After this, it is safe to reuse the 488 * svm_bo pointer and svm_bo_list head. 489 */ 490 while (!list_empty_careful(&prange->svm_bo_list)) 491 ; 492 493 return false; 494 } 495 496 static struct svm_range_bo *svm_range_bo_new(void) 497 { 498 struct svm_range_bo *svm_bo; 499 500 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 501 if (!svm_bo) 502 return NULL; 503 504 kref_init(&svm_bo->kref); 505 INIT_LIST_HEAD(&svm_bo->range_list); 506 spin_lock_init(&svm_bo->list_lock); 507 508 return svm_bo; 509 } 510 511 int 512 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 513 bool clear) 514 { 515 struct amdgpu_bo_param bp; 516 struct svm_range_bo *svm_bo; 517 struct amdgpu_bo_user *ubo; 518 struct amdgpu_bo *bo; 519 struct kfd_process *p; 520 struct mm_struct *mm; 521 int r; 522 523 p = container_of(prange->svms, struct kfd_process, svms); 524 pr_debug("pasid: %x svms 0x%p [0x%lx 0x%lx]\n", p->pasid, prange->svms, 525 prange->start, prange->last); 526 527 if (svm_range_validate_svm_bo(node, prange)) 528 return 0; 529 530 svm_bo = svm_range_bo_new(); 531 if (!svm_bo) { 532 pr_debug("failed to alloc svm bo\n"); 533 return -ENOMEM; 534 } 535 mm = get_task_mm(p->lead_thread); 536 if (!mm) { 537 pr_debug("failed to get mm\n"); 538 kfree(svm_bo); 539 return -ESRCH; 540 } 541 svm_bo->node = node; 542 svm_bo->eviction_fence = 543 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 544 mm, 545 svm_bo); 546 mmput(mm); 547 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 548 svm_bo->evicting = 0; 549 memset(&bp, 0, sizeof(bp)); 550 bp.size = prange->npages * PAGE_SIZE; 551 bp.byte_align = PAGE_SIZE; 552 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 553 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 554 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 555 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 556 bp.type = ttm_bo_type_device; 557 bp.resv = NULL; 558 559 /* TODO: Allocate memory from the right memory partition. We can sort 560 * out the details later, once basic memory partitioning is working 561 */ 562 r = amdgpu_bo_create_user(node->adev, &bp, &ubo); 563 if (r) { 564 pr_debug("failed %d to create bo\n", r); 565 goto create_bo_failed; 566 } 567 bo = &ubo->bo; 568 r = amdgpu_bo_reserve(bo, true); 569 if (r) { 570 pr_debug("failed %d to reserve bo\n", r); 571 goto reserve_bo_failed; 572 } 573 574 if (clear) { 575 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 576 if (r) { 577 pr_debug("failed %d to sync bo\n", r); 578 amdgpu_bo_unreserve(bo); 579 goto reserve_bo_failed; 580 } 581 } 582 583 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 584 if (r) { 585 pr_debug("failed %d to reserve bo\n", r); 586 amdgpu_bo_unreserve(bo); 587 goto reserve_bo_failed; 588 } 589 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 590 591 amdgpu_bo_unreserve(bo); 592 593 svm_bo->bo = bo; 594 prange->svm_bo = svm_bo; 595 prange->ttm_res = bo->tbo.resource; 596 prange->offset = 0; 597 598 spin_lock(&svm_bo->list_lock); 599 list_add(&prange->svm_bo_list, &svm_bo->range_list); 600 spin_unlock(&svm_bo->list_lock); 601 602 return 0; 603 604 reserve_bo_failed: 605 amdgpu_bo_unref(&bo); 606 create_bo_failed: 607 dma_fence_put(&svm_bo->eviction_fence->base); 608 kfree(svm_bo); 609 prange->ttm_res = NULL; 610 611 return r; 612 } 613 614 void svm_range_vram_node_free(struct svm_range *prange) 615 { 616 svm_range_bo_unref(prange->svm_bo); 617 prange->ttm_res = NULL; 618 } 619 620 struct kfd_node * 621 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 622 { 623 struct kfd_process *p; 624 struct kfd_process_device *pdd; 625 626 p = container_of(prange->svms, struct kfd_process, svms); 627 pdd = kfd_process_device_data_by_id(p, gpu_id); 628 if (!pdd) { 629 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 630 return NULL; 631 } 632 633 return pdd->dev; 634 } 635 636 struct kfd_process_device * 637 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 638 { 639 struct kfd_process *p; 640 641 p = container_of(prange->svms, struct kfd_process, svms); 642 643 return kfd_get_process_device_data(node, p); 644 } 645 646 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 647 { 648 struct ttm_operation_ctx ctx = { false, false }; 649 650 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 651 652 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 653 } 654 655 static int 656 svm_range_check_attr(struct kfd_process *p, 657 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 658 { 659 uint32_t i; 660 661 for (i = 0; i < nattr; i++) { 662 uint32_t val = attrs[i].value; 663 int gpuidx = MAX_GPU_INSTANCE; 664 665 switch (attrs[i].type) { 666 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 667 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 668 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 669 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 670 break; 671 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 672 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 673 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 674 break; 675 case KFD_IOCTL_SVM_ATTR_ACCESS: 676 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 677 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 678 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 679 break; 680 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 681 break; 682 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 683 break; 684 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 685 break; 686 default: 687 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 688 return -EINVAL; 689 } 690 691 if (gpuidx < 0) { 692 pr_debug("no GPU 0x%x found\n", val); 693 return -EINVAL; 694 } else if (gpuidx < MAX_GPU_INSTANCE && 695 !test_bit(gpuidx, p->svms.bitmap_supported)) { 696 pr_debug("GPU 0x%x not supported\n", val); 697 return -EINVAL; 698 } 699 } 700 701 return 0; 702 } 703 704 static void 705 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 706 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 707 bool *update_mapping) 708 { 709 uint32_t i; 710 int gpuidx; 711 712 for (i = 0; i < nattr; i++) { 713 switch (attrs[i].type) { 714 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 715 prange->preferred_loc = attrs[i].value; 716 break; 717 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 718 prange->prefetch_loc = attrs[i].value; 719 break; 720 case KFD_IOCTL_SVM_ATTR_ACCESS: 721 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 722 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 723 if (!p->xnack_enabled) 724 *update_mapping = true; 725 726 gpuidx = kfd_process_gpuidx_from_gpuid(p, 727 attrs[i].value); 728 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 729 bitmap_clear(prange->bitmap_access, gpuidx, 1); 730 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 731 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 732 bitmap_set(prange->bitmap_access, gpuidx, 1); 733 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 734 } else { 735 bitmap_clear(prange->bitmap_access, gpuidx, 1); 736 bitmap_set(prange->bitmap_aip, gpuidx, 1); 737 } 738 break; 739 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 740 *update_mapping = true; 741 prange->flags |= attrs[i].value; 742 break; 743 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 744 *update_mapping = true; 745 prange->flags &= ~attrs[i].value; 746 break; 747 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 748 prange->granularity = attrs[i].value; 749 break; 750 default: 751 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 752 } 753 } 754 } 755 756 static bool 757 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 758 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 759 { 760 uint32_t i; 761 int gpuidx; 762 763 for (i = 0; i < nattr; i++) { 764 switch (attrs[i].type) { 765 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 766 if (prange->preferred_loc != attrs[i].value) 767 return false; 768 break; 769 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 770 /* Prefetch should always trigger a migration even 771 * if the value of the attribute didn't change. 772 */ 773 return false; 774 case KFD_IOCTL_SVM_ATTR_ACCESS: 775 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 776 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 777 gpuidx = kfd_process_gpuidx_from_gpuid(p, 778 attrs[i].value); 779 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 780 if (test_bit(gpuidx, prange->bitmap_access) || 781 test_bit(gpuidx, prange->bitmap_aip)) 782 return false; 783 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 784 if (!test_bit(gpuidx, prange->bitmap_access)) 785 return false; 786 } else { 787 if (!test_bit(gpuidx, prange->bitmap_aip)) 788 return false; 789 } 790 break; 791 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 792 if ((prange->flags & attrs[i].value) != attrs[i].value) 793 return false; 794 break; 795 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 796 if ((prange->flags & attrs[i].value) != 0) 797 return false; 798 break; 799 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 800 if (prange->granularity != attrs[i].value) 801 return false; 802 break; 803 default: 804 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 805 } 806 } 807 808 return true; 809 } 810 811 /** 812 * svm_range_debug_dump - print all range information from svms 813 * @svms: svm range list header 814 * 815 * debug output svm range start, end, prefetch location from svms 816 * interval tree and link list 817 * 818 * Context: The caller must hold svms->lock 819 */ 820 static void svm_range_debug_dump(struct svm_range_list *svms) 821 { 822 struct interval_tree_node *node; 823 struct svm_range *prange; 824 825 pr_debug("dump svms 0x%p list\n", svms); 826 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 827 828 list_for_each_entry(prange, &svms->list, list) { 829 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 830 prange, prange->start, prange->npages, 831 prange->start + prange->npages - 1, 832 prange->actual_loc); 833 } 834 835 pr_debug("dump svms 0x%p interval tree\n", svms); 836 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 837 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 838 while (node) { 839 prange = container_of(node, struct svm_range, it_node); 840 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 841 prange, prange->start, prange->npages, 842 prange->start + prange->npages - 1, 843 prange->actual_loc); 844 node = interval_tree_iter_next(node, 0, ~0ULL); 845 } 846 } 847 848 static int 849 svm_range_split_array(void *ppnew, void *ppold, size_t size, 850 uint64_t old_start, uint64_t old_n, 851 uint64_t new_start, uint64_t new_n) 852 { 853 unsigned char *new, *old, *pold; 854 uint64_t d; 855 856 if (!ppold) 857 return 0; 858 pold = *(unsigned char **)ppold; 859 if (!pold) 860 return 0; 861 862 new = kvmalloc_array(new_n, size, GFP_KERNEL); 863 if (!new) 864 return -ENOMEM; 865 866 d = (new_start - old_start) * size; 867 memcpy(new, pold + d, new_n * size); 868 869 old = kvmalloc_array(old_n, size, GFP_KERNEL); 870 if (!old) { 871 kvfree(new); 872 return -ENOMEM; 873 } 874 875 d = (new_start == old_start) ? new_n * size : 0; 876 memcpy(old, pold + d, old_n * size); 877 878 kvfree(pold); 879 *(void **)ppold = old; 880 *(void **)ppnew = new; 881 882 return 0; 883 } 884 885 static int 886 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 887 uint64_t start, uint64_t last) 888 { 889 uint64_t npages = last - start + 1; 890 int i, r; 891 892 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 893 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 894 sizeof(*old->dma_addr[i]), old->start, 895 npages, new->start, new->npages); 896 if (r) 897 return r; 898 } 899 900 return 0; 901 } 902 903 static int 904 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 905 uint64_t start, uint64_t last) 906 { 907 uint64_t npages = last - start + 1; 908 909 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 910 new->svms, new, new->start, start, last); 911 912 if (new->start == old->start) { 913 new->offset = old->offset; 914 old->offset += new->npages; 915 } else { 916 new->offset = old->offset + npages; 917 } 918 919 new->svm_bo = svm_range_bo_ref(old->svm_bo); 920 new->ttm_res = old->ttm_res; 921 922 spin_lock(&new->svm_bo->list_lock); 923 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 924 spin_unlock(&new->svm_bo->list_lock); 925 926 return 0; 927 } 928 929 /** 930 * svm_range_split_adjust - split range and adjust 931 * 932 * @new: new range 933 * @old: the old range 934 * @start: the old range adjust to start address in pages 935 * @last: the old range adjust to last address in pages 936 * 937 * Copy system memory dma_addr or vram ttm_res in old range to new 938 * range from new_start up to size new->npages, the remaining old range is from 939 * start to last 940 * 941 * Return: 942 * 0 - OK, -ENOMEM - out of memory 943 */ 944 static int 945 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 946 uint64_t start, uint64_t last) 947 { 948 int r; 949 950 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 951 new->svms, new->start, old->start, old->last, start, last); 952 953 if (new->start < old->start || 954 new->last > old->last) { 955 WARN_ONCE(1, "invalid new range start or last\n"); 956 return -EINVAL; 957 } 958 959 r = svm_range_split_pages(new, old, start, last); 960 if (r) 961 return r; 962 963 if (old->actual_loc && old->ttm_res) { 964 r = svm_range_split_nodes(new, old, start, last); 965 if (r) 966 return r; 967 } 968 969 old->npages = last - start + 1; 970 old->start = start; 971 old->last = last; 972 new->flags = old->flags; 973 new->preferred_loc = old->preferred_loc; 974 new->prefetch_loc = old->prefetch_loc; 975 new->actual_loc = old->actual_loc; 976 new->granularity = old->granularity; 977 new->mapped_to_gpu = old->mapped_to_gpu; 978 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 979 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 980 981 return 0; 982 } 983 984 /** 985 * svm_range_split - split a range in 2 ranges 986 * 987 * @prange: the svm range to split 988 * @start: the remaining range start address in pages 989 * @last: the remaining range last address in pages 990 * @new: the result new range generated 991 * 992 * Two cases only: 993 * case 1: if start == prange->start 994 * prange ==> prange[start, last] 995 * new range [last + 1, prange->last] 996 * 997 * case 2: if last == prange->last 998 * prange ==> prange[start, last] 999 * new range [prange->start, start - 1] 1000 * 1001 * Return: 1002 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1003 */ 1004 static int 1005 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1006 struct svm_range **new) 1007 { 1008 uint64_t old_start = prange->start; 1009 uint64_t old_last = prange->last; 1010 struct svm_range_list *svms; 1011 int r = 0; 1012 1013 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1014 old_start, old_last, start, last); 1015 1016 if (old_start != start && old_last != last) 1017 return -EINVAL; 1018 if (start < old_start || last > old_last) 1019 return -EINVAL; 1020 1021 svms = prange->svms; 1022 if (old_start == start) 1023 *new = svm_range_new(svms, last + 1, old_last, false); 1024 else 1025 *new = svm_range_new(svms, old_start, start - 1, false); 1026 if (!*new) 1027 return -ENOMEM; 1028 1029 r = svm_range_split_adjust(*new, prange, start, last); 1030 if (r) { 1031 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1032 r, old_start, old_last, start, last); 1033 svm_range_free(*new, false); 1034 *new = NULL; 1035 } 1036 1037 return r; 1038 } 1039 1040 static int 1041 svm_range_split_tail(struct svm_range *prange, 1042 uint64_t new_last, struct list_head *insert_list) 1043 { 1044 struct svm_range *tail; 1045 int r = svm_range_split(prange, prange->start, new_last, &tail); 1046 1047 if (!r) 1048 list_add(&tail->list, insert_list); 1049 return r; 1050 } 1051 1052 static int 1053 svm_range_split_head(struct svm_range *prange, 1054 uint64_t new_start, struct list_head *insert_list) 1055 { 1056 struct svm_range *head; 1057 int r = svm_range_split(prange, new_start, prange->last, &head); 1058 1059 if (!r) 1060 list_add(&head->list, insert_list); 1061 return r; 1062 } 1063 1064 static void 1065 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm, 1066 struct svm_range *pchild, enum svm_work_list_ops op) 1067 { 1068 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1069 pchild, pchild->start, pchild->last, prange, op); 1070 1071 pchild->work_item.mm = mm; 1072 pchild->work_item.op = op; 1073 list_add_tail(&pchild->child_list, &prange->child_list); 1074 } 1075 1076 /** 1077 * svm_range_split_by_granularity - collect ranges within granularity boundary 1078 * 1079 * @p: the process with svms list 1080 * @mm: mm structure 1081 * @addr: the vm fault address in pages, to split the prange 1082 * @parent: parent range if prange is from child list 1083 * @prange: prange to split 1084 * 1085 * Trims @prange to be a single aligned block of prange->granularity if 1086 * possible. The head and tail are added to the child_list in @parent. 1087 * 1088 * Context: caller must hold mmap_read_lock and prange->lock 1089 * 1090 * Return: 1091 * 0 - OK, otherwise error code 1092 */ 1093 int 1094 svm_range_split_by_granularity(struct kfd_process *p, struct mm_struct *mm, 1095 unsigned long addr, struct svm_range *parent, 1096 struct svm_range *prange) 1097 { 1098 struct svm_range *head, *tail; 1099 unsigned long start, last, size; 1100 int r; 1101 1102 /* Align splited range start and size to granularity size, then a single 1103 * PTE will be used for whole range, this reduces the number of PTE 1104 * updated and the L1 TLB space used for translation. 1105 */ 1106 size = 1UL << prange->granularity; 1107 start = ALIGN_DOWN(addr, size); 1108 last = ALIGN(addr + 1, size) - 1; 1109 1110 pr_debug("svms 0x%p split [0x%lx 0x%lx] to [0x%lx 0x%lx] size 0x%lx\n", 1111 prange->svms, prange->start, prange->last, start, last, size); 1112 1113 if (start > prange->start) { 1114 r = svm_range_split(prange, start, prange->last, &head); 1115 if (r) 1116 return r; 1117 svm_range_add_child(parent, mm, head, SVM_OP_ADD_RANGE); 1118 } 1119 1120 if (last < prange->last) { 1121 r = svm_range_split(prange, prange->start, last, &tail); 1122 if (r) 1123 return r; 1124 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 1125 } 1126 1127 /* xnack on, update mapping on GPUs with ACCESS_IN_PLACE */ 1128 if (p->xnack_enabled && prange->work_item.op == SVM_OP_ADD_RANGE) { 1129 prange->work_item.op = SVM_OP_ADD_RANGE_AND_MAP; 1130 pr_debug("change prange 0x%p [0x%lx 0x%lx] op %d\n", 1131 prange, prange->start, prange->last, 1132 SVM_OP_ADD_RANGE_AND_MAP); 1133 } 1134 return 0; 1135 } 1136 static bool 1137 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1138 { 1139 return (node_a->adev == node_b->adev || 1140 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1141 } 1142 1143 static uint64_t 1144 svm_range_get_pte_flags(struct kfd_node *node, 1145 struct svm_range *prange, int domain) 1146 { 1147 struct kfd_node *bo_node; 1148 uint32_t flags = prange->flags; 1149 uint32_t mapping_flags = 0; 1150 uint64_t pte_flags; 1151 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1152 bool coherent = flags & KFD_IOCTL_SVM_FLAG_COHERENT; 1153 bool uncached = flags & KFD_IOCTL_SVM_FLAG_UNCACHED; 1154 1155 if (domain == SVM_RANGE_VRAM_DOMAIN) 1156 bo_node = prange->svm_bo->node; 1157 1158 switch (node->adev->ip_versions[GC_HWIP][0]) { 1159 case IP_VERSION(9, 4, 1): 1160 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1161 if (bo_node == node) { 1162 mapping_flags |= coherent ? 1163 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1164 } else { 1165 mapping_flags |= coherent ? 1166 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1167 if (svm_nodes_in_same_hive(node, bo_node)) 1168 snoop = true; 1169 } 1170 } else { 1171 mapping_flags |= coherent ? 1172 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1173 } 1174 break; 1175 case IP_VERSION(9, 4, 2): 1176 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1177 if (bo_node == node) { 1178 mapping_flags |= coherent ? 1179 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1180 if (node->adev->gmc.xgmi.connected_to_cpu) 1181 snoop = true; 1182 } else { 1183 mapping_flags |= coherent ? 1184 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1185 if (svm_nodes_in_same_hive(node, bo_node)) 1186 snoop = true; 1187 } 1188 } else { 1189 mapping_flags |= coherent ? 1190 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1191 } 1192 break; 1193 case IP_VERSION(9, 4, 3): 1194 //TODO: Need more work for handling multiple memory partitions 1195 //e.g. NPS4. Current approch is only applicable without memory 1196 //partitions. 1197 snoop = true; 1198 if (uncached) { 1199 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1200 } else if (domain == SVM_RANGE_VRAM_DOMAIN) { 1201 /* local HBM region close to partition */ 1202 if (bo_node == node) 1203 mapping_flags |= AMDGPU_VM_MTYPE_RW; 1204 /* local HBM region far from partition or remote XGMI GPU */ 1205 else if (svm_nodes_in_same_hive(bo_node, node)) 1206 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1207 /* PCIe P2P */ 1208 else 1209 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1210 /* system memory accessed by the APU */ 1211 } else if (node->adev->flags & AMD_IS_APU) { 1212 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1213 /* system memory accessed by the dGPU */ 1214 } else { 1215 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1216 } 1217 break; 1218 default: 1219 mapping_flags |= coherent ? 1220 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1221 } 1222 1223 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE; 1224 1225 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO) 1226 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE; 1227 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1228 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1229 1230 pte_flags = AMDGPU_PTE_VALID; 1231 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1232 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1233 1234 pte_flags |= amdgpu_gem_va_map_flags(node->adev, mapping_flags); 1235 return pte_flags; 1236 } 1237 1238 static int 1239 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1240 uint64_t start, uint64_t last, 1241 struct dma_fence **fence) 1242 { 1243 uint64_t init_pte_value = 0; 1244 1245 pr_debug("[0x%llx 0x%llx]\n", start, last); 1246 1247 return amdgpu_vm_update_range(adev, vm, false, true, true, NULL, start, 1248 last, init_pte_value, 0, 0, NULL, NULL, 1249 fence); 1250 } 1251 1252 static int 1253 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1254 unsigned long last, uint32_t trigger) 1255 { 1256 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1257 struct kfd_process_device *pdd; 1258 struct dma_fence *fence = NULL; 1259 struct kfd_process *p; 1260 uint32_t gpuidx; 1261 int r = 0; 1262 1263 if (!prange->mapped_to_gpu) { 1264 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1265 prange, prange->start, prange->last); 1266 return 0; 1267 } 1268 1269 if (prange->start == start && prange->last == last) { 1270 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1271 prange->mapped_to_gpu = false; 1272 } 1273 1274 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1275 MAX_GPU_INSTANCE); 1276 p = container_of(prange->svms, struct kfd_process, svms); 1277 1278 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1279 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1280 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1281 if (!pdd) { 1282 pr_debug("failed to find device idx %d\n", gpuidx); 1283 return -EINVAL; 1284 } 1285 1286 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1287 start, last, trigger); 1288 1289 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1290 drm_priv_to_vm(pdd->drm_priv), 1291 start, last, &fence); 1292 if (r) 1293 break; 1294 1295 if (fence) { 1296 r = dma_fence_wait(fence, false); 1297 dma_fence_put(fence); 1298 fence = NULL; 1299 if (r) 1300 break; 1301 } 1302 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1303 } 1304 1305 return r; 1306 } 1307 1308 static int 1309 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1310 unsigned long offset, unsigned long npages, bool readonly, 1311 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1312 struct dma_fence **fence, bool flush_tlb) 1313 { 1314 struct amdgpu_device *adev = pdd->dev->adev; 1315 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1316 uint64_t pte_flags; 1317 unsigned long last_start; 1318 int last_domain; 1319 int r = 0; 1320 int64_t i, j; 1321 1322 last_start = prange->start + offset; 1323 1324 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1325 last_start, last_start + npages - 1, readonly); 1326 1327 for (i = offset; i < offset + npages; i++) { 1328 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1329 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1330 1331 /* Collect all pages in the same address range and memory domain 1332 * that can be mapped with a single call to update mapping. 1333 */ 1334 if (i < offset + npages - 1 && 1335 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1336 continue; 1337 1338 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1339 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1340 1341 pte_flags = svm_range_get_pte_flags(pdd->dev, prange, last_domain); 1342 if (readonly) 1343 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1344 1345 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1346 prange->svms, last_start, prange->start + i, 1347 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1348 pte_flags); 1349 1350 /* TODO: we still need to determine the vm_manager.vram_base_offset based on 1351 * the memory partition. 1352 */ 1353 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, NULL, 1354 last_start, prange->start + i, 1355 pte_flags, 1356 (last_start - prange->start) << PAGE_SHIFT, 1357 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1358 NULL, dma_addr, &vm->last_update); 1359 1360 for (j = last_start - prange->start; j <= i; j++) 1361 dma_addr[j] |= last_domain; 1362 1363 if (r) { 1364 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1365 goto out; 1366 } 1367 last_start = prange->start + i + 1; 1368 } 1369 1370 r = amdgpu_vm_update_pdes(adev, vm, false); 1371 if (r) { 1372 pr_debug("failed %d to update directories 0x%lx\n", r, 1373 prange->start); 1374 goto out; 1375 } 1376 1377 if (fence) 1378 *fence = dma_fence_get(vm->last_update); 1379 1380 out: 1381 return r; 1382 } 1383 1384 static int 1385 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1386 unsigned long npages, bool readonly, 1387 unsigned long *bitmap, bool wait, bool flush_tlb) 1388 { 1389 struct kfd_process_device *pdd; 1390 struct amdgpu_device *bo_adev = NULL; 1391 struct kfd_process *p; 1392 struct dma_fence *fence = NULL; 1393 uint32_t gpuidx; 1394 int r = 0; 1395 1396 if (prange->svm_bo && prange->ttm_res) 1397 bo_adev = prange->svm_bo->node->adev; 1398 1399 p = container_of(prange->svms, struct kfd_process, svms); 1400 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1401 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1402 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1403 if (!pdd) { 1404 pr_debug("failed to find device idx %d\n", gpuidx); 1405 return -EINVAL; 1406 } 1407 1408 pdd = kfd_bind_process_to_device(pdd->dev, p); 1409 if (IS_ERR(pdd)) 1410 return -EINVAL; 1411 1412 if (bo_adev && pdd->dev->adev != bo_adev && 1413 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1414 pr_debug("cannot map to device idx %d\n", gpuidx); 1415 continue; 1416 } 1417 1418 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1419 prange->dma_addr[gpuidx], 1420 bo_adev, wait ? &fence : NULL, 1421 flush_tlb); 1422 if (r) 1423 break; 1424 1425 if (fence) { 1426 r = dma_fence_wait(fence, false); 1427 dma_fence_put(fence); 1428 fence = NULL; 1429 if (r) { 1430 pr_debug("failed %d to dma fence wait\n", r); 1431 break; 1432 } 1433 } 1434 1435 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1436 } 1437 1438 return r; 1439 } 1440 1441 struct svm_validate_context { 1442 struct kfd_process *process; 1443 struct svm_range *prange; 1444 bool intr; 1445 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1446 struct ttm_validate_buffer tv[MAX_GPU_INSTANCE]; 1447 struct list_head validate_list; 1448 struct ww_acquire_ctx ticket; 1449 }; 1450 1451 static int svm_range_reserve_bos(struct svm_validate_context *ctx) 1452 { 1453 struct kfd_process_device *pdd; 1454 struct amdgpu_vm *vm; 1455 uint32_t gpuidx; 1456 int r; 1457 1458 INIT_LIST_HEAD(&ctx->validate_list); 1459 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1460 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1461 if (!pdd) { 1462 pr_debug("failed to find device idx %d\n", gpuidx); 1463 return -EINVAL; 1464 } 1465 vm = drm_priv_to_vm(pdd->drm_priv); 1466 1467 ctx->tv[gpuidx].bo = &vm->root.bo->tbo; 1468 ctx->tv[gpuidx].num_shared = 4; 1469 list_add(&ctx->tv[gpuidx].head, &ctx->validate_list); 1470 } 1471 1472 r = ttm_eu_reserve_buffers(&ctx->ticket, &ctx->validate_list, 1473 ctx->intr, NULL); 1474 if (r) { 1475 pr_debug("failed %d to reserve bo\n", r); 1476 return r; 1477 } 1478 1479 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1480 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1481 if (!pdd) { 1482 pr_debug("failed to find device idx %d\n", gpuidx); 1483 r = -EINVAL; 1484 goto unreserve_out; 1485 } 1486 1487 r = amdgpu_vm_validate_pt_bos(pdd->dev->adev, 1488 drm_priv_to_vm(pdd->drm_priv), 1489 svm_range_bo_validate, NULL); 1490 if (r) { 1491 pr_debug("failed %d validate pt bos\n", r); 1492 goto unreserve_out; 1493 } 1494 } 1495 1496 return 0; 1497 1498 unreserve_out: 1499 ttm_eu_backoff_reservation(&ctx->ticket, &ctx->validate_list); 1500 return r; 1501 } 1502 1503 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1504 { 1505 ttm_eu_backoff_reservation(&ctx->ticket, &ctx->validate_list); 1506 } 1507 1508 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1509 { 1510 struct kfd_process_device *pdd; 1511 1512 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1513 1514 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1515 } 1516 1517 /* 1518 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1519 * 1520 * To prevent concurrent destruction or change of range attributes, the 1521 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1522 * because that would block concurrent evictions and lead to deadlocks. To 1523 * serialize concurrent migrations or validations of the same range, the 1524 * prange->migrate_mutex must be held. 1525 * 1526 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1527 * eviction fence. 1528 * 1529 * The following sequence ensures race-free validation and GPU mapping: 1530 * 1531 * 1. Reserve page table (and SVM BO if range is in VRAM) 1532 * 2. hmm_range_fault to get page addresses (if system memory) 1533 * 3. DMA-map pages (if system memory) 1534 * 4-a. Take notifier lock 1535 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1536 * 4-c. Check that the range was not split or otherwise invalidated 1537 * 4-d. Update GPU page table 1538 * 4.e. Release notifier lock 1539 * 5. Release page table (and SVM BO) reservation 1540 */ 1541 static int svm_range_validate_and_map(struct mm_struct *mm, 1542 struct svm_range *prange, int32_t gpuidx, 1543 bool intr, bool wait, bool flush_tlb) 1544 { 1545 struct svm_validate_context ctx; 1546 unsigned long start, end, addr; 1547 struct kfd_process *p; 1548 void *owner; 1549 int32_t idx; 1550 int r = 0; 1551 1552 ctx.process = container_of(prange->svms, struct kfd_process, svms); 1553 ctx.prange = prange; 1554 ctx.intr = intr; 1555 1556 if (gpuidx < MAX_GPU_INSTANCE) { 1557 bitmap_zero(ctx.bitmap, MAX_GPU_INSTANCE); 1558 bitmap_set(ctx.bitmap, gpuidx, 1); 1559 } else if (ctx.process->xnack_enabled) { 1560 bitmap_copy(ctx.bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1561 1562 /* If prefetch range to GPU, or GPU retry fault migrate range to 1563 * GPU, which has ACCESS attribute to the range, create mapping 1564 * on that GPU. 1565 */ 1566 if (prange->actual_loc) { 1567 gpuidx = kfd_process_gpuidx_from_gpuid(ctx.process, 1568 prange->actual_loc); 1569 if (gpuidx < 0) { 1570 WARN_ONCE(1, "failed get device by id 0x%x\n", 1571 prange->actual_loc); 1572 return -EINVAL; 1573 } 1574 if (test_bit(gpuidx, prange->bitmap_access)) 1575 bitmap_set(ctx.bitmap, gpuidx, 1); 1576 } 1577 } else { 1578 bitmap_or(ctx.bitmap, prange->bitmap_access, 1579 prange->bitmap_aip, MAX_GPU_INSTANCE); 1580 } 1581 1582 if (bitmap_empty(ctx.bitmap, MAX_GPU_INSTANCE)) { 1583 if (!prange->mapped_to_gpu) 1584 return 0; 1585 1586 bitmap_copy(ctx.bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1587 } 1588 1589 if (prange->actual_loc && !prange->ttm_res) { 1590 /* This should never happen. actual_loc gets set by 1591 * svm_migrate_ram_to_vram after allocating a BO. 1592 */ 1593 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1594 return -EINVAL; 1595 } 1596 1597 svm_range_reserve_bos(&ctx); 1598 1599 p = container_of(prange->svms, struct kfd_process, svms); 1600 owner = kfd_svm_page_owner(p, find_first_bit(ctx.bitmap, 1601 MAX_GPU_INSTANCE)); 1602 for_each_set_bit(idx, ctx.bitmap, MAX_GPU_INSTANCE) { 1603 if (kfd_svm_page_owner(p, idx) != owner) { 1604 owner = NULL; 1605 break; 1606 } 1607 } 1608 1609 start = prange->start << PAGE_SHIFT; 1610 end = (prange->last + 1) << PAGE_SHIFT; 1611 for (addr = start; addr < end && !r; ) { 1612 struct hmm_range *hmm_range; 1613 struct vm_area_struct *vma; 1614 unsigned long next; 1615 unsigned long offset; 1616 unsigned long npages; 1617 bool readonly; 1618 1619 vma = vma_lookup(mm, addr); 1620 if (!vma) { 1621 r = -EFAULT; 1622 goto unreserve_out; 1623 } 1624 readonly = !(vma->vm_flags & VM_WRITE); 1625 1626 next = min(vma->vm_end, end); 1627 npages = (next - addr) >> PAGE_SHIFT; 1628 WRITE_ONCE(p->svms.faulting_task, current); 1629 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1630 readonly, owner, NULL, 1631 &hmm_range); 1632 WRITE_ONCE(p->svms.faulting_task, NULL); 1633 if (r) { 1634 pr_debug("failed %d to get svm range pages\n", r); 1635 goto unreserve_out; 1636 } 1637 1638 offset = (addr - start) >> PAGE_SHIFT; 1639 r = svm_range_dma_map(prange, ctx.bitmap, offset, npages, 1640 hmm_range->hmm_pfns); 1641 if (r) { 1642 pr_debug("failed %d to dma map range\n", r); 1643 goto unreserve_out; 1644 } 1645 1646 svm_range_lock(prange); 1647 if (amdgpu_hmm_range_get_pages_done(hmm_range)) { 1648 pr_debug("hmm update the range, need validate again\n"); 1649 r = -EAGAIN; 1650 goto unlock_out; 1651 } 1652 if (!list_empty(&prange->child_list)) { 1653 pr_debug("range split by unmap in parallel, validate again\n"); 1654 r = -EAGAIN; 1655 goto unlock_out; 1656 } 1657 1658 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1659 ctx.bitmap, wait, flush_tlb); 1660 1661 unlock_out: 1662 svm_range_unlock(prange); 1663 1664 addr = next; 1665 } 1666 1667 if (addr == end) { 1668 prange->validated_once = true; 1669 prange->mapped_to_gpu = true; 1670 } 1671 1672 unreserve_out: 1673 svm_range_unreserve_bos(&ctx); 1674 1675 if (!r) 1676 prange->validate_timestamp = ktime_get_boottime(); 1677 1678 return r; 1679 } 1680 1681 /** 1682 * svm_range_list_lock_and_flush_work - flush pending deferred work 1683 * 1684 * @svms: the svm range list 1685 * @mm: the mm structure 1686 * 1687 * Context: Returns with mmap write lock held, pending deferred work flushed 1688 * 1689 */ 1690 void 1691 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1692 struct mm_struct *mm) 1693 { 1694 retry_flush_work: 1695 flush_work(&svms->deferred_list_work); 1696 mmap_write_lock(mm); 1697 1698 if (list_empty(&svms->deferred_range_list)) 1699 return; 1700 mmap_write_unlock(mm); 1701 pr_debug("retry flush\n"); 1702 goto retry_flush_work; 1703 } 1704 1705 static void svm_range_restore_work(struct work_struct *work) 1706 { 1707 struct delayed_work *dwork = to_delayed_work(work); 1708 struct amdkfd_process_info *process_info; 1709 struct svm_range_list *svms; 1710 struct svm_range *prange; 1711 struct kfd_process *p; 1712 struct mm_struct *mm; 1713 int evicted_ranges; 1714 int invalid; 1715 int r; 1716 1717 svms = container_of(dwork, struct svm_range_list, restore_work); 1718 evicted_ranges = atomic_read(&svms->evicted_ranges); 1719 if (!evicted_ranges) 1720 return; 1721 1722 pr_debug("restore svm ranges\n"); 1723 1724 p = container_of(svms, struct kfd_process, svms); 1725 process_info = p->kgd_process_info; 1726 1727 /* Keep mm reference when svm_range_validate_and_map ranges */ 1728 mm = get_task_mm(p->lead_thread); 1729 if (!mm) { 1730 pr_debug("svms 0x%p process mm gone\n", svms); 1731 return; 1732 } 1733 1734 mutex_lock(&process_info->lock); 1735 svm_range_list_lock_and_flush_work(svms, mm); 1736 mutex_lock(&svms->lock); 1737 1738 evicted_ranges = atomic_read(&svms->evicted_ranges); 1739 1740 list_for_each_entry(prange, &svms->list, list) { 1741 invalid = atomic_read(&prange->invalid); 1742 if (!invalid) 1743 continue; 1744 1745 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1746 prange->svms, prange, prange->start, prange->last, 1747 invalid); 1748 1749 /* 1750 * If range is migrating, wait for migration is done. 1751 */ 1752 mutex_lock(&prange->migrate_mutex); 1753 1754 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 1755 false, true, false); 1756 if (r) 1757 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1758 prange->start); 1759 1760 mutex_unlock(&prange->migrate_mutex); 1761 if (r) 1762 goto out_reschedule; 1763 1764 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1765 goto out_reschedule; 1766 } 1767 1768 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1769 evicted_ranges) 1770 goto out_reschedule; 1771 1772 evicted_ranges = 0; 1773 1774 r = kgd2kfd_resume_mm(mm); 1775 if (r) { 1776 /* No recovery from this failure. Probably the CP is 1777 * hanging. No point trying again. 1778 */ 1779 pr_debug("failed %d to resume KFD\n", r); 1780 } 1781 1782 pr_debug("restore svm ranges successfully\n"); 1783 1784 out_reschedule: 1785 mutex_unlock(&svms->lock); 1786 mmap_write_unlock(mm); 1787 mutex_unlock(&process_info->lock); 1788 1789 /* If validation failed, reschedule another attempt */ 1790 if (evicted_ranges) { 1791 pr_debug("reschedule to restore svm range\n"); 1792 schedule_delayed_work(&svms->restore_work, 1793 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1794 1795 kfd_smi_event_queue_restore_rescheduled(mm); 1796 } 1797 mmput(mm); 1798 } 1799 1800 /** 1801 * svm_range_evict - evict svm range 1802 * @prange: svm range structure 1803 * @mm: current process mm_struct 1804 * @start: starting process queue number 1805 * @last: last process queue number 1806 * 1807 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1808 * return to let CPU evict the buffer and proceed CPU pagetable update. 1809 * 1810 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1811 * If invalidation happens while restore work is running, restore work will 1812 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1813 * the queues. 1814 */ 1815 static int 1816 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1817 unsigned long start, unsigned long last, 1818 enum mmu_notifier_event event) 1819 { 1820 struct svm_range_list *svms = prange->svms; 1821 struct svm_range *pchild; 1822 struct kfd_process *p; 1823 int r = 0; 1824 1825 p = container_of(svms, struct kfd_process, svms); 1826 1827 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1828 svms, prange->start, prange->last, start, last); 1829 1830 if (!p->xnack_enabled || 1831 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 1832 int evicted_ranges; 1833 bool mapped = prange->mapped_to_gpu; 1834 1835 list_for_each_entry(pchild, &prange->child_list, child_list) { 1836 if (!pchild->mapped_to_gpu) 1837 continue; 1838 mapped = true; 1839 mutex_lock_nested(&pchild->lock, 1); 1840 if (pchild->start <= last && pchild->last >= start) { 1841 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 1842 pchild->start, pchild->last); 1843 atomic_inc(&pchild->invalid); 1844 } 1845 mutex_unlock(&pchild->lock); 1846 } 1847 1848 if (!mapped) 1849 return r; 1850 1851 if (prange->start <= last && prange->last >= start) 1852 atomic_inc(&prange->invalid); 1853 1854 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 1855 if (evicted_ranges != 1) 1856 return r; 1857 1858 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 1859 prange->svms, prange->start, prange->last); 1860 1861 /* First eviction, stop the queues */ 1862 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 1863 if (r) 1864 pr_debug("failed to quiesce KFD\n"); 1865 1866 pr_debug("schedule to restore svm %p ranges\n", svms); 1867 schedule_delayed_work(&svms->restore_work, 1868 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1869 } else { 1870 unsigned long s, l; 1871 uint32_t trigger; 1872 1873 if (event == MMU_NOTIFY_MIGRATE) 1874 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 1875 else 1876 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 1877 1878 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 1879 prange->svms, start, last); 1880 list_for_each_entry(pchild, &prange->child_list, child_list) { 1881 mutex_lock_nested(&pchild->lock, 1); 1882 s = max(start, pchild->start); 1883 l = min(last, pchild->last); 1884 if (l >= s) 1885 svm_range_unmap_from_gpus(pchild, s, l, trigger); 1886 mutex_unlock(&pchild->lock); 1887 } 1888 s = max(start, prange->start); 1889 l = min(last, prange->last); 1890 if (l >= s) 1891 svm_range_unmap_from_gpus(prange, s, l, trigger); 1892 } 1893 1894 return r; 1895 } 1896 1897 static struct svm_range *svm_range_clone(struct svm_range *old) 1898 { 1899 struct svm_range *new; 1900 1901 new = svm_range_new(old->svms, old->start, old->last, false); 1902 if (!new) 1903 return NULL; 1904 1905 if (old->svm_bo) { 1906 new->ttm_res = old->ttm_res; 1907 new->offset = old->offset; 1908 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1909 spin_lock(&new->svm_bo->list_lock); 1910 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1911 spin_unlock(&new->svm_bo->list_lock); 1912 } 1913 new->flags = old->flags; 1914 new->preferred_loc = old->preferred_loc; 1915 new->prefetch_loc = old->prefetch_loc; 1916 new->actual_loc = old->actual_loc; 1917 new->granularity = old->granularity; 1918 new->mapped_to_gpu = old->mapped_to_gpu; 1919 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1920 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1921 1922 return new; 1923 } 1924 1925 void svm_range_set_max_pages(struct amdgpu_device *adev) 1926 { 1927 uint64_t max_pages; 1928 uint64_t pages, _pages; 1929 1930 /* 1/32 VRAM size in pages */ 1931 pages = adev->gmc.real_vram_size >> 17; 1932 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 1933 pages = rounddown_pow_of_two(pages); 1934 do { 1935 max_pages = READ_ONCE(max_svm_range_pages); 1936 _pages = min_not_zero(max_pages, pages); 1937 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 1938 } 1939 1940 static int 1941 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 1942 uint64_t max_pages, struct list_head *insert_list, 1943 struct list_head *update_list) 1944 { 1945 struct svm_range *prange; 1946 uint64_t l; 1947 1948 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 1949 max_pages, start, last); 1950 1951 while (last >= start) { 1952 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 1953 1954 prange = svm_range_new(svms, start, l, true); 1955 if (!prange) 1956 return -ENOMEM; 1957 list_add(&prange->list, insert_list); 1958 list_add(&prange->update_list, update_list); 1959 1960 start = l + 1; 1961 } 1962 return 0; 1963 } 1964 1965 /** 1966 * svm_range_add - add svm range and handle overlap 1967 * @p: the range add to this process svms 1968 * @start: page size aligned 1969 * @size: page size aligned 1970 * @nattr: number of attributes 1971 * @attrs: array of attributes 1972 * @update_list: output, the ranges need validate and update GPU mapping 1973 * @insert_list: output, the ranges need insert to svms 1974 * @remove_list: output, the ranges are replaced and need remove from svms 1975 * 1976 * Check if the virtual address range has overlap with any existing ranges, 1977 * split partly overlapping ranges and add new ranges in the gaps. All changes 1978 * should be applied to the range_list and interval tree transactionally. If 1979 * any range split or allocation fails, the entire update fails. Therefore any 1980 * existing overlapping svm_ranges are cloned and the original svm_ranges left 1981 * unchanged. 1982 * 1983 * If the transaction succeeds, the caller can update and insert clones and 1984 * new ranges, then free the originals. 1985 * 1986 * Otherwise the caller can free the clones and new ranges, while the old 1987 * svm_ranges remain unchanged. 1988 * 1989 * Context: Process context, caller must hold svms->lock 1990 * 1991 * Return: 1992 * 0 - OK, otherwise error code 1993 */ 1994 static int 1995 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 1996 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 1997 struct list_head *update_list, struct list_head *insert_list, 1998 struct list_head *remove_list) 1999 { 2000 unsigned long last = start + size - 1UL; 2001 struct svm_range_list *svms = &p->svms; 2002 struct interval_tree_node *node; 2003 struct svm_range *prange; 2004 struct svm_range *tmp; 2005 struct list_head new_list; 2006 int r = 0; 2007 2008 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2009 2010 INIT_LIST_HEAD(update_list); 2011 INIT_LIST_HEAD(insert_list); 2012 INIT_LIST_HEAD(remove_list); 2013 INIT_LIST_HEAD(&new_list); 2014 2015 node = interval_tree_iter_first(&svms->objects, start, last); 2016 while (node) { 2017 struct interval_tree_node *next; 2018 unsigned long next_start; 2019 2020 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2021 node->last); 2022 2023 prange = container_of(node, struct svm_range, it_node); 2024 next = interval_tree_iter_next(node, start, last); 2025 next_start = min(node->last, last) + 1; 2026 2027 if (svm_range_is_same_attrs(p, prange, nattr, attrs)) { 2028 /* nothing to do */ 2029 } else if (node->start < start || node->last > last) { 2030 /* node intersects the update range and its attributes 2031 * will change. Clone and split it, apply updates only 2032 * to the overlapping part 2033 */ 2034 struct svm_range *old = prange; 2035 2036 prange = svm_range_clone(old); 2037 if (!prange) { 2038 r = -ENOMEM; 2039 goto out; 2040 } 2041 2042 list_add(&old->update_list, remove_list); 2043 list_add(&prange->list, insert_list); 2044 list_add(&prange->update_list, update_list); 2045 2046 if (node->start < start) { 2047 pr_debug("change old range start\n"); 2048 r = svm_range_split_head(prange, start, 2049 insert_list); 2050 if (r) 2051 goto out; 2052 } 2053 if (node->last > last) { 2054 pr_debug("change old range last\n"); 2055 r = svm_range_split_tail(prange, last, 2056 insert_list); 2057 if (r) 2058 goto out; 2059 } 2060 } else { 2061 /* The node is contained within start..last, 2062 * just update it 2063 */ 2064 list_add(&prange->update_list, update_list); 2065 } 2066 2067 /* insert a new node if needed */ 2068 if (node->start > start) { 2069 r = svm_range_split_new(svms, start, node->start - 1, 2070 READ_ONCE(max_svm_range_pages), 2071 &new_list, update_list); 2072 if (r) 2073 goto out; 2074 } 2075 2076 node = next; 2077 start = next_start; 2078 } 2079 2080 /* add a final range at the end if needed */ 2081 if (start <= last) 2082 r = svm_range_split_new(svms, start, last, 2083 READ_ONCE(max_svm_range_pages), 2084 &new_list, update_list); 2085 2086 out: 2087 if (r) { 2088 list_for_each_entry_safe(prange, tmp, insert_list, list) 2089 svm_range_free(prange, false); 2090 list_for_each_entry_safe(prange, tmp, &new_list, list) 2091 svm_range_free(prange, true); 2092 } else { 2093 list_splice(&new_list, insert_list); 2094 } 2095 2096 return r; 2097 } 2098 2099 static void 2100 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2101 struct svm_range *prange) 2102 { 2103 unsigned long start; 2104 unsigned long last; 2105 2106 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2107 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2108 2109 if (prange->start == start && prange->last == last) 2110 return; 2111 2112 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2113 prange->svms, prange, start, last, prange->start, 2114 prange->last); 2115 2116 if (start != 0 && last != 0) { 2117 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2118 svm_range_remove_notifier(prange); 2119 } 2120 prange->it_node.start = prange->start; 2121 prange->it_node.last = prange->last; 2122 2123 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2124 svm_range_add_notifier_locked(mm, prange); 2125 } 2126 2127 static void 2128 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2129 struct mm_struct *mm) 2130 { 2131 switch (prange->work_item.op) { 2132 case SVM_OP_NULL: 2133 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2134 svms, prange, prange->start, prange->last); 2135 break; 2136 case SVM_OP_UNMAP_RANGE: 2137 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2138 svms, prange, prange->start, prange->last); 2139 svm_range_unlink(prange); 2140 svm_range_remove_notifier(prange); 2141 svm_range_free(prange, true); 2142 break; 2143 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2144 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2145 svms, prange, prange->start, prange->last); 2146 svm_range_update_notifier_and_interval_tree(mm, prange); 2147 break; 2148 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2149 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2150 svms, prange, prange->start, prange->last); 2151 svm_range_update_notifier_and_interval_tree(mm, prange); 2152 /* TODO: implement deferred validation and mapping */ 2153 break; 2154 case SVM_OP_ADD_RANGE: 2155 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2156 prange->start, prange->last); 2157 svm_range_add_to_svms(prange); 2158 svm_range_add_notifier_locked(mm, prange); 2159 break; 2160 case SVM_OP_ADD_RANGE_AND_MAP: 2161 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2162 prange, prange->start, prange->last); 2163 svm_range_add_to_svms(prange); 2164 svm_range_add_notifier_locked(mm, prange); 2165 /* TODO: implement deferred validation and mapping */ 2166 break; 2167 default: 2168 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2169 prange->work_item.op); 2170 } 2171 } 2172 2173 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2174 { 2175 struct kfd_process_device *pdd; 2176 struct kfd_process *p; 2177 int drain; 2178 uint32_t i; 2179 2180 p = container_of(svms, struct kfd_process, svms); 2181 2182 restart: 2183 drain = atomic_read(&svms->drain_pagefaults); 2184 if (!drain) 2185 return; 2186 2187 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2188 pdd = p->pdds[i]; 2189 if (!pdd) 2190 continue; 2191 2192 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2193 2194 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2195 pdd->dev->adev->irq.retry_cam_enabled ? 2196 &pdd->dev->adev->irq.ih : 2197 &pdd->dev->adev->irq.ih1); 2198 2199 if (pdd->dev->adev->irq.retry_cam_enabled) 2200 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2201 &pdd->dev->adev->irq.ih_soft); 2202 2203 2204 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2205 } 2206 if (atomic_cmpxchg(&svms->drain_pagefaults, drain, 0) != drain) 2207 goto restart; 2208 } 2209 2210 static void svm_range_deferred_list_work(struct work_struct *work) 2211 { 2212 struct svm_range_list *svms; 2213 struct svm_range *prange; 2214 struct mm_struct *mm; 2215 2216 svms = container_of(work, struct svm_range_list, deferred_list_work); 2217 pr_debug("enter svms 0x%p\n", svms); 2218 2219 spin_lock(&svms->deferred_list_lock); 2220 while (!list_empty(&svms->deferred_range_list)) { 2221 prange = list_first_entry(&svms->deferred_range_list, 2222 struct svm_range, deferred_list); 2223 spin_unlock(&svms->deferred_list_lock); 2224 2225 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2226 prange->start, prange->last, prange->work_item.op); 2227 2228 mm = prange->work_item.mm; 2229 retry: 2230 mmap_write_lock(mm); 2231 2232 /* Checking for the need to drain retry faults must be inside 2233 * mmap write lock to serialize with munmap notifiers. 2234 */ 2235 if (unlikely(atomic_read(&svms->drain_pagefaults))) { 2236 mmap_write_unlock(mm); 2237 svm_range_drain_retry_fault(svms); 2238 goto retry; 2239 } 2240 2241 /* Remove from deferred_list must be inside mmap write lock, for 2242 * two race cases: 2243 * 1. unmap_from_cpu may change work_item.op and add the range 2244 * to deferred_list again, cause use after free bug. 2245 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2246 * lock and continue because deferred_list is empty, but 2247 * deferred_list work is actually waiting for mmap lock. 2248 */ 2249 spin_lock(&svms->deferred_list_lock); 2250 list_del_init(&prange->deferred_list); 2251 spin_unlock(&svms->deferred_list_lock); 2252 2253 mutex_lock(&svms->lock); 2254 mutex_lock(&prange->migrate_mutex); 2255 while (!list_empty(&prange->child_list)) { 2256 struct svm_range *pchild; 2257 2258 pchild = list_first_entry(&prange->child_list, 2259 struct svm_range, child_list); 2260 pr_debug("child prange 0x%p op %d\n", pchild, 2261 pchild->work_item.op); 2262 list_del_init(&pchild->child_list); 2263 svm_range_handle_list_op(svms, pchild, mm); 2264 } 2265 mutex_unlock(&prange->migrate_mutex); 2266 2267 svm_range_handle_list_op(svms, prange, mm); 2268 mutex_unlock(&svms->lock); 2269 mmap_write_unlock(mm); 2270 2271 /* Pairs with mmget in svm_range_add_list_work */ 2272 mmput(mm); 2273 2274 spin_lock(&svms->deferred_list_lock); 2275 } 2276 spin_unlock(&svms->deferred_list_lock); 2277 pr_debug("exit svms 0x%p\n", svms); 2278 } 2279 2280 void 2281 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2282 struct mm_struct *mm, enum svm_work_list_ops op) 2283 { 2284 spin_lock(&svms->deferred_list_lock); 2285 /* if prange is on the deferred list */ 2286 if (!list_empty(&prange->deferred_list)) { 2287 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2288 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2289 if (op != SVM_OP_NULL && 2290 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2291 prange->work_item.op = op; 2292 } else { 2293 prange->work_item.op = op; 2294 2295 /* Pairs with mmput in deferred_list_work */ 2296 mmget(mm); 2297 prange->work_item.mm = mm; 2298 list_add_tail(&prange->deferred_list, 2299 &prange->svms->deferred_range_list); 2300 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2301 prange, prange->start, prange->last, op); 2302 } 2303 spin_unlock(&svms->deferred_list_lock); 2304 } 2305 2306 void schedule_deferred_list_work(struct svm_range_list *svms) 2307 { 2308 spin_lock(&svms->deferred_list_lock); 2309 if (!list_empty(&svms->deferred_range_list)) 2310 schedule_work(&svms->deferred_list_work); 2311 spin_unlock(&svms->deferred_list_lock); 2312 } 2313 2314 static void 2315 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent, 2316 struct svm_range *prange, unsigned long start, 2317 unsigned long last) 2318 { 2319 struct svm_range *head; 2320 struct svm_range *tail; 2321 2322 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2323 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2324 prange->start, prange->last); 2325 return; 2326 } 2327 if (start > prange->last || last < prange->start) 2328 return; 2329 2330 head = tail = prange; 2331 if (start > prange->start) 2332 svm_range_split(prange, prange->start, start - 1, &tail); 2333 if (last < tail->last) 2334 svm_range_split(tail, last + 1, tail->last, &head); 2335 2336 if (head != prange && tail != prange) { 2337 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2338 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 2339 } else if (tail != prange) { 2340 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE); 2341 } else if (head != prange) { 2342 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2343 } else if (parent != prange) { 2344 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2345 } 2346 } 2347 2348 static void 2349 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2350 unsigned long start, unsigned long last) 2351 { 2352 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2353 struct svm_range_list *svms; 2354 struct svm_range *pchild; 2355 struct kfd_process *p; 2356 unsigned long s, l; 2357 bool unmap_parent; 2358 2359 p = kfd_lookup_process_by_mm(mm); 2360 if (!p) 2361 return; 2362 svms = &p->svms; 2363 2364 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2365 prange, prange->start, prange->last, start, last); 2366 2367 /* Make sure pending page faults are drained in the deferred worker 2368 * before the range is freed to avoid straggler interrupts on 2369 * unmapped memory causing "phantom faults". 2370 */ 2371 atomic_inc(&svms->drain_pagefaults); 2372 2373 unmap_parent = start <= prange->start && last >= prange->last; 2374 2375 list_for_each_entry(pchild, &prange->child_list, child_list) { 2376 mutex_lock_nested(&pchild->lock, 1); 2377 s = max(start, pchild->start); 2378 l = min(last, pchild->last); 2379 if (l >= s) 2380 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2381 svm_range_unmap_split(mm, prange, pchild, start, last); 2382 mutex_unlock(&pchild->lock); 2383 } 2384 s = max(start, prange->start); 2385 l = min(last, prange->last); 2386 if (l >= s) 2387 svm_range_unmap_from_gpus(prange, s, l, trigger); 2388 svm_range_unmap_split(mm, prange, prange, start, last); 2389 2390 if (unmap_parent) 2391 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2392 else 2393 svm_range_add_list_work(svms, prange, mm, 2394 SVM_OP_UPDATE_RANGE_NOTIFIER); 2395 schedule_deferred_list_work(svms); 2396 2397 kfd_unref_process(p); 2398 } 2399 2400 /** 2401 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2402 * @mni: mmu_interval_notifier struct 2403 * @range: mmu_notifier_range struct 2404 * @cur_seq: value to pass to mmu_interval_set_seq() 2405 * 2406 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2407 * is from migration, or CPU page invalidation callback. 2408 * 2409 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2410 * work thread, and split prange if only part of prange is unmapped. 2411 * 2412 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2413 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2414 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2415 * update GPU mapping to recover. 2416 * 2417 * Context: mmap lock, notifier_invalidate_start lock are held 2418 * for invalidate event, prange lock is held if this is from migration 2419 */ 2420 static bool 2421 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2422 const struct mmu_notifier_range *range, 2423 unsigned long cur_seq) 2424 { 2425 struct svm_range *prange; 2426 unsigned long start; 2427 unsigned long last; 2428 2429 if (range->event == MMU_NOTIFY_RELEASE) 2430 return true; 2431 if (!mmget_not_zero(mni->mm)) 2432 return true; 2433 2434 start = mni->interval_tree.start; 2435 last = mni->interval_tree.last; 2436 start = max(start, range->start) >> PAGE_SHIFT; 2437 last = min(last, range->end - 1) >> PAGE_SHIFT; 2438 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2439 start, last, range->start >> PAGE_SHIFT, 2440 (range->end - 1) >> PAGE_SHIFT, 2441 mni->interval_tree.start >> PAGE_SHIFT, 2442 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2443 2444 prange = container_of(mni, struct svm_range, notifier); 2445 2446 svm_range_lock(prange); 2447 mmu_interval_set_seq(mni, cur_seq); 2448 2449 switch (range->event) { 2450 case MMU_NOTIFY_UNMAP: 2451 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2452 break; 2453 default: 2454 svm_range_evict(prange, mni->mm, start, last, range->event); 2455 break; 2456 } 2457 2458 svm_range_unlock(prange); 2459 mmput(mni->mm); 2460 2461 return true; 2462 } 2463 2464 /** 2465 * svm_range_from_addr - find svm range from fault address 2466 * @svms: svm range list header 2467 * @addr: address to search range interval tree, in pages 2468 * @parent: parent range if range is on child list 2469 * 2470 * Context: The caller must hold svms->lock 2471 * 2472 * Return: the svm_range found or NULL 2473 */ 2474 struct svm_range * 2475 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2476 struct svm_range **parent) 2477 { 2478 struct interval_tree_node *node; 2479 struct svm_range *prange; 2480 struct svm_range *pchild; 2481 2482 node = interval_tree_iter_first(&svms->objects, addr, addr); 2483 if (!node) 2484 return NULL; 2485 2486 prange = container_of(node, struct svm_range, it_node); 2487 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2488 addr, prange->start, prange->last, node->start, node->last); 2489 2490 if (addr >= prange->start && addr <= prange->last) { 2491 if (parent) 2492 *parent = prange; 2493 return prange; 2494 } 2495 list_for_each_entry(pchild, &prange->child_list, child_list) 2496 if (addr >= pchild->start && addr <= pchild->last) { 2497 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2498 addr, pchild->start, pchild->last); 2499 if (parent) 2500 *parent = prange; 2501 return pchild; 2502 } 2503 2504 return NULL; 2505 } 2506 2507 /* svm_range_best_restore_location - decide the best fault restore location 2508 * @prange: svm range structure 2509 * @adev: the GPU on which vm fault happened 2510 * 2511 * This is only called when xnack is on, to decide the best location to restore 2512 * the range mapping after GPU vm fault. Caller uses the best location to do 2513 * migration if actual loc is not best location, then update GPU page table 2514 * mapping to the best location. 2515 * 2516 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2517 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2518 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2519 * if range actual loc is cpu, best_loc is cpu 2520 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2521 * range actual loc. 2522 * Otherwise, GPU no access, best_loc is -1. 2523 * 2524 * Return: 2525 * -1 means vm fault GPU no access 2526 * 0 for CPU or GPU id 2527 */ 2528 static int32_t 2529 svm_range_best_restore_location(struct svm_range *prange, 2530 struct kfd_node *node, 2531 int32_t *gpuidx) 2532 { 2533 struct kfd_node *bo_node, *preferred_node; 2534 struct kfd_process *p; 2535 uint32_t gpuid; 2536 int r; 2537 2538 p = container_of(prange->svms, struct kfd_process, svms); 2539 2540 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2541 if (r < 0) { 2542 pr_debug("failed to get gpuid from kgd\n"); 2543 return -1; 2544 } 2545 2546 if (prange->preferred_loc == gpuid || 2547 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2548 return prange->preferred_loc; 2549 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2550 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2551 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2552 return prange->preferred_loc; 2553 /* fall through */ 2554 } 2555 2556 if (test_bit(*gpuidx, prange->bitmap_access)) 2557 return gpuid; 2558 2559 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2560 if (!prange->actual_loc) 2561 return 0; 2562 2563 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2564 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2565 return prange->actual_loc; 2566 else 2567 return 0; 2568 } 2569 2570 return -1; 2571 } 2572 2573 static int 2574 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2575 unsigned long *start, unsigned long *last, 2576 bool *is_heap_stack) 2577 { 2578 struct vm_area_struct *vma; 2579 struct interval_tree_node *node; 2580 unsigned long start_limit, end_limit; 2581 2582 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2583 if (!vma) { 2584 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2585 return -EFAULT; 2586 } 2587 2588 *is_heap_stack = (vma->vm_start <= vma->vm_mm->brk && 2589 vma->vm_end >= vma->vm_mm->start_brk) || 2590 (vma->vm_start <= vma->vm_mm->start_stack && 2591 vma->vm_end >= vma->vm_mm->start_stack); 2592 2593 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2594 (unsigned long)ALIGN_DOWN(addr, 2UL << 8)); 2595 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2596 (unsigned long)ALIGN(addr + 1, 2UL << 8)); 2597 /* First range that starts after the fault address */ 2598 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2599 if (node) { 2600 end_limit = min(end_limit, node->start); 2601 /* Last range that ends before the fault address */ 2602 node = container_of(rb_prev(&node->rb), 2603 struct interval_tree_node, rb); 2604 } else { 2605 /* Last range must end before addr because 2606 * there was no range after addr 2607 */ 2608 node = container_of(rb_last(&p->svms.objects.rb_root), 2609 struct interval_tree_node, rb); 2610 } 2611 if (node) { 2612 if (node->last >= addr) { 2613 WARN(1, "Overlap with prev node and page fault addr\n"); 2614 return -EFAULT; 2615 } 2616 start_limit = max(start_limit, node->last + 1); 2617 } 2618 2619 *start = start_limit; 2620 *last = end_limit - 1; 2621 2622 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2623 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2624 *start, *last, *is_heap_stack); 2625 2626 return 0; 2627 } 2628 2629 static int 2630 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2631 uint64_t *bo_s, uint64_t *bo_l) 2632 { 2633 struct amdgpu_bo_va_mapping *mapping; 2634 struct interval_tree_node *node; 2635 struct amdgpu_bo *bo = NULL; 2636 unsigned long userptr; 2637 uint32_t i; 2638 int r; 2639 2640 for (i = 0; i < p->n_pdds; i++) { 2641 struct amdgpu_vm *vm; 2642 2643 if (!p->pdds[i]->drm_priv) 2644 continue; 2645 2646 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2647 r = amdgpu_bo_reserve(vm->root.bo, false); 2648 if (r) 2649 return r; 2650 2651 /* Check userptr by searching entire vm->va interval tree */ 2652 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2653 while (node) { 2654 mapping = container_of((struct rb_node *)node, 2655 struct amdgpu_bo_va_mapping, rb); 2656 bo = mapping->bo_va->base.bo; 2657 2658 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2659 start << PAGE_SHIFT, 2660 last << PAGE_SHIFT, 2661 &userptr)) { 2662 node = interval_tree_iter_next(node, 0, ~0ULL); 2663 continue; 2664 } 2665 2666 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2667 start, last); 2668 if (bo_s && bo_l) { 2669 *bo_s = userptr >> PAGE_SHIFT; 2670 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2671 } 2672 amdgpu_bo_unreserve(vm->root.bo); 2673 return -EADDRINUSE; 2674 } 2675 amdgpu_bo_unreserve(vm->root.bo); 2676 } 2677 return 0; 2678 } 2679 2680 static struct 2681 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2682 struct kfd_process *p, 2683 struct mm_struct *mm, 2684 int64_t addr) 2685 { 2686 struct svm_range *prange = NULL; 2687 unsigned long start, last; 2688 uint32_t gpuid, gpuidx; 2689 bool is_heap_stack; 2690 uint64_t bo_s = 0; 2691 uint64_t bo_l = 0; 2692 int r; 2693 2694 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2695 &is_heap_stack)) 2696 return NULL; 2697 2698 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2699 if (r != -EADDRINUSE) 2700 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2701 2702 if (r == -EADDRINUSE) { 2703 if (addr >= bo_s && addr <= bo_l) 2704 return NULL; 2705 2706 /* Create one page svm range if 2MB range overlapping */ 2707 start = addr; 2708 last = addr; 2709 } 2710 2711 prange = svm_range_new(&p->svms, start, last, true); 2712 if (!prange) { 2713 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2714 return NULL; 2715 } 2716 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2717 pr_debug("failed to get gpuid from kgd\n"); 2718 svm_range_free(prange, true); 2719 return NULL; 2720 } 2721 2722 if (is_heap_stack) 2723 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2724 2725 svm_range_add_to_svms(prange); 2726 svm_range_add_notifier_locked(mm, prange); 2727 2728 return prange; 2729 } 2730 2731 /* svm_range_skip_recover - decide if prange can be recovered 2732 * @prange: svm range structure 2733 * 2734 * GPU vm retry fault handle skip recover the range for cases: 2735 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2736 * deferred list work will drain the stale fault before free the prange. 2737 * 2. prange is on deferred list to add interval notifier after split, or 2738 * 3. prange is child range, it is split from parent prange, recover later 2739 * after interval notifier is added. 2740 * 2741 * Return: true to skip recover, false to recover 2742 */ 2743 static bool svm_range_skip_recover(struct svm_range *prange) 2744 { 2745 struct svm_range_list *svms = prange->svms; 2746 2747 spin_lock(&svms->deferred_list_lock); 2748 if (list_empty(&prange->deferred_list) && 2749 list_empty(&prange->child_list)) { 2750 spin_unlock(&svms->deferred_list_lock); 2751 return false; 2752 } 2753 spin_unlock(&svms->deferred_list_lock); 2754 2755 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2756 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2757 svms, prange, prange->start, prange->last); 2758 return true; 2759 } 2760 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2761 prange->work_item.op == SVM_OP_ADD_RANGE) { 2762 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2763 svms, prange, prange->start, prange->last); 2764 return true; 2765 } 2766 return false; 2767 } 2768 2769 static void 2770 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 2771 int32_t gpuidx) 2772 { 2773 struct kfd_process_device *pdd; 2774 2775 /* fault is on different page of same range 2776 * or fault is skipped to recover later 2777 * or fault is on invalid virtual address 2778 */ 2779 if (gpuidx == MAX_GPU_INSTANCE) { 2780 uint32_t gpuid; 2781 int r; 2782 2783 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 2784 if (r < 0) 2785 return; 2786 } 2787 2788 /* fault is recovered 2789 * or fault cannot recover because GPU no access on the range 2790 */ 2791 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2792 if (pdd) 2793 WRITE_ONCE(pdd->faults, pdd->faults + 1); 2794 } 2795 2796 static bool 2797 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 2798 { 2799 unsigned long requested = VM_READ; 2800 2801 if (write_fault) 2802 requested |= VM_WRITE; 2803 2804 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 2805 vma->vm_flags); 2806 return (vma->vm_flags & requested) == requested; 2807 } 2808 2809 int 2810 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 2811 uint32_t vmid, uint32_t node_id, 2812 uint64_t addr, bool write_fault) 2813 { 2814 struct mm_struct *mm = NULL; 2815 struct svm_range_list *svms; 2816 struct svm_range *prange; 2817 struct kfd_process *p; 2818 ktime_t timestamp = ktime_get_boottime(); 2819 struct kfd_node *node; 2820 int32_t best_loc; 2821 int32_t gpuidx = MAX_GPU_INSTANCE; 2822 bool write_locked = false; 2823 struct vm_area_struct *vma; 2824 bool migration = false; 2825 int r = 0; 2826 2827 if (!KFD_IS_SVM_API_SUPPORTED(adev->kfd.dev)) { 2828 pr_debug("device does not support SVM\n"); 2829 return -EFAULT; 2830 } 2831 2832 p = kfd_lookup_process_by_pasid(pasid); 2833 if (!p) { 2834 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 2835 return 0; 2836 } 2837 svms = &p->svms; 2838 2839 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 2840 2841 if (atomic_read(&svms->drain_pagefaults)) { 2842 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 2843 r = 0; 2844 goto out; 2845 } 2846 2847 if (!p->xnack_enabled) { 2848 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 2849 r = -EFAULT; 2850 goto out; 2851 } 2852 2853 /* p->lead_thread is available as kfd_process_wq_release flush the work 2854 * before releasing task ref. 2855 */ 2856 mm = get_task_mm(p->lead_thread); 2857 if (!mm) { 2858 pr_debug("svms 0x%p failed to get mm\n", svms); 2859 r = 0; 2860 goto out; 2861 } 2862 2863 node = kfd_node_by_irq_ids(adev, node_id, vmid); 2864 if (!node) { 2865 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 2866 vmid); 2867 r = -EFAULT; 2868 goto out; 2869 } 2870 mmap_read_lock(mm); 2871 retry_write_locked: 2872 mutex_lock(&svms->lock); 2873 prange = svm_range_from_addr(svms, addr, NULL); 2874 if (!prange) { 2875 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 2876 svms, addr); 2877 if (!write_locked) { 2878 /* Need the write lock to create new range with MMU notifier. 2879 * Also flush pending deferred work to make sure the interval 2880 * tree is up to date before we add a new range 2881 */ 2882 mutex_unlock(&svms->lock); 2883 mmap_read_unlock(mm); 2884 mmap_write_lock(mm); 2885 write_locked = true; 2886 goto retry_write_locked; 2887 } 2888 prange = svm_range_create_unregistered_range(node, p, mm, addr); 2889 if (!prange) { 2890 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 2891 svms, addr); 2892 mmap_write_downgrade(mm); 2893 r = -EFAULT; 2894 goto out_unlock_svms; 2895 } 2896 } 2897 if (write_locked) 2898 mmap_write_downgrade(mm); 2899 2900 mutex_lock(&prange->migrate_mutex); 2901 2902 if (svm_range_skip_recover(prange)) { 2903 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 2904 r = 0; 2905 goto out_unlock_range; 2906 } 2907 2908 /* skip duplicate vm fault on different pages of same range */ 2909 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 2910 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 2911 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 2912 svms, prange->start, prange->last); 2913 r = 0; 2914 goto out_unlock_range; 2915 } 2916 2917 /* __do_munmap removed VMA, return success as we are handling stale 2918 * retry fault. 2919 */ 2920 vma = vma_lookup(mm, addr << PAGE_SHIFT); 2921 if (!vma) { 2922 pr_debug("address 0x%llx VMA is removed\n", addr); 2923 r = 0; 2924 goto out_unlock_range; 2925 } 2926 2927 if (!svm_fault_allowed(vma, write_fault)) { 2928 pr_debug("fault addr 0x%llx no %s permission\n", addr, 2929 write_fault ? "write" : "read"); 2930 r = -EPERM; 2931 goto out_unlock_range; 2932 } 2933 2934 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 2935 if (best_loc == -1) { 2936 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 2937 svms, prange->start, prange->last); 2938 r = -EACCES; 2939 goto out_unlock_range; 2940 } 2941 2942 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 2943 svms, prange->start, prange->last, best_loc, 2944 prange->actual_loc); 2945 2946 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr, 2947 write_fault, timestamp); 2948 2949 if (prange->actual_loc != best_loc) { 2950 migration = true; 2951 if (best_loc) { 2952 r = svm_migrate_to_vram(prange, best_loc, mm, 2953 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 2954 if (r) { 2955 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 2956 r, addr); 2957 /* Fallback to system memory if migration to 2958 * VRAM failed 2959 */ 2960 if (prange->actual_loc) 2961 r = svm_migrate_vram_to_ram(prange, mm, 2962 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, 2963 NULL); 2964 else 2965 r = 0; 2966 } 2967 } else { 2968 r = svm_migrate_vram_to_ram(prange, mm, 2969 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, 2970 NULL); 2971 } 2972 if (r) { 2973 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 2974 r, svms, prange->start, prange->last); 2975 goto out_unlock_range; 2976 } 2977 } 2978 2979 r = svm_range_validate_and_map(mm, prange, gpuidx, false, false, false); 2980 if (r) 2981 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 2982 r, svms, prange->start, prange->last); 2983 2984 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr, 2985 migration); 2986 2987 out_unlock_range: 2988 mutex_unlock(&prange->migrate_mutex); 2989 out_unlock_svms: 2990 mutex_unlock(&svms->lock); 2991 mmap_read_unlock(mm); 2992 2993 svm_range_count_fault(node, p, gpuidx); 2994 2995 mmput(mm); 2996 out: 2997 kfd_unref_process(p); 2998 2999 if (r == -EAGAIN) { 3000 pr_debug("recover vm fault later\n"); 3001 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3002 r = 0; 3003 } 3004 return r; 3005 } 3006 3007 int 3008 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3009 { 3010 struct svm_range *prange, *pchild; 3011 uint64_t reserved_size = 0; 3012 uint64_t size; 3013 int r = 0; 3014 3015 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3016 3017 mutex_lock(&p->svms.lock); 3018 3019 list_for_each_entry(prange, &p->svms.list, list) { 3020 svm_range_lock(prange); 3021 list_for_each_entry(pchild, &prange->child_list, child_list) { 3022 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3023 if (xnack_enabled) { 3024 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3025 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR); 3026 } else { 3027 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3028 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR); 3029 if (r) 3030 goto out_unlock; 3031 reserved_size += size; 3032 } 3033 } 3034 3035 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3036 if (xnack_enabled) { 3037 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3038 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR); 3039 } else { 3040 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3041 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR); 3042 if (r) 3043 goto out_unlock; 3044 reserved_size += size; 3045 } 3046 out_unlock: 3047 svm_range_unlock(prange); 3048 if (r) 3049 break; 3050 } 3051 3052 if (r) 3053 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3054 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR); 3055 else 3056 /* Change xnack mode must be inside svms lock, to avoid race with 3057 * svm_range_deferred_list_work unreserve memory in parallel. 3058 */ 3059 p->xnack_enabled = xnack_enabled; 3060 3061 mutex_unlock(&p->svms.lock); 3062 return r; 3063 } 3064 3065 void svm_range_list_fini(struct kfd_process *p) 3066 { 3067 struct svm_range *prange; 3068 struct svm_range *next; 3069 3070 pr_debug("pasid 0x%x svms 0x%p\n", p->pasid, &p->svms); 3071 3072 cancel_delayed_work_sync(&p->svms.restore_work); 3073 3074 /* Ensure list work is finished before process is destroyed */ 3075 flush_work(&p->svms.deferred_list_work); 3076 3077 /* 3078 * Ensure no retry fault comes in afterwards, as page fault handler will 3079 * not find kfd process and take mm lock to recover fault. 3080 */ 3081 atomic_inc(&p->svms.drain_pagefaults); 3082 svm_range_drain_retry_fault(&p->svms); 3083 3084 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3085 svm_range_unlink(prange); 3086 svm_range_remove_notifier(prange); 3087 svm_range_free(prange, true); 3088 } 3089 3090 mutex_destroy(&p->svms.lock); 3091 3092 pr_debug("pasid 0x%x svms 0x%p done\n", p->pasid, &p->svms); 3093 } 3094 3095 int svm_range_list_init(struct kfd_process *p) 3096 { 3097 struct svm_range_list *svms = &p->svms; 3098 int i; 3099 3100 svms->objects = RB_ROOT_CACHED; 3101 mutex_init(&svms->lock); 3102 INIT_LIST_HEAD(&svms->list); 3103 atomic_set(&svms->evicted_ranges, 0); 3104 atomic_set(&svms->drain_pagefaults, 0); 3105 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3106 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3107 INIT_LIST_HEAD(&svms->deferred_range_list); 3108 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3109 spin_lock_init(&svms->deferred_list_lock); 3110 3111 for (i = 0; i < p->n_pdds; i++) 3112 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->kfd)) 3113 bitmap_set(svms->bitmap_supported, i, 1); 3114 3115 return 0; 3116 } 3117 3118 /** 3119 * svm_range_check_vm - check if virtual address range mapped already 3120 * @p: current kfd_process 3121 * @start: range start address, in pages 3122 * @last: range last address, in pages 3123 * @bo_s: mapping start address in pages if address range already mapped 3124 * @bo_l: mapping last address in pages if address range already mapped 3125 * 3126 * The purpose is to avoid virtual address ranges already allocated by 3127 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3128 * It looks for each pdd in the kfd_process. 3129 * 3130 * Context: Process context 3131 * 3132 * Return 0 - OK, if the range is not mapped. 3133 * Otherwise error code: 3134 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3135 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3136 * a signal. Release all buffer reservations and return to user-space. 3137 */ 3138 static int 3139 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3140 uint64_t *bo_s, uint64_t *bo_l) 3141 { 3142 struct amdgpu_bo_va_mapping *mapping; 3143 struct interval_tree_node *node; 3144 uint32_t i; 3145 int r; 3146 3147 for (i = 0; i < p->n_pdds; i++) { 3148 struct amdgpu_vm *vm; 3149 3150 if (!p->pdds[i]->drm_priv) 3151 continue; 3152 3153 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3154 r = amdgpu_bo_reserve(vm->root.bo, false); 3155 if (r) 3156 return r; 3157 3158 node = interval_tree_iter_first(&vm->va, start, last); 3159 if (node) { 3160 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3161 start, last); 3162 mapping = container_of((struct rb_node *)node, 3163 struct amdgpu_bo_va_mapping, rb); 3164 if (bo_s && bo_l) { 3165 *bo_s = mapping->start; 3166 *bo_l = mapping->last; 3167 } 3168 amdgpu_bo_unreserve(vm->root.bo); 3169 return -EADDRINUSE; 3170 } 3171 amdgpu_bo_unreserve(vm->root.bo); 3172 } 3173 3174 return 0; 3175 } 3176 3177 /** 3178 * svm_range_is_valid - check if virtual address range is valid 3179 * @p: current kfd_process 3180 * @start: range start address, in pages 3181 * @size: range size, in pages 3182 * 3183 * Valid virtual address range means it belongs to one or more VMAs 3184 * 3185 * Context: Process context 3186 * 3187 * Return: 3188 * 0 - OK, otherwise error code 3189 */ 3190 static int 3191 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3192 { 3193 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3194 struct vm_area_struct *vma; 3195 unsigned long end; 3196 unsigned long start_unchg = start; 3197 3198 start <<= PAGE_SHIFT; 3199 end = start + (size << PAGE_SHIFT); 3200 do { 3201 vma = vma_lookup(p->mm, start); 3202 if (!vma || (vma->vm_flags & device_vma)) 3203 return -EFAULT; 3204 start = min(end, vma->vm_end); 3205 } while (start < end); 3206 3207 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3208 NULL); 3209 } 3210 3211 /** 3212 * svm_range_best_prefetch_location - decide the best prefetch location 3213 * @prange: svm range structure 3214 * 3215 * For xnack off: 3216 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3217 * can be CPU or GPU. 3218 * 3219 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3220 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3221 * the best prefetch location is always CPU, because GPU can not have coherent 3222 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3223 * 3224 * For xnack on: 3225 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3226 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3227 * 3228 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3229 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3230 * prefetch location is always CPU. 3231 * 3232 * Context: Process context 3233 * 3234 * Return: 3235 * 0 for CPU or GPU id 3236 */ 3237 static uint32_t 3238 svm_range_best_prefetch_location(struct svm_range *prange) 3239 { 3240 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3241 uint32_t best_loc = prange->prefetch_loc; 3242 struct kfd_process_device *pdd; 3243 struct kfd_node *bo_node; 3244 struct kfd_process *p; 3245 uint32_t gpuidx; 3246 3247 p = container_of(prange->svms, struct kfd_process, svms); 3248 3249 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3250 goto out; 3251 3252 bo_node = svm_range_get_node_by_id(prange, best_loc); 3253 if (!bo_node) { 3254 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3255 best_loc = 0; 3256 goto out; 3257 } 3258 3259 if (p->xnack_enabled) 3260 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3261 else 3262 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3263 MAX_GPU_INSTANCE); 3264 3265 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3266 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3267 if (!pdd) { 3268 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3269 continue; 3270 } 3271 3272 if (pdd->dev->adev == bo_node->adev) 3273 continue; 3274 3275 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3276 best_loc = 0; 3277 break; 3278 } 3279 } 3280 3281 out: 3282 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3283 p->xnack_enabled, &p->svms, prange->start, prange->last, 3284 best_loc); 3285 3286 return best_loc; 3287 } 3288 3289 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3290 * @mm: current process mm_struct 3291 * @prange: svm range structure 3292 * @migrated: output, true if migration is triggered 3293 * 3294 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3295 * from ram to vram. 3296 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3297 * from vram to ram. 3298 * 3299 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3300 * and restore work: 3301 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3302 * stops all queues, schedule restore work 3303 * 2. svm_range_restore_work wait for migration is done by 3304 * a. svm_range_validate_vram takes prange->migrate_mutex 3305 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3306 * 3. restore work update mappings of GPU, resume all queues. 3307 * 3308 * Context: Process context 3309 * 3310 * Return: 3311 * 0 - OK, otherwise - error code of migration 3312 */ 3313 static int 3314 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3315 bool *migrated) 3316 { 3317 uint32_t best_loc; 3318 int r = 0; 3319 3320 *migrated = false; 3321 best_loc = svm_range_best_prefetch_location(prange); 3322 3323 if (best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3324 best_loc == prange->actual_loc) 3325 return 0; 3326 3327 if (!best_loc) { 3328 r = svm_migrate_vram_to_ram(prange, mm, 3329 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3330 *migrated = !r; 3331 return r; 3332 } 3333 3334 r = svm_migrate_to_vram(prange, best_loc, mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3335 *migrated = !r; 3336 3337 return r; 3338 } 3339 3340 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3341 { 3342 if (!fence) 3343 return -EINVAL; 3344 3345 if (dma_fence_is_signaled(&fence->base)) 3346 return 0; 3347 3348 if (fence->svm_bo) { 3349 WRITE_ONCE(fence->svm_bo->evicting, 1); 3350 schedule_work(&fence->svm_bo->eviction_work); 3351 } 3352 3353 return 0; 3354 } 3355 3356 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3357 { 3358 struct svm_range_bo *svm_bo; 3359 struct mm_struct *mm; 3360 int r = 0; 3361 3362 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3363 if (!svm_bo_ref_unless_zero(svm_bo)) 3364 return; /* svm_bo was freed while eviction was pending */ 3365 3366 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3367 mm = svm_bo->eviction_fence->mm; 3368 } else { 3369 svm_range_bo_unref(svm_bo); 3370 return; 3371 } 3372 3373 mmap_read_lock(mm); 3374 spin_lock(&svm_bo->list_lock); 3375 while (!list_empty(&svm_bo->range_list) && !r) { 3376 struct svm_range *prange = 3377 list_first_entry(&svm_bo->range_list, 3378 struct svm_range, svm_bo_list); 3379 int retries = 3; 3380 3381 list_del_init(&prange->svm_bo_list); 3382 spin_unlock(&svm_bo->list_lock); 3383 3384 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3385 prange->start, prange->last); 3386 3387 mutex_lock(&prange->migrate_mutex); 3388 do { 3389 r = svm_migrate_vram_to_ram(prange, mm, 3390 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3391 } while (!r && prange->actual_loc && --retries); 3392 3393 if (!r && prange->actual_loc) 3394 pr_info_once("Migration failed during eviction"); 3395 3396 if (!prange->actual_loc) { 3397 mutex_lock(&prange->lock); 3398 prange->svm_bo = NULL; 3399 mutex_unlock(&prange->lock); 3400 } 3401 mutex_unlock(&prange->migrate_mutex); 3402 3403 spin_lock(&svm_bo->list_lock); 3404 } 3405 spin_unlock(&svm_bo->list_lock); 3406 mmap_read_unlock(mm); 3407 mmput(mm); 3408 3409 dma_fence_signal(&svm_bo->eviction_fence->base); 3410 3411 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3412 * has been called in svm_migrate_vram_to_ram 3413 */ 3414 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3415 svm_range_bo_unref(svm_bo); 3416 } 3417 3418 static int 3419 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3420 uint64_t start, uint64_t size, uint32_t nattr, 3421 struct kfd_ioctl_svm_attribute *attrs) 3422 { 3423 struct amdkfd_process_info *process_info = p->kgd_process_info; 3424 struct list_head update_list; 3425 struct list_head insert_list; 3426 struct list_head remove_list; 3427 struct svm_range_list *svms; 3428 struct svm_range *prange; 3429 struct svm_range *next; 3430 bool update_mapping = false; 3431 bool flush_tlb; 3432 int r = 0; 3433 3434 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3435 p->pasid, &p->svms, start, start + size - 1, size); 3436 3437 r = svm_range_check_attr(p, nattr, attrs); 3438 if (r) 3439 return r; 3440 3441 svms = &p->svms; 3442 3443 mutex_lock(&process_info->lock); 3444 3445 svm_range_list_lock_and_flush_work(svms, mm); 3446 3447 r = svm_range_is_valid(p, start, size); 3448 if (r) { 3449 pr_debug("invalid range r=%d\n", r); 3450 mmap_write_unlock(mm); 3451 goto out; 3452 } 3453 3454 mutex_lock(&svms->lock); 3455 3456 /* Add new range and split existing ranges as needed */ 3457 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3458 &insert_list, &remove_list); 3459 if (r) { 3460 mutex_unlock(&svms->lock); 3461 mmap_write_unlock(mm); 3462 goto out; 3463 } 3464 /* Apply changes as a transaction */ 3465 list_for_each_entry_safe(prange, next, &insert_list, list) { 3466 svm_range_add_to_svms(prange); 3467 svm_range_add_notifier_locked(mm, prange); 3468 } 3469 list_for_each_entry(prange, &update_list, update_list) { 3470 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3471 /* TODO: unmap ranges from GPU that lost access */ 3472 } 3473 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3474 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3475 prange->svms, prange, prange->start, 3476 prange->last); 3477 svm_range_unlink(prange); 3478 svm_range_remove_notifier(prange); 3479 svm_range_free(prange, false); 3480 } 3481 3482 mmap_write_downgrade(mm); 3483 /* Trigger migrations and revalidate and map to GPUs as needed. If 3484 * this fails we may be left with partially completed actions. There 3485 * is no clean way of rolling back to the previous state in such a 3486 * case because the rollback wouldn't be guaranteed to work either. 3487 */ 3488 list_for_each_entry(prange, &update_list, update_list) { 3489 bool migrated; 3490 3491 mutex_lock(&prange->migrate_mutex); 3492 3493 r = svm_range_trigger_migration(mm, prange, &migrated); 3494 if (r) 3495 goto out_unlock_range; 3496 3497 if (migrated && (!p->xnack_enabled || 3498 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3499 prange->mapped_to_gpu) { 3500 pr_debug("restore_work will update mappings of GPUs\n"); 3501 mutex_unlock(&prange->migrate_mutex); 3502 continue; 3503 } 3504 3505 if (!migrated && !update_mapping) { 3506 mutex_unlock(&prange->migrate_mutex); 3507 continue; 3508 } 3509 3510 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3511 3512 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 3513 true, true, flush_tlb); 3514 if (r) 3515 pr_debug("failed %d to map svm range\n", r); 3516 3517 out_unlock_range: 3518 mutex_unlock(&prange->migrate_mutex); 3519 if (r) 3520 break; 3521 } 3522 3523 svm_range_debug_dump(svms); 3524 3525 mutex_unlock(&svms->lock); 3526 mmap_read_unlock(mm); 3527 out: 3528 mutex_unlock(&process_info->lock); 3529 3530 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid, 3531 &p->svms, start, start + size - 1, r); 3532 3533 return r; 3534 } 3535 3536 static int 3537 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3538 uint64_t start, uint64_t size, uint32_t nattr, 3539 struct kfd_ioctl_svm_attribute *attrs) 3540 { 3541 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3542 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3543 bool get_preferred_loc = false; 3544 bool get_prefetch_loc = false; 3545 bool get_granularity = false; 3546 bool get_accessible = false; 3547 bool get_flags = false; 3548 uint64_t last = start + size - 1UL; 3549 uint8_t granularity = 0xff; 3550 struct interval_tree_node *node; 3551 struct svm_range_list *svms; 3552 struct svm_range *prange; 3553 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3554 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3555 uint32_t flags_and = 0xffffffff; 3556 uint32_t flags_or = 0; 3557 int gpuidx; 3558 uint32_t i; 3559 int r = 0; 3560 3561 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3562 start + size - 1, nattr); 3563 3564 /* Flush pending deferred work to avoid racing with deferred actions from 3565 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3566 * can still race with get_attr because we don't hold the mmap lock. But that 3567 * would be a race condition in the application anyway, and undefined 3568 * behaviour is acceptable in that case. 3569 */ 3570 flush_work(&p->svms.deferred_list_work); 3571 3572 mmap_read_lock(mm); 3573 r = svm_range_is_valid(p, start, size); 3574 mmap_read_unlock(mm); 3575 if (r) { 3576 pr_debug("invalid range r=%d\n", r); 3577 return r; 3578 } 3579 3580 for (i = 0; i < nattr; i++) { 3581 switch (attrs[i].type) { 3582 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3583 get_preferred_loc = true; 3584 break; 3585 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3586 get_prefetch_loc = true; 3587 break; 3588 case KFD_IOCTL_SVM_ATTR_ACCESS: 3589 get_accessible = true; 3590 break; 3591 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3592 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3593 get_flags = true; 3594 break; 3595 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3596 get_granularity = true; 3597 break; 3598 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3599 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3600 fallthrough; 3601 default: 3602 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3603 return -EINVAL; 3604 } 3605 } 3606 3607 svms = &p->svms; 3608 3609 mutex_lock(&svms->lock); 3610 3611 node = interval_tree_iter_first(&svms->objects, start, last); 3612 if (!node) { 3613 pr_debug("range attrs not found return default values\n"); 3614 svm_range_set_default_attributes(&location, &prefetch_loc, 3615 &granularity, &flags_and); 3616 flags_or = flags_and; 3617 if (p->xnack_enabled) 3618 bitmap_copy(bitmap_access, svms->bitmap_supported, 3619 MAX_GPU_INSTANCE); 3620 else 3621 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3622 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3623 goto fill_values; 3624 } 3625 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3626 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3627 3628 while (node) { 3629 struct interval_tree_node *next; 3630 3631 prange = container_of(node, struct svm_range, it_node); 3632 next = interval_tree_iter_next(node, start, last); 3633 3634 if (get_preferred_loc) { 3635 if (prange->preferred_loc == 3636 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3637 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3638 location != prange->preferred_loc)) { 3639 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3640 get_preferred_loc = false; 3641 } else { 3642 location = prange->preferred_loc; 3643 } 3644 } 3645 if (get_prefetch_loc) { 3646 if (prange->prefetch_loc == 3647 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3648 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3649 prefetch_loc != prange->prefetch_loc)) { 3650 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3651 get_prefetch_loc = false; 3652 } else { 3653 prefetch_loc = prange->prefetch_loc; 3654 } 3655 } 3656 if (get_accessible) { 3657 bitmap_and(bitmap_access, bitmap_access, 3658 prange->bitmap_access, MAX_GPU_INSTANCE); 3659 bitmap_and(bitmap_aip, bitmap_aip, 3660 prange->bitmap_aip, MAX_GPU_INSTANCE); 3661 } 3662 if (get_flags) { 3663 flags_and &= prange->flags; 3664 flags_or |= prange->flags; 3665 } 3666 3667 if (get_granularity && prange->granularity < granularity) 3668 granularity = prange->granularity; 3669 3670 node = next; 3671 } 3672 fill_values: 3673 mutex_unlock(&svms->lock); 3674 3675 for (i = 0; i < nattr; i++) { 3676 switch (attrs[i].type) { 3677 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3678 attrs[i].value = location; 3679 break; 3680 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3681 attrs[i].value = prefetch_loc; 3682 break; 3683 case KFD_IOCTL_SVM_ATTR_ACCESS: 3684 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3685 attrs[i].value); 3686 if (gpuidx < 0) { 3687 pr_debug("invalid gpuid %x\n", attrs[i].value); 3688 return -EINVAL; 3689 } 3690 if (test_bit(gpuidx, bitmap_access)) 3691 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3692 else if (test_bit(gpuidx, bitmap_aip)) 3693 attrs[i].type = 3694 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3695 else 3696 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3697 break; 3698 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3699 attrs[i].value = flags_and; 3700 break; 3701 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3702 attrs[i].value = ~flags_or; 3703 break; 3704 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3705 attrs[i].value = (uint32_t)granularity; 3706 break; 3707 } 3708 } 3709 3710 return 0; 3711 } 3712 3713 int kfd_criu_resume_svm(struct kfd_process *p) 3714 { 3715 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3716 int nattr_common = 4, nattr_accessibility = 1; 3717 struct criu_svm_metadata *criu_svm_md = NULL; 3718 struct svm_range_list *svms = &p->svms; 3719 struct criu_svm_metadata *next = NULL; 3720 uint32_t set_flags = 0xffffffff; 3721 int i, j, num_attrs, ret = 0; 3722 uint64_t set_attr_size; 3723 struct mm_struct *mm; 3724 3725 if (list_empty(&svms->criu_svm_metadata_list)) { 3726 pr_debug("No SVM data from CRIU restore stage 2\n"); 3727 return ret; 3728 } 3729 3730 mm = get_task_mm(p->lead_thread); 3731 if (!mm) { 3732 pr_err("failed to get mm for the target process\n"); 3733 return -ESRCH; 3734 } 3735 3736 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 3737 3738 i = j = 0; 3739 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 3740 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 3741 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 3742 3743 for (j = 0; j < num_attrs; j++) { 3744 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 3745 i, j, criu_svm_md->data.attrs[j].type, 3746 i, j, criu_svm_md->data.attrs[j].value); 3747 switch (criu_svm_md->data.attrs[j].type) { 3748 /* During Checkpoint operation, the query for 3749 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 3750 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 3751 * not used by the range which was checkpointed. Care 3752 * must be taken to not restore with an invalid value 3753 * otherwise the gpuidx value will be invalid and 3754 * set_attr would eventually fail so just replace those 3755 * with another dummy attribute such as 3756 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 3757 */ 3758 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3759 if (criu_svm_md->data.attrs[j].value == 3760 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 3761 criu_svm_md->data.attrs[j].type = 3762 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3763 criu_svm_md->data.attrs[j].value = 0; 3764 } 3765 break; 3766 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3767 set_flags = criu_svm_md->data.attrs[j].value; 3768 break; 3769 default: 3770 break; 3771 } 3772 } 3773 3774 /* CLR_FLAGS is not available via get_attr during checkpoint but 3775 * it needs to be inserted before restoring the ranges so 3776 * allocate extra space for it before calling set_attr 3777 */ 3778 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3779 (num_attrs + 1); 3780 set_attr_new = krealloc(set_attr, set_attr_size, 3781 GFP_KERNEL); 3782 if (!set_attr_new) { 3783 ret = -ENOMEM; 3784 goto exit; 3785 } 3786 set_attr = set_attr_new; 3787 3788 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 3789 sizeof(struct kfd_ioctl_svm_attribute)); 3790 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 3791 set_attr[num_attrs].value = ~set_flags; 3792 3793 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 3794 criu_svm_md->data.size, num_attrs + 1, 3795 set_attr); 3796 if (ret) { 3797 pr_err("CRIU: failed to set range attributes\n"); 3798 goto exit; 3799 } 3800 3801 i++; 3802 } 3803 exit: 3804 kfree(set_attr); 3805 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 3806 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 3807 criu_svm_md->data.start_addr); 3808 kfree(criu_svm_md); 3809 } 3810 3811 mmput(mm); 3812 return ret; 3813 3814 } 3815 3816 int kfd_criu_restore_svm(struct kfd_process *p, 3817 uint8_t __user *user_priv_ptr, 3818 uint64_t *priv_data_offset, 3819 uint64_t max_priv_data_size) 3820 { 3821 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 3822 int nattr_common = 4, nattr_accessibility = 1; 3823 struct criu_svm_metadata *criu_svm_md = NULL; 3824 struct svm_range_list *svms = &p->svms; 3825 uint32_t num_devices; 3826 int ret = 0; 3827 3828 num_devices = p->n_pdds; 3829 /* Handle one SVM range object at a time, also the number of gpus are 3830 * assumed to be same on the restore node, checking must be done while 3831 * evaluating the topology earlier 3832 */ 3833 3834 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 3835 (nattr_common + nattr_accessibility * num_devices); 3836 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 3837 3838 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 3839 svm_attrs_size; 3840 3841 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 3842 if (!criu_svm_md) { 3843 pr_err("failed to allocate memory to store svm metadata\n"); 3844 return -ENOMEM; 3845 } 3846 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 3847 ret = -EINVAL; 3848 goto exit; 3849 } 3850 3851 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 3852 svm_priv_data_size); 3853 if (ret) { 3854 ret = -EFAULT; 3855 goto exit; 3856 } 3857 *priv_data_offset += svm_priv_data_size; 3858 3859 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 3860 3861 return 0; 3862 3863 3864 exit: 3865 kfree(criu_svm_md); 3866 return ret; 3867 } 3868 3869 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 3870 uint64_t *svm_priv_data_size) 3871 { 3872 uint64_t total_size, accessibility_size, common_attr_size; 3873 int nattr_common = 4, nattr_accessibility = 1; 3874 int num_devices = p->n_pdds; 3875 struct svm_range_list *svms; 3876 struct svm_range *prange; 3877 uint32_t count = 0; 3878 3879 *svm_priv_data_size = 0; 3880 3881 svms = &p->svms; 3882 if (!svms) 3883 return -EINVAL; 3884 3885 mutex_lock(&svms->lock); 3886 list_for_each_entry(prange, &svms->list, list) { 3887 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 3888 prange, prange->start, prange->npages, 3889 prange->start + prange->npages - 1); 3890 count++; 3891 } 3892 mutex_unlock(&svms->lock); 3893 3894 *num_svm_ranges = count; 3895 /* Only the accessbility attributes need to be queried for all the gpus 3896 * individually, remaining ones are spanned across the entire process 3897 * regardless of the various gpu nodes. Of the remaining attributes, 3898 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 3899 * 3900 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 3901 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 3902 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 3903 * KFD_IOCTL_SVM_ATTR_GRANULARITY 3904 * 3905 * ** ACCESSBILITY ATTRIBUTES ** 3906 * (Considered as one, type is altered during query, value is gpuid) 3907 * KFD_IOCTL_SVM_ATTR_ACCESS 3908 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 3909 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 3910 */ 3911 if (*num_svm_ranges > 0) { 3912 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3913 nattr_common; 3914 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 3915 nattr_accessibility * num_devices; 3916 3917 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 3918 common_attr_size + accessibility_size; 3919 3920 *svm_priv_data_size = *num_svm_ranges * total_size; 3921 } 3922 3923 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 3924 *svm_priv_data_size); 3925 return 0; 3926 } 3927 3928 int kfd_criu_checkpoint_svm(struct kfd_process *p, 3929 uint8_t __user *user_priv_data, 3930 uint64_t *priv_data_offset) 3931 { 3932 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 3933 struct kfd_ioctl_svm_attribute *query_attr = NULL; 3934 uint64_t svm_priv_data_size, query_attr_size = 0; 3935 int index, nattr_common = 4, ret = 0; 3936 struct svm_range_list *svms; 3937 int num_devices = p->n_pdds; 3938 struct svm_range *prange; 3939 struct mm_struct *mm; 3940 3941 svms = &p->svms; 3942 if (!svms) 3943 return -EINVAL; 3944 3945 mm = get_task_mm(p->lead_thread); 3946 if (!mm) { 3947 pr_err("failed to get mm for the target process\n"); 3948 return -ESRCH; 3949 } 3950 3951 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3952 (nattr_common + num_devices); 3953 3954 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 3955 if (!query_attr) { 3956 ret = -ENOMEM; 3957 goto exit; 3958 } 3959 3960 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 3961 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 3962 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3963 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 3964 3965 for (index = 0; index < num_devices; index++) { 3966 struct kfd_process_device *pdd = p->pdds[index]; 3967 3968 query_attr[index + nattr_common].type = 3969 KFD_IOCTL_SVM_ATTR_ACCESS; 3970 query_attr[index + nattr_common].value = pdd->user_gpu_id; 3971 } 3972 3973 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 3974 3975 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 3976 if (!svm_priv) { 3977 ret = -ENOMEM; 3978 goto exit_query; 3979 } 3980 3981 index = 0; 3982 list_for_each_entry(prange, &svms->list, list) { 3983 3984 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 3985 svm_priv->start_addr = prange->start; 3986 svm_priv->size = prange->npages; 3987 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 3988 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 3989 prange, prange->start, prange->npages, 3990 prange->start + prange->npages - 1, 3991 prange->npages * PAGE_SIZE); 3992 3993 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 3994 svm_priv->size, 3995 (nattr_common + num_devices), 3996 svm_priv->attrs); 3997 if (ret) { 3998 pr_err("CRIU: failed to obtain range attributes\n"); 3999 goto exit_priv; 4000 } 4001 4002 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4003 svm_priv_data_size)) { 4004 pr_err("Failed to copy svm priv to user\n"); 4005 ret = -EFAULT; 4006 goto exit_priv; 4007 } 4008 4009 *priv_data_offset += svm_priv_data_size; 4010 4011 } 4012 4013 4014 exit_priv: 4015 kfree(svm_priv); 4016 exit_query: 4017 kfree(query_attr); 4018 exit: 4019 mmput(mm); 4020 return ret; 4021 } 4022 4023 int 4024 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4025 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4026 { 4027 struct mm_struct *mm = current->mm; 4028 int r; 4029 4030 start >>= PAGE_SHIFT; 4031 size >>= PAGE_SHIFT; 4032 4033 switch (op) { 4034 case KFD_IOCTL_SVM_OP_SET_ATTR: 4035 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4036 break; 4037 case KFD_IOCTL_SVM_OP_GET_ATTR: 4038 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4039 break; 4040 default: 4041 r = EINVAL; 4042 break; 4043 } 4044 4045 return r; 4046 } 4047