xref: /openbmc/linux/drivers/gpu/drm/amd/amdkfd/kfd_svm.c (revision 721af39f)
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /*
3  * Copyright 2020-2021 Advanced Micro Devices, Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21  * OTHER DEALINGS IN THE SOFTWARE.
22  */
23 
24 #include <linux/types.h>
25 #include <linux/sched/task.h>
26 #include "amdgpu_sync.h"
27 #include "amdgpu_object.h"
28 #include "amdgpu_vm.h"
29 #include "amdgpu_mn.h"
30 #include "amdgpu.h"
31 #include "amdgpu_xgmi.h"
32 #include "kfd_priv.h"
33 #include "kfd_svm.h"
34 #include "kfd_migrate.h"
35 
36 #ifdef dev_fmt
37 #undef dev_fmt
38 #endif
39 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__
40 
41 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1
42 
43 /* Long enough to ensure no retry fault comes after svm range is restored and
44  * page table is updated.
45  */
46 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING	2000
47 
48 struct criu_svm_metadata {
49 	struct list_head list;
50 	struct kfd_criu_svm_range_priv_data data;
51 };
52 
53 static void svm_range_evict_svm_bo_worker(struct work_struct *work);
54 static bool
55 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni,
56 				    const struct mmu_notifier_range *range,
57 				    unsigned long cur_seq);
58 static int
59 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last,
60 		   uint64_t *bo_s, uint64_t *bo_l);
61 static const struct mmu_interval_notifier_ops svm_range_mn_ops = {
62 	.invalidate = svm_range_cpu_invalidate_pagetables,
63 };
64 
65 /**
66  * svm_range_unlink - unlink svm_range from lists and interval tree
67  * @prange: svm range structure to be removed
68  *
69  * Remove the svm_range from the svms and svm_bo lists and the svms
70  * interval tree.
71  *
72  * Context: The caller must hold svms->lock
73  */
74 static void svm_range_unlink(struct svm_range *prange)
75 {
76 	pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
77 		 prange, prange->start, prange->last);
78 
79 	if (prange->svm_bo) {
80 		spin_lock(&prange->svm_bo->list_lock);
81 		list_del(&prange->svm_bo_list);
82 		spin_unlock(&prange->svm_bo->list_lock);
83 	}
84 
85 	list_del(&prange->list);
86 	if (prange->it_node.start != 0 && prange->it_node.last != 0)
87 		interval_tree_remove(&prange->it_node, &prange->svms->objects);
88 }
89 
90 static void
91 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange)
92 {
93 	pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
94 		 prange, prange->start, prange->last);
95 
96 	mmu_interval_notifier_insert_locked(&prange->notifier, mm,
97 				     prange->start << PAGE_SHIFT,
98 				     prange->npages << PAGE_SHIFT,
99 				     &svm_range_mn_ops);
100 }
101 
102 /**
103  * svm_range_add_to_svms - add svm range to svms
104  * @prange: svm range structure to be added
105  *
106  * Add the svm range to svms interval tree and link list
107  *
108  * Context: The caller must hold svms->lock
109  */
110 static void svm_range_add_to_svms(struct svm_range *prange)
111 {
112 	pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
113 		 prange, prange->start, prange->last);
114 
115 	list_move_tail(&prange->list, &prange->svms->list);
116 	prange->it_node.start = prange->start;
117 	prange->it_node.last = prange->last;
118 	interval_tree_insert(&prange->it_node, &prange->svms->objects);
119 }
120 
121 static void svm_range_remove_notifier(struct svm_range *prange)
122 {
123 	pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n",
124 		 prange->svms, prange,
125 		 prange->notifier.interval_tree.start >> PAGE_SHIFT,
126 		 prange->notifier.interval_tree.last >> PAGE_SHIFT);
127 
128 	if (prange->notifier.interval_tree.start != 0 &&
129 	    prange->notifier.interval_tree.last != 0)
130 		mmu_interval_notifier_remove(&prange->notifier);
131 }
132 
133 static bool
134 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr)
135 {
136 	return dma_addr && !dma_mapping_error(dev, dma_addr) &&
137 	       !(dma_addr & SVM_RANGE_VRAM_DOMAIN);
138 }
139 
140 static int
141 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange,
142 		      unsigned long offset, unsigned long npages,
143 		      unsigned long *hmm_pfns, uint32_t gpuidx)
144 {
145 	enum dma_data_direction dir = DMA_BIDIRECTIONAL;
146 	dma_addr_t *addr = prange->dma_addr[gpuidx];
147 	struct device *dev = adev->dev;
148 	struct page *page;
149 	int i, r;
150 
151 	if (!addr) {
152 		addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL);
153 		if (!addr)
154 			return -ENOMEM;
155 		prange->dma_addr[gpuidx] = addr;
156 	}
157 
158 	addr += offset;
159 	for (i = 0; i < npages; i++) {
160 		if (svm_is_valid_dma_mapping_addr(dev, addr[i]))
161 			dma_unmap_page(dev, addr[i], PAGE_SIZE, dir);
162 
163 		page = hmm_pfn_to_page(hmm_pfns[i]);
164 		if (is_zone_device_page(page)) {
165 			struct amdgpu_device *bo_adev =
166 					amdgpu_ttm_adev(prange->svm_bo->bo->tbo.bdev);
167 
168 			addr[i] = (hmm_pfns[i] << PAGE_SHIFT) +
169 				   bo_adev->vm_manager.vram_base_offset -
170 				   bo_adev->kfd.dev->pgmap.range.start;
171 			addr[i] |= SVM_RANGE_VRAM_DOMAIN;
172 			pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]);
173 			continue;
174 		}
175 		addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir);
176 		r = dma_mapping_error(dev, addr[i]);
177 		if (r) {
178 			dev_err(dev, "failed %d dma_map_page\n", r);
179 			return r;
180 		}
181 		pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n",
182 				     addr[i] >> PAGE_SHIFT, page_to_pfn(page));
183 	}
184 	return 0;
185 }
186 
187 static int
188 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap,
189 		  unsigned long offset, unsigned long npages,
190 		  unsigned long *hmm_pfns)
191 {
192 	struct kfd_process *p;
193 	uint32_t gpuidx;
194 	int r;
195 
196 	p = container_of(prange->svms, struct kfd_process, svms);
197 
198 	for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
199 		struct kfd_process_device *pdd;
200 
201 		pr_debug("mapping to gpu idx 0x%x\n", gpuidx);
202 		pdd = kfd_process_device_from_gpuidx(p, gpuidx);
203 		if (!pdd) {
204 			pr_debug("failed to find device idx %d\n", gpuidx);
205 			return -EINVAL;
206 		}
207 
208 		r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages,
209 					  hmm_pfns, gpuidx);
210 		if (r)
211 			break;
212 	}
213 
214 	return r;
215 }
216 
217 void svm_range_dma_unmap(struct device *dev, dma_addr_t *dma_addr,
218 			 unsigned long offset, unsigned long npages)
219 {
220 	enum dma_data_direction dir = DMA_BIDIRECTIONAL;
221 	int i;
222 
223 	if (!dma_addr)
224 		return;
225 
226 	for (i = offset; i < offset + npages; i++) {
227 		if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i]))
228 			continue;
229 		pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT);
230 		dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir);
231 		dma_addr[i] = 0;
232 	}
233 }
234 
235 void svm_range_free_dma_mappings(struct svm_range *prange)
236 {
237 	struct kfd_process_device *pdd;
238 	dma_addr_t *dma_addr;
239 	struct device *dev;
240 	struct kfd_process *p;
241 	uint32_t gpuidx;
242 
243 	p = container_of(prange->svms, struct kfd_process, svms);
244 
245 	for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) {
246 		dma_addr = prange->dma_addr[gpuidx];
247 		if (!dma_addr)
248 			continue;
249 
250 		pdd = kfd_process_device_from_gpuidx(p, gpuidx);
251 		if (!pdd) {
252 			pr_debug("failed to find device idx %d\n", gpuidx);
253 			continue;
254 		}
255 		dev = &pdd->dev->pdev->dev;
256 		svm_range_dma_unmap(dev, dma_addr, 0, prange->npages);
257 		kvfree(dma_addr);
258 		prange->dma_addr[gpuidx] = NULL;
259 	}
260 }
261 
262 static void svm_range_free(struct svm_range *prange)
263 {
264 	pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange,
265 		 prange->start, prange->last);
266 
267 	svm_range_vram_node_free(prange);
268 	svm_range_free_dma_mappings(prange);
269 	mutex_destroy(&prange->lock);
270 	mutex_destroy(&prange->migrate_mutex);
271 	kfree(prange);
272 }
273 
274 static void
275 svm_range_set_default_attributes(int32_t *location, int32_t *prefetch_loc,
276 				 uint8_t *granularity, uint32_t *flags)
277 {
278 	*location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
279 	*prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
280 	*granularity = 9;
281 	*flags =
282 		KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT;
283 }
284 
285 static struct
286 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start,
287 			 uint64_t last)
288 {
289 	uint64_t size = last - start + 1;
290 	struct svm_range *prange;
291 	struct kfd_process *p;
292 
293 	prange = kzalloc(sizeof(*prange), GFP_KERNEL);
294 	if (!prange)
295 		return NULL;
296 	prange->npages = size;
297 	prange->svms = svms;
298 	prange->start = start;
299 	prange->last = last;
300 	INIT_LIST_HEAD(&prange->list);
301 	INIT_LIST_HEAD(&prange->update_list);
302 	INIT_LIST_HEAD(&prange->svm_bo_list);
303 	INIT_LIST_HEAD(&prange->deferred_list);
304 	INIT_LIST_HEAD(&prange->child_list);
305 	atomic_set(&prange->invalid, 0);
306 	prange->validate_timestamp = 0;
307 	mutex_init(&prange->migrate_mutex);
308 	mutex_init(&prange->lock);
309 
310 	p = container_of(svms, struct kfd_process, svms);
311 	if (p->xnack_enabled)
312 		bitmap_copy(prange->bitmap_access, svms->bitmap_supported,
313 			    MAX_GPU_INSTANCE);
314 
315 	svm_range_set_default_attributes(&prange->preferred_loc,
316 					 &prange->prefetch_loc,
317 					 &prange->granularity, &prange->flags);
318 
319 	pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last);
320 
321 	return prange;
322 }
323 
324 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo)
325 {
326 	if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref))
327 		return false;
328 
329 	return true;
330 }
331 
332 static void svm_range_bo_release(struct kref *kref)
333 {
334 	struct svm_range_bo *svm_bo;
335 
336 	svm_bo = container_of(kref, struct svm_range_bo, kref);
337 	pr_debug("svm_bo 0x%p\n", svm_bo);
338 
339 	spin_lock(&svm_bo->list_lock);
340 	while (!list_empty(&svm_bo->range_list)) {
341 		struct svm_range *prange =
342 				list_first_entry(&svm_bo->range_list,
343 						struct svm_range, svm_bo_list);
344 		/* list_del_init tells a concurrent svm_range_vram_node_new when
345 		 * it's safe to reuse the svm_bo pointer and svm_bo_list head.
346 		 */
347 		list_del_init(&prange->svm_bo_list);
348 		spin_unlock(&svm_bo->list_lock);
349 
350 		pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms,
351 			 prange->start, prange->last);
352 		mutex_lock(&prange->lock);
353 		prange->svm_bo = NULL;
354 		mutex_unlock(&prange->lock);
355 
356 		spin_lock(&svm_bo->list_lock);
357 	}
358 	spin_unlock(&svm_bo->list_lock);
359 	if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) {
360 		/* We're not in the eviction worker.
361 		 * Signal the fence and synchronize with any
362 		 * pending eviction work.
363 		 */
364 		dma_fence_signal(&svm_bo->eviction_fence->base);
365 		cancel_work_sync(&svm_bo->eviction_work);
366 	}
367 	dma_fence_put(&svm_bo->eviction_fence->base);
368 	amdgpu_bo_unref(&svm_bo->bo);
369 	kfree(svm_bo);
370 }
371 
372 static void svm_range_bo_wq_release(struct work_struct *work)
373 {
374 	struct svm_range_bo *svm_bo;
375 
376 	svm_bo = container_of(work, struct svm_range_bo, release_work);
377 	svm_range_bo_release(&svm_bo->kref);
378 }
379 
380 static void svm_range_bo_release_async(struct kref *kref)
381 {
382 	struct svm_range_bo *svm_bo;
383 
384 	svm_bo = container_of(kref, struct svm_range_bo, kref);
385 	pr_debug("svm_bo 0x%p\n", svm_bo);
386 	INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release);
387 	schedule_work(&svm_bo->release_work);
388 }
389 
390 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo)
391 {
392 	kref_put(&svm_bo->kref, svm_range_bo_release_async);
393 }
394 
395 static void svm_range_bo_unref(struct svm_range_bo *svm_bo)
396 {
397 	if (svm_bo)
398 		kref_put(&svm_bo->kref, svm_range_bo_release);
399 }
400 
401 static bool
402 svm_range_validate_svm_bo(struct amdgpu_device *adev, struct svm_range *prange)
403 {
404 	struct amdgpu_device *bo_adev;
405 
406 	mutex_lock(&prange->lock);
407 	if (!prange->svm_bo) {
408 		mutex_unlock(&prange->lock);
409 		return false;
410 	}
411 	if (prange->ttm_res) {
412 		/* We still have a reference, all is well */
413 		mutex_unlock(&prange->lock);
414 		return true;
415 	}
416 	if (svm_bo_ref_unless_zero(prange->svm_bo)) {
417 		/*
418 		 * Migrate from GPU to GPU, remove range from source bo_adev
419 		 * svm_bo range list, and return false to allocate svm_bo from
420 		 * destination adev.
421 		 */
422 		bo_adev = amdgpu_ttm_adev(prange->svm_bo->bo->tbo.bdev);
423 		if (bo_adev != adev) {
424 			mutex_unlock(&prange->lock);
425 
426 			spin_lock(&prange->svm_bo->list_lock);
427 			list_del_init(&prange->svm_bo_list);
428 			spin_unlock(&prange->svm_bo->list_lock);
429 
430 			svm_range_bo_unref(prange->svm_bo);
431 			return false;
432 		}
433 		if (READ_ONCE(prange->svm_bo->evicting)) {
434 			struct dma_fence *f;
435 			struct svm_range_bo *svm_bo;
436 			/* The BO is getting evicted,
437 			 * we need to get a new one
438 			 */
439 			mutex_unlock(&prange->lock);
440 			svm_bo = prange->svm_bo;
441 			f = dma_fence_get(&svm_bo->eviction_fence->base);
442 			svm_range_bo_unref(prange->svm_bo);
443 			/* wait for the fence to avoid long spin-loop
444 			 * at list_empty_careful
445 			 */
446 			dma_fence_wait(f, false);
447 			dma_fence_put(f);
448 		} else {
449 			/* The BO was still around and we got
450 			 * a new reference to it
451 			 */
452 			mutex_unlock(&prange->lock);
453 			pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n",
454 				 prange->svms, prange->start, prange->last);
455 
456 			prange->ttm_res = prange->svm_bo->bo->tbo.resource;
457 			return true;
458 		}
459 
460 	} else {
461 		mutex_unlock(&prange->lock);
462 	}
463 
464 	/* We need a new svm_bo. Spin-loop to wait for concurrent
465 	 * svm_range_bo_release to finish removing this range from
466 	 * its range list. After this, it is safe to reuse the
467 	 * svm_bo pointer and svm_bo_list head.
468 	 */
469 	while (!list_empty_careful(&prange->svm_bo_list))
470 		;
471 
472 	return false;
473 }
474 
475 static struct svm_range_bo *svm_range_bo_new(void)
476 {
477 	struct svm_range_bo *svm_bo;
478 
479 	svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL);
480 	if (!svm_bo)
481 		return NULL;
482 
483 	kref_init(&svm_bo->kref);
484 	INIT_LIST_HEAD(&svm_bo->range_list);
485 	spin_lock_init(&svm_bo->list_lock);
486 
487 	return svm_bo;
488 }
489 
490 int
491 svm_range_vram_node_new(struct amdgpu_device *adev, struct svm_range *prange,
492 			bool clear)
493 {
494 	struct amdgpu_bo_param bp;
495 	struct svm_range_bo *svm_bo;
496 	struct amdgpu_bo_user *ubo;
497 	struct amdgpu_bo *bo;
498 	struct kfd_process *p;
499 	struct mm_struct *mm;
500 	int r;
501 
502 	p = container_of(prange->svms, struct kfd_process, svms);
503 	pr_debug("pasid: %x svms 0x%p [0x%lx 0x%lx]\n", p->pasid, prange->svms,
504 		 prange->start, prange->last);
505 
506 	if (svm_range_validate_svm_bo(adev, prange))
507 		return 0;
508 
509 	svm_bo = svm_range_bo_new();
510 	if (!svm_bo) {
511 		pr_debug("failed to alloc svm bo\n");
512 		return -ENOMEM;
513 	}
514 	mm = get_task_mm(p->lead_thread);
515 	if (!mm) {
516 		pr_debug("failed to get mm\n");
517 		kfree(svm_bo);
518 		return -ESRCH;
519 	}
520 	svm_bo->svms = prange->svms;
521 	svm_bo->eviction_fence =
522 		amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1),
523 					   mm,
524 					   svm_bo);
525 	mmput(mm);
526 	INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker);
527 	svm_bo->evicting = 0;
528 	memset(&bp, 0, sizeof(bp));
529 	bp.size = prange->npages * PAGE_SIZE;
530 	bp.byte_align = PAGE_SIZE;
531 	bp.domain = AMDGPU_GEM_DOMAIN_VRAM;
532 	bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
533 	bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0;
534 	bp.flags |= AMDGPU_AMDKFD_CREATE_SVM_BO;
535 	bp.type = ttm_bo_type_device;
536 	bp.resv = NULL;
537 
538 	r = amdgpu_bo_create_user(adev, &bp, &ubo);
539 	if (r) {
540 		pr_debug("failed %d to create bo\n", r);
541 		goto create_bo_failed;
542 	}
543 	bo = &ubo->bo;
544 	r = amdgpu_bo_reserve(bo, true);
545 	if (r) {
546 		pr_debug("failed %d to reserve bo\n", r);
547 		goto reserve_bo_failed;
548 	}
549 
550 	r = dma_resv_reserve_shared(bo->tbo.base.resv, 1);
551 	if (r) {
552 		pr_debug("failed %d to reserve bo\n", r);
553 		amdgpu_bo_unreserve(bo);
554 		goto reserve_bo_failed;
555 	}
556 	amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true);
557 
558 	amdgpu_bo_unreserve(bo);
559 
560 	svm_bo->bo = bo;
561 	prange->svm_bo = svm_bo;
562 	prange->ttm_res = bo->tbo.resource;
563 	prange->offset = 0;
564 
565 	spin_lock(&svm_bo->list_lock);
566 	list_add(&prange->svm_bo_list, &svm_bo->range_list);
567 	spin_unlock(&svm_bo->list_lock);
568 
569 	return 0;
570 
571 reserve_bo_failed:
572 	amdgpu_bo_unref(&bo);
573 create_bo_failed:
574 	dma_fence_put(&svm_bo->eviction_fence->base);
575 	kfree(svm_bo);
576 	prange->ttm_res = NULL;
577 
578 	return r;
579 }
580 
581 void svm_range_vram_node_free(struct svm_range *prange)
582 {
583 	svm_range_bo_unref(prange->svm_bo);
584 	prange->ttm_res = NULL;
585 }
586 
587 struct amdgpu_device *
588 svm_range_get_adev_by_id(struct svm_range *prange, uint32_t gpu_id)
589 {
590 	struct kfd_process_device *pdd;
591 	struct kfd_process *p;
592 	int32_t gpu_idx;
593 
594 	p = container_of(prange->svms, struct kfd_process, svms);
595 
596 	gpu_idx = kfd_process_gpuidx_from_gpuid(p, gpu_id);
597 	if (gpu_idx < 0) {
598 		pr_debug("failed to get device by id 0x%x\n", gpu_id);
599 		return NULL;
600 	}
601 	pdd = kfd_process_device_from_gpuidx(p, gpu_idx);
602 	if (!pdd) {
603 		pr_debug("failed to get device by idx 0x%x\n", gpu_idx);
604 		return NULL;
605 	}
606 
607 	return pdd->dev->adev;
608 }
609 
610 struct kfd_process_device *
611 svm_range_get_pdd_by_adev(struct svm_range *prange, struct amdgpu_device *adev)
612 {
613 	struct kfd_process *p;
614 	int32_t gpu_idx, gpuid;
615 	int r;
616 
617 	p = container_of(prange->svms, struct kfd_process, svms);
618 
619 	r = kfd_process_gpuid_from_adev(p, adev, &gpuid, &gpu_idx);
620 	if (r) {
621 		pr_debug("failed to get device id by adev %p\n", adev);
622 		return NULL;
623 	}
624 
625 	return kfd_process_device_from_gpuidx(p, gpu_idx);
626 }
627 
628 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo)
629 {
630 	struct ttm_operation_ctx ctx = { false, false };
631 
632 	amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM);
633 
634 	return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
635 }
636 
637 static int
638 svm_range_check_attr(struct kfd_process *p,
639 		     uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs)
640 {
641 	uint32_t i;
642 
643 	for (i = 0; i < nattr; i++) {
644 		uint32_t val = attrs[i].value;
645 		int gpuidx = MAX_GPU_INSTANCE;
646 
647 		switch (attrs[i].type) {
648 		case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
649 			if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM &&
650 			    val != KFD_IOCTL_SVM_LOCATION_UNDEFINED)
651 				gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
652 			break;
653 		case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
654 			if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM)
655 				gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
656 			break;
657 		case KFD_IOCTL_SVM_ATTR_ACCESS:
658 		case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
659 		case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
660 			gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
661 			break;
662 		case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
663 			break;
664 		case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
665 			break;
666 		case KFD_IOCTL_SVM_ATTR_GRANULARITY:
667 			break;
668 		default:
669 			pr_debug("unknown attr type 0x%x\n", attrs[i].type);
670 			return -EINVAL;
671 		}
672 
673 		if (gpuidx < 0) {
674 			pr_debug("no GPU 0x%x found\n", val);
675 			return -EINVAL;
676 		} else if (gpuidx < MAX_GPU_INSTANCE &&
677 			   !test_bit(gpuidx, p->svms.bitmap_supported)) {
678 			pr_debug("GPU 0x%x not supported\n", val);
679 			return -EINVAL;
680 		}
681 	}
682 
683 	return 0;
684 }
685 
686 static void
687 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange,
688 		      uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs)
689 {
690 	uint32_t i;
691 	int gpuidx;
692 
693 	for (i = 0; i < nattr; i++) {
694 		switch (attrs[i].type) {
695 		case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
696 			prange->preferred_loc = attrs[i].value;
697 			break;
698 		case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
699 			prange->prefetch_loc = attrs[i].value;
700 			break;
701 		case KFD_IOCTL_SVM_ATTR_ACCESS:
702 		case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
703 		case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
704 			gpuidx = kfd_process_gpuidx_from_gpuid(p,
705 							       attrs[i].value);
706 			if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) {
707 				bitmap_clear(prange->bitmap_access, gpuidx, 1);
708 				bitmap_clear(prange->bitmap_aip, gpuidx, 1);
709 			} else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) {
710 				bitmap_set(prange->bitmap_access, gpuidx, 1);
711 				bitmap_clear(prange->bitmap_aip, gpuidx, 1);
712 			} else {
713 				bitmap_clear(prange->bitmap_access, gpuidx, 1);
714 				bitmap_set(prange->bitmap_aip, gpuidx, 1);
715 			}
716 			break;
717 		case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
718 			prange->flags |= attrs[i].value;
719 			break;
720 		case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
721 			prange->flags &= ~attrs[i].value;
722 			break;
723 		case KFD_IOCTL_SVM_ATTR_GRANULARITY:
724 			prange->granularity = attrs[i].value;
725 			break;
726 		default:
727 			WARN_ONCE(1, "svm_range_check_attrs wasn't called?");
728 		}
729 	}
730 }
731 
732 static bool
733 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange,
734 			uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs)
735 {
736 	uint32_t i;
737 	int gpuidx;
738 
739 	for (i = 0; i < nattr; i++) {
740 		switch (attrs[i].type) {
741 		case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
742 			if (prange->preferred_loc != attrs[i].value)
743 				return false;
744 			break;
745 		case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
746 			/* Prefetch should always trigger a migration even
747 			 * if the value of the attribute didn't change.
748 			 */
749 			return false;
750 		case KFD_IOCTL_SVM_ATTR_ACCESS:
751 		case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
752 		case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
753 			gpuidx = kfd_process_gpuidx_from_gpuid(p,
754 							       attrs[i].value);
755 			if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) {
756 				if (test_bit(gpuidx, prange->bitmap_access) ||
757 				    test_bit(gpuidx, prange->bitmap_aip))
758 					return false;
759 			} else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) {
760 				if (!test_bit(gpuidx, prange->bitmap_access))
761 					return false;
762 			} else {
763 				if (!test_bit(gpuidx, prange->bitmap_aip))
764 					return false;
765 			}
766 			break;
767 		case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
768 			if ((prange->flags & attrs[i].value) != attrs[i].value)
769 				return false;
770 			break;
771 		case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
772 			if ((prange->flags & attrs[i].value) != 0)
773 				return false;
774 			break;
775 		case KFD_IOCTL_SVM_ATTR_GRANULARITY:
776 			if (prange->granularity != attrs[i].value)
777 				return false;
778 			break;
779 		default:
780 			WARN_ONCE(1, "svm_range_check_attrs wasn't called?");
781 		}
782 	}
783 
784 	return true;
785 }
786 
787 /**
788  * svm_range_debug_dump - print all range information from svms
789  * @svms: svm range list header
790  *
791  * debug output svm range start, end, prefetch location from svms
792  * interval tree and link list
793  *
794  * Context: The caller must hold svms->lock
795  */
796 static void svm_range_debug_dump(struct svm_range_list *svms)
797 {
798 	struct interval_tree_node *node;
799 	struct svm_range *prange;
800 
801 	pr_debug("dump svms 0x%p list\n", svms);
802 	pr_debug("range\tstart\tpage\tend\t\tlocation\n");
803 
804 	list_for_each_entry(prange, &svms->list, list) {
805 		pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n",
806 			 prange, prange->start, prange->npages,
807 			 prange->start + prange->npages - 1,
808 			 prange->actual_loc);
809 	}
810 
811 	pr_debug("dump svms 0x%p interval tree\n", svms);
812 	pr_debug("range\tstart\tpage\tend\t\tlocation\n");
813 	node = interval_tree_iter_first(&svms->objects, 0, ~0ULL);
814 	while (node) {
815 		prange = container_of(node, struct svm_range, it_node);
816 		pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n",
817 			 prange, prange->start, prange->npages,
818 			 prange->start + prange->npages - 1,
819 			 prange->actual_loc);
820 		node = interval_tree_iter_next(node, 0, ~0ULL);
821 	}
822 }
823 
824 static int
825 svm_range_split_array(void *ppnew, void *ppold, size_t size,
826 		      uint64_t old_start, uint64_t old_n,
827 		      uint64_t new_start, uint64_t new_n)
828 {
829 	unsigned char *new, *old, *pold;
830 	uint64_t d;
831 
832 	if (!ppold)
833 		return 0;
834 	pold = *(unsigned char **)ppold;
835 	if (!pold)
836 		return 0;
837 
838 	new = kvmalloc_array(new_n, size, GFP_KERNEL);
839 	if (!new)
840 		return -ENOMEM;
841 
842 	d = (new_start - old_start) * size;
843 	memcpy(new, pold + d, new_n * size);
844 
845 	old = kvmalloc_array(old_n, size, GFP_KERNEL);
846 	if (!old) {
847 		kvfree(new);
848 		return -ENOMEM;
849 	}
850 
851 	d = (new_start == old_start) ? new_n * size : 0;
852 	memcpy(old, pold + d, old_n * size);
853 
854 	kvfree(pold);
855 	*(void **)ppold = old;
856 	*(void **)ppnew = new;
857 
858 	return 0;
859 }
860 
861 static int
862 svm_range_split_pages(struct svm_range *new, struct svm_range *old,
863 		      uint64_t start, uint64_t last)
864 {
865 	uint64_t npages = last - start + 1;
866 	int i, r;
867 
868 	for (i = 0; i < MAX_GPU_INSTANCE; i++) {
869 		r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i],
870 					  sizeof(*old->dma_addr[i]), old->start,
871 					  npages, new->start, new->npages);
872 		if (r)
873 			return r;
874 	}
875 
876 	return 0;
877 }
878 
879 static int
880 svm_range_split_nodes(struct svm_range *new, struct svm_range *old,
881 		      uint64_t start, uint64_t last)
882 {
883 	uint64_t npages = last - start + 1;
884 
885 	pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n",
886 		 new->svms, new, new->start, start, last);
887 
888 	if (new->start == old->start) {
889 		new->offset = old->offset;
890 		old->offset += new->npages;
891 	} else {
892 		new->offset = old->offset + npages;
893 	}
894 
895 	new->svm_bo = svm_range_bo_ref(old->svm_bo);
896 	new->ttm_res = old->ttm_res;
897 
898 	spin_lock(&new->svm_bo->list_lock);
899 	list_add(&new->svm_bo_list, &new->svm_bo->range_list);
900 	spin_unlock(&new->svm_bo->list_lock);
901 
902 	return 0;
903 }
904 
905 /**
906  * svm_range_split_adjust - split range and adjust
907  *
908  * @new: new range
909  * @old: the old range
910  * @start: the old range adjust to start address in pages
911  * @last: the old range adjust to last address in pages
912  *
913  * Copy system memory dma_addr or vram ttm_res in old range to new
914  * range from new_start up to size new->npages, the remaining old range is from
915  * start to last
916  *
917  * Return:
918  * 0 - OK, -ENOMEM - out of memory
919  */
920 static int
921 svm_range_split_adjust(struct svm_range *new, struct svm_range *old,
922 		      uint64_t start, uint64_t last)
923 {
924 	int r;
925 
926 	pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n",
927 		 new->svms, new->start, old->start, old->last, start, last);
928 
929 	if (new->start < old->start ||
930 	    new->last > old->last) {
931 		WARN_ONCE(1, "invalid new range start or last\n");
932 		return -EINVAL;
933 	}
934 
935 	r = svm_range_split_pages(new, old, start, last);
936 	if (r)
937 		return r;
938 
939 	if (old->actual_loc && old->ttm_res) {
940 		r = svm_range_split_nodes(new, old, start, last);
941 		if (r)
942 			return r;
943 	}
944 
945 	old->npages = last - start + 1;
946 	old->start = start;
947 	old->last = last;
948 	new->flags = old->flags;
949 	new->preferred_loc = old->preferred_loc;
950 	new->prefetch_loc = old->prefetch_loc;
951 	new->actual_loc = old->actual_loc;
952 	new->granularity = old->granularity;
953 	bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE);
954 	bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE);
955 
956 	return 0;
957 }
958 
959 /**
960  * svm_range_split - split a range in 2 ranges
961  *
962  * @prange: the svm range to split
963  * @start: the remaining range start address in pages
964  * @last: the remaining range last address in pages
965  * @new: the result new range generated
966  *
967  * Two cases only:
968  * case 1: if start == prange->start
969  *         prange ==> prange[start, last]
970  *         new range [last + 1, prange->last]
971  *
972  * case 2: if last == prange->last
973  *         prange ==> prange[start, last]
974  *         new range [prange->start, start - 1]
975  *
976  * Return:
977  * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last
978  */
979 static int
980 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last,
981 		struct svm_range **new)
982 {
983 	uint64_t old_start = prange->start;
984 	uint64_t old_last = prange->last;
985 	struct svm_range_list *svms;
986 	int r = 0;
987 
988 	pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms,
989 		 old_start, old_last, start, last);
990 
991 	if (old_start != start && old_last != last)
992 		return -EINVAL;
993 	if (start < old_start || last > old_last)
994 		return -EINVAL;
995 
996 	svms = prange->svms;
997 	if (old_start == start)
998 		*new = svm_range_new(svms, last + 1, old_last);
999 	else
1000 		*new = svm_range_new(svms, old_start, start - 1);
1001 	if (!*new)
1002 		return -ENOMEM;
1003 
1004 	r = svm_range_split_adjust(*new, prange, start, last);
1005 	if (r) {
1006 		pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n",
1007 			 r, old_start, old_last, start, last);
1008 		svm_range_free(*new);
1009 		*new = NULL;
1010 	}
1011 
1012 	return r;
1013 }
1014 
1015 static int
1016 svm_range_split_tail(struct svm_range *prange,
1017 		     uint64_t new_last, struct list_head *insert_list)
1018 {
1019 	struct svm_range *tail;
1020 	int r = svm_range_split(prange, prange->start, new_last, &tail);
1021 
1022 	if (!r)
1023 		list_add(&tail->list, insert_list);
1024 	return r;
1025 }
1026 
1027 static int
1028 svm_range_split_head(struct svm_range *prange,
1029 		     uint64_t new_start, struct list_head *insert_list)
1030 {
1031 	struct svm_range *head;
1032 	int r = svm_range_split(prange, new_start, prange->last, &head);
1033 
1034 	if (!r)
1035 		list_add(&head->list, insert_list);
1036 	return r;
1037 }
1038 
1039 static void
1040 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm,
1041 		    struct svm_range *pchild, enum svm_work_list_ops op)
1042 {
1043 	pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n",
1044 		 pchild, pchild->start, pchild->last, prange, op);
1045 
1046 	pchild->work_item.mm = mm;
1047 	pchild->work_item.op = op;
1048 	list_add_tail(&pchild->child_list, &prange->child_list);
1049 }
1050 
1051 /**
1052  * svm_range_split_by_granularity - collect ranges within granularity boundary
1053  *
1054  * @p: the process with svms list
1055  * @mm: mm structure
1056  * @addr: the vm fault address in pages, to split the prange
1057  * @parent: parent range if prange is from child list
1058  * @prange: prange to split
1059  *
1060  * Trims @prange to be a single aligned block of prange->granularity if
1061  * possible. The head and tail are added to the child_list in @parent.
1062  *
1063  * Context: caller must hold mmap_read_lock and prange->lock
1064  *
1065  * Return:
1066  * 0 - OK, otherwise error code
1067  */
1068 int
1069 svm_range_split_by_granularity(struct kfd_process *p, struct mm_struct *mm,
1070 			       unsigned long addr, struct svm_range *parent,
1071 			       struct svm_range *prange)
1072 {
1073 	struct svm_range *head, *tail;
1074 	unsigned long start, last, size;
1075 	int r;
1076 
1077 	/* Align splited range start and size to granularity size, then a single
1078 	 * PTE will be used for whole range, this reduces the number of PTE
1079 	 * updated and the L1 TLB space used for translation.
1080 	 */
1081 	size = 1UL << prange->granularity;
1082 	start = ALIGN_DOWN(addr, size);
1083 	last = ALIGN(addr + 1, size) - 1;
1084 
1085 	pr_debug("svms 0x%p split [0x%lx 0x%lx] to [0x%lx 0x%lx] size 0x%lx\n",
1086 		 prange->svms, prange->start, prange->last, start, last, size);
1087 
1088 	if (start > prange->start) {
1089 		r = svm_range_split(prange, start, prange->last, &head);
1090 		if (r)
1091 			return r;
1092 		svm_range_add_child(parent, mm, head, SVM_OP_ADD_RANGE);
1093 	}
1094 
1095 	if (last < prange->last) {
1096 		r = svm_range_split(prange, prange->start, last, &tail);
1097 		if (r)
1098 			return r;
1099 		svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE);
1100 	}
1101 
1102 	/* xnack on, update mapping on GPUs with ACCESS_IN_PLACE */
1103 	if (p->xnack_enabled && prange->work_item.op == SVM_OP_ADD_RANGE) {
1104 		prange->work_item.op = SVM_OP_ADD_RANGE_AND_MAP;
1105 		pr_debug("change prange 0x%p [0x%lx 0x%lx] op %d\n",
1106 			 prange, prange->start, prange->last,
1107 			 SVM_OP_ADD_RANGE_AND_MAP);
1108 	}
1109 	return 0;
1110 }
1111 
1112 static uint64_t
1113 svm_range_get_pte_flags(struct amdgpu_device *adev, struct svm_range *prange,
1114 			int domain)
1115 {
1116 	struct amdgpu_device *bo_adev;
1117 	uint32_t flags = prange->flags;
1118 	uint32_t mapping_flags = 0;
1119 	uint64_t pte_flags;
1120 	bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN);
1121 	bool coherent = flags & KFD_IOCTL_SVM_FLAG_COHERENT;
1122 
1123 	if (domain == SVM_RANGE_VRAM_DOMAIN)
1124 		bo_adev = amdgpu_ttm_adev(prange->svm_bo->bo->tbo.bdev);
1125 
1126 	switch (KFD_GC_VERSION(adev->kfd.dev)) {
1127 	case IP_VERSION(9, 4, 1):
1128 		if (domain == SVM_RANGE_VRAM_DOMAIN) {
1129 			if (bo_adev == adev) {
1130 				mapping_flags |= coherent ?
1131 					AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;
1132 			} else {
1133 				mapping_flags |= coherent ?
1134 					AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1135 				if (amdgpu_xgmi_same_hive(adev, bo_adev))
1136 					snoop = true;
1137 			}
1138 		} else {
1139 			mapping_flags |= coherent ?
1140 				AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1141 		}
1142 		break;
1143 	case IP_VERSION(9, 4, 2):
1144 		if (domain == SVM_RANGE_VRAM_DOMAIN) {
1145 			if (bo_adev == adev) {
1146 				mapping_flags |= coherent ?
1147 					AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;
1148 				if (adev->gmc.xgmi.connected_to_cpu)
1149 					snoop = true;
1150 			} else {
1151 				mapping_flags |= coherent ?
1152 					AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1153 				if (amdgpu_xgmi_same_hive(adev, bo_adev))
1154 					snoop = true;
1155 			}
1156 		} else {
1157 			mapping_flags |= coherent ?
1158 				AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1159 		}
1160 		break;
1161 	default:
1162 		mapping_flags |= coherent ?
1163 			AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1164 	}
1165 
1166 	mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE;
1167 
1168 	if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO)
1169 		mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE;
1170 	if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC)
1171 		mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE;
1172 
1173 	pte_flags = AMDGPU_PTE_VALID;
1174 	pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM;
1175 	pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0;
1176 
1177 	pte_flags |= amdgpu_gem_va_map_flags(adev, mapping_flags);
1178 	return pte_flags;
1179 }
1180 
1181 static int
1182 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm,
1183 			 uint64_t start, uint64_t last,
1184 			 struct dma_fence **fence)
1185 {
1186 	uint64_t init_pte_value = 0;
1187 
1188 	pr_debug("[0x%llx 0x%llx]\n", start, last);
1189 
1190 	return amdgpu_vm_update_range(adev, vm, false, true, true, NULL, start,
1191 				      last, init_pte_value, 0, 0, NULL, NULL,
1192 				      fence);
1193 }
1194 
1195 static int
1196 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start,
1197 			  unsigned long last)
1198 {
1199 	DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
1200 	struct kfd_process_device *pdd;
1201 	struct dma_fence *fence = NULL;
1202 	struct kfd_process *p;
1203 	uint32_t gpuidx;
1204 	int r = 0;
1205 
1206 	bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip,
1207 		  MAX_GPU_INSTANCE);
1208 	p = container_of(prange->svms, struct kfd_process, svms);
1209 
1210 	for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
1211 		pr_debug("unmap from gpu idx 0x%x\n", gpuidx);
1212 		pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1213 		if (!pdd) {
1214 			pr_debug("failed to find device idx %d\n", gpuidx);
1215 			return -EINVAL;
1216 		}
1217 
1218 		r = svm_range_unmap_from_gpu(pdd->dev->adev,
1219 					     drm_priv_to_vm(pdd->drm_priv),
1220 					     start, last, &fence);
1221 		if (r)
1222 			break;
1223 
1224 		if (fence) {
1225 			r = dma_fence_wait(fence, false);
1226 			dma_fence_put(fence);
1227 			fence = NULL;
1228 			if (r)
1229 				break;
1230 		}
1231 		kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT);
1232 	}
1233 
1234 	return r;
1235 }
1236 
1237 static int
1238 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange,
1239 		     unsigned long offset, unsigned long npages, bool readonly,
1240 		     dma_addr_t *dma_addr, struct amdgpu_device *bo_adev,
1241 		     struct dma_fence **fence)
1242 {
1243 	struct amdgpu_device *adev = pdd->dev->adev;
1244 	struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv);
1245 	uint64_t pte_flags;
1246 	unsigned long last_start;
1247 	int last_domain;
1248 	int r = 0;
1249 	int64_t i, j;
1250 
1251 	last_start = prange->start + offset;
1252 
1253 	pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms,
1254 		 last_start, last_start + npages - 1, readonly);
1255 
1256 	for (i = offset; i < offset + npages; i++) {
1257 		last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN;
1258 		dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN;
1259 
1260 		/* Collect all pages in the same address range and memory domain
1261 		 * that can be mapped with a single call to update mapping.
1262 		 */
1263 		if (i < offset + npages - 1 &&
1264 		    last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN))
1265 			continue;
1266 
1267 		pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n",
1268 			 last_start, prange->start + i, last_domain ? "GPU" : "CPU");
1269 
1270 		pte_flags = svm_range_get_pte_flags(adev, prange, last_domain);
1271 		if (readonly)
1272 			pte_flags &= ~AMDGPU_PTE_WRITEABLE;
1273 
1274 		pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n",
1275 			 prange->svms, last_start, prange->start + i,
1276 			 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0,
1277 			 pte_flags);
1278 
1279 		r = amdgpu_vm_update_range(adev, vm, false, false, false, NULL,
1280 					   last_start, prange->start + i,
1281 					   pte_flags,
1282 					   last_start - prange->start,
1283 					   bo_adev ? bo_adev->vm_manager.vram_base_offset : 0,
1284 					   NULL, dma_addr, &vm->last_update);
1285 
1286 		for (j = last_start - prange->start; j <= i; j++)
1287 			dma_addr[j] |= last_domain;
1288 
1289 		if (r) {
1290 			pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start);
1291 			goto out;
1292 		}
1293 		last_start = prange->start + i + 1;
1294 	}
1295 
1296 	r = amdgpu_vm_update_pdes(adev, vm, false);
1297 	if (r) {
1298 		pr_debug("failed %d to update directories 0x%lx\n", r,
1299 			 prange->start);
1300 		goto out;
1301 	}
1302 
1303 	if (fence)
1304 		*fence = dma_fence_get(vm->last_update);
1305 
1306 out:
1307 	return r;
1308 }
1309 
1310 static int
1311 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset,
1312 		      unsigned long npages, bool readonly,
1313 		      unsigned long *bitmap, bool wait)
1314 {
1315 	struct kfd_process_device *pdd;
1316 	struct amdgpu_device *bo_adev;
1317 	struct kfd_process *p;
1318 	struct dma_fence *fence = NULL;
1319 	uint32_t gpuidx;
1320 	int r = 0;
1321 
1322 	if (prange->svm_bo && prange->ttm_res)
1323 		bo_adev = amdgpu_ttm_adev(prange->svm_bo->bo->tbo.bdev);
1324 	else
1325 		bo_adev = NULL;
1326 
1327 	p = container_of(prange->svms, struct kfd_process, svms);
1328 	for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
1329 		pr_debug("mapping to gpu idx 0x%x\n", gpuidx);
1330 		pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1331 		if (!pdd) {
1332 			pr_debug("failed to find device idx %d\n", gpuidx);
1333 			return -EINVAL;
1334 		}
1335 
1336 		pdd = kfd_bind_process_to_device(pdd->dev, p);
1337 		if (IS_ERR(pdd))
1338 			return -EINVAL;
1339 
1340 		if (bo_adev && pdd->dev->adev != bo_adev &&
1341 		    !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) {
1342 			pr_debug("cannot map to device idx %d\n", gpuidx);
1343 			continue;
1344 		}
1345 
1346 		r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly,
1347 					 prange->dma_addr[gpuidx],
1348 					 bo_adev, wait ? &fence : NULL);
1349 		if (r)
1350 			break;
1351 
1352 		if (fence) {
1353 			r = dma_fence_wait(fence, false);
1354 			dma_fence_put(fence);
1355 			fence = NULL;
1356 			if (r) {
1357 				pr_debug("failed %d to dma fence wait\n", r);
1358 				break;
1359 			}
1360 		}
1361 
1362 		kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY);
1363 	}
1364 
1365 	return r;
1366 }
1367 
1368 struct svm_validate_context {
1369 	struct kfd_process *process;
1370 	struct svm_range *prange;
1371 	bool intr;
1372 	DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
1373 	struct ttm_validate_buffer tv[MAX_GPU_INSTANCE];
1374 	struct list_head validate_list;
1375 	struct ww_acquire_ctx ticket;
1376 };
1377 
1378 static int svm_range_reserve_bos(struct svm_validate_context *ctx)
1379 {
1380 	struct kfd_process_device *pdd;
1381 	struct amdgpu_vm *vm;
1382 	uint32_t gpuidx;
1383 	int r;
1384 
1385 	INIT_LIST_HEAD(&ctx->validate_list);
1386 	for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) {
1387 		pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx);
1388 		if (!pdd) {
1389 			pr_debug("failed to find device idx %d\n", gpuidx);
1390 			return -EINVAL;
1391 		}
1392 		vm = drm_priv_to_vm(pdd->drm_priv);
1393 
1394 		ctx->tv[gpuidx].bo = &vm->root.bo->tbo;
1395 		ctx->tv[gpuidx].num_shared = 4;
1396 		list_add(&ctx->tv[gpuidx].head, &ctx->validate_list);
1397 	}
1398 
1399 	r = ttm_eu_reserve_buffers(&ctx->ticket, &ctx->validate_list,
1400 				   ctx->intr, NULL);
1401 	if (r) {
1402 		pr_debug("failed %d to reserve bo\n", r);
1403 		return r;
1404 	}
1405 
1406 	for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) {
1407 		pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx);
1408 		if (!pdd) {
1409 			pr_debug("failed to find device idx %d\n", gpuidx);
1410 			r = -EINVAL;
1411 			goto unreserve_out;
1412 		}
1413 
1414 		r = amdgpu_vm_validate_pt_bos(pdd->dev->adev,
1415 					      drm_priv_to_vm(pdd->drm_priv),
1416 					      svm_range_bo_validate, NULL);
1417 		if (r) {
1418 			pr_debug("failed %d validate pt bos\n", r);
1419 			goto unreserve_out;
1420 		}
1421 	}
1422 
1423 	return 0;
1424 
1425 unreserve_out:
1426 	ttm_eu_backoff_reservation(&ctx->ticket, &ctx->validate_list);
1427 	return r;
1428 }
1429 
1430 static void svm_range_unreserve_bos(struct svm_validate_context *ctx)
1431 {
1432 	ttm_eu_backoff_reservation(&ctx->ticket, &ctx->validate_list);
1433 }
1434 
1435 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx)
1436 {
1437 	struct kfd_process_device *pdd;
1438 
1439 	pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1440 
1441 	return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev);
1442 }
1443 
1444 /*
1445  * Validation+GPU mapping with concurrent invalidation (MMU notifiers)
1446  *
1447  * To prevent concurrent destruction or change of range attributes, the
1448  * svm_read_lock must be held. The caller must not hold the svm_write_lock
1449  * because that would block concurrent evictions and lead to deadlocks. To
1450  * serialize concurrent migrations or validations of the same range, the
1451  * prange->migrate_mutex must be held.
1452  *
1453  * For VRAM ranges, the SVM BO must be allocated and valid (protected by its
1454  * eviction fence.
1455  *
1456  * The following sequence ensures race-free validation and GPU mapping:
1457  *
1458  * 1. Reserve page table (and SVM BO if range is in VRAM)
1459  * 2. hmm_range_fault to get page addresses (if system memory)
1460  * 3. DMA-map pages (if system memory)
1461  * 4-a. Take notifier lock
1462  * 4-b. Check that pages still valid (mmu_interval_read_retry)
1463  * 4-c. Check that the range was not split or otherwise invalidated
1464  * 4-d. Update GPU page table
1465  * 4.e. Release notifier lock
1466  * 5. Release page table (and SVM BO) reservation
1467  */
1468 static int svm_range_validate_and_map(struct mm_struct *mm,
1469 				      struct svm_range *prange,
1470 				      int32_t gpuidx, bool intr, bool wait)
1471 {
1472 	struct svm_validate_context ctx;
1473 	unsigned long start, end, addr;
1474 	struct kfd_process *p;
1475 	void *owner;
1476 	int32_t idx;
1477 	int r = 0;
1478 
1479 	ctx.process = container_of(prange->svms, struct kfd_process, svms);
1480 	ctx.prange = prange;
1481 	ctx.intr = intr;
1482 
1483 	if (gpuidx < MAX_GPU_INSTANCE) {
1484 		bitmap_zero(ctx.bitmap, MAX_GPU_INSTANCE);
1485 		bitmap_set(ctx.bitmap, gpuidx, 1);
1486 	} else if (ctx.process->xnack_enabled) {
1487 		bitmap_copy(ctx.bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE);
1488 
1489 		/* If prefetch range to GPU, or GPU retry fault migrate range to
1490 		 * GPU, which has ACCESS attribute to the range, create mapping
1491 		 * on that GPU.
1492 		 */
1493 		if (prange->actual_loc) {
1494 			gpuidx = kfd_process_gpuidx_from_gpuid(ctx.process,
1495 							prange->actual_loc);
1496 			if (gpuidx < 0) {
1497 				WARN_ONCE(1, "failed get device by id 0x%x\n",
1498 					 prange->actual_loc);
1499 				return -EINVAL;
1500 			}
1501 			if (test_bit(gpuidx, prange->bitmap_access))
1502 				bitmap_set(ctx.bitmap, gpuidx, 1);
1503 		}
1504 	} else {
1505 		bitmap_or(ctx.bitmap, prange->bitmap_access,
1506 			  prange->bitmap_aip, MAX_GPU_INSTANCE);
1507 	}
1508 
1509 	if (bitmap_empty(ctx.bitmap, MAX_GPU_INSTANCE))
1510 		return 0;
1511 
1512 	if (prange->actual_loc && !prange->ttm_res) {
1513 		/* This should never happen. actual_loc gets set by
1514 		 * svm_migrate_ram_to_vram after allocating a BO.
1515 		 */
1516 		WARN_ONCE(1, "VRAM BO missing during validation\n");
1517 		return -EINVAL;
1518 	}
1519 
1520 	svm_range_reserve_bos(&ctx);
1521 
1522 	p = container_of(prange->svms, struct kfd_process, svms);
1523 	owner = kfd_svm_page_owner(p, find_first_bit(ctx.bitmap,
1524 						MAX_GPU_INSTANCE));
1525 	for_each_set_bit(idx, ctx.bitmap, MAX_GPU_INSTANCE) {
1526 		if (kfd_svm_page_owner(p, idx) != owner) {
1527 			owner = NULL;
1528 			break;
1529 		}
1530 	}
1531 
1532 	start = prange->start << PAGE_SHIFT;
1533 	end = (prange->last + 1) << PAGE_SHIFT;
1534 	for (addr = start; addr < end && !r; ) {
1535 		struct hmm_range *hmm_range;
1536 		struct vm_area_struct *vma;
1537 		unsigned long next;
1538 		unsigned long offset;
1539 		unsigned long npages;
1540 		bool readonly;
1541 
1542 		vma = find_vma(mm, addr);
1543 		if (!vma || addr < vma->vm_start) {
1544 			r = -EFAULT;
1545 			goto unreserve_out;
1546 		}
1547 		readonly = !(vma->vm_flags & VM_WRITE);
1548 
1549 		next = min(vma->vm_end, end);
1550 		npages = (next - addr) >> PAGE_SHIFT;
1551 		WRITE_ONCE(p->svms.faulting_task, current);
1552 		r = amdgpu_hmm_range_get_pages(&prange->notifier, mm, NULL,
1553 					       addr, npages, &hmm_range,
1554 					       readonly, true, owner);
1555 		WRITE_ONCE(p->svms.faulting_task, NULL);
1556 		if (r) {
1557 			pr_debug("failed %d to get svm range pages\n", r);
1558 			goto unreserve_out;
1559 		}
1560 
1561 		offset = (addr - start) >> PAGE_SHIFT;
1562 		r = svm_range_dma_map(prange, ctx.bitmap, offset, npages,
1563 				      hmm_range->hmm_pfns);
1564 		if (r) {
1565 			pr_debug("failed %d to dma map range\n", r);
1566 			goto unreserve_out;
1567 		}
1568 
1569 		svm_range_lock(prange);
1570 		if (amdgpu_hmm_range_get_pages_done(hmm_range)) {
1571 			pr_debug("hmm update the range, need validate again\n");
1572 			r = -EAGAIN;
1573 			goto unlock_out;
1574 		}
1575 		if (!list_empty(&prange->child_list)) {
1576 			pr_debug("range split by unmap in parallel, validate again\n");
1577 			r = -EAGAIN;
1578 			goto unlock_out;
1579 		}
1580 
1581 		r = svm_range_map_to_gpus(prange, offset, npages, readonly,
1582 					  ctx.bitmap, wait);
1583 
1584 unlock_out:
1585 		svm_range_unlock(prange);
1586 
1587 		addr = next;
1588 	}
1589 
1590 	if (addr == end)
1591 		prange->validated_once = true;
1592 
1593 unreserve_out:
1594 	svm_range_unreserve_bos(&ctx);
1595 
1596 	if (!r)
1597 		prange->validate_timestamp = ktime_to_us(ktime_get());
1598 
1599 	return r;
1600 }
1601 
1602 /**
1603  * svm_range_list_lock_and_flush_work - flush pending deferred work
1604  *
1605  * @svms: the svm range list
1606  * @mm: the mm structure
1607  *
1608  * Context: Returns with mmap write lock held, pending deferred work flushed
1609  *
1610  */
1611 void
1612 svm_range_list_lock_and_flush_work(struct svm_range_list *svms,
1613 				   struct mm_struct *mm)
1614 {
1615 retry_flush_work:
1616 	flush_work(&svms->deferred_list_work);
1617 	mmap_write_lock(mm);
1618 
1619 	if (list_empty(&svms->deferred_range_list))
1620 		return;
1621 	mmap_write_unlock(mm);
1622 	pr_debug("retry flush\n");
1623 	goto retry_flush_work;
1624 }
1625 
1626 static void svm_range_restore_work(struct work_struct *work)
1627 {
1628 	struct delayed_work *dwork = to_delayed_work(work);
1629 	struct amdkfd_process_info *process_info;
1630 	struct svm_range_list *svms;
1631 	struct svm_range *prange;
1632 	struct kfd_process *p;
1633 	struct mm_struct *mm;
1634 	int evicted_ranges;
1635 	int invalid;
1636 	int r;
1637 
1638 	svms = container_of(dwork, struct svm_range_list, restore_work);
1639 	evicted_ranges = atomic_read(&svms->evicted_ranges);
1640 	if (!evicted_ranges)
1641 		return;
1642 
1643 	pr_debug("restore svm ranges\n");
1644 
1645 	p = container_of(svms, struct kfd_process, svms);
1646 	process_info = p->kgd_process_info;
1647 
1648 	/* Keep mm reference when svm_range_validate_and_map ranges */
1649 	mm = get_task_mm(p->lead_thread);
1650 	if (!mm) {
1651 		pr_debug("svms 0x%p process mm gone\n", svms);
1652 		return;
1653 	}
1654 
1655 	mutex_lock(&process_info->lock);
1656 	svm_range_list_lock_and_flush_work(svms, mm);
1657 	mutex_lock(&svms->lock);
1658 
1659 	evicted_ranges = atomic_read(&svms->evicted_ranges);
1660 
1661 	list_for_each_entry(prange, &svms->list, list) {
1662 		invalid = atomic_read(&prange->invalid);
1663 		if (!invalid)
1664 			continue;
1665 
1666 		pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n",
1667 			 prange->svms, prange, prange->start, prange->last,
1668 			 invalid);
1669 
1670 		/*
1671 		 * If range is migrating, wait for migration is done.
1672 		 */
1673 		mutex_lock(&prange->migrate_mutex);
1674 
1675 		r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE,
1676 					       false, true);
1677 		if (r)
1678 			pr_debug("failed %d to map 0x%lx to gpus\n", r,
1679 				 prange->start);
1680 
1681 		mutex_unlock(&prange->migrate_mutex);
1682 		if (r)
1683 			goto out_reschedule;
1684 
1685 		if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid)
1686 			goto out_reschedule;
1687 	}
1688 
1689 	if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) !=
1690 	    evicted_ranges)
1691 		goto out_reschedule;
1692 
1693 	evicted_ranges = 0;
1694 
1695 	r = kgd2kfd_resume_mm(mm);
1696 	if (r) {
1697 		/* No recovery from this failure. Probably the CP is
1698 		 * hanging. No point trying again.
1699 		 */
1700 		pr_debug("failed %d to resume KFD\n", r);
1701 	}
1702 
1703 	pr_debug("restore svm ranges successfully\n");
1704 
1705 out_reschedule:
1706 	mutex_unlock(&svms->lock);
1707 	mmap_write_unlock(mm);
1708 	mutex_unlock(&process_info->lock);
1709 	mmput(mm);
1710 
1711 	/* If validation failed, reschedule another attempt */
1712 	if (evicted_ranges) {
1713 		pr_debug("reschedule to restore svm range\n");
1714 		schedule_delayed_work(&svms->restore_work,
1715 			msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS));
1716 	}
1717 }
1718 
1719 /**
1720  * svm_range_evict - evict svm range
1721  * @prange: svm range structure
1722  * @mm: current process mm_struct
1723  * @start: starting process queue number
1724  * @last: last process queue number
1725  *
1726  * Stop all queues of the process to ensure GPU doesn't access the memory, then
1727  * return to let CPU evict the buffer and proceed CPU pagetable update.
1728  *
1729  * Don't need use lock to sync cpu pagetable invalidation with GPU execution.
1730  * If invalidation happens while restore work is running, restore work will
1731  * restart to ensure to get the latest CPU pages mapping to GPU, then start
1732  * the queues.
1733  */
1734 static int
1735 svm_range_evict(struct svm_range *prange, struct mm_struct *mm,
1736 		unsigned long start, unsigned long last)
1737 {
1738 	struct svm_range_list *svms = prange->svms;
1739 	struct svm_range *pchild;
1740 	struct kfd_process *p;
1741 	int r = 0;
1742 
1743 	p = container_of(svms, struct kfd_process, svms);
1744 
1745 	pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n",
1746 		 svms, prange->start, prange->last, start, last);
1747 
1748 	if (!p->xnack_enabled) {
1749 		int evicted_ranges;
1750 
1751 		list_for_each_entry(pchild, &prange->child_list, child_list) {
1752 			mutex_lock_nested(&pchild->lock, 1);
1753 			if (pchild->start <= last && pchild->last >= start) {
1754 				pr_debug("increment pchild invalid [0x%lx 0x%lx]\n",
1755 					 pchild->start, pchild->last);
1756 				atomic_inc(&pchild->invalid);
1757 			}
1758 			mutex_unlock(&pchild->lock);
1759 		}
1760 
1761 		if (prange->start <= last && prange->last >= start)
1762 			atomic_inc(&prange->invalid);
1763 
1764 		evicted_ranges = atomic_inc_return(&svms->evicted_ranges);
1765 		if (evicted_ranges != 1)
1766 			return r;
1767 
1768 		pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n",
1769 			 prange->svms, prange->start, prange->last);
1770 
1771 		/* First eviction, stop the queues */
1772 		r = kgd2kfd_quiesce_mm(mm);
1773 		if (r)
1774 			pr_debug("failed to quiesce KFD\n");
1775 
1776 		pr_debug("schedule to restore svm %p ranges\n", svms);
1777 		schedule_delayed_work(&svms->restore_work,
1778 			msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS));
1779 	} else {
1780 		unsigned long s, l;
1781 
1782 		pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n",
1783 			 prange->svms, start, last);
1784 		list_for_each_entry(pchild, &prange->child_list, child_list) {
1785 			mutex_lock_nested(&pchild->lock, 1);
1786 			s = max(start, pchild->start);
1787 			l = min(last, pchild->last);
1788 			if (l >= s)
1789 				svm_range_unmap_from_gpus(pchild, s, l);
1790 			mutex_unlock(&pchild->lock);
1791 		}
1792 		s = max(start, prange->start);
1793 		l = min(last, prange->last);
1794 		if (l >= s)
1795 			svm_range_unmap_from_gpus(prange, s, l);
1796 	}
1797 
1798 	return r;
1799 }
1800 
1801 static struct svm_range *svm_range_clone(struct svm_range *old)
1802 {
1803 	struct svm_range *new;
1804 
1805 	new = svm_range_new(old->svms, old->start, old->last);
1806 	if (!new)
1807 		return NULL;
1808 
1809 	if (old->svm_bo) {
1810 		new->ttm_res = old->ttm_res;
1811 		new->offset = old->offset;
1812 		new->svm_bo = svm_range_bo_ref(old->svm_bo);
1813 		spin_lock(&new->svm_bo->list_lock);
1814 		list_add(&new->svm_bo_list, &new->svm_bo->range_list);
1815 		spin_unlock(&new->svm_bo->list_lock);
1816 	}
1817 	new->flags = old->flags;
1818 	new->preferred_loc = old->preferred_loc;
1819 	new->prefetch_loc = old->prefetch_loc;
1820 	new->actual_loc = old->actual_loc;
1821 	new->granularity = old->granularity;
1822 	bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE);
1823 	bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE);
1824 
1825 	return new;
1826 }
1827 
1828 /**
1829  * svm_range_add - add svm range and handle overlap
1830  * @p: the range add to this process svms
1831  * @start: page size aligned
1832  * @size: page size aligned
1833  * @nattr: number of attributes
1834  * @attrs: array of attributes
1835  * @update_list: output, the ranges need validate and update GPU mapping
1836  * @insert_list: output, the ranges need insert to svms
1837  * @remove_list: output, the ranges are replaced and need remove from svms
1838  *
1839  * Check if the virtual address range has overlap with any existing ranges,
1840  * split partly overlapping ranges and add new ranges in the gaps. All changes
1841  * should be applied to the range_list and interval tree transactionally. If
1842  * any range split or allocation fails, the entire update fails. Therefore any
1843  * existing overlapping svm_ranges are cloned and the original svm_ranges left
1844  * unchanged.
1845  *
1846  * If the transaction succeeds, the caller can update and insert clones and
1847  * new ranges, then free the originals.
1848  *
1849  * Otherwise the caller can free the clones and new ranges, while the old
1850  * svm_ranges remain unchanged.
1851  *
1852  * Context: Process context, caller must hold svms->lock
1853  *
1854  * Return:
1855  * 0 - OK, otherwise error code
1856  */
1857 static int
1858 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size,
1859 	      uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs,
1860 	      struct list_head *update_list, struct list_head *insert_list,
1861 	      struct list_head *remove_list)
1862 {
1863 	unsigned long last = start + size - 1UL;
1864 	struct svm_range_list *svms = &p->svms;
1865 	struct interval_tree_node *node;
1866 	struct svm_range *prange;
1867 	struct svm_range *tmp;
1868 	int r = 0;
1869 
1870 	pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last);
1871 
1872 	INIT_LIST_HEAD(update_list);
1873 	INIT_LIST_HEAD(insert_list);
1874 	INIT_LIST_HEAD(remove_list);
1875 
1876 	node = interval_tree_iter_first(&svms->objects, start, last);
1877 	while (node) {
1878 		struct interval_tree_node *next;
1879 		unsigned long next_start;
1880 
1881 		pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start,
1882 			 node->last);
1883 
1884 		prange = container_of(node, struct svm_range, it_node);
1885 		next = interval_tree_iter_next(node, start, last);
1886 		next_start = min(node->last, last) + 1;
1887 
1888 		if (svm_range_is_same_attrs(p, prange, nattr, attrs)) {
1889 			/* nothing to do */
1890 		} else if (node->start < start || node->last > last) {
1891 			/* node intersects the update range and its attributes
1892 			 * will change. Clone and split it, apply updates only
1893 			 * to the overlapping part
1894 			 */
1895 			struct svm_range *old = prange;
1896 
1897 			prange = svm_range_clone(old);
1898 			if (!prange) {
1899 				r = -ENOMEM;
1900 				goto out;
1901 			}
1902 
1903 			list_add(&old->update_list, remove_list);
1904 			list_add(&prange->list, insert_list);
1905 			list_add(&prange->update_list, update_list);
1906 
1907 			if (node->start < start) {
1908 				pr_debug("change old range start\n");
1909 				r = svm_range_split_head(prange, start,
1910 							 insert_list);
1911 				if (r)
1912 					goto out;
1913 			}
1914 			if (node->last > last) {
1915 				pr_debug("change old range last\n");
1916 				r = svm_range_split_tail(prange, last,
1917 							 insert_list);
1918 				if (r)
1919 					goto out;
1920 			}
1921 		} else {
1922 			/* The node is contained within start..last,
1923 			 * just update it
1924 			 */
1925 			list_add(&prange->update_list, update_list);
1926 		}
1927 
1928 		/* insert a new node if needed */
1929 		if (node->start > start) {
1930 			prange = svm_range_new(svms, start, node->start - 1);
1931 			if (!prange) {
1932 				r = -ENOMEM;
1933 				goto out;
1934 			}
1935 
1936 			list_add(&prange->list, insert_list);
1937 			list_add(&prange->update_list, update_list);
1938 		}
1939 
1940 		node = next;
1941 		start = next_start;
1942 	}
1943 
1944 	/* add a final range at the end if needed */
1945 	if (start <= last) {
1946 		prange = svm_range_new(svms, start, last);
1947 		if (!prange) {
1948 			r = -ENOMEM;
1949 			goto out;
1950 		}
1951 		list_add(&prange->list, insert_list);
1952 		list_add(&prange->update_list, update_list);
1953 	}
1954 
1955 out:
1956 	if (r)
1957 		list_for_each_entry_safe(prange, tmp, insert_list, list)
1958 			svm_range_free(prange);
1959 
1960 	return r;
1961 }
1962 
1963 static void
1964 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm,
1965 					    struct svm_range *prange)
1966 {
1967 	unsigned long start;
1968 	unsigned long last;
1969 
1970 	start = prange->notifier.interval_tree.start >> PAGE_SHIFT;
1971 	last = prange->notifier.interval_tree.last >> PAGE_SHIFT;
1972 
1973 	if (prange->start == start && prange->last == last)
1974 		return;
1975 
1976 	pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n",
1977 		  prange->svms, prange, start, last, prange->start,
1978 		  prange->last);
1979 
1980 	if (start != 0 && last != 0) {
1981 		interval_tree_remove(&prange->it_node, &prange->svms->objects);
1982 		svm_range_remove_notifier(prange);
1983 	}
1984 	prange->it_node.start = prange->start;
1985 	prange->it_node.last = prange->last;
1986 
1987 	interval_tree_insert(&prange->it_node, &prange->svms->objects);
1988 	svm_range_add_notifier_locked(mm, prange);
1989 }
1990 
1991 static void
1992 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange,
1993 			 struct mm_struct *mm)
1994 {
1995 	switch (prange->work_item.op) {
1996 	case SVM_OP_NULL:
1997 		pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n",
1998 			 svms, prange, prange->start, prange->last);
1999 		break;
2000 	case SVM_OP_UNMAP_RANGE:
2001 		pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2002 			 svms, prange, prange->start, prange->last);
2003 		svm_range_unlink(prange);
2004 		svm_range_remove_notifier(prange);
2005 		svm_range_free(prange);
2006 		break;
2007 	case SVM_OP_UPDATE_RANGE_NOTIFIER:
2008 		pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2009 			 svms, prange, prange->start, prange->last);
2010 		svm_range_update_notifier_and_interval_tree(mm, prange);
2011 		break;
2012 	case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP:
2013 		pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2014 			 svms, prange, prange->start, prange->last);
2015 		svm_range_update_notifier_and_interval_tree(mm, prange);
2016 		/* TODO: implement deferred validation and mapping */
2017 		break;
2018 	case SVM_OP_ADD_RANGE:
2019 		pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange,
2020 			 prange->start, prange->last);
2021 		svm_range_add_to_svms(prange);
2022 		svm_range_add_notifier_locked(mm, prange);
2023 		break;
2024 	case SVM_OP_ADD_RANGE_AND_MAP:
2025 		pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms,
2026 			 prange, prange->start, prange->last);
2027 		svm_range_add_to_svms(prange);
2028 		svm_range_add_notifier_locked(mm, prange);
2029 		/* TODO: implement deferred validation and mapping */
2030 		break;
2031 	default:
2032 		WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange,
2033 			 prange->work_item.op);
2034 	}
2035 }
2036 
2037 static void svm_range_drain_retry_fault(struct svm_range_list *svms)
2038 {
2039 	struct kfd_process_device *pdd;
2040 	struct kfd_process *p;
2041 	int drain;
2042 	uint32_t i;
2043 
2044 	p = container_of(svms, struct kfd_process, svms);
2045 
2046 restart:
2047 	drain = atomic_read(&svms->drain_pagefaults);
2048 	if (!drain)
2049 		return;
2050 
2051 	for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) {
2052 		pdd = p->pdds[i];
2053 		if (!pdd)
2054 			continue;
2055 
2056 		pr_debug("drain retry fault gpu %d svms %p\n", i, svms);
2057 
2058 		amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev,
2059 						     &pdd->dev->adev->irq.ih1);
2060 		pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms);
2061 	}
2062 	if (atomic_cmpxchg(&svms->drain_pagefaults, drain, 0) != drain)
2063 		goto restart;
2064 }
2065 
2066 static void svm_range_deferred_list_work(struct work_struct *work)
2067 {
2068 	struct svm_range_list *svms;
2069 	struct svm_range *prange;
2070 	struct mm_struct *mm;
2071 
2072 	svms = container_of(work, struct svm_range_list, deferred_list_work);
2073 	pr_debug("enter svms 0x%p\n", svms);
2074 
2075 	spin_lock(&svms->deferred_list_lock);
2076 	while (!list_empty(&svms->deferred_range_list)) {
2077 		prange = list_first_entry(&svms->deferred_range_list,
2078 					  struct svm_range, deferred_list);
2079 		spin_unlock(&svms->deferred_list_lock);
2080 
2081 		pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange,
2082 			 prange->start, prange->last, prange->work_item.op);
2083 
2084 		mm = prange->work_item.mm;
2085 retry:
2086 		mmap_write_lock(mm);
2087 
2088 		/* Checking for the need to drain retry faults must be inside
2089 		 * mmap write lock to serialize with munmap notifiers.
2090 		 */
2091 		if (unlikely(atomic_read(&svms->drain_pagefaults))) {
2092 			mmap_write_unlock(mm);
2093 			svm_range_drain_retry_fault(svms);
2094 			goto retry;
2095 		}
2096 
2097 		/* Remove from deferred_list must be inside mmap write lock, for
2098 		 * two race cases:
2099 		 * 1. unmap_from_cpu may change work_item.op and add the range
2100 		 *    to deferred_list again, cause use after free bug.
2101 		 * 2. svm_range_list_lock_and_flush_work may hold mmap write
2102 		 *    lock and continue because deferred_list is empty, but
2103 		 *    deferred_list work is actually waiting for mmap lock.
2104 		 */
2105 		spin_lock(&svms->deferred_list_lock);
2106 		list_del_init(&prange->deferred_list);
2107 		spin_unlock(&svms->deferred_list_lock);
2108 
2109 		mutex_lock(&svms->lock);
2110 		mutex_lock(&prange->migrate_mutex);
2111 		while (!list_empty(&prange->child_list)) {
2112 			struct svm_range *pchild;
2113 
2114 			pchild = list_first_entry(&prange->child_list,
2115 						struct svm_range, child_list);
2116 			pr_debug("child prange 0x%p op %d\n", pchild,
2117 				 pchild->work_item.op);
2118 			list_del_init(&pchild->child_list);
2119 			svm_range_handle_list_op(svms, pchild, mm);
2120 		}
2121 		mutex_unlock(&prange->migrate_mutex);
2122 
2123 		svm_range_handle_list_op(svms, prange, mm);
2124 		mutex_unlock(&svms->lock);
2125 		mmap_write_unlock(mm);
2126 
2127 		/* Pairs with mmget in svm_range_add_list_work */
2128 		mmput(mm);
2129 
2130 		spin_lock(&svms->deferred_list_lock);
2131 	}
2132 	spin_unlock(&svms->deferred_list_lock);
2133 	pr_debug("exit svms 0x%p\n", svms);
2134 }
2135 
2136 void
2137 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange,
2138 			struct mm_struct *mm, enum svm_work_list_ops op)
2139 {
2140 	spin_lock(&svms->deferred_list_lock);
2141 	/* if prange is on the deferred list */
2142 	if (!list_empty(&prange->deferred_list)) {
2143 		pr_debug("update exist prange 0x%p work op %d\n", prange, op);
2144 		WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n");
2145 		if (op != SVM_OP_NULL &&
2146 		    prange->work_item.op != SVM_OP_UNMAP_RANGE)
2147 			prange->work_item.op = op;
2148 	} else {
2149 		prange->work_item.op = op;
2150 
2151 		/* Pairs with mmput in deferred_list_work */
2152 		mmget(mm);
2153 		prange->work_item.mm = mm;
2154 		list_add_tail(&prange->deferred_list,
2155 			      &prange->svms->deferred_range_list);
2156 		pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n",
2157 			 prange, prange->start, prange->last, op);
2158 	}
2159 	spin_unlock(&svms->deferred_list_lock);
2160 }
2161 
2162 void schedule_deferred_list_work(struct svm_range_list *svms)
2163 {
2164 	spin_lock(&svms->deferred_list_lock);
2165 	if (!list_empty(&svms->deferred_range_list))
2166 		schedule_work(&svms->deferred_list_work);
2167 	spin_unlock(&svms->deferred_list_lock);
2168 }
2169 
2170 static void
2171 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent,
2172 		      struct svm_range *prange, unsigned long start,
2173 		      unsigned long last)
2174 {
2175 	struct svm_range *head;
2176 	struct svm_range *tail;
2177 
2178 	if (prange->work_item.op == SVM_OP_UNMAP_RANGE) {
2179 		pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange,
2180 			 prange->start, prange->last);
2181 		return;
2182 	}
2183 	if (start > prange->last || last < prange->start)
2184 		return;
2185 
2186 	head = tail = prange;
2187 	if (start > prange->start)
2188 		svm_range_split(prange, prange->start, start - 1, &tail);
2189 	if (last < tail->last)
2190 		svm_range_split(tail, last + 1, tail->last, &head);
2191 
2192 	if (head != prange && tail != prange) {
2193 		svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE);
2194 		svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE);
2195 	} else if (tail != prange) {
2196 		svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE);
2197 	} else if (head != prange) {
2198 		svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE);
2199 	} else if (parent != prange) {
2200 		prange->work_item.op = SVM_OP_UNMAP_RANGE;
2201 	}
2202 }
2203 
2204 static void
2205 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange,
2206 			 unsigned long start, unsigned long last)
2207 {
2208 	struct svm_range_list *svms;
2209 	struct svm_range *pchild;
2210 	struct kfd_process *p;
2211 	unsigned long s, l;
2212 	bool unmap_parent;
2213 
2214 	p = kfd_lookup_process_by_mm(mm);
2215 	if (!p)
2216 		return;
2217 	svms = &p->svms;
2218 
2219 	pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms,
2220 		 prange, prange->start, prange->last, start, last);
2221 
2222 	/* Make sure pending page faults are drained in the deferred worker
2223 	 * before the range is freed to avoid straggler interrupts on
2224 	 * unmapped memory causing "phantom faults".
2225 	 */
2226 	atomic_inc(&svms->drain_pagefaults);
2227 
2228 	unmap_parent = start <= prange->start && last >= prange->last;
2229 
2230 	list_for_each_entry(pchild, &prange->child_list, child_list) {
2231 		mutex_lock_nested(&pchild->lock, 1);
2232 		s = max(start, pchild->start);
2233 		l = min(last, pchild->last);
2234 		if (l >= s)
2235 			svm_range_unmap_from_gpus(pchild, s, l);
2236 		svm_range_unmap_split(mm, prange, pchild, start, last);
2237 		mutex_unlock(&pchild->lock);
2238 	}
2239 	s = max(start, prange->start);
2240 	l = min(last, prange->last);
2241 	if (l >= s)
2242 		svm_range_unmap_from_gpus(prange, s, l);
2243 	svm_range_unmap_split(mm, prange, prange, start, last);
2244 
2245 	if (unmap_parent)
2246 		svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE);
2247 	else
2248 		svm_range_add_list_work(svms, prange, mm,
2249 					SVM_OP_UPDATE_RANGE_NOTIFIER);
2250 	schedule_deferred_list_work(svms);
2251 
2252 	kfd_unref_process(p);
2253 }
2254 
2255 /**
2256  * svm_range_cpu_invalidate_pagetables - interval notifier callback
2257  * @mni: mmu_interval_notifier struct
2258  * @range: mmu_notifier_range struct
2259  * @cur_seq: value to pass to mmu_interval_set_seq()
2260  *
2261  * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it
2262  * is from migration, or CPU page invalidation callback.
2263  *
2264  * For unmap event, unmap range from GPUs, remove prange from svms in a delayed
2265  * work thread, and split prange if only part of prange is unmapped.
2266  *
2267  * For invalidation event, if GPU retry fault is not enabled, evict the queues,
2268  * then schedule svm_range_restore_work to update GPU mapping and resume queues.
2269  * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will
2270  * update GPU mapping to recover.
2271  *
2272  * Context: mmap lock, notifier_invalidate_start lock are held
2273  *          for invalidate event, prange lock is held if this is from migration
2274  */
2275 static bool
2276 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni,
2277 				    const struct mmu_notifier_range *range,
2278 				    unsigned long cur_seq)
2279 {
2280 	struct svm_range *prange;
2281 	unsigned long start;
2282 	unsigned long last;
2283 
2284 	if (range->event == MMU_NOTIFY_RELEASE)
2285 		return true;
2286 
2287 	start = mni->interval_tree.start;
2288 	last = mni->interval_tree.last;
2289 	start = max(start, range->start) >> PAGE_SHIFT;
2290 	last = min(last, range->end - 1) >> PAGE_SHIFT;
2291 	pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n",
2292 		 start, last, range->start >> PAGE_SHIFT,
2293 		 (range->end - 1) >> PAGE_SHIFT,
2294 		 mni->interval_tree.start >> PAGE_SHIFT,
2295 		 mni->interval_tree.last >> PAGE_SHIFT, range->event);
2296 
2297 	prange = container_of(mni, struct svm_range, notifier);
2298 
2299 	svm_range_lock(prange);
2300 	mmu_interval_set_seq(mni, cur_seq);
2301 
2302 	switch (range->event) {
2303 	case MMU_NOTIFY_UNMAP:
2304 		svm_range_unmap_from_cpu(mni->mm, prange, start, last);
2305 		break;
2306 	default:
2307 		svm_range_evict(prange, mni->mm, start, last);
2308 		break;
2309 	}
2310 
2311 	svm_range_unlock(prange);
2312 
2313 	return true;
2314 }
2315 
2316 /**
2317  * svm_range_from_addr - find svm range from fault address
2318  * @svms: svm range list header
2319  * @addr: address to search range interval tree, in pages
2320  * @parent: parent range if range is on child list
2321  *
2322  * Context: The caller must hold svms->lock
2323  *
2324  * Return: the svm_range found or NULL
2325  */
2326 struct svm_range *
2327 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr,
2328 		    struct svm_range **parent)
2329 {
2330 	struct interval_tree_node *node;
2331 	struct svm_range *prange;
2332 	struct svm_range *pchild;
2333 
2334 	node = interval_tree_iter_first(&svms->objects, addr, addr);
2335 	if (!node)
2336 		return NULL;
2337 
2338 	prange = container_of(node, struct svm_range, it_node);
2339 	pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n",
2340 		 addr, prange->start, prange->last, node->start, node->last);
2341 
2342 	if (addr >= prange->start && addr <= prange->last) {
2343 		if (parent)
2344 			*parent = prange;
2345 		return prange;
2346 	}
2347 	list_for_each_entry(pchild, &prange->child_list, child_list)
2348 		if (addr >= pchild->start && addr <= pchild->last) {
2349 			pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n",
2350 				 addr, pchild->start, pchild->last);
2351 			if (parent)
2352 				*parent = prange;
2353 			return pchild;
2354 		}
2355 
2356 	return NULL;
2357 }
2358 
2359 /* svm_range_best_restore_location - decide the best fault restore location
2360  * @prange: svm range structure
2361  * @adev: the GPU on which vm fault happened
2362  *
2363  * This is only called when xnack is on, to decide the best location to restore
2364  * the range mapping after GPU vm fault. Caller uses the best location to do
2365  * migration if actual loc is not best location, then update GPU page table
2366  * mapping to the best location.
2367  *
2368  * If the preferred loc is accessible by faulting GPU, use preferred loc.
2369  * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu
2370  * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then
2371  *    if range actual loc is cpu, best_loc is cpu
2372  *    if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is
2373  *    range actual loc.
2374  * Otherwise, GPU no access, best_loc is -1.
2375  *
2376  * Return:
2377  * -1 means vm fault GPU no access
2378  * 0 for CPU or GPU id
2379  */
2380 static int32_t
2381 svm_range_best_restore_location(struct svm_range *prange,
2382 				struct amdgpu_device *adev,
2383 				int32_t *gpuidx)
2384 {
2385 	struct amdgpu_device *bo_adev, *preferred_adev;
2386 	struct kfd_process *p;
2387 	uint32_t gpuid;
2388 	int r;
2389 
2390 	p = container_of(prange->svms, struct kfd_process, svms);
2391 
2392 	r = kfd_process_gpuid_from_adev(p, adev, &gpuid, gpuidx);
2393 	if (r < 0) {
2394 		pr_debug("failed to get gpuid from kgd\n");
2395 		return -1;
2396 	}
2397 
2398 	if (prange->preferred_loc == gpuid ||
2399 	    prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) {
2400 		return prange->preferred_loc;
2401 	} else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) {
2402 		preferred_adev = svm_range_get_adev_by_id(prange,
2403 							prange->preferred_loc);
2404 		if (amdgpu_xgmi_same_hive(adev, preferred_adev))
2405 			return prange->preferred_loc;
2406 		/* fall through */
2407 	}
2408 
2409 	if (test_bit(*gpuidx, prange->bitmap_access))
2410 		return gpuid;
2411 
2412 	if (test_bit(*gpuidx, prange->bitmap_aip)) {
2413 		if (!prange->actual_loc)
2414 			return 0;
2415 
2416 		bo_adev = svm_range_get_adev_by_id(prange, prange->actual_loc);
2417 		if (amdgpu_xgmi_same_hive(adev, bo_adev))
2418 			return prange->actual_loc;
2419 		else
2420 			return 0;
2421 	}
2422 
2423 	return -1;
2424 }
2425 
2426 static int
2427 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr,
2428 			       unsigned long *start, unsigned long *last,
2429 			       bool *is_heap_stack)
2430 {
2431 	struct vm_area_struct *vma;
2432 	struct interval_tree_node *node;
2433 	unsigned long start_limit, end_limit;
2434 
2435 	vma = find_vma(p->mm, addr << PAGE_SHIFT);
2436 	if (!vma || (addr << PAGE_SHIFT) < vma->vm_start) {
2437 		pr_debug("VMA does not exist in address [0x%llx]\n", addr);
2438 		return -EFAULT;
2439 	}
2440 
2441 	*is_heap_stack = (vma->vm_start <= vma->vm_mm->brk &&
2442 			  vma->vm_end >= vma->vm_mm->start_brk) ||
2443 			 (vma->vm_start <= vma->vm_mm->start_stack &&
2444 			  vma->vm_end >= vma->vm_mm->start_stack);
2445 
2446 	start_limit = max(vma->vm_start >> PAGE_SHIFT,
2447 		      (unsigned long)ALIGN_DOWN(addr, 2UL << 8));
2448 	end_limit = min(vma->vm_end >> PAGE_SHIFT,
2449 		    (unsigned long)ALIGN(addr + 1, 2UL << 8));
2450 	/* First range that starts after the fault address */
2451 	node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX);
2452 	if (node) {
2453 		end_limit = min(end_limit, node->start);
2454 		/* Last range that ends before the fault address */
2455 		node = container_of(rb_prev(&node->rb),
2456 				    struct interval_tree_node, rb);
2457 	} else {
2458 		/* Last range must end before addr because
2459 		 * there was no range after addr
2460 		 */
2461 		node = container_of(rb_last(&p->svms.objects.rb_root),
2462 				    struct interval_tree_node, rb);
2463 	}
2464 	if (node) {
2465 		if (node->last >= addr) {
2466 			WARN(1, "Overlap with prev node and page fault addr\n");
2467 			return -EFAULT;
2468 		}
2469 		start_limit = max(start_limit, node->last + 1);
2470 	}
2471 
2472 	*start = start_limit;
2473 	*last = end_limit - 1;
2474 
2475 	pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n",
2476 		 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT,
2477 		 *start, *last, *is_heap_stack);
2478 
2479 	return 0;
2480 }
2481 
2482 static int
2483 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last,
2484 			   uint64_t *bo_s, uint64_t *bo_l)
2485 {
2486 	struct amdgpu_bo_va_mapping *mapping;
2487 	struct interval_tree_node *node;
2488 	struct amdgpu_bo *bo = NULL;
2489 	unsigned long userptr;
2490 	uint32_t i;
2491 	int r;
2492 
2493 	for (i = 0; i < p->n_pdds; i++) {
2494 		struct amdgpu_vm *vm;
2495 
2496 		if (!p->pdds[i]->drm_priv)
2497 			continue;
2498 
2499 		vm = drm_priv_to_vm(p->pdds[i]->drm_priv);
2500 		r = amdgpu_bo_reserve(vm->root.bo, false);
2501 		if (r)
2502 			return r;
2503 
2504 		/* Check userptr by searching entire vm->va interval tree */
2505 		node = interval_tree_iter_first(&vm->va, 0, ~0ULL);
2506 		while (node) {
2507 			mapping = container_of((struct rb_node *)node,
2508 					       struct amdgpu_bo_va_mapping, rb);
2509 			bo = mapping->bo_va->base.bo;
2510 
2511 			if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm,
2512 							 start << PAGE_SHIFT,
2513 							 last << PAGE_SHIFT,
2514 							 &userptr)) {
2515 				node = interval_tree_iter_next(node, 0, ~0ULL);
2516 				continue;
2517 			}
2518 
2519 			pr_debug("[0x%llx 0x%llx] already userptr mapped\n",
2520 				 start, last);
2521 			if (bo_s && bo_l) {
2522 				*bo_s = userptr >> PAGE_SHIFT;
2523 				*bo_l = *bo_s + bo->tbo.ttm->num_pages - 1;
2524 			}
2525 			amdgpu_bo_unreserve(vm->root.bo);
2526 			return -EADDRINUSE;
2527 		}
2528 		amdgpu_bo_unreserve(vm->root.bo);
2529 	}
2530 	return 0;
2531 }
2532 
2533 static struct
2534 svm_range *svm_range_create_unregistered_range(struct amdgpu_device *adev,
2535 						struct kfd_process *p,
2536 						struct mm_struct *mm,
2537 						int64_t addr)
2538 {
2539 	struct svm_range *prange = NULL;
2540 	unsigned long start, last;
2541 	uint32_t gpuid, gpuidx;
2542 	bool is_heap_stack;
2543 	uint64_t bo_s = 0;
2544 	uint64_t bo_l = 0;
2545 	int r;
2546 
2547 	if (svm_range_get_range_boundaries(p, addr, &start, &last,
2548 					   &is_heap_stack))
2549 		return NULL;
2550 
2551 	r = svm_range_check_vm(p, start, last, &bo_s, &bo_l);
2552 	if (r != -EADDRINUSE)
2553 		r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l);
2554 
2555 	if (r == -EADDRINUSE) {
2556 		if (addr >= bo_s && addr <= bo_l)
2557 			return NULL;
2558 
2559 		/* Create one page svm range if 2MB range overlapping */
2560 		start = addr;
2561 		last = addr;
2562 	}
2563 
2564 	prange = svm_range_new(&p->svms, start, last);
2565 	if (!prange) {
2566 		pr_debug("Failed to create prange in address [0x%llx]\n", addr);
2567 		return NULL;
2568 	}
2569 	if (kfd_process_gpuid_from_adev(p, adev, &gpuid, &gpuidx)) {
2570 		pr_debug("failed to get gpuid from kgd\n");
2571 		svm_range_free(prange);
2572 		return NULL;
2573 	}
2574 
2575 	if (is_heap_stack)
2576 		prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM;
2577 
2578 	svm_range_add_to_svms(prange);
2579 	svm_range_add_notifier_locked(mm, prange);
2580 
2581 	return prange;
2582 }
2583 
2584 /* svm_range_skip_recover - decide if prange can be recovered
2585  * @prange: svm range structure
2586  *
2587  * GPU vm retry fault handle skip recover the range for cases:
2588  * 1. prange is on deferred list to be removed after unmap, it is stale fault,
2589  *    deferred list work will drain the stale fault before free the prange.
2590  * 2. prange is on deferred list to add interval notifier after split, or
2591  * 3. prange is child range, it is split from parent prange, recover later
2592  *    after interval notifier is added.
2593  *
2594  * Return: true to skip recover, false to recover
2595  */
2596 static bool svm_range_skip_recover(struct svm_range *prange)
2597 {
2598 	struct svm_range_list *svms = prange->svms;
2599 
2600 	spin_lock(&svms->deferred_list_lock);
2601 	if (list_empty(&prange->deferred_list) &&
2602 	    list_empty(&prange->child_list)) {
2603 		spin_unlock(&svms->deferred_list_lock);
2604 		return false;
2605 	}
2606 	spin_unlock(&svms->deferred_list_lock);
2607 
2608 	if (prange->work_item.op == SVM_OP_UNMAP_RANGE) {
2609 		pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n",
2610 			 svms, prange, prange->start, prange->last);
2611 		return true;
2612 	}
2613 	if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP ||
2614 	    prange->work_item.op == SVM_OP_ADD_RANGE) {
2615 		pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n",
2616 			 svms, prange, prange->start, prange->last);
2617 		return true;
2618 	}
2619 	return false;
2620 }
2621 
2622 static void
2623 svm_range_count_fault(struct amdgpu_device *adev, struct kfd_process *p,
2624 		      int32_t gpuidx)
2625 {
2626 	struct kfd_process_device *pdd;
2627 
2628 	/* fault is on different page of same range
2629 	 * or fault is skipped to recover later
2630 	 * or fault is on invalid virtual address
2631 	 */
2632 	if (gpuidx == MAX_GPU_INSTANCE) {
2633 		uint32_t gpuid;
2634 		int r;
2635 
2636 		r = kfd_process_gpuid_from_adev(p, adev, &gpuid, &gpuidx);
2637 		if (r < 0)
2638 			return;
2639 	}
2640 
2641 	/* fault is recovered
2642 	 * or fault cannot recover because GPU no access on the range
2643 	 */
2644 	pdd = kfd_process_device_from_gpuidx(p, gpuidx);
2645 	if (pdd)
2646 		WRITE_ONCE(pdd->faults, pdd->faults + 1);
2647 }
2648 
2649 static bool
2650 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault)
2651 {
2652 	unsigned long requested = VM_READ;
2653 
2654 	if (write_fault)
2655 		requested |= VM_WRITE;
2656 
2657 	pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested,
2658 		vma->vm_flags);
2659 	return (vma->vm_flags & requested) == requested;
2660 }
2661 
2662 int
2663 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid,
2664 			uint64_t addr, bool write_fault)
2665 {
2666 	struct mm_struct *mm = NULL;
2667 	struct svm_range_list *svms;
2668 	struct svm_range *prange;
2669 	struct kfd_process *p;
2670 	uint64_t timestamp;
2671 	int32_t best_loc;
2672 	int32_t gpuidx = MAX_GPU_INSTANCE;
2673 	bool write_locked = false;
2674 	struct vm_area_struct *vma;
2675 	int r = 0;
2676 
2677 	if (!KFD_IS_SVM_API_SUPPORTED(adev->kfd.dev)) {
2678 		pr_debug("device does not support SVM\n");
2679 		return -EFAULT;
2680 	}
2681 
2682 	p = kfd_lookup_process_by_pasid(pasid);
2683 	if (!p) {
2684 		pr_debug("kfd process not founded pasid 0x%x\n", pasid);
2685 		return 0;
2686 	}
2687 	svms = &p->svms;
2688 
2689 	pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr);
2690 
2691 	if (atomic_read(&svms->drain_pagefaults)) {
2692 		pr_debug("draining retry fault, drop fault 0x%llx\n", addr);
2693 		r = 0;
2694 		goto out;
2695 	}
2696 
2697 	if (!p->xnack_enabled) {
2698 		pr_debug("XNACK not enabled for pasid 0x%x\n", pasid);
2699 		r = -EFAULT;
2700 		goto out;
2701 	}
2702 
2703 	/* p->lead_thread is available as kfd_process_wq_release flush the work
2704 	 * before releasing task ref.
2705 	 */
2706 	mm = get_task_mm(p->lead_thread);
2707 	if (!mm) {
2708 		pr_debug("svms 0x%p failed to get mm\n", svms);
2709 		r = 0;
2710 		goto out;
2711 	}
2712 
2713 	mmap_read_lock(mm);
2714 retry_write_locked:
2715 	mutex_lock(&svms->lock);
2716 	prange = svm_range_from_addr(svms, addr, NULL);
2717 	if (!prange) {
2718 		pr_debug("failed to find prange svms 0x%p address [0x%llx]\n",
2719 			 svms, addr);
2720 		if (!write_locked) {
2721 			/* Need the write lock to create new range with MMU notifier.
2722 			 * Also flush pending deferred work to make sure the interval
2723 			 * tree is up to date before we add a new range
2724 			 */
2725 			mutex_unlock(&svms->lock);
2726 			mmap_read_unlock(mm);
2727 			mmap_write_lock(mm);
2728 			write_locked = true;
2729 			goto retry_write_locked;
2730 		}
2731 		prange = svm_range_create_unregistered_range(adev, p, mm, addr);
2732 		if (!prange) {
2733 			pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n",
2734 				 svms, addr);
2735 			mmap_write_downgrade(mm);
2736 			r = -EFAULT;
2737 			goto out_unlock_svms;
2738 		}
2739 	}
2740 	if (write_locked)
2741 		mmap_write_downgrade(mm);
2742 
2743 	mutex_lock(&prange->migrate_mutex);
2744 
2745 	if (svm_range_skip_recover(prange)) {
2746 		amdgpu_gmc_filter_faults_remove(adev, addr, pasid);
2747 		r = 0;
2748 		goto out_unlock_range;
2749 	}
2750 
2751 	timestamp = ktime_to_us(ktime_get()) - prange->validate_timestamp;
2752 	/* skip duplicate vm fault on different pages of same range */
2753 	if (timestamp < AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING) {
2754 		pr_debug("svms 0x%p [0x%lx %lx] already restored\n",
2755 			 svms, prange->start, prange->last);
2756 		r = 0;
2757 		goto out_unlock_range;
2758 	}
2759 
2760 	/* __do_munmap removed VMA, return success as we are handling stale
2761 	 * retry fault.
2762 	 */
2763 	vma = find_vma(mm, addr << PAGE_SHIFT);
2764 	if (!vma || (addr << PAGE_SHIFT) < vma->vm_start) {
2765 		pr_debug("address 0x%llx VMA is removed\n", addr);
2766 		r = 0;
2767 		goto out_unlock_range;
2768 	}
2769 
2770 	if (!svm_fault_allowed(vma, write_fault)) {
2771 		pr_debug("fault addr 0x%llx no %s permission\n", addr,
2772 			write_fault ? "write" : "read");
2773 		r = -EPERM;
2774 		goto out_unlock_range;
2775 	}
2776 
2777 	best_loc = svm_range_best_restore_location(prange, adev, &gpuidx);
2778 	if (best_loc == -1) {
2779 		pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n",
2780 			 svms, prange->start, prange->last);
2781 		r = -EACCES;
2782 		goto out_unlock_range;
2783 	}
2784 
2785 	pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n",
2786 		 svms, prange->start, prange->last, best_loc,
2787 		 prange->actual_loc);
2788 
2789 	if (prange->actual_loc != best_loc) {
2790 		if (best_loc) {
2791 			r = svm_migrate_to_vram(prange, best_loc, mm);
2792 			if (r) {
2793 				pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n",
2794 					 r, addr);
2795 				/* Fallback to system memory if migration to
2796 				 * VRAM failed
2797 				 */
2798 				if (prange->actual_loc)
2799 					r = svm_migrate_vram_to_ram(prange, mm);
2800 				else
2801 					r = 0;
2802 			}
2803 		} else {
2804 			r = svm_migrate_vram_to_ram(prange, mm);
2805 		}
2806 		if (r) {
2807 			pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n",
2808 				 r, svms, prange->start, prange->last);
2809 			goto out_unlock_range;
2810 		}
2811 	}
2812 
2813 	r = svm_range_validate_and_map(mm, prange, gpuidx, false, false);
2814 	if (r)
2815 		pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n",
2816 			 r, svms, prange->start, prange->last);
2817 
2818 out_unlock_range:
2819 	mutex_unlock(&prange->migrate_mutex);
2820 out_unlock_svms:
2821 	mutex_unlock(&svms->lock);
2822 	mmap_read_unlock(mm);
2823 
2824 	svm_range_count_fault(adev, p, gpuidx);
2825 
2826 	mmput(mm);
2827 out:
2828 	kfd_unref_process(p);
2829 
2830 	if (r == -EAGAIN) {
2831 		pr_debug("recover vm fault later\n");
2832 		amdgpu_gmc_filter_faults_remove(adev, addr, pasid);
2833 		r = 0;
2834 	}
2835 	return r;
2836 }
2837 
2838 void svm_range_list_fini(struct kfd_process *p)
2839 {
2840 	struct svm_range *prange;
2841 	struct svm_range *next;
2842 
2843 	pr_debug("pasid 0x%x svms 0x%p\n", p->pasid, &p->svms);
2844 
2845 	cancel_delayed_work_sync(&p->svms.restore_work);
2846 
2847 	/* Ensure list work is finished before process is destroyed */
2848 	flush_work(&p->svms.deferred_list_work);
2849 
2850 	/*
2851 	 * Ensure no retry fault comes in afterwards, as page fault handler will
2852 	 * not find kfd process and take mm lock to recover fault.
2853 	 */
2854 	atomic_inc(&p->svms.drain_pagefaults);
2855 	svm_range_drain_retry_fault(&p->svms);
2856 
2857 	list_for_each_entry_safe(prange, next, &p->svms.list, list) {
2858 		svm_range_unlink(prange);
2859 		svm_range_remove_notifier(prange);
2860 		svm_range_free(prange);
2861 	}
2862 
2863 	mutex_destroy(&p->svms.lock);
2864 
2865 	pr_debug("pasid 0x%x svms 0x%p done\n", p->pasid, &p->svms);
2866 }
2867 
2868 int svm_range_list_init(struct kfd_process *p)
2869 {
2870 	struct svm_range_list *svms = &p->svms;
2871 	int i;
2872 
2873 	svms->objects = RB_ROOT_CACHED;
2874 	mutex_init(&svms->lock);
2875 	INIT_LIST_HEAD(&svms->list);
2876 	atomic_set(&svms->evicted_ranges, 0);
2877 	atomic_set(&svms->drain_pagefaults, 0);
2878 	INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work);
2879 	INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work);
2880 	INIT_LIST_HEAD(&svms->deferred_range_list);
2881 	INIT_LIST_HEAD(&svms->criu_svm_metadata_list);
2882 	spin_lock_init(&svms->deferred_list_lock);
2883 
2884 	for (i = 0; i < p->n_pdds; i++)
2885 		if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev))
2886 			bitmap_set(svms->bitmap_supported, i, 1);
2887 
2888 	return 0;
2889 }
2890 
2891 /**
2892  * svm_range_check_vm - check if virtual address range mapped already
2893  * @p: current kfd_process
2894  * @start: range start address, in pages
2895  * @last: range last address, in pages
2896  * @bo_s: mapping start address in pages if address range already mapped
2897  * @bo_l: mapping last address in pages if address range already mapped
2898  *
2899  * The purpose is to avoid virtual address ranges already allocated by
2900  * kfd_ioctl_alloc_memory_of_gpu ioctl.
2901  * It looks for each pdd in the kfd_process.
2902  *
2903  * Context: Process context
2904  *
2905  * Return 0 - OK, if the range is not mapped.
2906  * Otherwise error code:
2907  * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu
2908  * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by
2909  * a signal. Release all buffer reservations and return to user-space.
2910  */
2911 static int
2912 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last,
2913 		   uint64_t *bo_s, uint64_t *bo_l)
2914 {
2915 	struct amdgpu_bo_va_mapping *mapping;
2916 	struct interval_tree_node *node;
2917 	uint32_t i;
2918 	int r;
2919 
2920 	for (i = 0; i < p->n_pdds; i++) {
2921 		struct amdgpu_vm *vm;
2922 
2923 		if (!p->pdds[i]->drm_priv)
2924 			continue;
2925 
2926 		vm = drm_priv_to_vm(p->pdds[i]->drm_priv);
2927 		r = amdgpu_bo_reserve(vm->root.bo, false);
2928 		if (r)
2929 			return r;
2930 
2931 		node = interval_tree_iter_first(&vm->va, start, last);
2932 		if (node) {
2933 			pr_debug("range [0x%llx 0x%llx] already TTM mapped\n",
2934 				 start, last);
2935 			mapping = container_of((struct rb_node *)node,
2936 					       struct amdgpu_bo_va_mapping, rb);
2937 			if (bo_s && bo_l) {
2938 				*bo_s = mapping->start;
2939 				*bo_l = mapping->last;
2940 			}
2941 			amdgpu_bo_unreserve(vm->root.bo);
2942 			return -EADDRINUSE;
2943 		}
2944 		amdgpu_bo_unreserve(vm->root.bo);
2945 	}
2946 
2947 	return 0;
2948 }
2949 
2950 /**
2951  * svm_range_is_valid - check if virtual address range is valid
2952  * @p: current kfd_process
2953  * @start: range start address, in pages
2954  * @size: range size, in pages
2955  *
2956  * Valid virtual address range means it belongs to one or more VMAs
2957  *
2958  * Context: Process context
2959  *
2960  * Return:
2961  *  0 - OK, otherwise error code
2962  */
2963 static int
2964 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size)
2965 {
2966 	const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP;
2967 	struct vm_area_struct *vma;
2968 	unsigned long end;
2969 	unsigned long start_unchg = start;
2970 
2971 	start <<= PAGE_SHIFT;
2972 	end = start + (size << PAGE_SHIFT);
2973 	do {
2974 		vma = find_vma(p->mm, start);
2975 		if (!vma || start < vma->vm_start ||
2976 		    (vma->vm_flags & device_vma))
2977 			return -EFAULT;
2978 		start = min(end, vma->vm_end);
2979 	} while (start < end);
2980 
2981 	return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL,
2982 				  NULL);
2983 }
2984 
2985 /**
2986  * svm_range_best_prefetch_location - decide the best prefetch location
2987  * @prange: svm range structure
2988  *
2989  * For xnack off:
2990  * If range map to single GPU, the best prefetch location is prefetch_loc, which
2991  * can be CPU or GPU.
2992  *
2993  * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on
2994  * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise
2995  * the best prefetch location is always CPU, because GPU can not have coherent
2996  * mapping VRAM of other GPUs even with large-BAR PCIe connection.
2997  *
2998  * For xnack on:
2999  * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is
3000  * prefetch_loc, other GPU access will generate vm fault and trigger migration.
3001  *
3002  * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same
3003  * hive, the best prefetch location is prefetch_loc GPU, otherwise the best
3004  * prefetch location is always CPU.
3005  *
3006  * Context: Process context
3007  *
3008  * Return:
3009  * 0 for CPU or GPU id
3010  */
3011 static uint32_t
3012 svm_range_best_prefetch_location(struct svm_range *prange)
3013 {
3014 	DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
3015 	uint32_t best_loc = prange->prefetch_loc;
3016 	struct kfd_process_device *pdd;
3017 	struct amdgpu_device *bo_adev;
3018 	struct kfd_process *p;
3019 	uint32_t gpuidx;
3020 
3021 	p = container_of(prange->svms, struct kfd_process, svms);
3022 
3023 	if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED)
3024 		goto out;
3025 
3026 	bo_adev = svm_range_get_adev_by_id(prange, best_loc);
3027 	if (!bo_adev) {
3028 		WARN_ONCE(1, "failed to get device by id 0x%x\n", best_loc);
3029 		best_loc = 0;
3030 		goto out;
3031 	}
3032 
3033 	if (p->xnack_enabled)
3034 		bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE);
3035 	else
3036 		bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip,
3037 			  MAX_GPU_INSTANCE);
3038 
3039 	for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
3040 		pdd = kfd_process_device_from_gpuidx(p, gpuidx);
3041 		if (!pdd) {
3042 			pr_debug("failed to get device by idx 0x%x\n", gpuidx);
3043 			continue;
3044 		}
3045 
3046 		if (pdd->dev->adev == bo_adev)
3047 			continue;
3048 
3049 		if (!amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) {
3050 			best_loc = 0;
3051 			break;
3052 		}
3053 	}
3054 
3055 out:
3056 	pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n",
3057 		 p->xnack_enabled, &p->svms, prange->start, prange->last,
3058 		 best_loc);
3059 
3060 	return best_loc;
3061 }
3062 
3063 /* FIXME: This is a workaround for page locking bug when some pages are
3064  * invalid during migration to VRAM
3065  */
3066 void svm_range_prefault(struct svm_range *prange, struct mm_struct *mm,
3067 			void *owner)
3068 {
3069 	struct hmm_range *hmm_range;
3070 	int r;
3071 
3072 	if (prange->validated_once)
3073 		return;
3074 
3075 	r = amdgpu_hmm_range_get_pages(&prange->notifier, mm, NULL,
3076 				       prange->start << PAGE_SHIFT,
3077 				       prange->npages, &hmm_range,
3078 				       false, true, owner);
3079 	if (!r) {
3080 		amdgpu_hmm_range_get_pages_done(hmm_range);
3081 		prange->validated_once = true;
3082 	}
3083 }
3084 
3085 /* svm_range_trigger_migration - start page migration if prefetch loc changed
3086  * @mm: current process mm_struct
3087  * @prange: svm range structure
3088  * @migrated: output, true if migration is triggered
3089  *
3090  * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range
3091  * from ram to vram.
3092  * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range
3093  * from vram to ram.
3094  *
3095  * If GPU vm fault retry is not enabled, migration interact with MMU notifier
3096  * and restore work:
3097  * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict
3098  *    stops all queues, schedule restore work
3099  * 2. svm_range_restore_work wait for migration is done by
3100  *    a. svm_range_validate_vram takes prange->migrate_mutex
3101  *    b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns
3102  * 3. restore work update mappings of GPU, resume all queues.
3103  *
3104  * Context: Process context
3105  *
3106  * Return:
3107  * 0 - OK, otherwise - error code of migration
3108  */
3109 static int
3110 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange,
3111 			    bool *migrated)
3112 {
3113 	uint32_t best_loc;
3114 	int r = 0;
3115 
3116 	*migrated = false;
3117 	best_loc = svm_range_best_prefetch_location(prange);
3118 
3119 	if (best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED ||
3120 	    best_loc == prange->actual_loc)
3121 		return 0;
3122 
3123 	if (!best_loc) {
3124 		r = svm_migrate_vram_to_ram(prange, mm);
3125 		*migrated = !r;
3126 		return r;
3127 	}
3128 
3129 	r = svm_migrate_to_vram(prange, best_loc, mm);
3130 	*migrated = !r;
3131 
3132 	return r;
3133 }
3134 
3135 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence)
3136 {
3137 	if (!fence)
3138 		return -EINVAL;
3139 
3140 	if (dma_fence_is_signaled(&fence->base))
3141 		return 0;
3142 
3143 	if (fence->svm_bo) {
3144 		WRITE_ONCE(fence->svm_bo->evicting, 1);
3145 		schedule_work(&fence->svm_bo->eviction_work);
3146 	}
3147 
3148 	return 0;
3149 }
3150 
3151 static void svm_range_evict_svm_bo_worker(struct work_struct *work)
3152 {
3153 	struct svm_range_bo *svm_bo;
3154 	struct kfd_process *p;
3155 	struct mm_struct *mm;
3156 	int r = 0;
3157 
3158 	svm_bo = container_of(work, struct svm_range_bo, eviction_work);
3159 	if (!svm_bo_ref_unless_zero(svm_bo))
3160 		return; /* svm_bo was freed while eviction was pending */
3161 
3162 	/* svm_range_bo_release destroys this worker thread. So during
3163 	 * the lifetime of this thread, kfd_process and mm will be valid.
3164 	 */
3165 	p = container_of(svm_bo->svms, struct kfd_process, svms);
3166 	mm = p->mm;
3167 	if (!mm)
3168 		return;
3169 
3170 	mmap_read_lock(mm);
3171 	spin_lock(&svm_bo->list_lock);
3172 	while (!list_empty(&svm_bo->range_list) && !r) {
3173 		struct svm_range *prange =
3174 				list_first_entry(&svm_bo->range_list,
3175 						struct svm_range, svm_bo_list);
3176 		int retries = 3;
3177 
3178 		list_del_init(&prange->svm_bo_list);
3179 		spin_unlock(&svm_bo->list_lock);
3180 
3181 		pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms,
3182 			 prange->start, prange->last);
3183 
3184 		mutex_lock(&prange->migrate_mutex);
3185 		do {
3186 			r = svm_migrate_vram_to_ram(prange,
3187 						svm_bo->eviction_fence->mm);
3188 		} while (!r && prange->actual_loc && --retries);
3189 
3190 		if (!r && prange->actual_loc)
3191 			pr_info_once("Migration failed during eviction");
3192 
3193 		if (!prange->actual_loc) {
3194 			mutex_lock(&prange->lock);
3195 			prange->svm_bo = NULL;
3196 			mutex_unlock(&prange->lock);
3197 		}
3198 		mutex_unlock(&prange->migrate_mutex);
3199 
3200 		spin_lock(&svm_bo->list_lock);
3201 	}
3202 	spin_unlock(&svm_bo->list_lock);
3203 	mmap_read_unlock(mm);
3204 
3205 	dma_fence_signal(&svm_bo->eviction_fence->base);
3206 
3207 	/* This is the last reference to svm_bo, after svm_range_vram_node_free
3208 	 * has been called in svm_migrate_vram_to_ram
3209 	 */
3210 	WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n");
3211 	svm_range_bo_unref(svm_bo);
3212 }
3213 
3214 static int
3215 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm,
3216 		   uint64_t start, uint64_t size, uint32_t nattr,
3217 		   struct kfd_ioctl_svm_attribute *attrs)
3218 {
3219 	struct amdkfd_process_info *process_info = p->kgd_process_info;
3220 	struct list_head update_list;
3221 	struct list_head insert_list;
3222 	struct list_head remove_list;
3223 	struct svm_range_list *svms;
3224 	struct svm_range *prange;
3225 	struct svm_range *next;
3226 	int r = 0;
3227 
3228 	pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n",
3229 		 p->pasid, &p->svms, start, start + size - 1, size);
3230 
3231 	r = svm_range_check_attr(p, nattr, attrs);
3232 	if (r)
3233 		return r;
3234 
3235 	svms = &p->svms;
3236 
3237 	mutex_lock(&process_info->lock);
3238 
3239 	svm_range_list_lock_and_flush_work(svms, mm);
3240 
3241 	r = svm_range_is_valid(p, start, size);
3242 	if (r) {
3243 		pr_debug("invalid range r=%d\n", r);
3244 		mmap_write_unlock(mm);
3245 		goto out;
3246 	}
3247 
3248 	mutex_lock(&svms->lock);
3249 
3250 	/* Add new range and split existing ranges as needed */
3251 	r = svm_range_add(p, start, size, nattr, attrs, &update_list,
3252 			  &insert_list, &remove_list);
3253 	if (r) {
3254 		mutex_unlock(&svms->lock);
3255 		mmap_write_unlock(mm);
3256 		goto out;
3257 	}
3258 	/* Apply changes as a transaction */
3259 	list_for_each_entry_safe(prange, next, &insert_list, list) {
3260 		svm_range_add_to_svms(prange);
3261 		svm_range_add_notifier_locked(mm, prange);
3262 	}
3263 	list_for_each_entry(prange, &update_list, update_list) {
3264 		svm_range_apply_attrs(p, prange, nattr, attrs);
3265 		/* TODO: unmap ranges from GPU that lost access */
3266 	}
3267 	list_for_each_entry_safe(prange, next, &remove_list, update_list) {
3268 		pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n",
3269 			 prange->svms, prange, prange->start,
3270 			 prange->last);
3271 		svm_range_unlink(prange);
3272 		svm_range_remove_notifier(prange);
3273 		svm_range_free(prange);
3274 	}
3275 
3276 	mmap_write_downgrade(mm);
3277 	/* Trigger migrations and revalidate and map to GPUs as needed. If
3278 	 * this fails we may be left with partially completed actions. There
3279 	 * is no clean way of rolling back to the previous state in such a
3280 	 * case because the rollback wouldn't be guaranteed to work either.
3281 	 */
3282 	list_for_each_entry(prange, &update_list, update_list) {
3283 		bool migrated;
3284 
3285 		mutex_lock(&prange->migrate_mutex);
3286 
3287 		r = svm_range_trigger_migration(mm, prange, &migrated);
3288 		if (r)
3289 			goto out_unlock_range;
3290 
3291 		if (migrated && !p->xnack_enabled) {
3292 			pr_debug("restore_work will update mappings of GPUs\n");
3293 			mutex_unlock(&prange->migrate_mutex);
3294 			continue;
3295 		}
3296 
3297 		r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE,
3298 					       true, true);
3299 		if (r)
3300 			pr_debug("failed %d to map svm range\n", r);
3301 
3302 out_unlock_range:
3303 		mutex_unlock(&prange->migrate_mutex);
3304 		if (r)
3305 			break;
3306 	}
3307 
3308 	svm_range_debug_dump(svms);
3309 
3310 	mutex_unlock(&svms->lock);
3311 	mmap_read_unlock(mm);
3312 out:
3313 	mutex_unlock(&process_info->lock);
3314 
3315 	pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid,
3316 		 &p->svms, start, start + size - 1, r);
3317 
3318 	return r;
3319 }
3320 
3321 static int
3322 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm,
3323 		   uint64_t start, uint64_t size, uint32_t nattr,
3324 		   struct kfd_ioctl_svm_attribute *attrs)
3325 {
3326 	DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE);
3327 	DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE);
3328 	bool get_preferred_loc = false;
3329 	bool get_prefetch_loc = false;
3330 	bool get_granularity = false;
3331 	bool get_accessible = false;
3332 	bool get_flags = false;
3333 	uint64_t last = start + size - 1UL;
3334 	uint8_t granularity = 0xff;
3335 	struct interval_tree_node *node;
3336 	struct svm_range_list *svms;
3337 	struct svm_range *prange;
3338 	uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3339 	uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3340 	uint32_t flags_and = 0xffffffff;
3341 	uint32_t flags_or = 0;
3342 	int gpuidx;
3343 	uint32_t i;
3344 	int r = 0;
3345 
3346 	pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start,
3347 		 start + size - 1, nattr);
3348 
3349 	/* Flush pending deferred work to avoid racing with deferred actions from
3350 	 * previous memory map changes (e.g. munmap). Concurrent memory map changes
3351 	 * can still race with get_attr because we don't hold the mmap lock. But that
3352 	 * would be a race condition in the application anyway, and undefined
3353 	 * behaviour is acceptable in that case.
3354 	 */
3355 	flush_work(&p->svms.deferred_list_work);
3356 
3357 	mmap_read_lock(mm);
3358 	r = svm_range_is_valid(p, start, size);
3359 	mmap_read_unlock(mm);
3360 	if (r) {
3361 		pr_debug("invalid range r=%d\n", r);
3362 		return r;
3363 	}
3364 
3365 	for (i = 0; i < nattr; i++) {
3366 		switch (attrs[i].type) {
3367 		case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
3368 			get_preferred_loc = true;
3369 			break;
3370 		case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3371 			get_prefetch_loc = true;
3372 			break;
3373 		case KFD_IOCTL_SVM_ATTR_ACCESS:
3374 			get_accessible = true;
3375 			break;
3376 		case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3377 		case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
3378 			get_flags = true;
3379 			break;
3380 		case KFD_IOCTL_SVM_ATTR_GRANULARITY:
3381 			get_granularity = true;
3382 			break;
3383 		case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
3384 		case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
3385 			fallthrough;
3386 		default:
3387 			pr_debug("get invalid attr type 0x%x\n", attrs[i].type);
3388 			return -EINVAL;
3389 		}
3390 	}
3391 
3392 	svms = &p->svms;
3393 
3394 	mutex_lock(&svms->lock);
3395 
3396 	node = interval_tree_iter_first(&svms->objects, start, last);
3397 	if (!node) {
3398 		pr_debug("range attrs not found return default values\n");
3399 		svm_range_set_default_attributes(&location, &prefetch_loc,
3400 						 &granularity, &flags_and);
3401 		flags_or = flags_and;
3402 		if (p->xnack_enabled)
3403 			bitmap_copy(bitmap_access, svms->bitmap_supported,
3404 				    MAX_GPU_INSTANCE);
3405 		else
3406 			bitmap_zero(bitmap_access, MAX_GPU_INSTANCE);
3407 		bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE);
3408 		goto fill_values;
3409 	}
3410 	bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE);
3411 	bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE);
3412 
3413 	while (node) {
3414 		struct interval_tree_node *next;
3415 
3416 		prange = container_of(node, struct svm_range, it_node);
3417 		next = interval_tree_iter_next(node, start, last);
3418 
3419 		if (get_preferred_loc) {
3420 			if (prange->preferred_loc ==
3421 					KFD_IOCTL_SVM_LOCATION_UNDEFINED ||
3422 			    (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED &&
3423 			     location != prange->preferred_loc)) {
3424 				location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3425 				get_preferred_loc = false;
3426 			} else {
3427 				location = prange->preferred_loc;
3428 			}
3429 		}
3430 		if (get_prefetch_loc) {
3431 			if (prange->prefetch_loc ==
3432 					KFD_IOCTL_SVM_LOCATION_UNDEFINED ||
3433 			    (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED &&
3434 			     prefetch_loc != prange->prefetch_loc)) {
3435 				prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3436 				get_prefetch_loc = false;
3437 			} else {
3438 				prefetch_loc = prange->prefetch_loc;
3439 			}
3440 		}
3441 		if (get_accessible) {
3442 			bitmap_and(bitmap_access, bitmap_access,
3443 				   prange->bitmap_access, MAX_GPU_INSTANCE);
3444 			bitmap_and(bitmap_aip, bitmap_aip,
3445 				   prange->bitmap_aip, MAX_GPU_INSTANCE);
3446 		}
3447 		if (get_flags) {
3448 			flags_and &= prange->flags;
3449 			flags_or |= prange->flags;
3450 		}
3451 
3452 		if (get_granularity && prange->granularity < granularity)
3453 			granularity = prange->granularity;
3454 
3455 		node = next;
3456 	}
3457 fill_values:
3458 	mutex_unlock(&svms->lock);
3459 
3460 	for (i = 0; i < nattr; i++) {
3461 		switch (attrs[i].type) {
3462 		case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
3463 			attrs[i].value = location;
3464 			break;
3465 		case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3466 			attrs[i].value = prefetch_loc;
3467 			break;
3468 		case KFD_IOCTL_SVM_ATTR_ACCESS:
3469 			gpuidx = kfd_process_gpuidx_from_gpuid(p,
3470 							       attrs[i].value);
3471 			if (gpuidx < 0) {
3472 				pr_debug("invalid gpuid %x\n", attrs[i].value);
3473 				return -EINVAL;
3474 			}
3475 			if (test_bit(gpuidx, bitmap_access))
3476 				attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS;
3477 			else if (test_bit(gpuidx, bitmap_aip))
3478 				attrs[i].type =
3479 					KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE;
3480 			else
3481 				attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS;
3482 			break;
3483 		case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3484 			attrs[i].value = flags_and;
3485 			break;
3486 		case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
3487 			attrs[i].value = ~flags_or;
3488 			break;
3489 		case KFD_IOCTL_SVM_ATTR_GRANULARITY:
3490 			attrs[i].value = (uint32_t)granularity;
3491 			break;
3492 		}
3493 	}
3494 
3495 	return 0;
3496 }
3497 
3498 int kfd_criu_resume_svm(struct kfd_process *p)
3499 {
3500 	struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL;
3501 	int nattr_common = 4, nattr_accessibility = 1;
3502 	struct criu_svm_metadata *criu_svm_md = NULL;
3503 	struct svm_range_list *svms = &p->svms;
3504 	struct criu_svm_metadata *next = NULL;
3505 	uint32_t set_flags = 0xffffffff;
3506 	int i, j, num_attrs, ret = 0;
3507 	uint64_t set_attr_size;
3508 	struct mm_struct *mm;
3509 
3510 	if (list_empty(&svms->criu_svm_metadata_list)) {
3511 		pr_debug("No SVM data from CRIU restore stage 2\n");
3512 		return ret;
3513 	}
3514 
3515 	mm = get_task_mm(p->lead_thread);
3516 	if (!mm) {
3517 		pr_err("failed to get mm for the target process\n");
3518 		return -ESRCH;
3519 	}
3520 
3521 	num_attrs = nattr_common + (nattr_accessibility * p->n_pdds);
3522 
3523 	i = j = 0;
3524 	list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) {
3525 		pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n",
3526 			 i, criu_svm_md->data.start_addr, criu_svm_md->data.size);
3527 
3528 		for (j = 0; j < num_attrs; j++) {
3529 			pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n",
3530 				 i, j, criu_svm_md->data.attrs[j].type,
3531 				 i, j, criu_svm_md->data.attrs[j].value);
3532 			switch (criu_svm_md->data.attrs[j].type) {
3533 			/* During Checkpoint operation, the query for
3534 			 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might
3535 			 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were
3536 			 * not used by the range which was checkpointed. Care
3537 			 * must be taken to not restore with an invalid value
3538 			 * otherwise the gpuidx value will be invalid and
3539 			 * set_attr would eventually fail so just replace those
3540 			 * with another dummy attribute such as
3541 			 * KFD_IOCTL_SVM_ATTR_SET_FLAGS.
3542 			 */
3543 			case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3544 				if (criu_svm_md->data.attrs[j].value ==
3545 				    KFD_IOCTL_SVM_LOCATION_UNDEFINED) {
3546 					criu_svm_md->data.attrs[j].type =
3547 						KFD_IOCTL_SVM_ATTR_SET_FLAGS;
3548 					criu_svm_md->data.attrs[j].value = 0;
3549 				}
3550 				break;
3551 			case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3552 				set_flags = criu_svm_md->data.attrs[j].value;
3553 				break;
3554 			default:
3555 				break;
3556 			}
3557 		}
3558 
3559 		/* CLR_FLAGS is not available via get_attr during checkpoint but
3560 		 * it needs to be inserted before restoring the ranges so
3561 		 * allocate extra space for it before calling set_attr
3562 		 */
3563 		set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
3564 						(num_attrs + 1);
3565 		set_attr_new = krealloc(set_attr, set_attr_size,
3566 					    GFP_KERNEL);
3567 		if (!set_attr_new) {
3568 			ret = -ENOMEM;
3569 			goto exit;
3570 		}
3571 		set_attr = set_attr_new;
3572 
3573 		memcpy(set_attr, criu_svm_md->data.attrs, num_attrs *
3574 					sizeof(struct kfd_ioctl_svm_attribute));
3575 		set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS;
3576 		set_attr[num_attrs].value = ~set_flags;
3577 
3578 		ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr,
3579 					 criu_svm_md->data.size, num_attrs + 1,
3580 					 set_attr);
3581 		if (ret) {
3582 			pr_err("CRIU: failed to set range attributes\n");
3583 			goto exit;
3584 		}
3585 
3586 		i++;
3587 	}
3588 exit:
3589 	kfree(set_attr);
3590 	list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) {
3591 		pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n",
3592 						criu_svm_md->data.start_addr);
3593 		kfree(criu_svm_md);
3594 	}
3595 
3596 	mmput(mm);
3597 	return ret;
3598 
3599 }
3600 
3601 int kfd_criu_restore_svm(struct kfd_process *p,
3602 			 uint8_t __user *user_priv_ptr,
3603 			 uint64_t *priv_data_offset,
3604 			 uint64_t max_priv_data_size)
3605 {
3606 	uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size;
3607 	int nattr_common = 4, nattr_accessibility = 1;
3608 	struct criu_svm_metadata *criu_svm_md = NULL;
3609 	struct svm_range_list *svms = &p->svms;
3610 	uint32_t num_devices;
3611 	int ret = 0;
3612 
3613 	num_devices = p->n_pdds;
3614 	/* Handle one SVM range object at a time, also the number of gpus are
3615 	 * assumed to be same on the restore node, checking must be done while
3616 	 * evaluating the topology earlier
3617 	 */
3618 
3619 	svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) *
3620 		(nattr_common + nattr_accessibility * num_devices);
3621 	svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size;
3622 
3623 	svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) +
3624 								svm_attrs_size;
3625 
3626 	criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL);
3627 	if (!criu_svm_md) {
3628 		pr_err("failed to allocate memory to store svm metadata\n");
3629 		return -ENOMEM;
3630 	}
3631 	if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) {
3632 		ret = -EINVAL;
3633 		goto exit;
3634 	}
3635 
3636 	ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset,
3637 			     svm_priv_data_size);
3638 	if (ret) {
3639 		ret = -EFAULT;
3640 		goto exit;
3641 	}
3642 	*priv_data_offset += svm_priv_data_size;
3643 
3644 	list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list);
3645 
3646 	return 0;
3647 
3648 
3649 exit:
3650 	kfree(criu_svm_md);
3651 	return ret;
3652 }
3653 
3654 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges,
3655 		       uint64_t *svm_priv_data_size)
3656 {
3657 	uint64_t total_size, accessibility_size, common_attr_size;
3658 	int nattr_common = 4, nattr_accessibility = 1;
3659 	int num_devices = p->n_pdds;
3660 	struct svm_range_list *svms;
3661 	struct svm_range *prange;
3662 	uint32_t count = 0;
3663 
3664 	*svm_priv_data_size = 0;
3665 
3666 	svms = &p->svms;
3667 	if (!svms)
3668 		return -EINVAL;
3669 
3670 	mutex_lock(&svms->lock);
3671 	list_for_each_entry(prange, &svms->list, list) {
3672 		pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n",
3673 			 prange, prange->start, prange->npages,
3674 			 prange->start + prange->npages - 1);
3675 		count++;
3676 	}
3677 	mutex_unlock(&svms->lock);
3678 
3679 	*num_svm_ranges = count;
3680 	/* Only the accessbility attributes need to be queried for all the gpus
3681 	 * individually, remaining ones are spanned across the entire process
3682 	 * regardless of the various gpu nodes. Of the remaining attributes,
3683 	 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved.
3684 	 *
3685 	 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC
3686 	 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC
3687 	 * KFD_IOCTL_SVM_ATTR_SET_FLAGS
3688 	 * KFD_IOCTL_SVM_ATTR_GRANULARITY
3689 	 *
3690 	 * ** ACCESSBILITY ATTRIBUTES **
3691 	 * (Considered as one, type is altered during query, value is gpuid)
3692 	 * KFD_IOCTL_SVM_ATTR_ACCESS
3693 	 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE
3694 	 * KFD_IOCTL_SVM_ATTR_NO_ACCESS
3695 	 */
3696 	if (*num_svm_ranges > 0) {
3697 		common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
3698 			nattr_common;
3699 		accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) *
3700 			nattr_accessibility * num_devices;
3701 
3702 		total_size = sizeof(struct kfd_criu_svm_range_priv_data) +
3703 			common_attr_size + accessibility_size;
3704 
3705 		*svm_priv_data_size = *num_svm_ranges * total_size;
3706 	}
3707 
3708 	pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges,
3709 		 *svm_priv_data_size);
3710 	return 0;
3711 }
3712 
3713 int kfd_criu_checkpoint_svm(struct kfd_process *p,
3714 			    uint8_t __user *user_priv_data,
3715 			    uint64_t *priv_data_offset)
3716 {
3717 	struct kfd_criu_svm_range_priv_data *svm_priv = NULL;
3718 	struct kfd_ioctl_svm_attribute *query_attr = NULL;
3719 	uint64_t svm_priv_data_size, query_attr_size = 0;
3720 	int index, nattr_common = 4, ret = 0;
3721 	struct svm_range_list *svms;
3722 	int num_devices = p->n_pdds;
3723 	struct svm_range *prange;
3724 	struct mm_struct *mm;
3725 
3726 	svms = &p->svms;
3727 	if (!svms)
3728 		return -EINVAL;
3729 
3730 	mm = get_task_mm(p->lead_thread);
3731 	if (!mm) {
3732 		pr_err("failed to get mm for the target process\n");
3733 		return -ESRCH;
3734 	}
3735 
3736 	query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
3737 				(nattr_common + num_devices);
3738 
3739 	query_attr = kzalloc(query_attr_size, GFP_KERNEL);
3740 	if (!query_attr) {
3741 		ret = -ENOMEM;
3742 		goto exit;
3743 	}
3744 
3745 	query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC;
3746 	query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC;
3747 	query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS;
3748 	query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY;
3749 
3750 	for (index = 0; index < num_devices; index++) {
3751 		struct kfd_process_device *pdd = p->pdds[index];
3752 
3753 		query_attr[index + nattr_common].type =
3754 			KFD_IOCTL_SVM_ATTR_ACCESS;
3755 		query_attr[index + nattr_common].value = pdd->user_gpu_id;
3756 	}
3757 
3758 	svm_priv_data_size = sizeof(*svm_priv) + query_attr_size;
3759 
3760 	svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL);
3761 	if (!svm_priv) {
3762 		ret = -ENOMEM;
3763 		goto exit_query;
3764 	}
3765 
3766 	index = 0;
3767 	list_for_each_entry(prange, &svms->list, list) {
3768 
3769 		svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE;
3770 		svm_priv->start_addr = prange->start;
3771 		svm_priv->size = prange->npages;
3772 		memcpy(&svm_priv->attrs, query_attr, query_attr_size);
3773 		pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n",
3774 			 prange, prange->start, prange->npages,
3775 			 prange->start + prange->npages - 1,
3776 			 prange->npages * PAGE_SIZE);
3777 
3778 		ret = svm_range_get_attr(p, mm, svm_priv->start_addr,
3779 					 svm_priv->size,
3780 					 (nattr_common + num_devices),
3781 					 svm_priv->attrs);
3782 		if (ret) {
3783 			pr_err("CRIU: failed to obtain range attributes\n");
3784 			goto exit_priv;
3785 		}
3786 
3787 		if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv,
3788 				 svm_priv_data_size)) {
3789 			pr_err("Failed to copy svm priv to user\n");
3790 			ret = -EFAULT;
3791 			goto exit_priv;
3792 		}
3793 
3794 		*priv_data_offset += svm_priv_data_size;
3795 
3796 	}
3797 
3798 
3799 exit_priv:
3800 	kfree(svm_priv);
3801 exit_query:
3802 	kfree(query_attr);
3803 exit:
3804 	mmput(mm);
3805 	return ret;
3806 }
3807 
3808 int
3809 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start,
3810 	  uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs)
3811 {
3812 	struct mm_struct *mm = current->mm;
3813 	int r;
3814 
3815 	start >>= PAGE_SHIFT;
3816 	size >>= PAGE_SHIFT;
3817 
3818 	switch (op) {
3819 	case KFD_IOCTL_SVM_OP_SET_ATTR:
3820 		r = svm_range_set_attr(p, mm, start, size, nattrs, attrs);
3821 		break;
3822 	case KFD_IOCTL_SVM_OP_GET_ATTR:
3823 		r = svm_range_get_attr(p, mm, start, size, nattrs, attrs);
3824 		break;
3825 	default:
3826 		r = EINVAL;
3827 		break;
3828 	}
3829 
3830 	return r;
3831 }
3832