1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <drm/ttm/ttm_tt.h> 27 #include "amdgpu_sync.h" 28 #include "amdgpu_object.h" 29 #include "amdgpu_vm.h" 30 #include "amdgpu_hmm.h" 31 #include "amdgpu.h" 32 #include "amdgpu_xgmi.h" 33 #include "kfd_priv.h" 34 #include "kfd_svm.h" 35 #include "kfd_migrate.h" 36 #include "kfd_smi_events.h" 37 38 #ifdef dev_fmt 39 #undef dev_fmt 40 #endif 41 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 42 43 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 44 45 /* Long enough to ensure no retry fault comes after svm range is restored and 46 * page table is updated. 47 */ 48 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 49 50 /* Giant svm range split into smaller ranges based on this, it is decided using 51 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 52 * power of 2MB. 53 */ 54 static uint64_t max_svm_range_pages; 55 56 struct criu_svm_metadata { 57 struct list_head list; 58 struct kfd_criu_svm_range_priv_data data; 59 }; 60 61 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 62 static bool 63 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 64 const struct mmu_notifier_range *range, 65 unsigned long cur_seq); 66 static int 67 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 68 uint64_t *bo_s, uint64_t *bo_l); 69 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 70 .invalidate = svm_range_cpu_invalidate_pagetables, 71 }; 72 73 /** 74 * svm_range_unlink - unlink svm_range from lists and interval tree 75 * @prange: svm range structure to be removed 76 * 77 * Remove the svm_range from the svms and svm_bo lists and the svms 78 * interval tree. 79 * 80 * Context: The caller must hold svms->lock 81 */ 82 static void svm_range_unlink(struct svm_range *prange) 83 { 84 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 85 prange, prange->start, prange->last); 86 87 if (prange->svm_bo) { 88 spin_lock(&prange->svm_bo->list_lock); 89 list_del(&prange->svm_bo_list); 90 spin_unlock(&prange->svm_bo->list_lock); 91 } 92 93 list_del(&prange->list); 94 if (prange->it_node.start != 0 && prange->it_node.last != 0) 95 interval_tree_remove(&prange->it_node, &prange->svms->objects); 96 } 97 98 static void 99 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 100 { 101 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 102 prange, prange->start, prange->last); 103 104 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 105 prange->start << PAGE_SHIFT, 106 prange->npages << PAGE_SHIFT, 107 &svm_range_mn_ops); 108 } 109 110 /** 111 * svm_range_add_to_svms - add svm range to svms 112 * @prange: svm range structure to be added 113 * 114 * Add the svm range to svms interval tree and link list 115 * 116 * Context: The caller must hold svms->lock 117 */ 118 static void svm_range_add_to_svms(struct svm_range *prange) 119 { 120 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 121 prange, prange->start, prange->last); 122 123 list_move_tail(&prange->list, &prange->svms->list); 124 prange->it_node.start = prange->start; 125 prange->it_node.last = prange->last; 126 interval_tree_insert(&prange->it_node, &prange->svms->objects); 127 } 128 129 static void svm_range_remove_notifier(struct svm_range *prange) 130 { 131 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 132 prange->svms, prange, 133 prange->notifier.interval_tree.start >> PAGE_SHIFT, 134 prange->notifier.interval_tree.last >> PAGE_SHIFT); 135 136 if (prange->notifier.interval_tree.start != 0 && 137 prange->notifier.interval_tree.last != 0) 138 mmu_interval_notifier_remove(&prange->notifier); 139 } 140 141 static bool 142 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 143 { 144 return dma_addr && !dma_mapping_error(dev, dma_addr) && 145 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 146 } 147 148 static int 149 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 150 unsigned long offset, unsigned long npages, 151 unsigned long *hmm_pfns, uint32_t gpuidx) 152 { 153 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 154 dma_addr_t *addr = prange->dma_addr[gpuidx]; 155 struct device *dev = adev->dev; 156 struct page *page; 157 int i, r; 158 159 if (!addr) { 160 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 161 if (!addr) 162 return -ENOMEM; 163 prange->dma_addr[gpuidx] = addr; 164 } 165 166 addr += offset; 167 for (i = 0; i < npages; i++) { 168 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 169 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 170 171 page = hmm_pfn_to_page(hmm_pfns[i]); 172 if (is_zone_device_page(page)) { 173 struct amdgpu_device *bo_adev = 174 amdgpu_ttm_adev(prange->svm_bo->bo->tbo.bdev); 175 176 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 177 bo_adev->vm_manager.vram_base_offset - 178 bo_adev->kfd.dev->pgmap.range.start; 179 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 180 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 181 continue; 182 } 183 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 184 r = dma_mapping_error(dev, addr[i]); 185 if (r) { 186 dev_err(dev, "failed %d dma_map_page\n", r); 187 return r; 188 } 189 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 190 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 191 } 192 return 0; 193 } 194 195 static int 196 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 197 unsigned long offset, unsigned long npages, 198 unsigned long *hmm_pfns) 199 { 200 struct kfd_process *p; 201 uint32_t gpuidx; 202 int r; 203 204 p = container_of(prange->svms, struct kfd_process, svms); 205 206 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 207 struct kfd_process_device *pdd; 208 209 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 210 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 211 if (!pdd) { 212 pr_debug("failed to find device idx %d\n", gpuidx); 213 return -EINVAL; 214 } 215 216 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 217 hmm_pfns, gpuidx); 218 if (r) 219 break; 220 } 221 222 return r; 223 } 224 225 void svm_range_dma_unmap(struct device *dev, dma_addr_t *dma_addr, 226 unsigned long offset, unsigned long npages) 227 { 228 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 229 int i; 230 231 if (!dma_addr) 232 return; 233 234 for (i = offset; i < offset + npages; i++) { 235 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 236 continue; 237 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 238 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 239 dma_addr[i] = 0; 240 } 241 } 242 243 void svm_range_free_dma_mappings(struct svm_range *prange) 244 { 245 struct kfd_process_device *pdd; 246 dma_addr_t *dma_addr; 247 struct device *dev; 248 struct kfd_process *p; 249 uint32_t gpuidx; 250 251 p = container_of(prange->svms, struct kfd_process, svms); 252 253 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 254 dma_addr = prange->dma_addr[gpuidx]; 255 if (!dma_addr) 256 continue; 257 258 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 259 if (!pdd) { 260 pr_debug("failed to find device idx %d\n", gpuidx); 261 continue; 262 } 263 dev = &pdd->dev->adev->pdev->dev; 264 svm_range_dma_unmap(dev, dma_addr, 0, prange->npages); 265 kvfree(dma_addr); 266 prange->dma_addr[gpuidx] = NULL; 267 } 268 } 269 270 static void svm_range_free(struct svm_range *prange, bool update_mem_usage) 271 { 272 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 273 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 274 275 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 276 prange->start, prange->last); 277 278 svm_range_vram_node_free(prange); 279 svm_range_free_dma_mappings(prange); 280 281 if (update_mem_usage && !p->xnack_enabled) { 282 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 283 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 284 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR); 285 } 286 mutex_destroy(&prange->lock); 287 mutex_destroy(&prange->migrate_mutex); 288 kfree(prange); 289 } 290 291 static void 292 svm_range_set_default_attributes(int32_t *location, int32_t *prefetch_loc, 293 uint8_t *granularity, uint32_t *flags) 294 { 295 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 296 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 297 *granularity = 9; 298 *flags = 299 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 300 } 301 302 static struct 303 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 304 uint64_t last, bool update_mem_usage) 305 { 306 uint64_t size = last - start + 1; 307 struct svm_range *prange; 308 struct kfd_process *p; 309 310 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 311 if (!prange) 312 return NULL; 313 314 p = container_of(svms, struct kfd_process, svms); 315 if (!p->xnack_enabled && update_mem_usage && 316 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 317 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR)) { 318 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 319 kfree(prange); 320 return NULL; 321 } 322 prange->npages = size; 323 prange->svms = svms; 324 prange->start = start; 325 prange->last = last; 326 INIT_LIST_HEAD(&prange->list); 327 INIT_LIST_HEAD(&prange->update_list); 328 INIT_LIST_HEAD(&prange->svm_bo_list); 329 INIT_LIST_HEAD(&prange->deferred_list); 330 INIT_LIST_HEAD(&prange->child_list); 331 atomic_set(&prange->invalid, 0); 332 prange->validate_timestamp = 0; 333 mutex_init(&prange->migrate_mutex); 334 mutex_init(&prange->lock); 335 336 if (p->xnack_enabled) 337 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 338 MAX_GPU_INSTANCE); 339 340 svm_range_set_default_attributes(&prange->preferred_loc, 341 &prange->prefetch_loc, 342 &prange->granularity, &prange->flags); 343 344 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 345 346 return prange; 347 } 348 349 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 350 { 351 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 352 return false; 353 354 return true; 355 } 356 357 static void svm_range_bo_release(struct kref *kref) 358 { 359 struct svm_range_bo *svm_bo; 360 361 svm_bo = container_of(kref, struct svm_range_bo, kref); 362 pr_debug("svm_bo 0x%p\n", svm_bo); 363 364 spin_lock(&svm_bo->list_lock); 365 while (!list_empty(&svm_bo->range_list)) { 366 struct svm_range *prange = 367 list_first_entry(&svm_bo->range_list, 368 struct svm_range, svm_bo_list); 369 /* list_del_init tells a concurrent svm_range_vram_node_new when 370 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 371 */ 372 list_del_init(&prange->svm_bo_list); 373 spin_unlock(&svm_bo->list_lock); 374 375 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 376 prange->start, prange->last); 377 mutex_lock(&prange->lock); 378 prange->svm_bo = NULL; 379 mutex_unlock(&prange->lock); 380 381 spin_lock(&svm_bo->list_lock); 382 } 383 spin_unlock(&svm_bo->list_lock); 384 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) { 385 /* We're not in the eviction worker. 386 * Signal the fence and synchronize with any 387 * pending eviction work. 388 */ 389 dma_fence_signal(&svm_bo->eviction_fence->base); 390 cancel_work_sync(&svm_bo->eviction_work); 391 } 392 dma_fence_put(&svm_bo->eviction_fence->base); 393 amdgpu_bo_unref(&svm_bo->bo); 394 kfree(svm_bo); 395 } 396 397 static void svm_range_bo_wq_release(struct work_struct *work) 398 { 399 struct svm_range_bo *svm_bo; 400 401 svm_bo = container_of(work, struct svm_range_bo, release_work); 402 svm_range_bo_release(&svm_bo->kref); 403 } 404 405 static void svm_range_bo_release_async(struct kref *kref) 406 { 407 struct svm_range_bo *svm_bo; 408 409 svm_bo = container_of(kref, struct svm_range_bo, kref); 410 pr_debug("svm_bo 0x%p\n", svm_bo); 411 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 412 schedule_work(&svm_bo->release_work); 413 } 414 415 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 416 { 417 kref_put(&svm_bo->kref, svm_range_bo_release_async); 418 } 419 420 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 421 { 422 if (svm_bo) 423 kref_put(&svm_bo->kref, svm_range_bo_release); 424 } 425 426 static bool 427 svm_range_validate_svm_bo(struct amdgpu_device *adev, struct svm_range *prange) 428 { 429 struct amdgpu_device *bo_adev; 430 431 mutex_lock(&prange->lock); 432 if (!prange->svm_bo) { 433 mutex_unlock(&prange->lock); 434 return false; 435 } 436 if (prange->ttm_res) { 437 /* We still have a reference, all is well */ 438 mutex_unlock(&prange->lock); 439 return true; 440 } 441 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 442 /* 443 * Migrate from GPU to GPU, remove range from source bo_adev 444 * svm_bo range list, and return false to allocate svm_bo from 445 * destination adev. 446 */ 447 bo_adev = amdgpu_ttm_adev(prange->svm_bo->bo->tbo.bdev); 448 if (bo_adev != adev) { 449 mutex_unlock(&prange->lock); 450 451 spin_lock(&prange->svm_bo->list_lock); 452 list_del_init(&prange->svm_bo_list); 453 spin_unlock(&prange->svm_bo->list_lock); 454 455 svm_range_bo_unref(prange->svm_bo); 456 return false; 457 } 458 if (READ_ONCE(prange->svm_bo->evicting)) { 459 struct dma_fence *f; 460 struct svm_range_bo *svm_bo; 461 /* The BO is getting evicted, 462 * we need to get a new one 463 */ 464 mutex_unlock(&prange->lock); 465 svm_bo = prange->svm_bo; 466 f = dma_fence_get(&svm_bo->eviction_fence->base); 467 svm_range_bo_unref(prange->svm_bo); 468 /* wait for the fence to avoid long spin-loop 469 * at list_empty_careful 470 */ 471 dma_fence_wait(f, false); 472 dma_fence_put(f); 473 } else { 474 /* The BO was still around and we got 475 * a new reference to it 476 */ 477 mutex_unlock(&prange->lock); 478 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 479 prange->svms, prange->start, prange->last); 480 481 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 482 return true; 483 } 484 485 } else { 486 mutex_unlock(&prange->lock); 487 } 488 489 /* We need a new svm_bo. Spin-loop to wait for concurrent 490 * svm_range_bo_release to finish removing this range from 491 * its range list. After this, it is safe to reuse the 492 * svm_bo pointer and svm_bo_list head. 493 */ 494 while (!list_empty_careful(&prange->svm_bo_list)) 495 ; 496 497 return false; 498 } 499 500 static struct svm_range_bo *svm_range_bo_new(void) 501 { 502 struct svm_range_bo *svm_bo; 503 504 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 505 if (!svm_bo) 506 return NULL; 507 508 kref_init(&svm_bo->kref); 509 INIT_LIST_HEAD(&svm_bo->range_list); 510 spin_lock_init(&svm_bo->list_lock); 511 512 return svm_bo; 513 } 514 515 int 516 svm_range_vram_node_new(struct amdgpu_device *adev, struct svm_range *prange, 517 bool clear) 518 { 519 struct amdgpu_bo_param bp; 520 struct svm_range_bo *svm_bo; 521 struct amdgpu_bo_user *ubo; 522 struct amdgpu_bo *bo; 523 struct kfd_process *p; 524 struct mm_struct *mm; 525 int r; 526 527 p = container_of(prange->svms, struct kfd_process, svms); 528 pr_debug("pasid: %x svms 0x%p [0x%lx 0x%lx]\n", p->pasid, prange->svms, 529 prange->start, prange->last); 530 531 if (svm_range_validate_svm_bo(adev, prange)) 532 return 0; 533 534 svm_bo = svm_range_bo_new(); 535 if (!svm_bo) { 536 pr_debug("failed to alloc svm bo\n"); 537 return -ENOMEM; 538 } 539 mm = get_task_mm(p->lead_thread); 540 if (!mm) { 541 pr_debug("failed to get mm\n"); 542 kfree(svm_bo); 543 return -ESRCH; 544 } 545 svm_bo->eviction_fence = 546 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 547 mm, 548 svm_bo); 549 mmput(mm); 550 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 551 svm_bo->evicting = 0; 552 memset(&bp, 0, sizeof(bp)); 553 bp.size = prange->npages * PAGE_SIZE; 554 bp.byte_align = PAGE_SIZE; 555 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 556 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 557 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 558 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 559 bp.type = ttm_bo_type_device; 560 bp.resv = NULL; 561 562 r = amdgpu_bo_create_user(adev, &bp, &ubo); 563 if (r) { 564 pr_debug("failed %d to create bo\n", r); 565 goto create_bo_failed; 566 } 567 bo = &ubo->bo; 568 r = amdgpu_bo_reserve(bo, true); 569 if (r) { 570 pr_debug("failed %d to reserve bo\n", r); 571 goto reserve_bo_failed; 572 } 573 574 if (clear) { 575 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 576 if (r) { 577 pr_debug("failed %d to sync bo\n", r); 578 amdgpu_bo_unreserve(bo); 579 goto reserve_bo_failed; 580 } 581 } 582 583 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 584 if (r) { 585 pr_debug("failed %d to reserve bo\n", r); 586 amdgpu_bo_unreserve(bo); 587 goto reserve_bo_failed; 588 } 589 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 590 591 amdgpu_bo_unreserve(bo); 592 593 svm_bo->bo = bo; 594 prange->svm_bo = svm_bo; 595 prange->ttm_res = bo->tbo.resource; 596 prange->offset = 0; 597 598 spin_lock(&svm_bo->list_lock); 599 list_add(&prange->svm_bo_list, &svm_bo->range_list); 600 spin_unlock(&svm_bo->list_lock); 601 602 return 0; 603 604 reserve_bo_failed: 605 amdgpu_bo_unref(&bo); 606 create_bo_failed: 607 dma_fence_put(&svm_bo->eviction_fence->base); 608 kfree(svm_bo); 609 prange->ttm_res = NULL; 610 611 return r; 612 } 613 614 void svm_range_vram_node_free(struct svm_range *prange) 615 { 616 svm_range_bo_unref(prange->svm_bo); 617 prange->ttm_res = NULL; 618 } 619 620 struct amdgpu_device * 621 svm_range_get_adev_by_id(struct svm_range *prange, uint32_t gpu_id) 622 { 623 struct kfd_process_device *pdd; 624 struct kfd_process *p; 625 int32_t gpu_idx; 626 627 p = container_of(prange->svms, struct kfd_process, svms); 628 629 gpu_idx = kfd_process_gpuidx_from_gpuid(p, gpu_id); 630 if (gpu_idx < 0) { 631 pr_debug("failed to get device by id 0x%x\n", gpu_id); 632 return NULL; 633 } 634 pdd = kfd_process_device_from_gpuidx(p, gpu_idx); 635 if (!pdd) { 636 pr_debug("failed to get device by idx 0x%x\n", gpu_idx); 637 return NULL; 638 } 639 640 return pdd->dev->adev; 641 } 642 643 struct kfd_process_device * 644 svm_range_get_pdd_by_adev(struct svm_range *prange, struct amdgpu_device *adev) 645 { 646 struct kfd_process *p; 647 int32_t gpu_idx, gpuid; 648 int r; 649 650 p = container_of(prange->svms, struct kfd_process, svms); 651 652 r = kfd_process_gpuid_from_adev(p, adev, &gpuid, &gpu_idx); 653 if (r) { 654 pr_debug("failed to get device id by adev %p\n", adev); 655 return NULL; 656 } 657 658 return kfd_process_device_from_gpuidx(p, gpu_idx); 659 } 660 661 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 662 { 663 struct ttm_operation_ctx ctx = { false, false }; 664 665 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 666 667 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 668 } 669 670 static int 671 svm_range_check_attr(struct kfd_process *p, 672 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 673 { 674 uint32_t i; 675 676 for (i = 0; i < nattr; i++) { 677 uint32_t val = attrs[i].value; 678 int gpuidx = MAX_GPU_INSTANCE; 679 680 switch (attrs[i].type) { 681 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 682 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 683 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 684 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 685 break; 686 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 687 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 688 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 689 break; 690 case KFD_IOCTL_SVM_ATTR_ACCESS: 691 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 692 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 693 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 694 break; 695 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 696 break; 697 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 698 break; 699 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 700 break; 701 default: 702 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 703 return -EINVAL; 704 } 705 706 if (gpuidx < 0) { 707 pr_debug("no GPU 0x%x found\n", val); 708 return -EINVAL; 709 } else if (gpuidx < MAX_GPU_INSTANCE && 710 !test_bit(gpuidx, p->svms.bitmap_supported)) { 711 pr_debug("GPU 0x%x not supported\n", val); 712 return -EINVAL; 713 } 714 } 715 716 return 0; 717 } 718 719 static void 720 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 721 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 722 bool *update_mapping) 723 { 724 uint32_t i; 725 int gpuidx; 726 727 for (i = 0; i < nattr; i++) { 728 switch (attrs[i].type) { 729 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 730 prange->preferred_loc = attrs[i].value; 731 break; 732 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 733 prange->prefetch_loc = attrs[i].value; 734 break; 735 case KFD_IOCTL_SVM_ATTR_ACCESS: 736 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 737 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 738 if (!p->xnack_enabled) 739 *update_mapping = true; 740 741 gpuidx = kfd_process_gpuidx_from_gpuid(p, 742 attrs[i].value); 743 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 744 bitmap_clear(prange->bitmap_access, gpuidx, 1); 745 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 746 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 747 bitmap_set(prange->bitmap_access, gpuidx, 1); 748 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 749 } else { 750 bitmap_clear(prange->bitmap_access, gpuidx, 1); 751 bitmap_set(prange->bitmap_aip, gpuidx, 1); 752 } 753 break; 754 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 755 *update_mapping = true; 756 prange->flags |= attrs[i].value; 757 break; 758 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 759 *update_mapping = true; 760 prange->flags &= ~attrs[i].value; 761 break; 762 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 763 prange->granularity = attrs[i].value; 764 break; 765 default: 766 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 767 } 768 } 769 } 770 771 static bool 772 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 773 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 774 { 775 uint32_t i; 776 int gpuidx; 777 778 for (i = 0; i < nattr; i++) { 779 switch (attrs[i].type) { 780 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 781 if (prange->preferred_loc != attrs[i].value) 782 return false; 783 break; 784 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 785 /* Prefetch should always trigger a migration even 786 * if the value of the attribute didn't change. 787 */ 788 return false; 789 case KFD_IOCTL_SVM_ATTR_ACCESS: 790 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 791 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 792 gpuidx = kfd_process_gpuidx_from_gpuid(p, 793 attrs[i].value); 794 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 795 if (test_bit(gpuidx, prange->bitmap_access) || 796 test_bit(gpuidx, prange->bitmap_aip)) 797 return false; 798 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 799 if (!test_bit(gpuidx, prange->bitmap_access)) 800 return false; 801 } else { 802 if (!test_bit(gpuidx, prange->bitmap_aip)) 803 return false; 804 } 805 break; 806 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 807 if ((prange->flags & attrs[i].value) != attrs[i].value) 808 return false; 809 break; 810 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 811 if ((prange->flags & attrs[i].value) != 0) 812 return false; 813 break; 814 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 815 if (prange->granularity != attrs[i].value) 816 return false; 817 break; 818 default: 819 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 820 } 821 } 822 823 return true; 824 } 825 826 /** 827 * svm_range_debug_dump - print all range information from svms 828 * @svms: svm range list header 829 * 830 * debug output svm range start, end, prefetch location from svms 831 * interval tree and link list 832 * 833 * Context: The caller must hold svms->lock 834 */ 835 static void svm_range_debug_dump(struct svm_range_list *svms) 836 { 837 struct interval_tree_node *node; 838 struct svm_range *prange; 839 840 pr_debug("dump svms 0x%p list\n", svms); 841 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 842 843 list_for_each_entry(prange, &svms->list, list) { 844 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 845 prange, prange->start, prange->npages, 846 prange->start + prange->npages - 1, 847 prange->actual_loc); 848 } 849 850 pr_debug("dump svms 0x%p interval tree\n", svms); 851 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 852 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 853 while (node) { 854 prange = container_of(node, struct svm_range, it_node); 855 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 856 prange, prange->start, prange->npages, 857 prange->start + prange->npages - 1, 858 prange->actual_loc); 859 node = interval_tree_iter_next(node, 0, ~0ULL); 860 } 861 } 862 863 static int 864 svm_range_split_array(void *ppnew, void *ppold, size_t size, 865 uint64_t old_start, uint64_t old_n, 866 uint64_t new_start, uint64_t new_n) 867 { 868 unsigned char *new, *old, *pold; 869 uint64_t d; 870 871 if (!ppold) 872 return 0; 873 pold = *(unsigned char **)ppold; 874 if (!pold) 875 return 0; 876 877 new = kvmalloc_array(new_n, size, GFP_KERNEL); 878 if (!new) 879 return -ENOMEM; 880 881 d = (new_start - old_start) * size; 882 memcpy(new, pold + d, new_n * size); 883 884 old = kvmalloc_array(old_n, size, GFP_KERNEL); 885 if (!old) { 886 kvfree(new); 887 return -ENOMEM; 888 } 889 890 d = (new_start == old_start) ? new_n * size : 0; 891 memcpy(old, pold + d, old_n * size); 892 893 kvfree(pold); 894 *(void **)ppold = old; 895 *(void **)ppnew = new; 896 897 return 0; 898 } 899 900 static int 901 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 902 uint64_t start, uint64_t last) 903 { 904 uint64_t npages = last - start + 1; 905 int i, r; 906 907 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 908 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 909 sizeof(*old->dma_addr[i]), old->start, 910 npages, new->start, new->npages); 911 if (r) 912 return r; 913 } 914 915 return 0; 916 } 917 918 static int 919 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 920 uint64_t start, uint64_t last) 921 { 922 uint64_t npages = last - start + 1; 923 924 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 925 new->svms, new, new->start, start, last); 926 927 if (new->start == old->start) { 928 new->offset = old->offset; 929 old->offset += new->npages; 930 } else { 931 new->offset = old->offset + npages; 932 } 933 934 new->svm_bo = svm_range_bo_ref(old->svm_bo); 935 new->ttm_res = old->ttm_res; 936 937 spin_lock(&new->svm_bo->list_lock); 938 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 939 spin_unlock(&new->svm_bo->list_lock); 940 941 return 0; 942 } 943 944 /** 945 * svm_range_split_adjust - split range and adjust 946 * 947 * @new: new range 948 * @old: the old range 949 * @start: the old range adjust to start address in pages 950 * @last: the old range adjust to last address in pages 951 * 952 * Copy system memory dma_addr or vram ttm_res in old range to new 953 * range from new_start up to size new->npages, the remaining old range is from 954 * start to last 955 * 956 * Return: 957 * 0 - OK, -ENOMEM - out of memory 958 */ 959 static int 960 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 961 uint64_t start, uint64_t last) 962 { 963 int r; 964 965 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 966 new->svms, new->start, old->start, old->last, start, last); 967 968 if (new->start < old->start || 969 new->last > old->last) { 970 WARN_ONCE(1, "invalid new range start or last\n"); 971 return -EINVAL; 972 } 973 974 r = svm_range_split_pages(new, old, start, last); 975 if (r) 976 return r; 977 978 if (old->actual_loc && old->ttm_res) { 979 r = svm_range_split_nodes(new, old, start, last); 980 if (r) 981 return r; 982 } 983 984 old->npages = last - start + 1; 985 old->start = start; 986 old->last = last; 987 new->flags = old->flags; 988 new->preferred_loc = old->preferred_loc; 989 new->prefetch_loc = old->prefetch_loc; 990 new->actual_loc = old->actual_loc; 991 new->granularity = old->granularity; 992 new->mapped_to_gpu = old->mapped_to_gpu; 993 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 994 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 995 996 return 0; 997 } 998 999 /** 1000 * svm_range_split - split a range in 2 ranges 1001 * 1002 * @prange: the svm range to split 1003 * @start: the remaining range start address in pages 1004 * @last: the remaining range last address in pages 1005 * @new: the result new range generated 1006 * 1007 * Two cases only: 1008 * case 1: if start == prange->start 1009 * prange ==> prange[start, last] 1010 * new range [last + 1, prange->last] 1011 * 1012 * case 2: if last == prange->last 1013 * prange ==> prange[start, last] 1014 * new range [prange->start, start - 1] 1015 * 1016 * Return: 1017 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1018 */ 1019 static int 1020 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1021 struct svm_range **new) 1022 { 1023 uint64_t old_start = prange->start; 1024 uint64_t old_last = prange->last; 1025 struct svm_range_list *svms; 1026 int r = 0; 1027 1028 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1029 old_start, old_last, start, last); 1030 1031 if (old_start != start && old_last != last) 1032 return -EINVAL; 1033 if (start < old_start || last > old_last) 1034 return -EINVAL; 1035 1036 svms = prange->svms; 1037 if (old_start == start) 1038 *new = svm_range_new(svms, last + 1, old_last, false); 1039 else 1040 *new = svm_range_new(svms, old_start, start - 1, false); 1041 if (!*new) 1042 return -ENOMEM; 1043 1044 r = svm_range_split_adjust(*new, prange, start, last); 1045 if (r) { 1046 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1047 r, old_start, old_last, start, last); 1048 svm_range_free(*new, false); 1049 *new = NULL; 1050 } 1051 1052 return r; 1053 } 1054 1055 static int 1056 svm_range_split_tail(struct svm_range *prange, 1057 uint64_t new_last, struct list_head *insert_list) 1058 { 1059 struct svm_range *tail; 1060 int r = svm_range_split(prange, prange->start, new_last, &tail); 1061 1062 if (!r) 1063 list_add(&tail->list, insert_list); 1064 return r; 1065 } 1066 1067 static int 1068 svm_range_split_head(struct svm_range *prange, 1069 uint64_t new_start, struct list_head *insert_list) 1070 { 1071 struct svm_range *head; 1072 int r = svm_range_split(prange, new_start, prange->last, &head); 1073 1074 if (!r) 1075 list_add(&head->list, insert_list); 1076 return r; 1077 } 1078 1079 static void 1080 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm, 1081 struct svm_range *pchild, enum svm_work_list_ops op) 1082 { 1083 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1084 pchild, pchild->start, pchild->last, prange, op); 1085 1086 pchild->work_item.mm = mm; 1087 pchild->work_item.op = op; 1088 list_add_tail(&pchild->child_list, &prange->child_list); 1089 } 1090 1091 /** 1092 * svm_range_split_by_granularity - collect ranges within granularity boundary 1093 * 1094 * @p: the process with svms list 1095 * @mm: mm structure 1096 * @addr: the vm fault address in pages, to split the prange 1097 * @parent: parent range if prange is from child list 1098 * @prange: prange to split 1099 * 1100 * Trims @prange to be a single aligned block of prange->granularity if 1101 * possible. The head and tail are added to the child_list in @parent. 1102 * 1103 * Context: caller must hold mmap_read_lock and prange->lock 1104 * 1105 * Return: 1106 * 0 - OK, otherwise error code 1107 */ 1108 int 1109 svm_range_split_by_granularity(struct kfd_process *p, struct mm_struct *mm, 1110 unsigned long addr, struct svm_range *parent, 1111 struct svm_range *prange) 1112 { 1113 struct svm_range *head, *tail; 1114 unsigned long start, last, size; 1115 int r; 1116 1117 /* Align splited range start and size to granularity size, then a single 1118 * PTE will be used for whole range, this reduces the number of PTE 1119 * updated and the L1 TLB space used for translation. 1120 */ 1121 size = 1UL << prange->granularity; 1122 start = ALIGN_DOWN(addr, size); 1123 last = ALIGN(addr + 1, size) - 1; 1124 1125 pr_debug("svms 0x%p split [0x%lx 0x%lx] to [0x%lx 0x%lx] size 0x%lx\n", 1126 prange->svms, prange->start, prange->last, start, last, size); 1127 1128 if (start > prange->start) { 1129 r = svm_range_split(prange, start, prange->last, &head); 1130 if (r) 1131 return r; 1132 svm_range_add_child(parent, mm, head, SVM_OP_ADD_RANGE); 1133 } 1134 1135 if (last < prange->last) { 1136 r = svm_range_split(prange, prange->start, last, &tail); 1137 if (r) 1138 return r; 1139 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 1140 } 1141 1142 /* xnack on, update mapping on GPUs with ACCESS_IN_PLACE */ 1143 if (p->xnack_enabled && prange->work_item.op == SVM_OP_ADD_RANGE) { 1144 prange->work_item.op = SVM_OP_ADD_RANGE_AND_MAP; 1145 pr_debug("change prange 0x%p [0x%lx 0x%lx] op %d\n", 1146 prange, prange->start, prange->last, 1147 SVM_OP_ADD_RANGE_AND_MAP); 1148 } 1149 return 0; 1150 } 1151 1152 static uint64_t 1153 svm_range_get_pte_flags(struct amdgpu_device *adev, struct svm_range *prange, 1154 int domain) 1155 { 1156 struct amdgpu_device *bo_adev; 1157 uint32_t flags = prange->flags; 1158 uint32_t mapping_flags = 0; 1159 uint64_t pte_flags; 1160 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1161 bool coherent = flags & KFD_IOCTL_SVM_FLAG_COHERENT; 1162 1163 if (domain == SVM_RANGE_VRAM_DOMAIN) 1164 bo_adev = amdgpu_ttm_adev(prange->svm_bo->bo->tbo.bdev); 1165 1166 switch (KFD_GC_VERSION(adev->kfd.dev)) { 1167 case IP_VERSION(9, 4, 1): 1168 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1169 if (bo_adev == adev) { 1170 mapping_flags |= coherent ? 1171 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1172 } else { 1173 mapping_flags |= coherent ? 1174 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1175 if (amdgpu_xgmi_same_hive(adev, bo_adev)) 1176 snoop = true; 1177 } 1178 } else { 1179 mapping_flags |= coherent ? 1180 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1181 } 1182 break; 1183 case IP_VERSION(9, 4, 2): 1184 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1185 if (bo_adev == adev) { 1186 mapping_flags |= coherent ? 1187 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1188 if (adev->gmc.xgmi.connected_to_cpu) 1189 snoop = true; 1190 } else { 1191 mapping_flags |= coherent ? 1192 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1193 if (amdgpu_xgmi_same_hive(adev, bo_adev)) 1194 snoop = true; 1195 } 1196 } else { 1197 mapping_flags |= coherent ? 1198 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1199 } 1200 break; 1201 default: 1202 mapping_flags |= coherent ? 1203 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1204 } 1205 1206 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE; 1207 1208 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO) 1209 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE; 1210 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1211 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1212 1213 pte_flags = AMDGPU_PTE_VALID; 1214 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1215 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1216 1217 pte_flags |= amdgpu_gem_va_map_flags(adev, mapping_flags); 1218 return pte_flags; 1219 } 1220 1221 static int 1222 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1223 uint64_t start, uint64_t last, 1224 struct dma_fence **fence) 1225 { 1226 uint64_t init_pte_value = 0; 1227 1228 pr_debug("[0x%llx 0x%llx]\n", start, last); 1229 1230 return amdgpu_vm_update_range(adev, vm, false, true, true, NULL, start, 1231 last, init_pte_value, 0, 0, NULL, NULL, 1232 fence); 1233 } 1234 1235 static int 1236 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1237 unsigned long last, uint32_t trigger) 1238 { 1239 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1240 struct kfd_process_device *pdd; 1241 struct dma_fence *fence = NULL; 1242 struct kfd_process *p; 1243 uint32_t gpuidx; 1244 int r = 0; 1245 1246 if (!prange->mapped_to_gpu) { 1247 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1248 prange, prange->start, prange->last); 1249 return 0; 1250 } 1251 1252 if (prange->start == start && prange->last == last) { 1253 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1254 prange->mapped_to_gpu = false; 1255 } 1256 1257 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1258 MAX_GPU_INSTANCE); 1259 p = container_of(prange->svms, struct kfd_process, svms); 1260 1261 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1262 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1263 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1264 if (!pdd) { 1265 pr_debug("failed to find device idx %d\n", gpuidx); 1266 return -EINVAL; 1267 } 1268 1269 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1270 start, last, trigger); 1271 1272 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1273 drm_priv_to_vm(pdd->drm_priv), 1274 start, last, &fence); 1275 if (r) 1276 break; 1277 1278 if (fence) { 1279 r = dma_fence_wait(fence, false); 1280 dma_fence_put(fence); 1281 fence = NULL; 1282 if (r) 1283 break; 1284 } 1285 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1286 } 1287 1288 return r; 1289 } 1290 1291 static int 1292 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1293 unsigned long offset, unsigned long npages, bool readonly, 1294 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1295 struct dma_fence **fence, bool flush_tlb) 1296 { 1297 struct amdgpu_device *adev = pdd->dev->adev; 1298 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1299 uint64_t pte_flags; 1300 unsigned long last_start; 1301 int last_domain; 1302 int r = 0; 1303 int64_t i, j; 1304 1305 last_start = prange->start + offset; 1306 1307 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1308 last_start, last_start + npages - 1, readonly); 1309 1310 for (i = offset; i < offset + npages; i++) { 1311 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1312 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1313 1314 /* Collect all pages in the same address range and memory domain 1315 * that can be mapped with a single call to update mapping. 1316 */ 1317 if (i < offset + npages - 1 && 1318 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1319 continue; 1320 1321 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1322 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1323 1324 pte_flags = svm_range_get_pte_flags(adev, prange, last_domain); 1325 if (readonly) 1326 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1327 1328 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1329 prange->svms, last_start, prange->start + i, 1330 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1331 pte_flags); 1332 1333 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, NULL, 1334 last_start, prange->start + i, 1335 pte_flags, 1336 (last_start - prange->start) << PAGE_SHIFT, 1337 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1338 NULL, dma_addr, &vm->last_update); 1339 1340 for (j = last_start - prange->start; j <= i; j++) 1341 dma_addr[j] |= last_domain; 1342 1343 if (r) { 1344 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1345 goto out; 1346 } 1347 last_start = prange->start + i + 1; 1348 } 1349 1350 r = amdgpu_vm_update_pdes(adev, vm, false); 1351 if (r) { 1352 pr_debug("failed %d to update directories 0x%lx\n", r, 1353 prange->start); 1354 goto out; 1355 } 1356 1357 if (fence) 1358 *fence = dma_fence_get(vm->last_update); 1359 1360 out: 1361 return r; 1362 } 1363 1364 static int 1365 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1366 unsigned long npages, bool readonly, 1367 unsigned long *bitmap, bool wait, bool flush_tlb) 1368 { 1369 struct kfd_process_device *pdd; 1370 struct amdgpu_device *bo_adev; 1371 struct kfd_process *p; 1372 struct dma_fence *fence = NULL; 1373 uint32_t gpuidx; 1374 int r = 0; 1375 1376 if (prange->svm_bo && prange->ttm_res) 1377 bo_adev = amdgpu_ttm_adev(prange->svm_bo->bo->tbo.bdev); 1378 else 1379 bo_adev = NULL; 1380 1381 p = container_of(prange->svms, struct kfd_process, svms); 1382 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1383 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1384 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1385 if (!pdd) { 1386 pr_debug("failed to find device idx %d\n", gpuidx); 1387 return -EINVAL; 1388 } 1389 1390 pdd = kfd_bind_process_to_device(pdd->dev, p); 1391 if (IS_ERR(pdd)) 1392 return -EINVAL; 1393 1394 if (bo_adev && pdd->dev->adev != bo_adev && 1395 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1396 pr_debug("cannot map to device idx %d\n", gpuidx); 1397 continue; 1398 } 1399 1400 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1401 prange->dma_addr[gpuidx], 1402 bo_adev, wait ? &fence : NULL, 1403 flush_tlb); 1404 if (r) 1405 break; 1406 1407 if (fence) { 1408 r = dma_fence_wait(fence, false); 1409 dma_fence_put(fence); 1410 fence = NULL; 1411 if (r) { 1412 pr_debug("failed %d to dma fence wait\n", r); 1413 break; 1414 } 1415 } 1416 1417 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1418 } 1419 1420 return r; 1421 } 1422 1423 struct svm_validate_context { 1424 struct kfd_process *process; 1425 struct svm_range *prange; 1426 bool intr; 1427 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1428 struct ttm_validate_buffer tv[MAX_GPU_INSTANCE]; 1429 struct list_head validate_list; 1430 struct ww_acquire_ctx ticket; 1431 }; 1432 1433 static int svm_range_reserve_bos(struct svm_validate_context *ctx) 1434 { 1435 struct kfd_process_device *pdd; 1436 struct amdgpu_vm *vm; 1437 uint32_t gpuidx; 1438 int r; 1439 1440 INIT_LIST_HEAD(&ctx->validate_list); 1441 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1442 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1443 if (!pdd) { 1444 pr_debug("failed to find device idx %d\n", gpuidx); 1445 return -EINVAL; 1446 } 1447 vm = drm_priv_to_vm(pdd->drm_priv); 1448 1449 ctx->tv[gpuidx].bo = &vm->root.bo->tbo; 1450 ctx->tv[gpuidx].num_shared = 4; 1451 list_add(&ctx->tv[gpuidx].head, &ctx->validate_list); 1452 } 1453 1454 r = ttm_eu_reserve_buffers(&ctx->ticket, &ctx->validate_list, 1455 ctx->intr, NULL); 1456 if (r) { 1457 pr_debug("failed %d to reserve bo\n", r); 1458 return r; 1459 } 1460 1461 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1462 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1463 if (!pdd) { 1464 pr_debug("failed to find device idx %d\n", gpuidx); 1465 r = -EINVAL; 1466 goto unreserve_out; 1467 } 1468 1469 r = amdgpu_vm_validate_pt_bos(pdd->dev->adev, 1470 drm_priv_to_vm(pdd->drm_priv), 1471 svm_range_bo_validate, NULL); 1472 if (r) { 1473 pr_debug("failed %d validate pt bos\n", r); 1474 goto unreserve_out; 1475 } 1476 } 1477 1478 return 0; 1479 1480 unreserve_out: 1481 ttm_eu_backoff_reservation(&ctx->ticket, &ctx->validate_list); 1482 return r; 1483 } 1484 1485 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1486 { 1487 ttm_eu_backoff_reservation(&ctx->ticket, &ctx->validate_list); 1488 } 1489 1490 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1491 { 1492 struct kfd_process_device *pdd; 1493 1494 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1495 1496 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1497 } 1498 1499 /* 1500 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1501 * 1502 * To prevent concurrent destruction or change of range attributes, the 1503 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1504 * because that would block concurrent evictions and lead to deadlocks. To 1505 * serialize concurrent migrations or validations of the same range, the 1506 * prange->migrate_mutex must be held. 1507 * 1508 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1509 * eviction fence. 1510 * 1511 * The following sequence ensures race-free validation and GPU mapping: 1512 * 1513 * 1. Reserve page table (and SVM BO if range is in VRAM) 1514 * 2. hmm_range_fault to get page addresses (if system memory) 1515 * 3. DMA-map pages (if system memory) 1516 * 4-a. Take notifier lock 1517 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1518 * 4-c. Check that the range was not split or otherwise invalidated 1519 * 4-d. Update GPU page table 1520 * 4.e. Release notifier lock 1521 * 5. Release page table (and SVM BO) reservation 1522 */ 1523 static int svm_range_validate_and_map(struct mm_struct *mm, 1524 struct svm_range *prange, int32_t gpuidx, 1525 bool intr, bool wait, bool flush_tlb) 1526 { 1527 struct svm_validate_context ctx; 1528 unsigned long start, end, addr; 1529 struct kfd_process *p; 1530 void *owner; 1531 int32_t idx; 1532 int r = 0; 1533 1534 ctx.process = container_of(prange->svms, struct kfd_process, svms); 1535 ctx.prange = prange; 1536 ctx.intr = intr; 1537 1538 if (gpuidx < MAX_GPU_INSTANCE) { 1539 bitmap_zero(ctx.bitmap, MAX_GPU_INSTANCE); 1540 bitmap_set(ctx.bitmap, gpuidx, 1); 1541 } else if (ctx.process->xnack_enabled) { 1542 bitmap_copy(ctx.bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1543 1544 /* If prefetch range to GPU, or GPU retry fault migrate range to 1545 * GPU, which has ACCESS attribute to the range, create mapping 1546 * on that GPU. 1547 */ 1548 if (prange->actual_loc) { 1549 gpuidx = kfd_process_gpuidx_from_gpuid(ctx.process, 1550 prange->actual_loc); 1551 if (gpuidx < 0) { 1552 WARN_ONCE(1, "failed get device by id 0x%x\n", 1553 prange->actual_loc); 1554 return -EINVAL; 1555 } 1556 if (test_bit(gpuidx, prange->bitmap_access)) 1557 bitmap_set(ctx.bitmap, gpuidx, 1); 1558 } 1559 } else { 1560 bitmap_or(ctx.bitmap, prange->bitmap_access, 1561 prange->bitmap_aip, MAX_GPU_INSTANCE); 1562 } 1563 1564 if (bitmap_empty(ctx.bitmap, MAX_GPU_INSTANCE)) { 1565 if (!prange->mapped_to_gpu) 1566 return 0; 1567 1568 bitmap_copy(ctx.bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1569 } 1570 1571 if (prange->actual_loc && !prange->ttm_res) { 1572 /* This should never happen. actual_loc gets set by 1573 * svm_migrate_ram_to_vram after allocating a BO. 1574 */ 1575 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1576 return -EINVAL; 1577 } 1578 1579 svm_range_reserve_bos(&ctx); 1580 1581 p = container_of(prange->svms, struct kfd_process, svms); 1582 owner = kfd_svm_page_owner(p, find_first_bit(ctx.bitmap, 1583 MAX_GPU_INSTANCE)); 1584 for_each_set_bit(idx, ctx.bitmap, MAX_GPU_INSTANCE) { 1585 if (kfd_svm_page_owner(p, idx) != owner) { 1586 owner = NULL; 1587 break; 1588 } 1589 } 1590 1591 start = prange->start << PAGE_SHIFT; 1592 end = (prange->last + 1) << PAGE_SHIFT; 1593 for (addr = start; addr < end && !r; ) { 1594 struct hmm_range *hmm_range; 1595 struct vm_area_struct *vma; 1596 unsigned long next; 1597 unsigned long offset; 1598 unsigned long npages; 1599 bool readonly; 1600 1601 vma = vma_lookup(mm, addr); 1602 if (!vma) { 1603 r = -EFAULT; 1604 goto unreserve_out; 1605 } 1606 readonly = !(vma->vm_flags & VM_WRITE); 1607 1608 next = min(vma->vm_end, end); 1609 npages = (next - addr) >> PAGE_SHIFT; 1610 WRITE_ONCE(p->svms.faulting_task, current); 1611 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1612 readonly, owner, NULL, 1613 &hmm_range); 1614 WRITE_ONCE(p->svms.faulting_task, NULL); 1615 if (r) { 1616 pr_debug("failed %d to get svm range pages\n", r); 1617 goto unreserve_out; 1618 } 1619 1620 offset = (addr - start) >> PAGE_SHIFT; 1621 r = svm_range_dma_map(prange, ctx.bitmap, offset, npages, 1622 hmm_range->hmm_pfns); 1623 if (r) { 1624 pr_debug("failed %d to dma map range\n", r); 1625 goto unreserve_out; 1626 } 1627 1628 svm_range_lock(prange); 1629 if (amdgpu_hmm_range_get_pages_done(hmm_range)) { 1630 pr_debug("hmm update the range, need validate again\n"); 1631 r = -EAGAIN; 1632 goto unlock_out; 1633 } 1634 if (!list_empty(&prange->child_list)) { 1635 pr_debug("range split by unmap in parallel, validate again\n"); 1636 r = -EAGAIN; 1637 goto unlock_out; 1638 } 1639 1640 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1641 ctx.bitmap, wait, flush_tlb); 1642 1643 unlock_out: 1644 svm_range_unlock(prange); 1645 1646 addr = next; 1647 } 1648 1649 if (addr == end) { 1650 prange->validated_once = true; 1651 prange->mapped_to_gpu = true; 1652 } 1653 1654 unreserve_out: 1655 svm_range_unreserve_bos(&ctx); 1656 1657 if (!r) 1658 prange->validate_timestamp = ktime_get_boottime(); 1659 1660 return r; 1661 } 1662 1663 /** 1664 * svm_range_list_lock_and_flush_work - flush pending deferred work 1665 * 1666 * @svms: the svm range list 1667 * @mm: the mm structure 1668 * 1669 * Context: Returns with mmap write lock held, pending deferred work flushed 1670 * 1671 */ 1672 void 1673 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1674 struct mm_struct *mm) 1675 { 1676 retry_flush_work: 1677 flush_work(&svms->deferred_list_work); 1678 mmap_write_lock(mm); 1679 1680 if (list_empty(&svms->deferred_range_list)) 1681 return; 1682 mmap_write_unlock(mm); 1683 pr_debug("retry flush\n"); 1684 goto retry_flush_work; 1685 } 1686 1687 static void svm_range_restore_work(struct work_struct *work) 1688 { 1689 struct delayed_work *dwork = to_delayed_work(work); 1690 struct amdkfd_process_info *process_info; 1691 struct svm_range_list *svms; 1692 struct svm_range *prange; 1693 struct kfd_process *p; 1694 struct mm_struct *mm; 1695 int evicted_ranges; 1696 int invalid; 1697 int r; 1698 1699 svms = container_of(dwork, struct svm_range_list, restore_work); 1700 evicted_ranges = atomic_read(&svms->evicted_ranges); 1701 if (!evicted_ranges) 1702 return; 1703 1704 pr_debug("restore svm ranges\n"); 1705 1706 p = container_of(svms, struct kfd_process, svms); 1707 process_info = p->kgd_process_info; 1708 1709 /* Keep mm reference when svm_range_validate_and_map ranges */ 1710 mm = get_task_mm(p->lead_thread); 1711 if (!mm) { 1712 pr_debug("svms 0x%p process mm gone\n", svms); 1713 return; 1714 } 1715 1716 mutex_lock(&process_info->lock); 1717 svm_range_list_lock_and_flush_work(svms, mm); 1718 mutex_lock(&svms->lock); 1719 1720 evicted_ranges = atomic_read(&svms->evicted_ranges); 1721 1722 list_for_each_entry(prange, &svms->list, list) { 1723 invalid = atomic_read(&prange->invalid); 1724 if (!invalid) 1725 continue; 1726 1727 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1728 prange->svms, prange, prange->start, prange->last, 1729 invalid); 1730 1731 /* 1732 * If range is migrating, wait for migration is done. 1733 */ 1734 mutex_lock(&prange->migrate_mutex); 1735 1736 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 1737 false, true, false); 1738 if (r) 1739 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1740 prange->start); 1741 1742 mutex_unlock(&prange->migrate_mutex); 1743 if (r) 1744 goto out_reschedule; 1745 1746 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1747 goto out_reschedule; 1748 } 1749 1750 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1751 evicted_ranges) 1752 goto out_reschedule; 1753 1754 evicted_ranges = 0; 1755 1756 r = kgd2kfd_resume_mm(mm); 1757 if (r) { 1758 /* No recovery from this failure. Probably the CP is 1759 * hanging. No point trying again. 1760 */ 1761 pr_debug("failed %d to resume KFD\n", r); 1762 } 1763 1764 pr_debug("restore svm ranges successfully\n"); 1765 1766 out_reschedule: 1767 mutex_unlock(&svms->lock); 1768 mmap_write_unlock(mm); 1769 mutex_unlock(&process_info->lock); 1770 1771 /* If validation failed, reschedule another attempt */ 1772 if (evicted_ranges) { 1773 pr_debug("reschedule to restore svm range\n"); 1774 schedule_delayed_work(&svms->restore_work, 1775 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1776 1777 kfd_smi_event_queue_restore_rescheduled(mm); 1778 } 1779 mmput(mm); 1780 } 1781 1782 /** 1783 * svm_range_evict - evict svm range 1784 * @prange: svm range structure 1785 * @mm: current process mm_struct 1786 * @start: starting process queue number 1787 * @last: last process queue number 1788 * 1789 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1790 * return to let CPU evict the buffer and proceed CPU pagetable update. 1791 * 1792 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1793 * If invalidation happens while restore work is running, restore work will 1794 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1795 * the queues. 1796 */ 1797 static int 1798 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1799 unsigned long start, unsigned long last, 1800 enum mmu_notifier_event event) 1801 { 1802 struct svm_range_list *svms = prange->svms; 1803 struct svm_range *pchild; 1804 struct kfd_process *p; 1805 int r = 0; 1806 1807 p = container_of(svms, struct kfd_process, svms); 1808 1809 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1810 svms, prange->start, prange->last, start, last); 1811 1812 if (!p->xnack_enabled || 1813 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 1814 int evicted_ranges; 1815 bool mapped = prange->mapped_to_gpu; 1816 1817 list_for_each_entry(pchild, &prange->child_list, child_list) { 1818 if (!pchild->mapped_to_gpu) 1819 continue; 1820 mapped = true; 1821 mutex_lock_nested(&pchild->lock, 1); 1822 if (pchild->start <= last && pchild->last >= start) { 1823 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 1824 pchild->start, pchild->last); 1825 atomic_inc(&pchild->invalid); 1826 } 1827 mutex_unlock(&pchild->lock); 1828 } 1829 1830 if (!mapped) 1831 return r; 1832 1833 if (prange->start <= last && prange->last >= start) 1834 atomic_inc(&prange->invalid); 1835 1836 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 1837 if (evicted_ranges != 1) 1838 return r; 1839 1840 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 1841 prange->svms, prange->start, prange->last); 1842 1843 /* First eviction, stop the queues */ 1844 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 1845 if (r) 1846 pr_debug("failed to quiesce KFD\n"); 1847 1848 pr_debug("schedule to restore svm %p ranges\n", svms); 1849 schedule_delayed_work(&svms->restore_work, 1850 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1851 } else { 1852 unsigned long s, l; 1853 uint32_t trigger; 1854 1855 if (event == MMU_NOTIFY_MIGRATE) 1856 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 1857 else 1858 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 1859 1860 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 1861 prange->svms, start, last); 1862 list_for_each_entry(pchild, &prange->child_list, child_list) { 1863 mutex_lock_nested(&pchild->lock, 1); 1864 s = max(start, pchild->start); 1865 l = min(last, pchild->last); 1866 if (l >= s) 1867 svm_range_unmap_from_gpus(pchild, s, l, trigger); 1868 mutex_unlock(&pchild->lock); 1869 } 1870 s = max(start, prange->start); 1871 l = min(last, prange->last); 1872 if (l >= s) 1873 svm_range_unmap_from_gpus(prange, s, l, trigger); 1874 } 1875 1876 return r; 1877 } 1878 1879 static struct svm_range *svm_range_clone(struct svm_range *old) 1880 { 1881 struct svm_range *new; 1882 1883 new = svm_range_new(old->svms, old->start, old->last, false); 1884 if (!new) 1885 return NULL; 1886 1887 if (old->svm_bo) { 1888 new->ttm_res = old->ttm_res; 1889 new->offset = old->offset; 1890 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1891 spin_lock(&new->svm_bo->list_lock); 1892 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1893 spin_unlock(&new->svm_bo->list_lock); 1894 } 1895 new->flags = old->flags; 1896 new->preferred_loc = old->preferred_loc; 1897 new->prefetch_loc = old->prefetch_loc; 1898 new->actual_loc = old->actual_loc; 1899 new->granularity = old->granularity; 1900 new->mapped_to_gpu = old->mapped_to_gpu; 1901 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1902 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1903 1904 return new; 1905 } 1906 1907 void svm_range_set_max_pages(struct amdgpu_device *adev) 1908 { 1909 uint64_t max_pages; 1910 uint64_t pages, _pages; 1911 1912 /* 1/32 VRAM size in pages */ 1913 pages = adev->gmc.real_vram_size >> 17; 1914 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 1915 pages = rounddown_pow_of_two(pages); 1916 do { 1917 max_pages = READ_ONCE(max_svm_range_pages); 1918 _pages = min_not_zero(max_pages, pages); 1919 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 1920 } 1921 1922 static int 1923 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 1924 uint64_t max_pages, struct list_head *insert_list, 1925 struct list_head *update_list) 1926 { 1927 struct svm_range *prange; 1928 uint64_t l; 1929 1930 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 1931 max_pages, start, last); 1932 1933 while (last >= start) { 1934 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 1935 1936 prange = svm_range_new(svms, start, l, true); 1937 if (!prange) 1938 return -ENOMEM; 1939 list_add(&prange->list, insert_list); 1940 list_add(&prange->update_list, update_list); 1941 1942 start = l + 1; 1943 } 1944 return 0; 1945 } 1946 1947 /** 1948 * svm_range_add - add svm range and handle overlap 1949 * @p: the range add to this process svms 1950 * @start: page size aligned 1951 * @size: page size aligned 1952 * @nattr: number of attributes 1953 * @attrs: array of attributes 1954 * @update_list: output, the ranges need validate and update GPU mapping 1955 * @insert_list: output, the ranges need insert to svms 1956 * @remove_list: output, the ranges are replaced and need remove from svms 1957 * 1958 * Check if the virtual address range has overlap with any existing ranges, 1959 * split partly overlapping ranges and add new ranges in the gaps. All changes 1960 * should be applied to the range_list and interval tree transactionally. If 1961 * any range split or allocation fails, the entire update fails. Therefore any 1962 * existing overlapping svm_ranges are cloned and the original svm_ranges left 1963 * unchanged. 1964 * 1965 * If the transaction succeeds, the caller can update and insert clones and 1966 * new ranges, then free the originals. 1967 * 1968 * Otherwise the caller can free the clones and new ranges, while the old 1969 * svm_ranges remain unchanged. 1970 * 1971 * Context: Process context, caller must hold svms->lock 1972 * 1973 * Return: 1974 * 0 - OK, otherwise error code 1975 */ 1976 static int 1977 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 1978 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 1979 struct list_head *update_list, struct list_head *insert_list, 1980 struct list_head *remove_list) 1981 { 1982 unsigned long last = start + size - 1UL; 1983 struct svm_range_list *svms = &p->svms; 1984 struct interval_tree_node *node; 1985 struct svm_range *prange; 1986 struct svm_range *tmp; 1987 struct list_head new_list; 1988 int r = 0; 1989 1990 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 1991 1992 INIT_LIST_HEAD(update_list); 1993 INIT_LIST_HEAD(insert_list); 1994 INIT_LIST_HEAD(remove_list); 1995 INIT_LIST_HEAD(&new_list); 1996 1997 node = interval_tree_iter_first(&svms->objects, start, last); 1998 while (node) { 1999 struct interval_tree_node *next; 2000 unsigned long next_start; 2001 2002 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2003 node->last); 2004 2005 prange = container_of(node, struct svm_range, it_node); 2006 next = interval_tree_iter_next(node, start, last); 2007 next_start = min(node->last, last) + 1; 2008 2009 if (svm_range_is_same_attrs(p, prange, nattr, attrs)) { 2010 /* nothing to do */ 2011 } else if (node->start < start || node->last > last) { 2012 /* node intersects the update range and its attributes 2013 * will change. Clone and split it, apply updates only 2014 * to the overlapping part 2015 */ 2016 struct svm_range *old = prange; 2017 2018 prange = svm_range_clone(old); 2019 if (!prange) { 2020 r = -ENOMEM; 2021 goto out; 2022 } 2023 2024 list_add(&old->update_list, remove_list); 2025 list_add(&prange->list, insert_list); 2026 list_add(&prange->update_list, update_list); 2027 2028 if (node->start < start) { 2029 pr_debug("change old range start\n"); 2030 r = svm_range_split_head(prange, start, 2031 insert_list); 2032 if (r) 2033 goto out; 2034 } 2035 if (node->last > last) { 2036 pr_debug("change old range last\n"); 2037 r = svm_range_split_tail(prange, last, 2038 insert_list); 2039 if (r) 2040 goto out; 2041 } 2042 } else { 2043 /* The node is contained within start..last, 2044 * just update it 2045 */ 2046 list_add(&prange->update_list, update_list); 2047 } 2048 2049 /* insert a new node if needed */ 2050 if (node->start > start) { 2051 r = svm_range_split_new(svms, start, node->start - 1, 2052 READ_ONCE(max_svm_range_pages), 2053 &new_list, update_list); 2054 if (r) 2055 goto out; 2056 } 2057 2058 node = next; 2059 start = next_start; 2060 } 2061 2062 /* add a final range at the end if needed */ 2063 if (start <= last) 2064 r = svm_range_split_new(svms, start, last, 2065 READ_ONCE(max_svm_range_pages), 2066 &new_list, update_list); 2067 2068 out: 2069 if (r) { 2070 list_for_each_entry_safe(prange, tmp, insert_list, list) 2071 svm_range_free(prange, false); 2072 list_for_each_entry_safe(prange, tmp, &new_list, list) 2073 svm_range_free(prange, true); 2074 } else { 2075 list_splice(&new_list, insert_list); 2076 } 2077 2078 return r; 2079 } 2080 2081 static void 2082 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2083 struct svm_range *prange) 2084 { 2085 unsigned long start; 2086 unsigned long last; 2087 2088 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2089 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2090 2091 if (prange->start == start && prange->last == last) 2092 return; 2093 2094 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2095 prange->svms, prange, start, last, prange->start, 2096 prange->last); 2097 2098 if (start != 0 && last != 0) { 2099 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2100 svm_range_remove_notifier(prange); 2101 } 2102 prange->it_node.start = prange->start; 2103 prange->it_node.last = prange->last; 2104 2105 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2106 svm_range_add_notifier_locked(mm, prange); 2107 } 2108 2109 static void 2110 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2111 struct mm_struct *mm) 2112 { 2113 switch (prange->work_item.op) { 2114 case SVM_OP_NULL: 2115 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2116 svms, prange, prange->start, prange->last); 2117 break; 2118 case SVM_OP_UNMAP_RANGE: 2119 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2120 svms, prange, prange->start, prange->last); 2121 svm_range_unlink(prange); 2122 svm_range_remove_notifier(prange); 2123 svm_range_free(prange, true); 2124 break; 2125 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2126 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2127 svms, prange, prange->start, prange->last); 2128 svm_range_update_notifier_and_interval_tree(mm, prange); 2129 break; 2130 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2131 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2132 svms, prange, prange->start, prange->last); 2133 svm_range_update_notifier_and_interval_tree(mm, prange); 2134 /* TODO: implement deferred validation and mapping */ 2135 break; 2136 case SVM_OP_ADD_RANGE: 2137 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2138 prange->start, prange->last); 2139 svm_range_add_to_svms(prange); 2140 svm_range_add_notifier_locked(mm, prange); 2141 break; 2142 case SVM_OP_ADD_RANGE_AND_MAP: 2143 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2144 prange, prange->start, prange->last); 2145 svm_range_add_to_svms(prange); 2146 svm_range_add_notifier_locked(mm, prange); 2147 /* TODO: implement deferred validation and mapping */ 2148 break; 2149 default: 2150 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2151 prange->work_item.op); 2152 } 2153 } 2154 2155 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2156 { 2157 struct kfd_process_device *pdd; 2158 struct kfd_process *p; 2159 int drain; 2160 uint32_t i; 2161 2162 p = container_of(svms, struct kfd_process, svms); 2163 2164 restart: 2165 drain = atomic_read(&svms->drain_pagefaults); 2166 if (!drain) 2167 return; 2168 2169 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2170 pdd = p->pdds[i]; 2171 if (!pdd) 2172 continue; 2173 2174 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2175 2176 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2177 pdd->dev->adev->irq.retry_cam_enabled ? 2178 &pdd->dev->adev->irq.ih : 2179 &pdd->dev->adev->irq.ih1); 2180 2181 if (pdd->dev->adev->irq.retry_cam_enabled) 2182 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2183 &pdd->dev->adev->irq.ih_soft); 2184 2185 2186 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2187 } 2188 if (atomic_cmpxchg(&svms->drain_pagefaults, drain, 0) != drain) 2189 goto restart; 2190 } 2191 2192 static void svm_range_deferred_list_work(struct work_struct *work) 2193 { 2194 struct svm_range_list *svms; 2195 struct svm_range *prange; 2196 struct mm_struct *mm; 2197 2198 svms = container_of(work, struct svm_range_list, deferred_list_work); 2199 pr_debug("enter svms 0x%p\n", svms); 2200 2201 spin_lock(&svms->deferred_list_lock); 2202 while (!list_empty(&svms->deferred_range_list)) { 2203 prange = list_first_entry(&svms->deferred_range_list, 2204 struct svm_range, deferred_list); 2205 spin_unlock(&svms->deferred_list_lock); 2206 2207 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2208 prange->start, prange->last, prange->work_item.op); 2209 2210 mm = prange->work_item.mm; 2211 retry: 2212 mmap_write_lock(mm); 2213 2214 /* Checking for the need to drain retry faults must be inside 2215 * mmap write lock to serialize with munmap notifiers. 2216 */ 2217 if (unlikely(atomic_read(&svms->drain_pagefaults))) { 2218 mmap_write_unlock(mm); 2219 svm_range_drain_retry_fault(svms); 2220 goto retry; 2221 } 2222 2223 /* Remove from deferred_list must be inside mmap write lock, for 2224 * two race cases: 2225 * 1. unmap_from_cpu may change work_item.op and add the range 2226 * to deferred_list again, cause use after free bug. 2227 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2228 * lock and continue because deferred_list is empty, but 2229 * deferred_list work is actually waiting for mmap lock. 2230 */ 2231 spin_lock(&svms->deferred_list_lock); 2232 list_del_init(&prange->deferred_list); 2233 spin_unlock(&svms->deferred_list_lock); 2234 2235 mutex_lock(&svms->lock); 2236 mutex_lock(&prange->migrate_mutex); 2237 while (!list_empty(&prange->child_list)) { 2238 struct svm_range *pchild; 2239 2240 pchild = list_first_entry(&prange->child_list, 2241 struct svm_range, child_list); 2242 pr_debug("child prange 0x%p op %d\n", pchild, 2243 pchild->work_item.op); 2244 list_del_init(&pchild->child_list); 2245 svm_range_handle_list_op(svms, pchild, mm); 2246 } 2247 mutex_unlock(&prange->migrate_mutex); 2248 2249 svm_range_handle_list_op(svms, prange, mm); 2250 mutex_unlock(&svms->lock); 2251 mmap_write_unlock(mm); 2252 2253 /* Pairs with mmget in svm_range_add_list_work */ 2254 mmput(mm); 2255 2256 spin_lock(&svms->deferred_list_lock); 2257 } 2258 spin_unlock(&svms->deferred_list_lock); 2259 pr_debug("exit svms 0x%p\n", svms); 2260 } 2261 2262 void 2263 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2264 struct mm_struct *mm, enum svm_work_list_ops op) 2265 { 2266 spin_lock(&svms->deferred_list_lock); 2267 /* if prange is on the deferred list */ 2268 if (!list_empty(&prange->deferred_list)) { 2269 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2270 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2271 if (op != SVM_OP_NULL && 2272 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2273 prange->work_item.op = op; 2274 } else { 2275 prange->work_item.op = op; 2276 2277 /* Pairs with mmput in deferred_list_work */ 2278 mmget(mm); 2279 prange->work_item.mm = mm; 2280 list_add_tail(&prange->deferred_list, 2281 &prange->svms->deferred_range_list); 2282 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2283 prange, prange->start, prange->last, op); 2284 } 2285 spin_unlock(&svms->deferred_list_lock); 2286 } 2287 2288 void schedule_deferred_list_work(struct svm_range_list *svms) 2289 { 2290 spin_lock(&svms->deferred_list_lock); 2291 if (!list_empty(&svms->deferred_range_list)) 2292 schedule_work(&svms->deferred_list_work); 2293 spin_unlock(&svms->deferred_list_lock); 2294 } 2295 2296 static void 2297 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent, 2298 struct svm_range *prange, unsigned long start, 2299 unsigned long last) 2300 { 2301 struct svm_range *head; 2302 struct svm_range *tail; 2303 2304 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2305 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2306 prange->start, prange->last); 2307 return; 2308 } 2309 if (start > prange->last || last < prange->start) 2310 return; 2311 2312 head = tail = prange; 2313 if (start > prange->start) 2314 svm_range_split(prange, prange->start, start - 1, &tail); 2315 if (last < tail->last) 2316 svm_range_split(tail, last + 1, tail->last, &head); 2317 2318 if (head != prange && tail != prange) { 2319 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2320 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 2321 } else if (tail != prange) { 2322 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE); 2323 } else if (head != prange) { 2324 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2325 } else if (parent != prange) { 2326 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2327 } 2328 } 2329 2330 static void 2331 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2332 unsigned long start, unsigned long last) 2333 { 2334 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2335 struct svm_range_list *svms; 2336 struct svm_range *pchild; 2337 struct kfd_process *p; 2338 unsigned long s, l; 2339 bool unmap_parent; 2340 2341 p = kfd_lookup_process_by_mm(mm); 2342 if (!p) 2343 return; 2344 svms = &p->svms; 2345 2346 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2347 prange, prange->start, prange->last, start, last); 2348 2349 /* Make sure pending page faults are drained in the deferred worker 2350 * before the range is freed to avoid straggler interrupts on 2351 * unmapped memory causing "phantom faults". 2352 */ 2353 atomic_inc(&svms->drain_pagefaults); 2354 2355 unmap_parent = start <= prange->start && last >= prange->last; 2356 2357 list_for_each_entry(pchild, &prange->child_list, child_list) { 2358 mutex_lock_nested(&pchild->lock, 1); 2359 s = max(start, pchild->start); 2360 l = min(last, pchild->last); 2361 if (l >= s) 2362 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2363 svm_range_unmap_split(mm, prange, pchild, start, last); 2364 mutex_unlock(&pchild->lock); 2365 } 2366 s = max(start, prange->start); 2367 l = min(last, prange->last); 2368 if (l >= s) 2369 svm_range_unmap_from_gpus(prange, s, l, trigger); 2370 svm_range_unmap_split(mm, prange, prange, start, last); 2371 2372 if (unmap_parent) 2373 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2374 else 2375 svm_range_add_list_work(svms, prange, mm, 2376 SVM_OP_UPDATE_RANGE_NOTIFIER); 2377 schedule_deferred_list_work(svms); 2378 2379 kfd_unref_process(p); 2380 } 2381 2382 /** 2383 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2384 * @mni: mmu_interval_notifier struct 2385 * @range: mmu_notifier_range struct 2386 * @cur_seq: value to pass to mmu_interval_set_seq() 2387 * 2388 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2389 * is from migration, or CPU page invalidation callback. 2390 * 2391 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2392 * work thread, and split prange if only part of prange is unmapped. 2393 * 2394 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2395 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2396 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2397 * update GPU mapping to recover. 2398 * 2399 * Context: mmap lock, notifier_invalidate_start lock are held 2400 * for invalidate event, prange lock is held if this is from migration 2401 */ 2402 static bool 2403 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2404 const struct mmu_notifier_range *range, 2405 unsigned long cur_seq) 2406 { 2407 struct svm_range *prange; 2408 unsigned long start; 2409 unsigned long last; 2410 2411 if (range->event == MMU_NOTIFY_RELEASE) 2412 return true; 2413 if (!mmget_not_zero(mni->mm)) 2414 return true; 2415 2416 start = mni->interval_tree.start; 2417 last = mni->interval_tree.last; 2418 start = max(start, range->start) >> PAGE_SHIFT; 2419 last = min(last, range->end - 1) >> PAGE_SHIFT; 2420 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2421 start, last, range->start >> PAGE_SHIFT, 2422 (range->end - 1) >> PAGE_SHIFT, 2423 mni->interval_tree.start >> PAGE_SHIFT, 2424 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2425 2426 prange = container_of(mni, struct svm_range, notifier); 2427 2428 svm_range_lock(prange); 2429 mmu_interval_set_seq(mni, cur_seq); 2430 2431 switch (range->event) { 2432 case MMU_NOTIFY_UNMAP: 2433 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2434 break; 2435 default: 2436 svm_range_evict(prange, mni->mm, start, last, range->event); 2437 break; 2438 } 2439 2440 svm_range_unlock(prange); 2441 mmput(mni->mm); 2442 2443 return true; 2444 } 2445 2446 /** 2447 * svm_range_from_addr - find svm range from fault address 2448 * @svms: svm range list header 2449 * @addr: address to search range interval tree, in pages 2450 * @parent: parent range if range is on child list 2451 * 2452 * Context: The caller must hold svms->lock 2453 * 2454 * Return: the svm_range found or NULL 2455 */ 2456 struct svm_range * 2457 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2458 struct svm_range **parent) 2459 { 2460 struct interval_tree_node *node; 2461 struct svm_range *prange; 2462 struct svm_range *pchild; 2463 2464 node = interval_tree_iter_first(&svms->objects, addr, addr); 2465 if (!node) 2466 return NULL; 2467 2468 prange = container_of(node, struct svm_range, it_node); 2469 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2470 addr, prange->start, prange->last, node->start, node->last); 2471 2472 if (addr >= prange->start && addr <= prange->last) { 2473 if (parent) 2474 *parent = prange; 2475 return prange; 2476 } 2477 list_for_each_entry(pchild, &prange->child_list, child_list) 2478 if (addr >= pchild->start && addr <= pchild->last) { 2479 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2480 addr, pchild->start, pchild->last); 2481 if (parent) 2482 *parent = prange; 2483 return pchild; 2484 } 2485 2486 return NULL; 2487 } 2488 2489 /* svm_range_best_restore_location - decide the best fault restore location 2490 * @prange: svm range structure 2491 * @adev: the GPU on which vm fault happened 2492 * 2493 * This is only called when xnack is on, to decide the best location to restore 2494 * the range mapping after GPU vm fault. Caller uses the best location to do 2495 * migration if actual loc is not best location, then update GPU page table 2496 * mapping to the best location. 2497 * 2498 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2499 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2500 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2501 * if range actual loc is cpu, best_loc is cpu 2502 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2503 * range actual loc. 2504 * Otherwise, GPU no access, best_loc is -1. 2505 * 2506 * Return: 2507 * -1 means vm fault GPU no access 2508 * 0 for CPU or GPU id 2509 */ 2510 static int32_t 2511 svm_range_best_restore_location(struct svm_range *prange, 2512 struct amdgpu_device *adev, 2513 int32_t *gpuidx) 2514 { 2515 struct amdgpu_device *bo_adev, *preferred_adev; 2516 struct kfd_process *p; 2517 uint32_t gpuid; 2518 int r; 2519 2520 p = container_of(prange->svms, struct kfd_process, svms); 2521 2522 r = kfd_process_gpuid_from_adev(p, adev, &gpuid, gpuidx); 2523 if (r < 0) { 2524 pr_debug("failed to get gpuid from kgd\n"); 2525 return -1; 2526 } 2527 2528 if (prange->preferred_loc == gpuid || 2529 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2530 return prange->preferred_loc; 2531 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2532 preferred_adev = svm_range_get_adev_by_id(prange, 2533 prange->preferred_loc); 2534 if (amdgpu_xgmi_same_hive(adev, preferred_adev)) 2535 return prange->preferred_loc; 2536 /* fall through */ 2537 } 2538 2539 if (test_bit(*gpuidx, prange->bitmap_access)) 2540 return gpuid; 2541 2542 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2543 if (!prange->actual_loc) 2544 return 0; 2545 2546 bo_adev = svm_range_get_adev_by_id(prange, prange->actual_loc); 2547 if (amdgpu_xgmi_same_hive(adev, bo_adev)) 2548 return prange->actual_loc; 2549 else 2550 return 0; 2551 } 2552 2553 return -1; 2554 } 2555 2556 static int 2557 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2558 unsigned long *start, unsigned long *last, 2559 bool *is_heap_stack) 2560 { 2561 struct vm_area_struct *vma; 2562 struct interval_tree_node *node; 2563 unsigned long start_limit, end_limit; 2564 2565 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2566 if (!vma) { 2567 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2568 return -EFAULT; 2569 } 2570 2571 *is_heap_stack = (vma->vm_start <= vma->vm_mm->brk && 2572 vma->vm_end >= vma->vm_mm->start_brk) || 2573 (vma->vm_start <= vma->vm_mm->start_stack && 2574 vma->vm_end >= vma->vm_mm->start_stack); 2575 2576 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2577 (unsigned long)ALIGN_DOWN(addr, 2UL << 8)); 2578 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2579 (unsigned long)ALIGN(addr + 1, 2UL << 8)); 2580 /* First range that starts after the fault address */ 2581 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2582 if (node) { 2583 end_limit = min(end_limit, node->start); 2584 /* Last range that ends before the fault address */ 2585 node = container_of(rb_prev(&node->rb), 2586 struct interval_tree_node, rb); 2587 } else { 2588 /* Last range must end before addr because 2589 * there was no range after addr 2590 */ 2591 node = container_of(rb_last(&p->svms.objects.rb_root), 2592 struct interval_tree_node, rb); 2593 } 2594 if (node) { 2595 if (node->last >= addr) { 2596 WARN(1, "Overlap with prev node and page fault addr\n"); 2597 return -EFAULT; 2598 } 2599 start_limit = max(start_limit, node->last + 1); 2600 } 2601 2602 *start = start_limit; 2603 *last = end_limit - 1; 2604 2605 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2606 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2607 *start, *last, *is_heap_stack); 2608 2609 return 0; 2610 } 2611 2612 static int 2613 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2614 uint64_t *bo_s, uint64_t *bo_l) 2615 { 2616 struct amdgpu_bo_va_mapping *mapping; 2617 struct interval_tree_node *node; 2618 struct amdgpu_bo *bo = NULL; 2619 unsigned long userptr; 2620 uint32_t i; 2621 int r; 2622 2623 for (i = 0; i < p->n_pdds; i++) { 2624 struct amdgpu_vm *vm; 2625 2626 if (!p->pdds[i]->drm_priv) 2627 continue; 2628 2629 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2630 r = amdgpu_bo_reserve(vm->root.bo, false); 2631 if (r) 2632 return r; 2633 2634 /* Check userptr by searching entire vm->va interval tree */ 2635 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2636 while (node) { 2637 mapping = container_of((struct rb_node *)node, 2638 struct amdgpu_bo_va_mapping, rb); 2639 bo = mapping->bo_va->base.bo; 2640 2641 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2642 start << PAGE_SHIFT, 2643 last << PAGE_SHIFT, 2644 &userptr)) { 2645 node = interval_tree_iter_next(node, 0, ~0ULL); 2646 continue; 2647 } 2648 2649 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2650 start, last); 2651 if (bo_s && bo_l) { 2652 *bo_s = userptr >> PAGE_SHIFT; 2653 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2654 } 2655 amdgpu_bo_unreserve(vm->root.bo); 2656 return -EADDRINUSE; 2657 } 2658 amdgpu_bo_unreserve(vm->root.bo); 2659 } 2660 return 0; 2661 } 2662 2663 static struct 2664 svm_range *svm_range_create_unregistered_range(struct amdgpu_device *adev, 2665 struct kfd_process *p, 2666 struct mm_struct *mm, 2667 int64_t addr) 2668 { 2669 struct svm_range *prange = NULL; 2670 unsigned long start, last; 2671 uint32_t gpuid, gpuidx; 2672 bool is_heap_stack; 2673 uint64_t bo_s = 0; 2674 uint64_t bo_l = 0; 2675 int r; 2676 2677 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2678 &is_heap_stack)) 2679 return NULL; 2680 2681 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2682 if (r != -EADDRINUSE) 2683 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2684 2685 if (r == -EADDRINUSE) { 2686 if (addr >= bo_s && addr <= bo_l) 2687 return NULL; 2688 2689 /* Create one page svm range if 2MB range overlapping */ 2690 start = addr; 2691 last = addr; 2692 } 2693 2694 prange = svm_range_new(&p->svms, start, last, true); 2695 if (!prange) { 2696 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2697 return NULL; 2698 } 2699 if (kfd_process_gpuid_from_adev(p, adev, &gpuid, &gpuidx)) { 2700 pr_debug("failed to get gpuid from kgd\n"); 2701 svm_range_free(prange, true); 2702 return NULL; 2703 } 2704 2705 if (is_heap_stack) 2706 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2707 2708 svm_range_add_to_svms(prange); 2709 svm_range_add_notifier_locked(mm, prange); 2710 2711 return prange; 2712 } 2713 2714 /* svm_range_skip_recover - decide if prange can be recovered 2715 * @prange: svm range structure 2716 * 2717 * GPU vm retry fault handle skip recover the range for cases: 2718 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2719 * deferred list work will drain the stale fault before free the prange. 2720 * 2. prange is on deferred list to add interval notifier after split, or 2721 * 3. prange is child range, it is split from parent prange, recover later 2722 * after interval notifier is added. 2723 * 2724 * Return: true to skip recover, false to recover 2725 */ 2726 static bool svm_range_skip_recover(struct svm_range *prange) 2727 { 2728 struct svm_range_list *svms = prange->svms; 2729 2730 spin_lock(&svms->deferred_list_lock); 2731 if (list_empty(&prange->deferred_list) && 2732 list_empty(&prange->child_list)) { 2733 spin_unlock(&svms->deferred_list_lock); 2734 return false; 2735 } 2736 spin_unlock(&svms->deferred_list_lock); 2737 2738 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2739 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2740 svms, prange, prange->start, prange->last); 2741 return true; 2742 } 2743 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2744 prange->work_item.op == SVM_OP_ADD_RANGE) { 2745 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2746 svms, prange, prange->start, prange->last); 2747 return true; 2748 } 2749 return false; 2750 } 2751 2752 static void 2753 svm_range_count_fault(struct amdgpu_device *adev, struct kfd_process *p, 2754 int32_t gpuidx) 2755 { 2756 struct kfd_process_device *pdd; 2757 2758 /* fault is on different page of same range 2759 * or fault is skipped to recover later 2760 * or fault is on invalid virtual address 2761 */ 2762 if (gpuidx == MAX_GPU_INSTANCE) { 2763 uint32_t gpuid; 2764 int r; 2765 2766 r = kfd_process_gpuid_from_adev(p, adev, &gpuid, &gpuidx); 2767 if (r < 0) 2768 return; 2769 } 2770 2771 /* fault is recovered 2772 * or fault cannot recover because GPU no access on the range 2773 */ 2774 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2775 if (pdd) 2776 WRITE_ONCE(pdd->faults, pdd->faults + 1); 2777 } 2778 2779 static bool 2780 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 2781 { 2782 unsigned long requested = VM_READ; 2783 2784 if (write_fault) 2785 requested |= VM_WRITE; 2786 2787 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 2788 vma->vm_flags); 2789 return (vma->vm_flags & requested) == requested; 2790 } 2791 2792 int 2793 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 2794 uint64_t addr, bool write_fault) 2795 { 2796 struct mm_struct *mm = NULL; 2797 struct svm_range_list *svms; 2798 struct svm_range *prange; 2799 struct kfd_process *p; 2800 ktime_t timestamp = ktime_get_boottime(); 2801 int32_t best_loc; 2802 int32_t gpuidx = MAX_GPU_INSTANCE; 2803 bool write_locked = false; 2804 struct vm_area_struct *vma; 2805 bool migration = false; 2806 int r = 0; 2807 2808 if (!KFD_IS_SVM_API_SUPPORTED(adev->kfd.dev)) { 2809 pr_debug("device does not support SVM\n"); 2810 return -EFAULT; 2811 } 2812 2813 p = kfd_lookup_process_by_pasid(pasid); 2814 if (!p) { 2815 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 2816 return 0; 2817 } 2818 svms = &p->svms; 2819 2820 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 2821 2822 if (atomic_read(&svms->drain_pagefaults)) { 2823 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 2824 r = 0; 2825 goto out; 2826 } 2827 2828 if (!p->xnack_enabled) { 2829 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 2830 r = -EFAULT; 2831 goto out; 2832 } 2833 2834 /* p->lead_thread is available as kfd_process_wq_release flush the work 2835 * before releasing task ref. 2836 */ 2837 mm = get_task_mm(p->lead_thread); 2838 if (!mm) { 2839 pr_debug("svms 0x%p failed to get mm\n", svms); 2840 r = 0; 2841 goto out; 2842 } 2843 2844 mmap_read_lock(mm); 2845 retry_write_locked: 2846 mutex_lock(&svms->lock); 2847 prange = svm_range_from_addr(svms, addr, NULL); 2848 if (!prange) { 2849 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 2850 svms, addr); 2851 if (!write_locked) { 2852 /* Need the write lock to create new range with MMU notifier. 2853 * Also flush pending deferred work to make sure the interval 2854 * tree is up to date before we add a new range 2855 */ 2856 mutex_unlock(&svms->lock); 2857 mmap_read_unlock(mm); 2858 mmap_write_lock(mm); 2859 write_locked = true; 2860 goto retry_write_locked; 2861 } 2862 prange = svm_range_create_unregistered_range(adev, p, mm, addr); 2863 if (!prange) { 2864 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 2865 svms, addr); 2866 mmap_write_downgrade(mm); 2867 r = -EFAULT; 2868 goto out_unlock_svms; 2869 } 2870 } 2871 if (write_locked) 2872 mmap_write_downgrade(mm); 2873 2874 mutex_lock(&prange->migrate_mutex); 2875 2876 if (svm_range_skip_recover(prange)) { 2877 amdgpu_gmc_filter_faults_remove(adev, addr, pasid); 2878 r = 0; 2879 goto out_unlock_range; 2880 } 2881 2882 /* skip duplicate vm fault on different pages of same range */ 2883 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 2884 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 2885 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 2886 svms, prange->start, prange->last); 2887 r = 0; 2888 goto out_unlock_range; 2889 } 2890 2891 /* __do_munmap removed VMA, return success as we are handling stale 2892 * retry fault. 2893 */ 2894 vma = vma_lookup(mm, addr << PAGE_SHIFT); 2895 if (!vma) { 2896 pr_debug("address 0x%llx VMA is removed\n", addr); 2897 r = 0; 2898 goto out_unlock_range; 2899 } 2900 2901 if (!svm_fault_allowed(vma, write_fault)) { 2902 pr_debug("fault addr 0x%llx no %s permission\n", addr, 2903 write_fault ? "write" : "read"); 2904 r = -EPERM; 2905 goto out_unlock_range; 2906 } 2907 2908 best_loc = svm_range_best_restore_location(prange, adev, &gpuidx); 2909 if (best_loc == -1) { 2910 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 2911 svms, prange->start, prange->last); 2912 r = -EACCES; 2913 goto out_unlock_range; 2914 } 2915 2916 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 2917 svms, prange->start, prange->last, best_loc, 2918 prange->actual_loc); 2919 2920 kfd_smi_event_page_fault_start(adev->kfd.dev, p->lead_thread->pid, addr, 2921 write_fault, timestamp); 2922 2923 if (prange->actual_loc != best_loc) { 2924 migration = true; 2925 if (best_loc) { 2926 r = svm_migrate_to_vram(prange, best_loc, mm, 2927 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 2928 if (r) { 2929 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 2930 r, addr); 2931 /* Fallback to system memory if migration to 2932 * VRAM failed 2933 */ 2934 if (prange->actual_loc) 2935 r = svm_migrate_vram_to_ram(prange, mm, 2936 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, 2937 NULL); 2938 else 2939 r = 0; 2940 } 2941 } else { 2942 r = svm_migrate_vram_to_ram(prange, mm, 2943 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, 2944 NULL); 2945 } 2946 if (r) { 2947 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 2948 r, svms, prange->start, prange->last); 2949 goto out_unlock_range; 2950 } 2951 } 2952 2953 r = svm_range_validate_and_map(mm, prange, gpuidx, false, false, false); 2954 if (r) 2955 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 2956 r, svms, prange->start, prange->last); 2957 2958 kfd_smi_event_page_fault_end(adev->kfd.dev, p->lead_thread->pid, addr, 2959 migration); 2960 2961 out_unlock_range: 2962 mutex_unlock(&prange->migrate_mutex); 2963 out_unlock_svms: 2964 mutex_unlock(&svms->lock); 2965 mmap_read_unlock(mm); 2966 2967 svm_range_count_fault(adev, p, gpuidx); 2968 2969 mmput(mm); 2970 out: 2971 kfd_unref_process(p); 2972 2973 if (r == -EAGAIN) { 2974 pr_debug("recover vm fault later\n"); 2975 amdgpu_gmc_filter_faults_remove(adev, addr, pasid); 2976 r = 0; 2977 } 2978 return r; 2979 } 2980 2981 int 2982 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 2983 { 2984 struct svm_range *prange, *pchild; 2985 uint64_t reserved_size = 0; 2986 uint64_t size; 2987 int r = 0; 2988 2989 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 2990 2991 mutex_lock(&p->svms.lock); 2992 2993 list_for_each_entry(prange, &p->svms.list, list) { 2994 svm_range_lock(prange); 2995 list_for_each_entry(pchild, &prange->child_list, child_list) { 2996 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 2997 if (xnack_enabled) { 2998 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 2999 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR); 3000 } else { 3001 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3002 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR); 3003 if (r) 3004 goto out_unlock; 3005 reserved_size += size; 3006 } 3007 } 3008 3009 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3010 if (xnack_enabled) { 3011 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3012 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR); 3013 } else { 3014 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3015 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR); 3016 if (r) 3017 goto out_unlock; 3018 reserved_size += size; 3019 } 3020 out_unlock: 3021 svm_range_unlock(prange); 3022 if (r) 3023 break; 3024 } 3025 3026 if (r) 3027 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3028 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR); 3029 else 3030 /* Change xnack mode must be inside svms lock, to avoid race with 3031 * svm_range_deferred_list_work unreserve memory in parallel. 3032 */ 3033 p->xnack_enabled = xnack_enabled; 3034 3035 mutex_unlock(&p->svms.lock); 3036 return r; 3037 } 3038 3039 void svm_range_list_fini(struct kfd_process *p) 3040 { 3041 struct svm_range *prange; 3042 struct svm_range *next; 3043 3044 pr_debug("pasid 0x%x svms 0x%p\n", p->pasid, &p->svms); 3045 3046 cancel_delayed_work_sync(&p->svms.restore_work); 3047 3048 /* Ensure list work is finished before process is destroyed */ 3049 flush_work(&p->svms.deferred_list_work); 3050 3051 /* 3052 * Ensure no retry fault comes in afterwards, as page fault handler will 3053 * not find kfd process and take mm lock to recover fault. 3054 */ 3055 atomic_inc(&p->svms.drain_pagefaults); 3056 svm_range_drain_retry_fault(&p->svms); 3057 3058 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3059 svm_range_unlink(prange); 3060 svm_range_remove_notifier(prange); 3061 svm_range_free(prange, true); 3062 } 3063 3064 mutex_destroy(&p->svms.lock); 3065 3066 pr_debug("pasid 0x%x svms 0x%p done\n", p->pasid, &p->svms); 3067 } 3068 3069 int svm_range_list_init(struct kfd_process *p) 3070 { 3071 struct svm_range_list *svms = &p->svms; 3072 int i; 3073 3074 svms->objects = RB_ROOT_CACHED; 3075 mutex_init(&svms->lock); 3076 INIT_LIST_HEAD(&svms->list); 3077 atomic_set(&svms->evicted_ranges, 0); 3078 atomic_set(&svms->drain_pagefaults, 0); 3079 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3080 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3081 INIT_LIST_HEAD(&svms->deferred_range_list); 3082 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3083 spin_lock_init(&svms->deferred_list_lock); 3084 3085 for (i = 0; i < p->n_pdds; i++) 3086 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev)) 3087 bitmap_set(svms->bitmap_supported, i, 1); 3088 3089 return 0; 3090 } 3091 3092 /** 3093 * svm_range_check_vm - check if virtual address range mapped already 3094 * @p: current kfd_process 3095 * @start: range start address, in pages 3096 * @last: range last address, in pages 3097 * @bo_s: mapping start address in pages if address range already mapped 3098 * @bo_l: mapping last address in pages if address range already mapped 3099 * 3100 * The purpose is to avoid virtual address ranges already allocated by 3101 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3102 * It looks for each pdd in the kfd_process. 3103 * 3104 * Context: Process context 3105 * 3106 * Return 0 - OK, if the range is not mapped. 3107 * Otherwise error code: 3108 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3109 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3110 * a signal. Release all buffer reservations and return to user-space. 3111 */ 3112 static int 3113 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3114 uint64_t *bo_s, uint64_t *bo_l) 3115 { 3116 struct amdgpu_bo_va_mapping *mapping; 3117 struct interval_tree_node *node; 3118 uint32_t i; 3119 int r; 3120 3121 for (i = 0; i < p->n_pdds; i++) { 3122 struct amdgpu_vm *vm; 3123 3124 if (!p->pdds[i]->drm_priv) 3125 continue; 3126 3127 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3128 r = amdgpu_bo_reserve(vm->root.bo, false); 3129 if (r) 3130 return r; 3131 3132 node = interval_tree_iter_first(&vm->va, start, last); 3133 if (node) { 3134 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3135 start, last); 3136 mapping = container_of((struct rb_node *)node, 3137 struct amdgpu_bo_va_mapping, rb); 3138 if (bo_s && bo_l) { 3139 *bo_s = mapping->start; 3140 *bo_l = mapping->last; 3141 } 3142 amdgpu_bo_unreserve(vm->root.bo); 3143 return -EADDRINUSE; 3144 } 3145 amdgpu_bo_unreserve(vm->root.bo); 3146 } 3147 3148 return 0; 3149 } 3150 3151 /** 3152 * svm_range_is_valid - check if virtual address range is valid 3153 * @p: current kfd_process 3154 * @start: range start address, in pages 3155 * @size: range size, in pages 3156 * 3157 * Valid virtual address range means it belongs to one or more VMAs 3158 * 3159 * Context: Process context 3160 * 3161 * Return: 3162 * 0 - OK, otherwise error code 3163 */ 3164 static int 3165 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3166 { 3167 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3168 struct vm_area_struct *vma; 3169 unsigned long end; 3170 unsigned long start_unchg = start; 3171 3172 start <<= PAGE_SHIFT; 3173 end = start + (size << PAGE_SHIFT); 3174 do { 3175 vma = vma_lookup(p->mm, start); 3176 if (!vma || (vma->vm_flags & device_vma)) 3177 return -EFAULT; 3178 start = min(end, vma->vm_end); 3179 } while (start < end); 3180 3181 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3182 NULL); 3183 } 3184 3185 /** 3186 * svm_range_best_prefetch_location - decide the best prefetch location 3187 * @prange: svm range structure 3188 * 3189 * For xnack off: 3190 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3191 * can be CPU or GPU. 3192 * 3193 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3194 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3195 * the best prefetch location is always CPU, because GPU can not have coherent 3196 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3197 * 3198 * For xnack on: 3199 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3200 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3201 * 3202 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3203 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3204 * prefetch location is always CPU. 3205 * 3206 * Context: Process context 3207 * 3208 * Return: 3209 * 0 for CPU or GPU id 3210 */ 3211 static uint32_t 3212 svm_range_best_prefetch_location(struct svm_range *prange) 3213 { 3214 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3215 uint32_t best_loc = prange->prefetch_loc; 3216 struct kfd_process_device *pdd; 3217 struct amdgpu_device *bo_adev; 3218 struct kfd_process *p; 3219 uint32_t gpuidx; 3220 3221 p = container_of(prange->svms, struct kfd_process, svms); 3222 3223 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3224 goto out; 3225 3226 bo_adev = svm_range_get_adev_by_id(prange, best_loc); 3227 if (!bo_adev) { 3228 WARN_ONCE(1, "failed to get device by id 0x%x\n", best_loc); 3229 best_loc = 0; 3230 goto out; 3231 } 3232 3233 if (p->xnack_enabled) 3234 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3235 else 3236 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3237 MAX_GPU_INSTANCE); 3238 3239 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3240 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3241 if (!pdd) { 3242 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3243 continue; 3244 } 3245 3246 if (pdd->dev->adev == bo_adev) 3247 continue; 3248 3249 if (!amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 3250 best_loc = 0; 3251 break; 3252 } 3253 } 3254 3255 out: 3256 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3257 p->xnack_enabled, &p->svms, prange->start, prange->last, 3258 best_loc); 3259 3260 return best_loc; 3261 } 3262 3263 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3264 * @mm: current process mm_struct 3265 * @prange: svm range structure 3266 * @migrated: output, true if migration is triggered 3267 * 3268 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3269 * from ram to vram. 3270 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3271 * from vram to ram. 3272 * 3273 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3274 * and restore work: 3275 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3276 * stops all queues, schedule restore work 3277 * 2. svm_range_restore_work wait for migration is done by 3278 * a. svm_range_validate_vram takes prange->migrate_mutex 3279 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3280 * 3. restore work update mappings of GPU, resume all queues. 3281 * 3282 * Context: Process context 3283 * 3284 * Return: 3285 * 0 - OK, otherwise - error code of migration 3286 */ 3287 static int 3288 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3289 bool *migrated) 3290 { 3291 uint32_t best_loc; 3292 int r = 0; 3293 3294 *migrated = false; 3295 best_loc = svm_range_best_prefetch_location(prange); 3296 3297 if (best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3298 best_loc == prange->actual_loc) 3299 return 0; 3300 3301 if (!best_loc) { 3302 r = svm_migrate_vram_to_ram(prange, mm, 3303 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3304 *migrated = !r; 3305 return r; 3306 } 3307 3308 r = svm_migrate_to_vram(prange, best_loc, mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3309 *migrated = !r; 3310 3311 return r; 3312 } 3313 3314 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3315 { 3316 if (!fence) 3317 return -EINVAL; 3318 3319 if (dma_fence_is_signaled(&fence->base)) 3320 return 0; 3321 3322 if (fence->svm_bo) { 3323 WRITE_ONCE(fence->svm_bo->evicting, 1); 3324 schedule_work(&fence->svm_bo->eviction_work); 3325 } 3326 3327 return 0; 3328 } 3329 3330 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3331 { 3332 struct svm_range_bo *svm_bo; 3333 struct mm_struct *mm; 3334 int r = 0; 3335 3336 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3337 if (!svm_bo_ref_unless_zero(svm_bo)) 3338 return; /* svm_bo was freed while eviction was pending */ 3339 3340 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3341 mm = svm_bo->eviction_fence->mm; 3342 } else { 3343 svm_range_bo_unref(svm_bo); 3344 return; 3345 } 3346 3347 mmap_read_lock(mm); 3348 spin_lock(&svm_bo->list_lock); 3349 while (!list_empty(&svm_bo->range_list) && !r) { 3350 struct svm_range *prange = 3351 list_first_entry(&svm_bo->range_list, 3352 struct svm_range, svm_bo_list); 3353 int retries = 3; 3354 3355 list_del_init(&prange->svm_bo_list); 3356 spin_unlock(&svm_bo->list_lock); 3357 3358 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3359 prange->start, prange->last); 3360 3361 mutex_lock(&prange->migrate_mutex); 3362 do { 3363 r = svm_migrate_vram_to_ram(prange, mm, 3364 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3365 } while (!r && prange->actual_loc && --retries); 3366 3367 if (!r && prange->actual_loc) 3368 pr_info_once("Migration failed during eviction"); 3369 3370 if (!prange->actual_loc) { 3371 mutex_lock(&prange->lock); 3372 prange->svm_bo = NULL; 3373 mutex_unlock(&prange->lock); 3374 } 3375 mutex_unlock(&prange->migrate_mutex); 3376 3377 spin_lock(&svm_bo->list_lock); 3378 } 3379 spin_unlock(&svm_bo->list_lock); 3380 mmap_read_unlock(mm); 3381 mmput(mm); 3382 3383 dma_fence_signal(&svm_bo->eviction_fence->base); 3384 3385 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3386 * has been called in svm_migrate_vram_to_ram 3387 */ 3388 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3389 svm_range_bo_unref(svm_bo); 3390 } 3391 3392 static int 3393 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3394 uint64_t start, uint64_t size, uint32_t nattr, 3395 struct kfd_ioctl_svm_attribute *attrs) 3396 { 3397 struct amdkfd_process_info *process_info = p->kgd_process_info; 3398 struct list_head update_list; 3399 struct list_head insert_list; 3400 struct list_head remove_list; 3401 struct svm_range_list *svms; 3402 struct svm_range *prange; 3403 struct svm_range *next; 3404 bool update_mapping = false; 3405 bool flush_tlb; 3406 int r = 0; 3407 3408 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3409 p->pasid, &p->svms, start, start + size - 1, size); 3410 3411 r = svm_range_check_attr(p, nattr, attrs); 3412 if (r) 3413 return r; 3414 3415 svms = &p->svms; 3416 3417 mutex_lock(&process_info->lock); 3418 3419 svm_range_list_lock_and_flush_work(svms, mm); 3420 3421 r = svm_range_is_valid(p, start, size); 3422 if (r) { 3423 pr_debug("invalid range r=%d\n", r); 3424 mmap_write_unlock(mm); 3425 goto out; 3426 } 3427 3428 mutex_lock(&svms->lock); 3429 3430 /* Add new range and split existing ranges as needed */ 3431 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3432 &insert_list, &remove_list); 3433 if (r) { 3434 mutex_unlock(&svms->lock); 3435 mmap_write_unlock(mm); 3436 goto out; 3437 } 3438 /* Apply changes as a transaction */ 3439 list_for_each_entry_safe(prange, next, &insert_list, list) { 3440 svm_range_add_to_svms(prange); 3441 svm_range_add_notifier_locked(mm, prange); 3442 } 3443 list_for_each_entry(prange, &update_list, update_list) { 3444 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3445 /* TODO: unmap ranges from GPU that lost access */ 3446 } 3447 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3448 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3449 prange->svms, prange, prange->start, 3450 prange->last); 3451 svm_range_unlink(prange); 3452 svm_range_remove_notifier(prange); 3453 svm_range_free(prange, false); 3454 } 3455 3456 mmap_write_downgrade(mm); 3457 /* Trigger migrations and revalidate and map to GPUs as needed. If 3458 * this fails we may be left with partially completed actions. There 3459 * is no clean way of rolling back to the previous state in such a 3460 * case because the rollback wouldn't be guaranteed to work either. 3461 */ 3462 list_for_each_entry(prange, &update_list, update_list) { 3463 bool migrated; 3464 3465 mutex_lock(&prange->migrate_mutex); 3466 3467 r = svm_range_trigger_migration(mm, prange, &migrated); 3468 if (r) 3469 goto out_unlock_range; 3470 3471 if (migrated && (!p->xnack_enabled || 3472 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3473 prange->mapped_to_gpu) { 3474 pr_debug("restore_work will update mappings of GPUs\n"); 3475 mutex_unlock(&prange->migrate_mutex); 3476 continue; 3477 } 3478 3479 if (!migrated && !update_mapping) { 3480 mutex_unlock(&prange->migrate_mutex); 3481 continue; 3482 } 3483 3484 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3485 3486 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 3487 true, true, flush_tlb); 3488 if (r) 3489 pr_debug("failed %d to map svm range\n", r); 3490 3491 out_unlock_range: 3492 mutex_unlock(&prange->migrate_mutex); 3493 if (r) 3494 break; 3495 } 3496 3497 svm_range_debug_dump(svms); 3498 3499 mutex_unlock(&svms->lock); 3500 mmap_read_unlock(mm); 3501 out: 3502 mutex_unlock(&process_info->lock); 3503 3504 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid, 3505 &p->svms, start, start + size - 1, r); 3506 3507 return r; 3508 } 3509 3510 static int 3511 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3512 uint64_t start, uint64_t size, uint32_t nattr, 3513 struct kfd_ioctl_svm_attribute *attrs) 3514 { 3515 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3516 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3517 bool get_preferred_loc = false; 3518 bool get_prefetch_loc = false; 3519 bool get_granularity = false; 3520 bool get_accessible = false; 3521 bool get_flags = false; 3522 uint64_t last = start + size - 1UL; 3523 uint8_t granularity = 0xff; 3524 struct interval_tree_node *node; 3525 struct svm_range_list *svms; 3526 struct svm_range *prange; 3527 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3528 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3529 uint32_t flags_and = 0xffffffff; 3530 uint32_t flags_or = 0; 3531 int gpuidx; 3532 uint32_t i; 3533 int r = 0; 3534 3535 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3536 start + size - 1, nattr); 3537 3538 /* Flush pending deferred work to avoid racing with deferred actions from 3539 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3540 * can still race with get_attr because we don't hold the mmap lock. But that 3541 * would be a race condition in the application anyway, and undefined 3542 * behaviour is acceptable in that case. 3543 */ 3544 flush_work(&p->svms.deferred_list_work); 3545 3546 mmap_read_lock(mm); 3547 r = svm_range_is_valid(p, start, size); 3548 mmap_read_unlock(mm); 3549 if (r) { 3550 pr_debug("invalid range r=%d\n", r); 3551 return r; 3552 } 3553 3554 for (i = 0; i < nattr; i++) { 3555 switch (attrs[i].type) { 3556 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3557 get_preferred_loc = true; 3558 break; 3559 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3560 get_prefetch_loc = true; 3561 break; 3562 case KFD_IOCTL_SVM_ATTR_ACCESS: 3563 get_accessible = true; 3564 break; 3565 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3566 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3567 get_flags = true; 3568 break; 3569 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3570 get_granularity = true; 3571 break; 3572 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3573 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3574 fallthrough; 3575 default: 3576 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3577 return -EINVAL; 3578 } 3579 } 3580 3581 svms = &p->svms; 3582 3583 mutex_lock(&svms->lock); 3584 3585 node = interval_tree_iter_first(&svms->objects, start, last); 3586 if (!node) { 3587 pr_debug("range attrs not found return default values\n"); 3588 svm_range_set_default_attributes(&location, &prefetch_loc, 3589 &granularity, &flags_and); 3590 flags_or = flags_and; 3591 if (p->xnack_enabled) 3592 bitmap_copy(bitmap_access, svms->bitmap_supported, 3593 MAX_GPU_INSTANCE); 3594 else 3595 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3596 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3597 goto fill_values; 3598 } 3599 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3600 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3601 3602 while (node) { 3603 struct interval_tree_node *next; 3604 3605 prange = container_of(node, struct svm_range, it_node); 3606 next = interval_tree_iter_next(node, start, last); 3607 3608 if (get_preferred_loc) { 3609 if (prange->preferred_loc == 3610 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3611 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3612 location != prange->preferred_loc)) { 3613 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3614 get_preferred_loc = false; 3615 } else { 3616 location = prange->preferred_loc; 3617 } 3618 } 3619 if (get_prefetch_loc) { 3620 if (prange->prefetch_loc == 3621 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3622 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3623 prefetch_loc != prange->prefetch_loc)) { 3624 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3625 get_prefetch_loc = false; 3626 } else { 3627 prefetch_loc = prange->prefetch_loc; 3628 } 3629 } 3630 if (get_accessible) { 3631 bitmap_and(bitmap_access, bitmap_access, 3632 prange->bitmap_access, MAX_GPU_INSTANCE); 3633 bitmap_and(bitmap_aip, bitmap_aip, 3634 prange->bitmap_aip, MAX_GPU_INSTANCE); 3635 } 3636 if (get_flags) { 3637 flags_and &= prange->flags; 3638 flags_or |= prange->flags; 3639 } 3640 3641 if (get_granularity && prange->granularity < granularity) 3642 granularity = prange->granularity; 3643 3644 node = next; 3645 } 3646 fill_values: 3647 mutex_unlock(&svms->lock); 3648 3649 for (i = 0; i < nattr; i++) { 3650 switch (attrs[i].type) { 3651 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3652 attrs[i].value = location; 3653 break; 3654 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3655 attrs[i].value = prefetch_loc; 3656 break; 3657 case KFD_IOCTL_SVM_ATTR_ACCESS: 3658 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3659 attrs[i].value); 3660 if (gpuidx < 0) { 3661 pr_debug("invalid gpuid %x\n", attrs[i].value); 3662 return -EINVAL; 3663 } 3664 if (test_bit(gpuidx, bitmap_access)) 3665 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3666 else if (test_bit(gpuidx, bitmap_aip)) 3667 attrs[i].type = 3668 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3669 else 3670 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3671 break; 3672 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3673 attrs[i].value = flags_and; 3674 break; 3675 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3676 attrs[i].value = ~flags_or; 3677 break; 3678 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3679 attrs[i].value = (uint32_t)granularity; 3680 break; 3681 } 3682 } 3683 3684 return 0; 3685 } 3686 3687 int kfd_criu_resume_svm(struct kfd_process *p) 3688 { 3689 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3690 int nattr_common = 4, nattr_accessibility = 1; 3691 struct criu_svm_metadata *criu_svm_md = NULL; 3692 struct svm_range_list *svms = &p->svms; 3693 struct criu_svm_metadata *next = NULL; 3694 uint32_t set_flags = 0xffffffff; 3695 int i, j, num_attrs, ret = 0; 3696 uint64_t set_attr_size; 3697 struct mm_struct *mm; 3698 3699 if (list_empty(&svms->criu_svm_metadata_list)) { 3700 pr_debug("No SVM data from CRIU restore stage 2\n"); 3701 return ret; 3702 } 3703 3704 mm = get_task_mm(p->lead_thread); 3705 if (!mm) { 3706 pr_err("failed to get mm for the target process\n"); 3707 return -ESRCH; 3708 } 3709 3710 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 3711 3712 i = j = 0; 3713 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 3714 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 3715 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 3716 3717 for (j = 0; j < num_attrs; j++) { 3718 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 3719 i, j, criu_svm_md->data.attrs[j].type, 3720 i, j, criu_svm_md->data.attrs[j].value); 3721 switch (criu_svm_md->data.attrs[j].type) { 3722 /* During Checkpoint operation, the query for 3723 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 3724 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 3725 * not used by the range which was checkpointed. Care 3726 * must be taken to not restore with an invalid value 3727 * otherwise the gpuidx value will be invalid and 3728 * set_attr would eventually fail so just replace those 3729 * with another dummy attribute such as 3730 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 3731 */ 3732 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3733 if (criu_svm_md->data.attrs[j].value == 3734 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 3735 criu_svm_md->data.attrs[j].type = 3736 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3737 criu_svm_md->data.attrs[j].value = 0; 3738 } 3739 break; 3740 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3741 set_flags = criu_svm_md->data.attrs[j].value; 3742 break; 3743 default: 3744 break; 3745 } 3746 } 3747 3748 /* CLR_FLAGS is not available via get_attr during checkpoint but 3749 * it needs to be inserted before restoring the ranges so 3750 * allocate extra space for it before calling set_attr 3751 */ 3752 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3753 (num_attrs + 1); 3754 set_attr_new = krealloc(set_attr, set_attr_size, 3755 GFP_KERNEL); 3756 if (!set_attr_new) { 3757 ret = -ENOMEM; 3758 goto exit; 3759 } 3760 set_attr = set_attr_new; 3761 3762 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 3763 sizeof(struct kfd_ioctl_svm_attribute)); 3764 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 3765 set_attr[num_attrs].value = ~set_flags; 3766 3767 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 3768 criu_svm_md->data.size, num_attrs + 1, 3769 set_attr); 3770 if (ret) { 3771 pr_err("CRIU: failed to set range attributes\n"); 3772 goto exit; 3773 } 3774 3775 i++; 3776 } 3777 exit: 3778 kfree(set_attr); 3779 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 3780 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 3781 criu_svm_md->data.start_addr); 3782 kfree(criu_svm_md); 3783 } 3784 3785 mmput(mm); 3786 return ret; 3787 3788 } 3789 3790 int kfd_criu_restore_svm(struct kfd_process *p, 3791 uint8_t __user *user_priv_ptr, 3792 uint64_t *priv_data_offset, 3793 uint64_t max_priv_data_size) 3794 { 3795 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 3796 int nattr_common = 4, nattr_accessibility = 1; 3797 struct criu_svm_metadata *criu_svm_md = NULL; 3798 struct svm_range_list *svms = &p->svms; 3799 uint32_t num_devices; 3800 int ret = 0; 3801 3802 num_devices = p->n_pdds; 3803 /* Handle one SVM range object at a time, also the number of gpus are 3804 * assumed to be same on the restore node, checking must be done while 3805 * evaluating the topology earlier 3806 */ 3807 3808 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 3809 (nattr_common + nattr_accessibility * num_devices); 3810 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 3811 3812 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 3813 svm_attrs_size; 3814 3815 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 3816 if (!criu_svm_md) { 3817 pr_err("failed to allocate memory to store svm metadata\n"); 3818 return -ENOMEM; 3819 } 3820 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 3821 ret = -EINVAL; 3822 goto exit; 3823 } 3824 3825 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 3826 svm_priv_data_size); 3827 if (ret) { 3828 ret = -EFAULT; 3829 goto exit; 3830 } 3831 *priv_data_offset += svm_priv_data_size; 3832 3833 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 3834 3835 return 0; 3836 3837 3838 exit: 3839 kfree(criu_svm_md); 3840 return ret; 3841 } 3842 3843 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 3844 uint64_t *svm_priv_data_size) 3845 { 3846 uint64_t total_size, accessibility_size, common_attr_size; 3847 int nattr_common = 4, nattr_accessibility = 1; 3848 int num_devices = p->n_pdds; 3849 struct svm_range_list *svms; 3850 struct svm_range *prange; 3851 uint32_t count = 0; 3852 3853 *svm_priv_data_size = 0; 3854 3855 svms = &p->svms; 3856 if (!svms) 3857 return -EINVAL; 3858 3859 mutex_lock(&svms->lock); 3860 list_for_each_entry(prange, &svms->list, list) { 3861 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 3862 prange, prange->start, prange->npages, 3863 prange->start + prange->npages - 1); 3864 count++; 3865 } 3866 mutex_unlock(&svms->lock); 3867 3868 *num_svm_ranges = count; 3869 /* Only the accessbility attributes need to be queried for all the gpus 3870 * individually, remaining ones are spanned across the entire process 3871 * regardless of the various gpu nodes. Of the remaining attributes, 3872 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 3873 * 3874 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 3875 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 3876 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 3877 * KFD_IOCTL_SVM_ATTR_GRANULARITY 3878 * 3879 * ** ACCESSBILITY ATTRIBUTES ** 3880 * (Considered as one, type is altered during query, value is gpuid) 3881 * KFD_IOCTL_SVM_ATTR_ACCESS 3882 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 3883 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 3884 */ 3885 if (*num_svm_ranges > 0) { 3886 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3887 nattr_common; 3888 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 3889 nattr_accessibility * num_devices; 3890 3891 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 3892 common_attr_size + accessibility_size; 3893 3894 *svm_priv_data_size = *num_svm_ranges * total_size; 3895 } 3896 3897 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 3898 *svm_priv_data_size); 3899 return 0; 3900 } 3901 3902 int kfd_criu_checkpoint_svm(struct kfd_process *p, 3903 uint8_t __user *user_priv_data, 3904 uint64_t *priv_data_offset) 3905 { 3906 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 3907 struct kfd_ioctl_svm_attribute *query_attr = NULL; 3908 uint64_t svm_priv_data_size, query_attr_size = 0; 3909 int index, nattr_common = 4, ret = 0; 3910 struct svm_range_list *svms; 3911 int num_devices = p->n_pdds; 3912 struct svm_range *prange; 3913 struct mm_struct *mm; 3914 3915 svms = &p->svms; 3916 if (!svms) 3917 return -EINVAL; 3918 3919 mm = get_task_mm(p->lead_thread); 3920 if (!mm) { 3921 pr_err("failed to get mm for the target process\n"); 3922 return -ESRCH; 3923 } 3924 3925 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3926 (nattr_common + num_devices); 3927 3928 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 3929 if (!query_attr) { 3930 ret = -ENOMEM; 3931 goto exit; 3932 } 3933 3934 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 3935 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 3936 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3937 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 3938 3939 for (index = 0; index < num_devices; index++) { 3940 struct kfd_process_device *pdd = p->pdds[index]; 3941 3942 query_attr[index + nattr_common].type = 3943 KFD_IOCTL_SVM_ATTR_ACCESS; 3944 query_attr[index + nattr_common].value = pdd->user_gpu_id; 3945 } 3946 3947 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 3948 3949 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 3950 if (!svm_priv) { 3951 ret = -ENOMEM; 3952 goto exit_query; 3953 } 3954 3955 index = 0; 3956 list_for_each_entry(prange, &svms->list, list) { 3957 3958 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 3959 svm_priv->start_addr = prange->start; 3960 svm_priv->size = prange->npages; 3961 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 3962 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 3963 prange, prange->start, prange->npages, 3964 prange->start + prange->npages - 1, 3965 prange->npages * PAGE_SIZE); 3966 3967 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 3968 svm_priv->size, 3969 (nattr_common + num_devices), 3970 svm_priv->attrs); 3971 if (ret) { 3972 pr_err("CRIU: failed to obtain range attributes\n"); 3973 goto exit_priv; 3974 } 3975 3976 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 3977 svm_priv_data_size)) { 3978 pr_err("Failed to copy svm priv to user\n"); 3979 ret = -EFAULT; 3980 goto exit_priv; 3981 } 3982 3983 *priv_data_offset += svm_priv_data_size; 3984 3985 } 3986 3987 3988 exit_priv: 3989 kfree(svm_priv); 3990 exit_query: 3991 kfree(query_attr); 3992 exit: 3993 mmput(mm); 3994 return ret; 3995 } 3996 3997 int 3998 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 3999 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4000 { 4001 struct mm_struct *mm = current->mm; 4002 int r; 4003 4004 start >>= PAGE_SHIFT; 4005 size >>= PAGE_SHIFT; 4006 4007 switch (op) { 4008 case KFD_IOCTL_SVM_OP_SET_ATTR: 4009 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4010 break; 4011 case KFD_IOCTL_SVM_OP_GET_ATTR: 4012 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4013 break; 4014 default: 4015 r = EINVAL; 4016 break; 4017 } 4018 4019 return r; 4020 } 4021