1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include "amdgpu_sync.h" 27 #include "amdgpu_object.h" 28 #include "amdgpu_vm.h" 29 #include "amdgpu_mn.h" 30 #include "amdgpu.h" 31 #include "amdgpu_xgmi.h" 32 #include "kfd_priv.h" 33 #include "kfd_svm.h" 34 #include "kfd_migrate.h" 35 #include "kfd_smi_events.h" 36 37 #ifdef dev_fmt 38 #undef dev_fmt 39 #endif 40 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 41 42 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 43 44 /* Long enough to ensure no retry fault comes after svm range is restored and 45 * page table is updated. 46 */ 47 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 48 49 struct criu_svm_metadata { 50 struct list_head list; 51 struct kfd_criu_svm_range_priv_data data; 52 }; 53 54 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 55 static bool 56 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 57 const struct mmu_notifier_range *range, 58 unsigned long cur_seq); 59 static int 60 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 61 uint64_t *bo_s, uint64_t *bo_l); 62 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 63 .invalidate = svm_range_cpu_invalidate_pagetables, 64 }; 65 66 /** 67 * svm_range_unlink - unlink svm_range from lists and interval tree 68 * @prange: svm range structure to be removed 69 * 70 * Remove the svm_range from the svms and svm_bo lists and the svms 71 * interval tree. 72 * 73 * Context: The caller must hold svms->lock 74 */ 75 static void svm_range_unlink(struct svm_range *prange) 76 { 77 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 78 prange, prange->start, prange->last); 79 80 if (prange->svm_bo) { 81 spin_lock(&prange->svm_bo->list_lock); 82 list_del(&prange->svm_bo_list); 83 spin_unlock(&prange->svm_bo->list_lock); 84 } 85 86 list_del(&prange->list); 87 if (prange->it_node.start != 0 && prange->it_node.last != 0) 88 interval_tree_remove(&prange->it_node, &prange->svms->objects); 89 } 90 91 static void 92 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 93 { 94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 95 prange, prange->start, prange->last); 96 97 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 98 prange->start << PAGE_SHIFT, 99 prange->npages << PAGE_SHIFT, 100 &svm_range_mn_ops); 101 } 102 103 /** 104 * svm_range_add_to_svms - add svm range to svms 105 * @prange: svm range structure to be added 106 * 107 * Add the svm range to svms interval tree and link list 108 * 109 * Context: The caller must hold svms->lock 110 */ 111 static void svm_range_add_to_svms(struct svm_range *prange) 112 { 113 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 114 prange, prange->start, prange->last); 115 116 list_move_tail(&prange->list, &prange->svms->list); 117 prange->it_node.start = prange->start; 118 prange->it_node.last = prange->last; 119 interval_tree_insert(&prange->it_node, &prange->svms->objects); 120 } 121 122 static void svm_range_remove_notifier(struct svm_range *prange) 123 { 124 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 125 prange->svms, prange, 126 prange->notifier.interval_tree.start >> PAGE_SHIFT, 127 prange->notifier.interval_tree.last >> PAGE_SHIFT); 128 129 if (prange->notifier.interval_tree.start != 0 && 130 prange->notifier.interval_tree.last != 0) 131 mmu_interval_notifier_remove(&prange->notifier); 132 } 133 134 static bool 135 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 136 { 137 return dma_addr && !dma_mapping_error(dev, dma_addr) && 138 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 139 } 140 141 static int 142 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 143 unsigned long offset, unsigned long npages, 144 unsigned long *hmm_pfns, uint32_t gpuidx) 145 { 146 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 147 dma_addr_t *addr = prange->dma_addr[gpuidx]; 148 struct device *dev = adev->dev; 149 struct page *page; 150 int i, r; 151 152 if (!addr) { 153 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 154 if (!addr) 155 return -ENOMEM; 156 prange->dma_addr[gpuidx] = addr; 157 } 158 159 addr += offset; 160 for (i = 0; i < npages; i++) { 161 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 162 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 163 164 page = hmm_pfn_to_page(hmm_pfns[i]); 165 if (is_zone_device_page(page)) { 166 struct amdgpu_device *bo_adev = 167 amdgpu_ttm_adev(prange->svm_bo->bo->tbo.bdev); 168 169 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 170 bo_adev->vm_manager.vram_base_offset - 171 bo_adev->kfd.dev->pgmap.range.start; 172 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 173 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 174 continue; 175 } 176 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 177 r = dma_mapping_error(dev, addr[i]); 178 if (r) { 179 dev_err(dev, "failed %d dma_map_page\n", r); 180 return r; 181 } 182 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 183 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 184 } 185 return 0; 186 } 187 188 static int 189 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 190 unsigned long offset, unsigned long npages, 191 unsigned long *hmm_pfns) 192 { 193 struct kfd_process *p; 194 uint32_t gpuidx; 195 int r; 196 197 p = container_of(prange->svms, struct kfd_process, svms); 198 199 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 200 struct kfd_process_device *pdd; 201 202 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 203 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 204 if (!pdd) { 205 pr_debug("failed to find device idx %d\n", gpuidx); 206 return -EINVAL; 207 } 208 209 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 210 hmm_pfns, gpuidx); 211 if (r) 212 break; 213 } 214 215 return r; 216 } 217 218 void svm_range_dma_unmap(struct device *dev, dma_addr_t *dma_addr, 219 unsigned long offset, unsigned long npages) 220 { 221 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 222 int i; 223 224 if (!dma_addr) 225 return; 226 227 for (i = offset; i < offset + npages; i++) { 228 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 229 continue; 230 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 231 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 232 dma_addr[i] = 0; 233 } 234 } 235 236 void svm_range_free_dma_mappings(struct svm_range *prange) 237 { 238 struct kfd_process_device *pdd; 239 dma_addr_t *dma_addr; 240 struct device *dev; 241 struct kfd_process *p; 242 uint32_t gpuidx; 243 244 p = container_of(prange->svms, struct kfd_process, svms); 245 246 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 247 dma_addr = prange->dma_addr[gpuidx]; 248 if (!dma_addr) 249 continue; 250 251 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 252 if (!pdd) { 253 pr_debug("failed to find device idx %d\n", gpuidx); 254 continue; 255 } 256 dev = &pdd->dev->pdev->dev; 257 svm_range_dma_unmap(dev, dma_addr, 0, prange->npages); 258 kvfree(dma_addr); 259 prange->dma_addr[gpuidx] = NULL; 260 } 261 } 262 263 static void svm_range_free(struct svm_range *prange) 264 { 265 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 266 prange->start, prange->last); 267 268 svm_range_vram_node_free(prange); 269 svm_range_free_dma_mappings(prange); 270 mutex_destroy(&prange->lock); 271 mutex_destroy(&prange->migrate_mutex); 272 kfree(prange); 273 } 274 275 static void 276 svm_range_set_default_attributes(int32_t *location, int32_t *prefetch_loc, 277 uint8_t *granularity, uint32_t *flags) 278 { 279 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 280 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 281 *granularity = 9; 282 *flags = 283 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 284 } 285 286 static struct 287 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 288 uint64_t last) 289 { 290 uint64_t size = last - start + 1; 291 struct svm_range *prange; 292 struct kfd_process *p; 293 294 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 295 if (!prange) 296 return NULL; 297 prange->npages = size; 298 prange->svms = svms; 299 prange->start = start; 300 prange->last = last; 301 INIT_LIST_HEAD(&prange->list); 302 INIT_LIST_HEAD(&prange->update_list); 303 INIT_LIST_HEAD(&prange->svm_bo_list); 304 INIT_LIST_HEAD(&prange->deferred_list); 305 INIT_LIST_HEAD(&prange->child_list); 306 atomic_set(&prange->invalid, 0); 307 prange->validate_timestamp = 0; 308 mutex_init(&prange->migrate_mutex); 309 mutex_init(&prange->lock); 310 311 p = container_of(svms, struct kfd_process, svms); 312 if (p->xnack_enabled) 313 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 314 MAX_GPU_INSTANCE); 315 316 svm_range_set_default_attributes(&prange->preferred_loc, 317 &prange->prefetch_loc, 318 &prange->granularity, &prange->flags); 319 320 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 321 322 return prange; 323 } 324 325 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 326 { 327 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 328 return false; 329 330 return true; 331 } 332 333 static void svm_range_bo_release(struct kref *kref) 334 { 335 struct svm_range_bo *svm_bo; 336 337 svm_bo = container_of(kref, struct svm_range_bo, kref); 338 pr_debug("svm_bo 0x%p\n", svm_bo); 339 340 spin_lock(&svm_bo->list_lock); 341 while (!list_empty(&svm_bo->range_list)) { 342 struct svm_range *prange = 343 list_first_entry(&svm_bo->range_list, 344 struct svm_range, svm_bo_list); 345 /* list_del_init tells a concurrent svm_range_vram_node_new when 346 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 347 */ 348 list_del_init(&prange->svm_bo_list); 349 spin_unlock(&svm_bo->list_lock); 350 351 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 352 prange->start, prange->last); 353 mutex_lock(&prange->lock); 354 prange->svm_bo = NULL; 355 mutex_unlock(&prange->lock); 356 357 spin_lock(&svm_bo->list_lock); 358 } 359 spin_unlock(&svm_bo->list_lock); 360 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) { 361 /* We're not in the eviction worker. 362 * Signal the fence and synchronize with any 363 * pending eviction work. 364 */ 365 dma_fence_signal(&svm_bo->eviction_fence->base); 366 cancel_work_sync(&svm_bo->eviction_work); 367 } 368 dma_fence_put(&svm_bo->eviction_fence->base); 369 amdgpu_bo_unref(&svm_bo->bo); 370 kfree(svm_bo); 371 } 372 373 static void svm_range_bo_wq_release(struct work_struct *work) 374 { 375 struct svm_range_bo *svm_bo; 376 377 svm_bo = container_of(work, struct svm_range_bo, release_work); 378 svm_range_bo_release(&svm_bo->kref); 379 } 380 381 static void svm_range_bo_release_async(struct kref *kref) 382 { 383 struct svm_range_bo *svm_bo; 384 385 svm_bo = container_of(kref, struct svm_range_bo, kref); 386 pr_debug("svm_bo 0x%p\n", svm_bo); 387 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 388 schedule_work(&svm_bo->release_work); 389 } 390 391 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 392 { 393 kref_put(&svm_bo->kref, svm_range_bo_release_async); 394 } 395 396 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 397 { 398 if (svm_bo) 399 kref_put(&svm_bo->kref, svm_range_bo_release); 400 } 401 402 static bool 403 svm_range_validate_svm_bo(struct amdgpu_device *adev, struct svm_range *prange) 404 { 405 struct amdgpu_device *bo_adev; 406 407 mutex_lock(&prange->lock); 408 if (!prange->svm_bo) { 409 mutex_unlock(&prange->lock); 410 return false; 411 } 412 if (prange->ttm_res) { 413 /* We still have a reference, all is well */ 414 mutex_unlock(&prange->lock); 415 return true; 416 } 417 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 418 /* 419 * Migrate from GPU to GPU, remove range from source bo_adev 420 * svm_bo range list, and return false to allocate svm_bo from 421 * destination adev. 422 */ 423 bo_adev = amdgpu_ttm_adev(prange->svm_bo->bo->tbo.bdev); 424 if (bo_adev != adev) { 425 mutex_unlock(&prange->lock); 426 427 spin_lock(&prange->svm_bo->list_lock); 428 list_del_init(&prange->svm_bo_list); 429 spin_unlock(&prange->svm_bo->list_lock); 430 431 svm_range_bo_unref(prange->svm_bo); 432 return false; 433 } 434 if (READ_ONCE(prange->svm_bo->evicting)) { 435 struct dma_fence *f; 436 struct svm_range_bo *svm_bo; 437 /* The BO is getting evicted, 438 * we need to get a new one 439 */ 440 mutex_unlock(&prange->lock); 441 svm_bo = prange->svm_bo; 442 f = dma_fence_get(&svm_bo->eviction_fence->base); 443 svm_range_bo_unref(prange->svm_bo); 444 /* wait for the fence to avoid long spin-loop 445 * at list_empty_careful 446 */ 447 dma_fence_wait(f, false); 448 dma_fence_put(f); 449 } else { 450 /* The BO was still around and we got 451 * a new reference to it 452 */ 453 mutex_unlock(&prange->lock); 454 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 455 prange->svms, prange->start, prange->last); 456 457 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 458 return true; 459 } 460 461 } else { 462 mutex_unlock(&prange->lock); 463 } 464 465 /* We need a new svm_bo. Spin-loop to wait for concurrent 466 * svm_range_bo_release to finish removing this range from 467 * its range list. After this, it is safe to reuse the 468 * svm_bo pointer and svm_bo_list head. 469 */ 470 while (!list_empty_careful(&prange->svm_bo_list)) 471 ; 472 473 return false; 474 } 475 476 static struct svm_range_bo *svm_range_bo_new(void) 477 { 478 struct svm_range_bo *svm_bo; 479 480 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 481 if (!svm_bo) 482 return NULL; 483 484 kref_init(&svm_bo->kref); 485 INIT_LIST_HEAD(&svm_bo->range_list); 486 spin_lock_init(&svm_bo->list_lock); 487 488 return svm_bo; 489 } 490 491 int 492 svm_range_vram_node_new(struct amdgpu_device *adev, struct svm_range *prange, 493 bool clear) 494 { 495 struct amdgpu_bo_param bp; 496 struct svm_range_bo *svm_bo; 497 struct amdgpu_bo_user *ubo; 498 struct amdgpu_bo *bo; 499 struct kfd_process *p; 500 struct mm_struct *mm; 501 int r; 502 503 p = container_of(prange->svms, struct kfd_process, svms); 504 pr_debug("pasid: %x svms 0x%p [0x%lx 0x%lx]\n", p->pasid, prange->svms, 505 prange->start, prange->last); 506 507 if (svm_range_validate_svm_bo(adev, prange)) 508 return 0; 509 510 svm_bo = svm_range_bo_new(); 511 if (!svm_bo) { 512 pr_debug("failed to alloc svm bo\n"); 513 return -ENOMEM; 514 } 515 mm = get_task_mm(p->lead_thread); 516 if (!mm) { 517 pr_debug("failed to get mm\n"); 518 kfree(svm_bo); 519 return -ESRCH; 520 } 521 svm_bo->svms = prange->svms; 522 svm_bo->eviction_fence = 523 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 524 mm, 525 svm_bo); 526 mmput(mm); 527 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 528 svm_bo->evicting = 0; 529 memset(&bp, 0, sizeof(bp)); 530 bp.size = prange->npages * PAGE_SIZE; 531 bp.byte_align = PAGE_SIZE; 532 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 533 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 534 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 535 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 536 bp.type = ttm_bo_type_device; 537 bp.resv = NULL; 538 539 r = amdgpu_bo_create_user(adev, &bp, &ubo); 540 if (r) { 541 pr_debug("failed %d to create bo\n", r); 542 goto create_bo_failed; 543 } 544 bo = &ubo->bo; 545 r = amdgpu_bo_reserve(bo, true); 546 if (r) { 547 pr_debug("failed %d to reserve bo\n", r); 548 goto reserve_bo_failed; 549 } 550 551 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 552 if (r) { 553 pr_debug("failed %d to reserve bo\n", r); 554 amdgpu_bo_unreserve(bo); 555 goto reserve_bo_failed; 556 } 557 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 558 559 amdgpu_bo_unreserve(bo); 560 561 svm_bo->bo = bo; 562 prange->svm_bo = svm_bo; 563 prange->ttm_res = bo->tbo.resource; 564 prange->offset = 0; 565 566 spin_lock(&svm_bo->list_lock); 567 list_add(&prange->svm_bo_list, &svm_bo->range_list); 568 spin_unlock(&svm_bo->list_lock); 569 570 return 0; 571 572 reserve_bo_failed: 573 amdgpu_bo_unref(&bo); 574 create_bo_failed: 575 dma_fence_put(&svm_bo->eviction_fence->base); 576 kfree(svm_bo); 577 prange->ttm_res = NULL; 578 579 return r; 580 } 581 582 void svm_range_vram_node_free(struct svm_range *prange) 583 { 584 svm_range_bo_unref(prange->svm_bo); 585 prange->ttm_res = NULL; 586 } 587 588 struct amdgpu_device * 589 svm_range_get_adev_by_id(struct svm_range *prange, uint32_t gpu_id) 590 { 591 struct kfd_process_device *pdd; 592 struct kfd_process *p; 593 int32_t gpu_idx; 594 595 p = container_of(prange->svms, struct kfd_process, svms); 596 597 gpu_idx = kfd_process_gpuidx_from_gpuid(p, gpu_id); 598 if (gpu_idx < 0) { 599 pr_debug("failed to get device by id 0x%x\n", gpu_id); 600 return NULL; 601 } 602 pdd = kfd_process_device_from_gpuidx(p, gpu_idx); 603 if (!pdd) { 604 pr_debug("failed to get device by idx 0x%x\n", gpu_idx); 605 return NULL; 606 } 607 608 return pdd->dev->adev; 609 } 610 611 struct kfd_process_device * 612 svm_range_get_pdd_by_adev(struct svm_range *prange, struct amdgpu_device *adev) 613 { 614 struct kfd_process *p; 615 int32_t gpu_idx, gpuid; 616 int r; 617 618 p = container_of(prange->svms, struct kfd_process, svms); 619 620 r = kfd_process_gpuid_from_adev(p, adev, &gpuid, &gpu_idx); 621 if (r) { 622 pr_debug("failed to get device id by adev %p\n", adev); 623 return NULL; 624 } 625 626 return kfd_process_device_from_gpuidx(p, gpu_idx); 627 } 628 629 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 630 { 631 struct ttm_operation_ctx ctx = { false, false }; 632 633 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 634 635 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 636 } 637 638 static int 639 svm_range_check_attr(struct kfd_process *p, 640 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 641 { 642 uint32_t i; 643 644 for (i = 0; i < nattr; i++) { 645 uint32_t val = attrs[i].value; 646 int gpuidx = MAX_GPU_INSTANCE; 647 648 switch (attrs[i].type) { 649 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 650 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 651 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 652 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 653 break; 654 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 655 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 656 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 657 break; 658 case KFD_IOCTL_SVM_ATTR_ACCESS: 659 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 660 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 661 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 662 break; 663 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 664 break; 665 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 666 break; 667 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 668 break; 669 default: 670 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 671 return -EINVAL; 672 } 673 674 if (gpuidx < 0) { 675 pr_debug("no GPU 0x%x found\n", val); 676 return -EINVAL; 677 } else if (gpuidx < MAX_GPU_INSTANCE && 678 !test_bit(gpuidx, p->svms.bitmap_supported)) { 679 pr_debug("GPU 0x%x not supported\n", val); 680 return -EINVAL; 681 } 682 } 683 684 return 0; 685 } 686 687 static void 688 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 689 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 690 bool *update_mapping) 691 { 692 uint32_t i; 693 int gpuidx; 694 695 for (i = 0; i < nattr; i++) { 696 switch (attrs[i].type) { 697 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 698 prange->preferred_loc = attrs[i].value; 699 break; 700 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 701 prange->prefetch_loc = attrs[i].value; 702 break; 703 case KFD_IOCTL_SVM_ATTR_ACCESS: 704 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 705 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 706 *update_mapping = true; 707 gpuidx = kfd_process_gpuidx_from_gpuid(p, 708 attrs[i].value); 709 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 710 bitmap_clear(prange->bitmap_access, gpuidx, 1); 711 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 712 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 713 bitmap_set(prange->bitmap_access, gpuidx, 1); 714 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 715 } else { 716 bitmap_clear(prange->bitmap_access, gpuidx, 1); 717 bitmap_set(prange->bitmap_aip, gpuidx, 1); 718 } 719 break; 720 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 721 *update_mapping = true; 722 prange->flags |= attrs[i].value; 723 break; 724 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 725 *update_mapping = true; 726 prange->flags &= ~attrs[i].value; 727 break; 728 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 729 prange->granularity = attrs[i].value; 730 break; 731 default: 732 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 733 } 734 } 735 } 736 737 static bool 738 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 739 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 740 { 741 uint32_t i; 742 int gpuidx; 743 744 for (i = 0; i < nattr; i++) { 745 switch (attrs[i].type) { 746 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 747 if (prange->preferred_loc != attrs[i].value) 748 return false; 749 break; 750 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 751 /* Prefetch should always trigger a migration even 752 * if the value of the attribute didn't change. 753 */ 754 return false; 755 case KFD_IOCTL_SVM_ATTR_ACCESS: 756 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 757 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 758 gpuidx = kfd_process_gpuidx_from_gpuid(p, 759 attrs[i].value); 760 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 761 if (test_bit(gpuidx, prange->bitmap_access) || 762 test_bit(gpuidx, prange->bitmap_aip)) 763 return false; 764 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 765 if (!test_bit(gpuidx, prange->bitmap_access)) 766 return false; 767 } else { 768 if (!test_bit(gpuidx, prange->bitmap_aip)) 769 return false; 770 } 771 break; 772 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 773 if ((prange->flags & attrs[i].value) != attrs[i].value) 774 return false; 775 break; 776 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 777 if ((prange->flags & attrs[i].value) != 0) 778 return false; 779 break; 780 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 781 if (prange->granularity != attrs[i].value) 782 return false; 783 break; 784 default: 785 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 786 } 787 } 788 789 return true; 790 } 791 792 /** 793 * svm_range_debug_dump - print all range information from svms 794 * @svms: svm range list header 795 * 796 * debug output svm range start, end, prefetch location from svms 797 * interval tree and link list 798 * 799 * Context: The caller must hold svms->lock 800 */ 801 static void svm_range_debug_dump(struct svm_range_list *svms) 802 { 803 struct interval_tree_node *node; 804 struct svm_range *prange; 805 806 pr_debug("dump svms 0x%p list\n", svms); 807 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 808 809 list_for_each_entry(prange, &svms->list, list) { 810 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 811 prange, prange->start, prange->npages, 812 prange->start + prange->npages - 1, 813 prange->actual_loc); 814 } 815 816 pr_debug("dump svms 0x%p interval tree\n", svms); 817 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 818 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 819 while (node) { 820 prange = container_of(node, struct svm_range, it_node); 821 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 822 prange, prange->start, prange->npages, 823 prange->start + prange->npages - 1, 824 prange->actual_loc); 825 node = interval_tree_iter_next(node, 0, ~0ULL); 826 } 827 } 828 829 static int 830 svm_range_split_array(void *ppnew, void *ppold, size_t size, 831 uint64_t old_start, uint64_t old_n, 832 uint64_t new_start, uint64_t new_n) 833 { 834 unsigned char *new, *old, *pold; 835 uint64_t d; 836 837 if (!ppold) 838 return 0; 839 pold = *(unsigned char **)ppold; 840 if (!pold) 841 return 0; 842 843 new = kvmalloc_array(new_n, size, GFP_KERNEL); 844 if (!new) 845 return -ENOMEM; 846 847 d = (new_start - old_start) * size; 848 memcpy(new, pold + d, new_n * size); 849 850 old = kvmalloc_array(old_n, size, GFP_KERNEL); 851 if (!old) { 852 kvfree(new); 853 return -ENOMEM; 854 } 855 856 d = (new_start == old_start) ? new_n * size : 0; 857 memcpy(old, pold + d, old_n * size); 858 859 kvfree(pold); 860 *(void **)ppold = old; 861 *(void **)ppnew = new; 862 863 return 0; 864 } 865 866 static int 867 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 868 uint64_t start, uint64_t last) 869 { 870 uint64_t npages = last - start + 1; 871 int i, r; 872 873 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 874 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 875 sizeof(*old->dma_addr[i]), old->start, 876 npages, new->start, new->npages); 877 if (r) 878 return r; 879 } 880 881 return 0; 882 } 883 884 static int 885 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 886 uint64_t start, uint64_t last) 887 { 888 uint64_t npages = last - start + 1; 889 890 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 891 new->svms, new, new->start, start, last); 892 893 if (new->start == old->start) { 894 new->offset = old->offset; 895 old->offset += new->npages; 896 } else { 897 new->offset = old->offset + npages; 898 } 899 900 new->svm_bo = svm_range_bo_ref(old->svm_bo); 901 new->ttm_res = old->ttm_res; 902 903 spin_lock(&new->svm_bo->list_lock); 904 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 905 spin_unlock(&new->svm_bo->list_lock); 906 907 return 0; 908 } 909 910 /** 911 * svm_range_split_adjust - split range and adjust 912 * 913 * @new: new range 914 * @old: the old range 915 * @start: the old range adjust to start address in pages 916 * @last: the old range adjust to last address in pages 917 * 918 * Copy system memory dma_addr or vram ttm_res in old range to new 919 * range from new_start up to size new->npages, the remaining old range is from 920 * start to last 921 * 922 * Return: 923 * 0 - OK, -ENOMEM - out of memory 924 */ 925 static int 926 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 927 uint64_t start, uint64_t last) 928 { 929 int r; 930 931 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 932 new->svms, new->start, old->start, old->last, start, last); 933 934 if (new->start < old->start || 935 new->last > old->last) { 936 WARN_ONCE(1, "invalid new range start or last\n"); 937 return -EINVAL; 938 } 939 940 r = svm_range_split_pages(new, old, start, last); 941 if (r) 942 return r; 943 944 if (old->actual_loc && old->ttm_res) { 945 r = svm_range_split_nodes(new, old, start, last); 946 if (r) 947 return r; 948 } 949 950 old->npages = last - start + 1; 951 old->start = start; 952 old->last = last; 953 new->flags = old->flags; 954 new->preferred_loc = old->preferred_loc; 955 new->prefetch_loc = old->prefetch_loc; 956 new->actual_loc = old->actual_loc; 957 new->granularity = old->granularity; 958 new->mapped_to_gpu = old->mapped_to_gpu; 959 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 960 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 961 962 return 0; 963 } 964 965 /** 966 * svm_range_split - split a range in 2 ranges 967 * 968 * @prange: the svm range to split 969 * @start: the remaining range start address in pages 970 * @last: the remaining range last address in pages 971 * @new: the result new range generated 972 * 973 * Two cases only: 974 * case 1: if start == prange->start 975 * prange ==> prange[start, last] 976 * new range [last + 1, prange->last] 977 * 978 * case 2: if last == prange->last 979 * prange ==> prange[start, last] 980 * new range [prange->start, start - 1] 981 * 982 * Return: 983 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 984 */ 985 static int 986 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 987 struct svm_range **new) 988 { 989 uint64_t old_start = prange->start; 990 uint64_t old_last = prange->last; 991 struct svm_range_list *svms; 992 int r = 0; 993 994 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 995 old_start, old_last, start, last); 996 997 if (old_start != start && old_last != last) 998 return -EINVAL; 999 if (start < old_start || last > old_last) 1000 return -EINVAL; 1001 1002 svms = prange->svms; 1003 if (old_start == start) 1004 *new = svm_range_new(svms, last + 1, old_last); 1005 else 1006 *new = svm_range_new(svms, old_start, start - 1); 1007 if (!*new) 1008 return -ENOMEM; 1009 1010 r = svm_range_split_adjust(*new, prange, start, last); 1011 if (r) { 1012 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1013 r, old_start, old_last, start, last); 1014 svm_range_free(*new); 1015 *new = NULL; 1016 } 1017 1018 return r; 1019 } 1020 1021 static int 1022 svm_range_split_tail(struct svm_range *prange, 1023 uint64_t new_last, struct list_head *insert_list) 1024 { 1025 struct svm_range *tail; 1026 int r = svm_range_split(prange, prange->start, new_last, &tail); 1027 1028 if (!r) 1029 list_add(&tail->list, insert_list); 1030 return r; 1031 } 1032 1033 static int 1034 svm_range_split_head(struct svm_range *prange, 1035 uint64_t new_start, struct list_head *insert_list) 1036 { 1037 struct svm_range *head; 1038 int r = svm_range_split(prange, new_start, prange->last, &head); 1039 1040 if (!r) 1041 list_add(&head->list, insert_list); 1042 return r; 1043 } 1044 1045 static void 1046 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm, 1047 struct svm_range *pchild, enum svm_work_list_ops op) 1048 { 1049 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1050 pchild, pchild->start, pchild->last, prange, op); 1051 1052 pchild->work_item.mm = mm; 1053 pchild->work_item.op = op; 1054 list_add_tail(&pchild->child_list, &prange->child_list); 1055 } 1056 1057 /** 1058 * svm_range_split_by_granularity - collect ranges within granularity boundary 1059 * 1060 * @p: the process with svms list 1061 * @mm: mm structure 1062 * @addr: the vm fault address in pages, to split the prange 1063 * @parent: parent range if prange is from child list 1064 * @prange: prange to split 1065 * 1066 * Trims @prange to be a single aligned block of prange->granularity if 1067 * possible. The head and tail are added to the child_list in @parent. 1068 * 1069 * Context: caller must hold mmap_read_lock and prange->lock 1070 * 1071 * Return: 1072 * 0 - OK, otherwise error code 1073 */ 1074 int 1075 svm_range_split_by_granularity(struct kfd_process *p, struct mm_struct *mm, 1076 unsigned long addr, struct svm_range *parent, 1077 struct svm_range *prange) 1078 { 1079 struct svm_range *head, *tail; 1080 unsigned long start, last, size; 1081 int r; 1082 1083 /* Align splited range start and size to granularity size, then a single 1084 * PTE will be used for whole range, this reduces the number of PTE 1085 * updated and the L1 TLB space used for translation. 1086 */ 1087 size = 1UL << prange->granularity; 1088 start = ALIGN_DOWN(addr, size); 1089 last = ALIGN(addr + 1, size) - 1; 1090 1091 pr_debug("svms 0x%p split [0x%lx 0x%lx] to [0x%lx 0x%lx] size 0x%lx\n", 1092 prange->svms, prange->start, prange->last, start, last, size); 1093 1094 if (start > prange->start) { 1095 r = svm_range_split(prange, start, prange->last, &head); 1096 if (r) 1097 return r; 1098 svm_range_add_child(parent, mm, head, SVM_OP_ADD_RANGE); 1099 } 1100 1101 if (last < prange->last) { 1102 r = svm_range_split(prange, prange->start, last, &tail); 1103 if (r) 1104 return r; 1105 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 1106 } 1107 1108 /* xnack on, update mapping on GPUs with ACCESS_IN_PLACE */ 1109 if (p->xnack_enabled && prange->work_item.op == SVM_OP_ADD_RANGE) { 1110 prange->work_item.op = SVM_OP_ADD_RANGE_AND_MAP; 1111 pr_debug("change prange 0x%p [0x%lx 0x%lx] op %d\n", 1112 prange, prange->start, prange->last, 1113 SVM_OP_ADD_RANGE_AND_MAP); 1114 } 1115 return 0; 1116 } 1117 1118 static uint64_t 1119 svm_range_get_pte_flags(struct amdgpu_device *adev, struct svm_range *prange, 1120 int domain) 1121 { 1122 struct amdgpu_device *bo_adev; 1123 uint32_t flags = prange->flags; 1124 uint32_t mapping_flags = 0; 1125 uint64_t pte_flags; 1126 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1127 bool coherent = flags & KFD_IOCTL_SVM_FLAG_COHERENT; 1128 1129 if (domain == SVM_RANGE_VRAM_DOMAIN) 1130 bo_adev = amdgpu_ttm_adev(prange->svm_bo->bo->tbo.bdev); 1131 1132 switch (KFD_GC_VERSION(adev->kfd.dev)) { 1133 case IP_VERSION(9, 4, 1): 1134 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1135 if (bo_adev == adev) { 1136 mapping_flags |= coherent ? 1137 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1138 } else { 1139 mapping_flags |= coherent ? 1140 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1141 if (amdgpu_xgmi_same_hive(adev, bo_adev)) 1142 snoop = true; 1143 } 1144 } else { 1145 mapping_flags |= coherent ? 1146 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1147 } 1148 break; 1149 case IP_VERSION(9, 4, 2): 1150 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1151 if (bo_adev == adev) { 1152 mapping_flags |= coherent ? 1153 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1154 if (adev->gmc.xgmi.connected_to_cpu) 1155 snoop = true; 1156 } else { 1157 mapping_flags |= coherent ? 1158 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1159 if (amdgpu_xgmi_same_hive(adev, bo_adev)) 1160 snoop = true; 1161 } 1162 } else { 1163 mapping_flags |= coherent ? 1164 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1165 } 1166 break; 1167 default: 1168 mapping_flags |= coherent ? 1169 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1170 } 1171 1172 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE; 1173 1174 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO) 1175 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE; 1176 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1177 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1178 1179 pte_flags = AMDGPU_PTE_VALID; 1180 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1181 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1182 1183 pte_flags |= amdgpu_gem_va_map_flags(adev, mapping_flags); 1184 return pte_flags; 1185 } 1186 1187 static int 1188 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1189 uint64_t start, uint64_t last, 1190 struct dma_fence **fence) 1191 { 1192 uint64_t init_pte_value = 0; 1193 1194 pr_debug("[0x%llx 0x%llx]\n", start, last); 1195 1196 return amdgpu_vm_update_range(adev, vm, false, true, true, NULL, start, 1197 last, init_pte_value, 0, 0, NULL, NULL, 1198 fence); 1199 } 1200 1201 static int 1202 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1203 unsigned long last, uint32_t trigger) 1204 { 1205 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1206 struct kfd_process_device *pdd; 1207 struct dma_fence *fence = NULL; 1208 struct kfd_process *p; 1209 uint32_t gpuidx; 1210 int r = 0; 1211 1212 if (!prange->mapped_to_gpu) { 1213 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1214 prange, prange->start, prange->last); 1215 return 0; 1216 } 1217 1218 if (prange->start == start && prange->last == last) { 1219 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1220 prange->mapped_to_gpu = false; 1221 } 1222 1223 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1224 MAX_GPU_INSTANCE); 1225 p = container_of(prange->svms, struct kfd_process, svms); 1226 1227 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1228 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1229 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1230 if (!pdd) { 1231 pr_debug("failed to find device idx %d\n", gpuidx); 1232 return -EINVAL; 1233 } 1234 1235 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1236 start, last, trigger); 1237 1238 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1239 drm_priv_to_vm(pdd->drm_priv), 1240 start, last, &fence); 1241 if (r) 1242 break; 1243 1244 if (fence) { 1245 r = dma_fence_wait(fence, false); 1246 dma_fence_put(fence); 1247 fence = NULL; 1248 if (r) 1249 break; 1250 } 1251 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1252 } 1253 1254 return r; 1255 } 1256 1257 static int 1258 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1259 unsigned long offset, unsigned long npages, bool readonly, 1260 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1261 struct dma_fence **fence, bool flush_tlb) 1262 { 1263 struct amdgpu_device *adev = pdd->dev->adev; 1264 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1265 uint64_t pte_flags; 1266 unsigned long last_start; 1267 int last_domain; 1268 int r = 0; 1269 int64_t i, j; 1270 1271 last_start = prange->start + offset; 1272 1273 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1274 last_start, last_start + npages - 1, readonly); 1275 1276 for (i = offset; i < offset + npages; i++) { 1277 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1278 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1279 1280 /* Collect all pages in the same address range and memory domain 1281 * that can be mapped with a single call to update mapping. 1282 */ 1283 if (i < offset + npages - 1 && 1284 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1285 continue; 1286 1287 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1288 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1289 1290 pte_flags = svm_range_get_pte_flags(adev, prange, last_domain); 1291 if (readonly) 1292 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1293 1294 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1295 prange->svms, last_start, prange->start + i, 1296 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1297 pte_flags); 1298 1299 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, NULL, 1300 last_start, prange->start + i, 1301 pte_flags, 1302 (last_start - prange->start) << PAGE_SHIFT, 1303 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1304 NULL, dma_addr, &vm->last_update); 1305 1306 for (j = last_start - prange->start; j <= i; j++) 1307 dma_addr[j] |= last_domain; 1308 1309 if (r) { 1310 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1311 goto out; 1312 } 1313 last_start = prange->start + i + 1; 1314 } 1315 1316 r = amdgpu_vm_update_pdes(adev, vm, false); 1317 if (r) { 1318 pr_debug("failed %d to update directories 0x%lx\n", r, 1319 prange->start); 1320 goto out; 1321 } 1322 1323 if (fence) 1324 *fence = dma_fence_get(vm->last_update); 1325 1326 out: 1327 return r; 1328 } 1329 1330 static int 1331 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1332 unsigned long npages, bool readonly, 1333 unsigned long *bitmap, bool wait, bool flush_tlb) 1334 { 1335 struct kfd_process_device *pdd; 1336 struct amdgpu_device *bo_adev; 1337 struct kfd_process *p; 1338 struct dma_fence *fence = NULL; 1339 uint32_t gpuidx; 1340 int r = 0; 1341 1342 if (prange->svm_bo && prange->ttm_res) 1343 bo_adev = amdgpu_ttm_adev(prange->svm_bo->bo->tbo.bdev); 1344 else 1345 bo_adev = NULL; 1346 1347 p = container_of(prange->svms, struct kfd_process, svms); 1348 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1349 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1350 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1351 if (!pdd) { 1352 pr_debug("failed to find device idx %d\n", gpuidx); 1353 return -EINVAL; 1354 } 1355 1356 pdd = kfd_bind_process_to_device(pdd->dev, p); 1357 if (IS_ERR(pdd)) 1358 return -EINVAL; 1359 1360 if (bo_adev && pdd->dev->adev != bo_adev && 1361 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1362 pr_debug("cannot map to device idx %d\n", gpuidx); 1363 continue; 1364 } 1365 1366 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1367 prange->dma_addr[gpuidx], 1368 bo_adev, wait ? &fence : NULL, 1369 flush_tlb); 1370 if (r) 1371 break; 1372 1373 if (fence) { 1374 r = dma_fence_wait(fence, false); 1375 dma_fence_put(fence); 1376 fence = NULL; 1377 if (r) { 1378 pr_debug("failed %d to dma fence wait\n", r); 1379 break; 1380 } 1381 } 1382 1383 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1384 } 1385 1386 return r; 1387 } 1388 1389 struct svm_validate_context { 1390 struct kfd_process *process; 1391 struct svm_range *prange; 1392 bool intr; 1393 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1394 struct ttm_validate_buffer tv[MAX_GPU_INSTANCE]; 1395 struct list_head validate_list; 1396 struct ww_acquire_ctx ticket; 1397 }; 1398 1399 static int svm_range_reserve_bos(struct svm_validate_context *ctx) 1400 { 1401 struct kfd_process_device *pdd; 1402 struct amdgpu_vm *vm; 1403 uint32_t gpuidx; 1404 int r; 1405 1406 INIT_LIST_HEAD(&ctx->validate_list); 1407 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1408 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1409 if (!pdd) { 1410 pr_debug("failed to find device idx %d\n", gpuidx); 1411 return -EINVAL; 1412 } 1413 vm = drm_priv_to_vm(pdd->drm_priv); 1414 1415 ctx->tv[gpuidx].bo = &vm->root.bo->tbo; 1416 ctx->tv[gpuidx].num_shared = 4; 1417 list_add(&ctx->tv[gpuidx].head, &ctx->validate_list); 1418 } 1419 1420 r = ttm_eu_reserve_buffers(&ctx->ticket, &ctx->validate_list, 1421 ctx->intr, NULL); 1422 if (r) { 1423 pr_debug("failed %d to reserve bo\n", r); 1424 return r; 1425 } 1426 1427 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1428 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1429 if (!pdd) { 1430 pr_debug("failed to find device idx %d\n", gpuidx); 1431 r = -EINVAL; 1432 goto unreserve_out; 1433 } 1434 1435 r = amdgpu_vm_validate_pt_bos(pdd->dev->adev, 1436 drm_priv_to_vm(pdd->drm_priv), 1437 svm_range_bo_validate, NULL); 1438 if (r) { 1439 pr_debug("failed %d validate pt bos\n", r); 1440 goto unreserve_out; 1441 } 1442 } 1443 1444 return 0; 1445 1446 unreserve_out: 1447 ttm_eu_backoff_reservation(&ctx->ticket, &ctx->validate_list); 1448 return r; 1449 } 1450 1451 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1452 { 1453 ttm_eu_backoff_reservation(&ctx->ticket, &ctx->validate_list); 1454 } 1455 1456 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1457 { 1458 struct kfd_process_device *pdd; 1459 1460 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1461 1462 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1463 } 1464 1465 /* 1466 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1467 * 1468 * To prevent concurrent destruction or change of range attributes, the 1469 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1470 * because that would block concurrent evictions and lead to deadlocks. To 1471 * serialize concurrent migrations or validations of the same range, the 1472 * prange->migrate_mutex must be held. 1473 * 1474 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1475 * eviction fence. 1476 * 1477 * The following sequence ensures race-free validation and GPU mapping: 1478 * 1479 * 1. Reserve page table (and SVM BO if range is in VRAM) 1480 * 2. hmm_range_fault to get page addresses (if system memory) 1481 * 3. DMA-map pages (if system memory) 1482 * 4-a. Take notifier lock 1483 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1484 * 4-c. Check that the range was not split or otherwise invalidated 1485 * 4-d. Update GPU page table 1486 * 4.e. Release notifier lock 1487 * 5. Release page table (and SVM BO) reservation 1488 */ 1489 static int svm_range_validate_and_map(struct mm_struct *mm, 1490 struct svm_range *prange, int32_t gpuidx, 1491 bool intr, bool wait, bool flush_tlb) 1492 { 1493 struct svm_validate_context ctx; 1494 unsigned long start, end, addr; 1495 struct kfd_process *p; 1496 void *owner; 1497 int32_t idx; 1498 int r = 0; 1499 1500 ctx.process = container_of(prange->svms, struct kfd_process, svms); 1501 ctx.prange = prange; 1502 ctx.intr = intr; 1503 1504 if (gpuidx < MAX_GPU_INSTANCE) { 1505 bitmap_zero(ctx.bitmap, MAX_GPU_INSTANCE); 1506 bitmap_set(ctx.bitmap, gpuidx, 1); 1507 } else if (ctx.process->xnack_enabled) { 1508 bitmap_copy(ctx.bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1509 1510 /* If prefetch range to GPU, or GPU retry fault migrate range to 1511 * GPU, which has ACCESS attribute to the range, create mapping 1512 * on that GPU. 1513 */ 1514 if (prange->actual_loc) { 1515 gpuidx = kfd_process_gpuidx_from_gpuid(ctx.process, 1516 prange->actual_loc); 1517 if (gpuidx < 0) { 1518 WARN_ONCE(1, "failed get device by id 0x%x\n", 1519 prange->actual_loc); 1520 return -EINVAL; 1521 } 1522 if (test_bit(gpuidx, prange->bitmap_access)) 1523 bitmap_set(ctx.bitmap, gpuidx, 1); 1524 } 1525 } else { 1526 bitmap_or(ctx.bitmap, prange->bitmap_access, 1527 prange->bitmap_aip, MAX_GPU_INSTANCE); 1528 } 1529 1530 if (bitmap_empty(ctx.bitmap, MAX_GPU_INSTANCE)) { 1531 if (!prange->mapped_to_gpu) 1532 return 0; 1533 1534 bitmap_copy(ctx.bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1535 } 1536 1537 if (prange->actual_loc && !prange->ttm_res) { 1538 /* This should never happen. actual_loc gets set by 1539 * svm_migrate_ram_to_vram after allocating a BO. 1540 */ 1541 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1542 return -EINVAL; 1543 } 1544 1545 svm_range_reserve_bos(&ctx); 1546 1547 p = container_of(prange->svms, struct kfd_process, svms); 1548 owner = kfd_svm_page_owner(p, find_first_bit(ctx.bitmap, 1549 MAX_GPU_INSTANCE)); 1550 for_each_set_bit(idx, ctx.bitmap, MAX_GPU_INSTANCE) { 1551 if (kfd_svm_page_owner(p, idx) != owner) { 1552 owner = NULL; 1553 break; 1554 } 1555 } 1556 1557 start = prange->start << PAGE_SHIFT; 1558 end = (prange->last + 1) << PAGE_SHIFT; 1559 for (addr = start; addr < end && !r; ) { 1560 struct hmm_range *hmm_range; 1561 struct vm_area_struct *vma; 1562 unsigned long next; 1563 unsigned long offset; 1564 unsigned long npages; 1565 bool readonly; 1566 1567 vma = find_vma(mm, addr); 1568 if (!vma || addr < vma->vm_start) { 1569 r = -EFAULT; 1570 goto unreserve_out; 1571 } 1572 readonly = !(vma->vm_flags & VM_WRITE); 1573 1574 next = min(vma->vm_end, end); 1575 npages = (next - addr) >> PAGE_SHIFT; 1576 WRITE_ONCE(p->svms.faulting_task, current); 1577 r = amdgpu_hmm_range_get_pages(&prange->notifier, mm, NULL, 1578 addr, npages, &hmm_range, 1579 readonly, true, owner); 1580 WRITE_ONCE(p->svms.faulting_task, NULL); 1581 if (r) { 1582 pr_debug("failed %d to get svm range pages\n", r); 1583 goto unreserve_out; 1584 } 1585 1586 offset = (addr - start) >> PAGE_SHIFT; 1587 r = svm_range_dma_map(prange, ctx.bitmap, offset, npages, 1588 hmm_range->hmm_pfns); 1589 if (r) { 1590 pr_debug("failed %d to dma map range\n", r); 1591 goto unreserve_out; 1592 } 1593 1594 svm_range_lock(prange); 1595 if (amdgpu_hmm_range_get_pages_done(hmm_range)) { 1596 pr_debug("hmm update the range, need validate again\n"); 1597 r = -EAGAIN; 1598 goto unlock_out; 1599 } 1600 if (!list_empty(&prange->child_list)) { 1601 pr_debug("range split by unmap in parallel, validate again\n"); 1602 r = -EAGAIN; 1603 goto unlock_out; 1604 } 1605 1606 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1607 ctx.bitmap, wait, flush_tlb); 1608 1609 unlock_out: 1610 svm_range_unlock(prange); 1611 1612 addr = next; 1613 } 1614 1615 if (addr == end) { 1616 prange->validated_once = true; 1617 prange->mapped_to_gpu = true; 1618 } 1619 1620 unreserve_out: 1621 svm_range_unreserve_bos(&ctx); 1622 1623 if (!r) 1624 prange->validate_timestamp = ktime_get_boottime(); 1625 1626 return r; 1627 } 1628 1629 /** 1630 * svm_range_list_lock_and_flush_work - flush pending deferred work 1631 * 1632 * @svms: the svm range list 1633 * @mm: the mm structure 1634 * 1635 * Context: Returns with mmap write lock held, pending deferred work flushed 1636 * 1637 */ 1638 void 1639 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1640 struct mm_struct *mm) 1641 { 1642 retry_flush_work: 1643 flush_work(&svms->deferred_list_work); 1644 mmap_write_lock(mm); 1645 1646 if (list_empty(&svms->deferred_range_list)) 1647 return; 1648 mmap_write_unlock(mm); 1649 pr_debug("retry flush\n"); 1650 goto retry_flush_work; 1651 } 1652 1653 static void svm_range_restore_work(struct work_struct *work) 1654 { 1655 struct delayed_work *dwork = to_delayed_work(work); 1656 struct amdkfd_process_info *process_info; 1657 struct svm_range_list *svms; 1658 struct svm_range *prange; 1659 struct kfd_process *p; 1660 struct mm_struct *mm; 1661 int evicted_ranges; 1662 int invalid; 1663 int r; 1664 1665 svms = container_of(dwork, struct svm_range_list, restore_work); 1666 evicted_ranges = atomic_read(&svms->evicted_ranges); 1667 if (!evicted_ranges) 1668 return; 1669 1670 pr_debug("restore svm ranges\n"); 1671 1672 p = container_of(svms, struct kfd_process, svms); 1673 process_info = p->kgd_process_info; 1674 1675 /* Keep mm reference when svm_range_validate_and_map ranges */ 1676 mm = get_task_mm(p->lead_thread); 1677 if (!mm) { 1678 pr_debug("svms 0x%p process mm gone\n", svms); 1679 return; 1680 } 1681 1682 mutex_lock(&process_info->lock); 1683 svm_range_list_lock_and_flush_work(svms, mm); 1684 mutex_lock(&svms->lock); 1685 1686 evicted_ranges = atomic_read(&svms->evicted_ranges); 1687 1688 list_for_each_entry(prange, &svms->list, list) { 1689 invalid = atomic_read(&prange->invalid); 1690 if (!invalid) 1691 continue; 1692 1693 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1694 prange->svms, prange, prange->start, prange->last, 1695 invalid); 1696 1697 /* 1698 * If range is migrating, wait for migration is done. 1699 */ 1700 mutex_lock(&prange->migrate_mutex); 1701 1702 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 1703 false, true, false); 1704 if (r) 1705 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1706 prange->start); 1707 1708 mutex_unlock(&prange->migrate_mutex); 1709 if (r) 1710 goto out_reschedule; 1711 1712 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1713 goto out_reschedule; 1714 } 1715 1716 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1717 evicted_ranges) 1718 goto out_reschedule; 1719 1720 evicted_ranges = 0; 1721 1722 r = kgd2kfd_resume_mm(mm); 1723 if (r) { 1724 /* No recovery from this failure. Probably the CP is 1725 * hanging. No point trying again. 1726 */ 1727 pr_debug("failed %d to resume KFD\n", r); 1728 } 1729 1730 pr_debug("restore svm ranges successfully\n"); 1731 1732 out_reschedule: 1733 mutex_unlock(&svms->lock); 1734 mmap_write_unlock(mm); 1735 mutex_unlock(&process_info->lock); 1736 1737 /* If validation failed, reschedule another attempt */ 1738 if (evicted_ranges) { 1739 pr_debug("reschedule to restore svm range\n"); 1740 schedule_delayed_work(&svms->restore_work, 1741 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1742 1743 kfd_smi_event_queue_restore_rescheduled(mm); 1744 } 1745 mmput(mm); 1746 } 1747 1748 /** 1749 * svm_range_evict - evict svm range 1750 * @prange: svm range structure 1751 * @mm: current process mm_struct 1752 * @start: starting process queue number 1753 * @last: last process queue number 1754 * 1755 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1756 * return to let CPU evict the buffer and proceed CPU pagetable update. 1757 * 1758 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1759 * If invalidation happens while restore work is running, restore work will 1760 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1761 * the queues. 1762 */ 1763 static int 1764 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1765 unsigned long start, unsigned long last, 1766 enum mmu_notifier_event event) 1767 { 1768 struct svm_range_list *svms = prange->svms; 1769 struct svm_range *pchild; 1770 struct kfd_process *p; 1771 int r = 0; 1772 1773 p = container_of(svms, struct kfd_process, svms); 1774 1775 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1776 svms, prange->start, prange->last, start, last); 1777 1778 if (!p->xnack_enabled || 1779 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 1780 int evicted_ranges; 1781 bool mapped = prange->mapped_to_gpu; 1782 1783 list_for_each_entry(pchild, &prange->child_list, child_list) { 1784 if (!pchild->mapped_to_gpu) 1785 continue; 1786 mapped = true; 1787 mutex_lock_nested(&pchild->lock, 1); 1788 if (pchild->start <= last && pchild->last >= start) { 1789 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 1790 pchild->start, pchild->last); 1791 atomic_inc(&pchild->invalid); 1792 } 1793 mutex_unlock(&pchild->lock); 1794 } 1795 1796 if (!mapped) 1797 return r; 1798 1799 if (prange->start <= last && prange->last >= start) 1800 atomic_inc(&prange->invalid); 1801 1802 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 1803 if (evicted_ranges != 1) 1804 return r; 1805 1806 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 1807 prange->svms, prange->start, prange->last); 1808 1809 /* First eviction, stop the queues */ 1810 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 1811 if (r) 1812 pr_debug("failed to quiesce KFD\n"); 1813 1814 pr_debug("schedule to restore svm %p ranges\n", svms); 1815 schedule_delayed_work(&svms->restore_work, 1816 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1817 } else { 1818 unsigned long s, l; 1819 uint32_t trigger; 1820 1821 if (event == MMU_NOTIFY_MIGRATE) 1822 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 1823 else 1824 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 1825 1826 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 1827 prange->svms, start, last); 1828 list_for_each_entry(pchild, &prange->child_list, child_list) { 1829 mutex_lock_nested(&pchild->lock, 1); 1830 s = max(start, pchild->start); 1831 l = min(last, pchild->last); 1832 if (l >= s) 1833 svm_range_unmap_from_gpus(pchild, s, l, trigger); 1834 mutex_unlock(&pchild->lock); 1835 } 1836 s = max(start, prange->start); 1837 l = min(last, prange->last); 1838 if (l >= s) 1839 svm_range_unmap_from_gpus(prange, s, l, trigger); 1840 } 1841 1842 return r; 1843 } 1844 1845 static struct svm_range *svm_range_clone(struct svm_range *old) 1846 { 1847 struct svm_range *new; 1848 1849 new = svm_range_new(old->svms, old->start, old->last); 1850 if (!new) 1851 return NULL; 1852 1853 if (old->svm_bo) { 1854 new->ttm_res = old->ttm_res; 1855 new->offset = old->offset; 1856 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1857 spin_lock(&new->svm_bo->list_lock); 1858 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1859 spin_unlock(&new->svm_bo->list_lock); 1860 } 1861 new->flags = old->flags; 1862 new->preferred_loc = old->preferred_loc; 1863 new->prefetch_loc = old->prefetch_loc; 1864 new->actual_loc = old->actual_loc; 1865 new->granularity = old->granularity; 1866 new->mapped_to_gpu = old->mapped_to_gpu; 1867 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1868 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1869 1870 return new; 1871 } 1872 1873 /** 1874 * svm_range_add - add svm range and handle overlap 1875 * @p: the range add to this process svms 1876 * @start: page size aligned 1877 * @size: page size aligned 1878 * @nattr: number of attributes 1879 * @attrs: array of attributes 1880 * @update_list: output, the ranges need validate and update GPU mapping 1881 * @insert_list: output, the ranges need insert to svms 1882 * @remove_list: output, the ranges are replaced and need remove from svms 1883 * 1884 * Check if the virtual address range has overlap with any existing ranges, 1885 * split partly overlapping ranges and add new ranges in the gaps. All changes 1886 * should be applied to the range_list and interval tree transactionally. If 1887 * any range split or allocation fails, the entire update fails. Therefore any 1888 * existing overlapping svm_ranges are cloned and the original svm_ranges left 1889 * unchanged. 1890 * 1891 * If the transaction succeeds, the caller can update and insert clones and 1892 * new ranges, then free the originals. 1893 * 1894 * Otherwise the caller can free the clones and new ranges, while the old 1895 * svm_ranges remain unchanged. 1896 * 1897 * Context: Process context, caller must hold svms->lock 1898 * 1899 * Return: 1900 * 0 - OK, otherwise error code 1901 */ 1902 static int 1903 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 1904 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 1905 struct list_head *update_list, struct list_head *insert_list, 1906 struct list_head *remove_list) 1907 { 1908 unsigned long last = start + size - 1UL; 1909 struct svm_range_list *svms = &p->svms; 1910 struct interval_tree_node *node; 1911 struct svm_range *prange; 1912 struct svm_range *tmp; 1913 int r = 0; 1914 1915 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 1916 1917 INIT_LIST_HEAD(update_list); 1918 INIT_LIST_HEAD(insert_list); 1919 INIT_LIST_HEAD(remove_list); 1920 1921 node = interval_tree_iter_first(&svms->objects, start, last); 1922 while (node) { 1923 struct interval_tree_node *next; 1924 unsigned long next_start; 1925 1926 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 1927 node->last); 1928 1929 prange = container_of(node, struct svm_range, it_node); 1930 next = interval_tree_iter_next(node, start, last); 1931 next_start = min(node->last, last) + 1; 1932 1933 if (svm_range_is_same_attrs(p, prange, nattr, attrs)) { 1934 /* nothing to do */ 1935 } else if (node->start < start || node->last > last) { 1936 /* node intersects the update range and its attributes 1937 * will change. Clone and split it, apply updates only 1938 * to the overlapping part 1939 */ 1940 struct svm_range *old = prange; 1941 1942 prange = svm_range_clone(old); 1943 if (!prange) { 1944 r = -ENOMEM; 1945 goto out; 1946 } 1947 1948 list_add(&old->update_list, remove_list); 1949 list_add(&prange->list, insert_list); 1950 list_add(&prange->update_list, update_list); 1951 1952 if (node->start < start) { 1953 pr_debug("change old range start\n"); 1954 r = svm_range_split_head(prange, start, 1955 insert_list); 1956 if (r) 1957 goto out; 1958 } 1959 if (node->last > last) { 1960 pr_debug("change old range last\n"); 1961 r = svm_range_split_tail(prange, last, 1962 insert_list); 1963 if (r) 1964 goto out; 1965 } 1966 } else { 1967 /* The node is contained within start..last, 1968 * just update it 1969 */ 1970 list_add(&prange->update_list, update_list); 1971 } 1972 1973 /* insert a new node if needed */ 1974 if (node->start > start) { 1975 prange = svm_range_new(svms, start, node->start - 1); 1976 if (!prange) { 1977 r = -ENOMEM; 1978 goto out; 1979 } 1980 1981 list_add(&prange->list, insert_list); 1982 list_add(&prange->update_list, update_list); 1983 } 1984 1985 node = next; 1986 start = next_start; 1987 } 1988 1989 /* add a final range at the end if needed */ 1990 if (start <= last) { 1991 prange = svm_range_new(svms, start, last); 1992 if (!prange) { 1993 r = -ENOMEM; 1994 goto out; 1995 } 1996 list_add(&prange->list, insert_list); 1997 list_add(&prange->update_list, update_list); 1998 } 1999 2000 out: 2001 if (r) 2002 list_for_each_entry_safe(prange, tmp, insert_list, list) 2003 svm_range_free(prange); 2004 2005 return r; 2006 } 2007 2008 static void 2009 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2010 struct svm_range *prange) 2011 { 2012 unsigned long start; 2013 unsigned long last; 2014 2015 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2016 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2017 2018 if (prange->start == start && prange->last == last) 2019 return; 2020 2021 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2022 prange->svms, prange, start, last, prange->start, 2023 prange->last); 2024 2025 if (start != 0 && last != 0) { 2026 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2027 svm_range_remove_notifier(prange); 2028 } 2029 prange->it_node.start = prange->start; 2030 prange->it_node.last = prange->last; 2031 2032 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2033 svm_range_add_notifier_locked(mm, prange); 2034 } 2035 2036 static void 2037 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2038 struct mm_struct *mm) 2039 { 2040 switch (prange->work_item.op) { 2041 case SVM_OP_NULL: 2042 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2043 svms, prange, prange->start, prange->last); 2044 break; 2045 case SVM_OP_UNMAP_RANGE: 2046 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2047 svms, prange, prange->start, prange->last); 2048 svm_range_unlink(prange); 2049 svm_range_remove_notifier(prange); 2050 svm_range_free(prange); 2051 break; 2052 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2053 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2054 svms, prange, prange->start, prange->last); 2055 svm_range_update_notifier_and_interval_tree(mm, prange); 2056 break; 2057 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2058 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2059 svms, prange, prange->start, prange->last); 2060 svm_range_update_notifier_and_interval_tree(mm, prange); 2061 /* TODO: implement deferred validation and mapping */ 2062 break; 2063 case SVM_OP_ADD_RANGE: 2064 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2065 prange->start, prange->last); 2066 svm_range_add_to_svms(prange); 2067 svm_range_add_notifier_locked(mm, prange); 2068 break; 2069 case SVM_OP_ADD_RANGE_AND_MAP: 2070 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2071 prange, prange->start, prange->last); 2072 svm_range_add_to_svms(prange); 2073 svm_range_add_notifier_locked(mm, prange); 2074 /* TODO: implement deferred validation and mapping */ 2075 break; 2076 default: 2077 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2078 prange->work_item.op); 2079 } 2080 } 2081 2082 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2083 { 2084 struct kfd_process_device *pdd; 2085 struct kfd_process *p; 2086 int drain; 2087 uint32_t i; 2088 2089 p = container_of(svms, struct kfd_process, svms); 2090 2091 restart: 2092 drain = atomic_read(&svms->drain_pagefaults); 2093 if (!drain) 2094 return; 2095 2096 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2097 pdd = p->pdds[i]; 2098 if (!pdd) 2099 continue; 2100 2101 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2102 2103 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2104 &pdd->dev->adev->irq.ih1); 2105 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2106 } 2107 if (atomic_cmpxchg(&svms->drain_pagefaults, drain, 0) != drain) 2108 goto restart; 2109 } 2110 2111 static void svm_range_deferred_list_work(struct work_struct *work) 2112 { 2113 struct svm_range_list *svms; 2114 struct svm_range *prange; 2115 struct mm_struct *mm; 2116 2117 svms = container_of(work, struct svm_range_list, deferred_list_work); 2118 pr_debug("enter svms 0x%p\n", svms); 2119 2120 spin_lock(&svms->deferred_list_lock); 2121 while (!list_empty(&svms->deferred_range_list)) { 2122 prange = list_first_entry(&svms->deferred_range_list, 2123 struct svm_range, deferred_list); 2124 spin_unlock(&svms->deferred_list_lock); 2125 2126 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2127 prange->start, prange->last, prange->work_item.op); 2128 2129 mm = prange->work_item.mm; 2130 retry: 2131 mmap_write_lock(mm); 2132 2133 /* Checking for the need to drain retry faults must be inside 2134 * mmap write lock to serialize with munmap notifiers. 2135 */ 2136 if (unlikely(atomic_read(&svms->drain_pagefaults))) { 2137 mmap_write_unlock(mm); 2138 svm_range_drain_retry_fault(svms); 2139 goto retry; 2140 } 2141 2142 /* Remove from deferred_list must be inside mmap write lock, for 2143 * two race cases: 2144 * 1. unmap_from_cpu may change work_item.op and add the range 2145 * to deferred_list again, cause use after free bug. 2146 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2147 * lock and continue because deferred_list is empty, but 2148 * deferred_list work is actually waiting for mmap lock. 2149 */ 2150 spin_lock(&svms->deferred_list_lock); 2151 list_del_init(&prange->deferred_list); 2152 spin_unlock(&svms->deferred_list_lock); 2153 2154 mutex_lock(&svms->lock); 2155 mutex_lock(&prange->migrate_mutex); 2156 while (!list_empty(&prange->child_list)) { 2157 struct svm_range *pchild; 2158 2159 pchild = list_first_entry(&prange->child_list, 2160 struct svm_range, child_list); 2161 pr_debug("child prange 0x%p op %d\n", pchild, 2162 pchild->work_item.op); 2163 list_del_init(&pchild->child_list); 2164 svm_range_handle_list_op(svms, pchild, mm); 2165 } 2166 mutex_unlock(&prange->migrate_mutex); 2167 2168 svm_range_handle_list_op(svms, prange, mm); 2169 mutex_unlock(&svms->lock); 2170 mmap_write_unlock(mm); 2171 2172 /* Pairs with mmget in svm_range_add_list_work */ 2173 mmput(mm); 2174 2175 spin_lock(&svms->deferred_list_lock); 2176 } 2177 spin_unlock(&svms->deferred_list_lock); 2178 pr_debug("exit svms 0x%p\n", svms); 2179 } 2180 2181 void 2182 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2183 struct mm_struct *mm, enum svm_work_list_ops op) 2184 { 2185 spin_lock(&svms->deferred_list_lock); 2186 /* if prange is on the deferred list */ 2187 if (!list_empty(&prange->deferred_list)) { 2188 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2189 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2190 if (op != SVM_OP_NULL && 2191 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2192 prange->work_item.op = op; 2193 } else { 2194 prange->work_item.op = op; 2195 2196 /* Pairs with mmput in deferred_list_work */ 2197 mmget(mm); 2198 prange->work_item.mm = mm; 2199 list_add_tail(&prange->deferred_list, 2200 &prange->svms->deferred_range_list); 2201 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2202 prange, prange->start, prange->last, op); 2203 } 2204 spin_unlock(&svms->deferred_list_lock); 2205 } 2206 2207 void schedule_deferred_list_work(struct svm_range_list *svms) 2208 { 2209 spin_lock(&svms->deferred_list_lock); 2210 if (!list_empty(&svms->deferred_range_list)) 2211 schedule_work(&svms->deferred_list_work); 2212 spin_unlock(&svms->deferred_list_lock); 2213 } 2214 2215 static void 2216 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent, 2217 struct svm_range *prange, unsigned long start, 2218 unsigned long last) 2219 { 2220 struct svm_range *head; 2221 struct svm_range *tail; 2222 2223 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2224 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2225 prange->start, prange->last); 2226 return; 2227 } 2228 if (start > prange->last || last < prange->start) 2229 return; 2230 2231 head = tail = prange; 2232 if (start > prange->start) 2233 svm_range_split(prange, prange->start, start - 1, &tail); 2234 if (last < tail->last) 2235 svm_range_split(tail, last + 1, tail->last, &head); 2236 2237 if (head != prange && tail != prange) { 2238 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2239 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 2240 } else if (tail != prange) { 2241 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE); 2242 } else if (head != prange) { 2243 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2244 } else if (parent != prange) { 2245 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2246 } 2247 } 2248 2249 static void 2250 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2251 unsigned long start, unsigned long last) 2252 { 2253 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2254 struct svm_range_list *svms; 2255 struct svm_range *pchild; 2256 struct kfd_process *p; 2257 unsigned long s, l; 2258 bool unmap_parent; 2259 2260 p = kfd_lookup_process_by_mm(mm); 2261 if (!p) 2262 return; 2263 svms = &p->svms; 2264 2265 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2266 prange, prange->start, prange->last, start, last); 2267 2268 /* Make sure pending page faults are drained in the deferred worker 2269 * before the range is freed to avoid straggler interrupts on 2270 * unmapped memory causing "phantom faults". 2271 */ 2272 atomic_inc(&svms->drain_pagefaults); 2273 2274 unmap_parent = start <= prange->start && last >= prange->last; 2275 2276 list_for_each_entry(pchild, &prange->child_list, child_list) { 2277 mutex_lock_nested(&pchild->lock, 1); 2278 s = max(start, pchild->start); 2279 l = min(last, pchild->last); 2280 if (l >= s) 2281 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2282 svm_range_unmap_split(mm, prange, pchild, start, last); 2283 mutex_unlock(&pchild->lock); 2284 } 2285 s = max(start, prange->start); 2286 l = min(last, prange->last); 2287 if (l >= s) 2288 svm_range_unmap_from_gpus(prange, s, l, trigger); 2289 svm_range_unmap_split(mm, prange, prange, start, last); 2290 2291 if (unmap_parent) 2292 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2293 else 2294 svm_range_add_list_work(svms, prange, mm, 2295 SVM_OP_UPDATE_RANGE_NOTIFIER); 2296 schedule_deferred_list_work(svms); 2297 2298 kfd_unref_process(p); 2299 } 2300 2301 /** 2302 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2303 * @mni: mmu_interval_notifier struct 2304 * @range: mmu_notifier_range struct 2305 * @cur_seq: value to pass to mmu_interval_set_seq() 2306 * 2307 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2308 * is from migration, or CPU page invalidation callback. 2309 * 2310 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2311 * work thread, and split prange if only part of prange is unmapped. 2312 * 2313 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2314 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2315 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2316 * update GPU mapping to recover. 2317 * 2318 * Context: mmap lock, notifier_invalidate_start lock are held 2319 * for invalidate event, prange lock is held if this is from migration 2320 */ 2321 static bool 2322 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2323 const struct mmu_notifier_range *range, 2324 unsigned long cur_seq) 2325 { 2326 struct svm_range *prange; 2327 unsigned long start; 2328 unsigned long last; 2329 2330 if (range->event == MMU_NOTIFY_RELEASE) 2331 return true; 2332 if (!mmget_not_zero(mni->mm)) 2333 return true; 2334 2335 start = mni->interval_tree.start; 2336 last = mni->interval_tree.last; 2337 start = max(start, range->start) >> PAGE_SHIFT; 2338 last = min(last, range->end - 1) >> PAGE_SHIFT; 2339 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2340 start, last, range->start >> PAGE_SHIFT, 2341 (range->end - 1) >> PAGE_SHIFT, 2342 mni->interval_tree.start >> PAGE_SHIFT, 2343 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2344 2345 prange = container_of(mni, struct svm_range, notifier); 2346 2347 svm_range_lock(prange); 2348 mmu_interval_set_seq(mni, cur_seq); 2349 2350 switch (range->event) { 2351 case MMU_NOTIFY_UNMAP: 2352 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2353 break; 2354 default: 2355 svm_range_evict(prange, mni->mm, start, last, range->event); 2356 break; 2357 } 2358 2359 svm_range_unlock(prange); 2360 mmput(mni->mm); 2361 2362 return true; 2363 } 2364 2365 /** 2366 * svm_range_from_addr - find svm range from fault address 2367 * @svms: svm range list header 2368 * @addr: address to search range interval tree, in pages 2369 * @parent: parent range if range is on child list 2370 * 2371 * Context: The caller must hold svms->lock 2372 * 2373 * Return: the svm_range found or NULL 2374 */ 2375 struct svm_range * 2376 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2377 struct svm_range **parent) 2378 { 2379 struct interval_tree_node *node; 2380 struct svm_range *prange; 2381 struct svm_range *pchild; 2382 2383 node = interval_tree_iter_first(&svms->objects, addr, addr); 2384 if (!node) 2385 return NULL; 2386 2387 prange = container_of(node, struct svm_range, it_node); 2388 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2389 addr, prange->start, prange->last, node->start, node->last); 2390 2391 if (addr >= prange->start && addr <= prange->last) { 2392 if (parent) 2393 *parent = prange; 2394 return prange; 2395 } 2396 list_for_each_entry(pchild, &prange->child_list, child_list) 2397 if (addr >= pchild->start && addr <= pchild->last) { 2398 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2399 addr, pchild->start, pchild->last); 2400 if (parent) 2401 *parent = prange; 2402 return pchild; 2403 } 2404 2405 return NULL; 2406 } 2407 2408 /* svm_range_best_restore_location - decide the best fault restore location 2409 * @prange: svm range structure 2410 * @adev: the GPU on which vm fault happened 2411 * 2412 * This is only called when xnack is on, to decide the best location to restore 2413 * the range mapping after GPU vm fault. Caller uses the best location to do 2414 * migration if actual loc is not best location, then update GPU page table 2415 * mapping to the best location. 2416 * 2417 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2418 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2419 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2420 * if range actual loc is cpu, best_loc is cpu 2421 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2422 * range actual loc. 2423 * Otherwise, GPU no access, best_loc is -1. 2424 * 2425 * Return: 2426 * -1 means vm fault GPU no access 2427 * 0 for CPU or GPU id 2428 */ 2429 static int32_t 2430 svm_range_best_restore_location(struct svm_range *prange, 2431 struct amdgpu_device *adev, 2432 int32_t *gpuidx) 2433 { 2434 struct amdgpu_device *bo_adev, *preferred_adev; 2435 struct kfd_process *p; 2436 uint32_t gpuid; 2437 int r; 2438 2439 p = container_of(prange->svms, struct kfd_process, svms); 2440 2441 r = kfd_process_gpuid_from_adev(p, adev, &gpuid, gpuidx); 2442 if (r < 0) { 2443 pr_debug("failed to get gpuid from kgd\n"); 2444 return -1; 2445 } 2446 2447 if (prange->preferred_loc == gpuid || 2448 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2449 return prange->preferred_loc; 2450 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2451 preferred_adev = svm_range_get_adev_by_id(prange, 2452 prange->preferred_loc); 2453 if (amdgpu_xgmi_same_hive(adev, preferred_adev)) 2454 return prange->preferred_loc; 2455 /* fall through */ 2456 } 2457 2458 if (test_bit(*gpuidx, prange->bitmap_access)) 2459 return gpuid; 2460 2461 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2462 if (!prange->actual_loc) 2463 return 0; 2464 2465 bo_adev = svm_range_get_adev_by_id(prange, prange->actual_loc); 2466 if (amdgpu_xgmi_same_hive(adev, bo_adev)) 2467 return prange->actual_loc; 2468 else 2469 return 0; 2470 } 2471 2472 return -1; 2473 } 2474 2475 static int 2476 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2477 unsigned long *start, unsigned long *last, 2478 bool *is_heap_stack) 2479 { 2480 struct vm_area_struct *vma; 2481 struct interval_tree_node *node; 2482 unsigned long start_limit, end_limit; 2483 2484 vma = find_vma(p->mm, addr << PAGE_SHIFT); 2485 if (!vma || (addr << PAGE_SHIFT) < vma->vm_start) { 2486 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2487 return -EFAULT; 2488 } 2489 2490 *is_heap_stack = (vma->vm_start <= vma->vm_mm->brk && 2491 vma->vm_end >= vma->vm_mm->start_brk) || 2492 (vma->vm_start <= vma->vm_mm->start_stack && 2493 vma->vm_end >= vma->vm_mm->start_stack); 2494 2495 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2496 (unsigned long)ALIGN_DOWN(addr, 2UL << 8)); 2497 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2498 (unsigned long)ALIGN(addr + 1, 2UL << 8)); 2499 /* First range that starts after the fault address */ 2500 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2501 if (node) { 2502 end_limit = min(end_limit, node->start); 2503 /* Last range that ends before the fault address */ 2504 node = container_of(rb_prev(&node->rb), 2505 struct interval_tree_node, rb); 2506 } else { 2507 /* Last range must end before addr because 2508 * there was no range after addr 2509 */ 2510 node = container_of(rb_last(&p->svms.objects.rb_root), 2511 struct interval_tree_node, rb); 2512 } 2513 if (node) { 2514 if (node->last >= addr) { 2515 WARN(1, "Overlap with prev node and page fault addr\n"); 2516 return -EFAULT; 2517 } 2518 start_limit = max(start_limit, node->last + 1); 2519 } 2520 2521 *start = start_limit; 2522 *last = end_limit - 1; 2523 2524 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2525 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2526 *start, *last, *is_heap_stack); 2527 2528 return 0; 2529 } 2530 2531 static int 2532 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2533 uint64_t *bo_s, uint64_t *bo_l) 2534 { 2535 struct amdgpu_bo_va_mapping *mapping; 2536 struct interval_tree_node *node; 2537 struct amdgpu_bo *bo = NULL; 2538 unsigned long userptr; 2539 uint32_t i; 2540 int r; 2541 2542 for (i = 0; i < p->n_pdds; i++) { 2543 struct amdgpu_vm *vm; 2544 2545 if (!p->pdds[i]->drm_priv) 2546 continue; 2547 2548 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2549 r = amdgpu_bo_reserve(vm->root.bo, false); 2550 if (r) 2551 return r; 2552 2553 /* Check userptr by searching entire vm->va interval tree */ 2554 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2555 while (node) { 2556 mapping = container_of((struct rb_node *)node, 2557 struct amdgpu_bo_va_mapping, rb); 2558 bo = mapping->bo_va->base.bo; 2559 2560 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2561 start << PAGE_SHIFT, 2562 last << PAGE_SHIFT, 2563 &userptr)) { 2564 node = interval_tree_iter_next(node, 0, ~0ULL); 2565 continue; 2566 } 2567 2568 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2569 start, last); 2570 if (bo_s && bo_l) { 2571 *bo_s = userptr >> PAGE_SHIFT; 2572 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2573 } 2574 amdgpu_bo_unreserve(vm->root.bo); 2575 return -EADDRINUSE; 2576 } 2577 amdgpu_bo_unreserve(vm->root.bo); 2578 } 2579 return 0; 2580 } 2581 2582 static struct 2583 svm_range *svm_range_create_unregistered_range(struct amdgpu_device *adev, 2584 struct kfd_process *p, 2585 struct mm_struct *mm, 2586 int64_t addr) 2587 { 2588 struct svm_range *prange = NULL; 2589 unsigned long start, last; 2590 uint32_t gpuid, gpuidx; 2591 bool is_heap_stack; 2592 uint64_t bo_s = 0; 2593 uint64_t bo_l = 0; 2594 int r; 2595 2596 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2597 &is_heap_stack)) 2598 return NULL; 2599 2600 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2601 if (r != -EADDRINUSE) 2602 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2603 2604 if (r == -EADDRINUSE) { 2605 if (addr >= bo_s && addr <= bo_l) 2606 return NULL; 2607 2608 /* Create one page svm range if 2MB range overlapping */ 2609 start = addr; 2610 last = addr; 2611 } 2612 2613 prange = svm_range_new(&p->svms, start, last); 2614 if (!prange) { 2615 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2616 return NULL; 2617 } 2618 if (kfd_process_gpuid_from_adev(p, adev, &gpuid, &gpuidx)) { 2619 pr_debug("failed to get gpuid from kgd\n"); 2620 svm_range_free(prange); 2621 return NULL; 2622 } 2623 2624 if (is_heap_stack) 2625 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2626 2627 svm_range_add_to_svms(prange); 2628 svm_range_add_notifier_locked(mm, prange); 2629 2630 return prange; 2631 } 2632 2633 /* svm_range_skip_recover - decide if prange can be recovered 2634 * @prange: svm range structure 2635 * 2636 * GPU vm retry fault handle skip recover the range for cases: 2637 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2638 * deferred list work will drain the stale fault before free the prange. 2639 * 2. prange is on deferred list to add interval notifier after split, or 2640 * 3. prange is child range, it is split from parent prange, recover later 2641 * after interval notifier is added. 2642 * 2643 * Return: true to skip recover, false to recover 2644 */ 2645 static bool svm_range_skip_recover(struct svm_range *prange) 2646 { 2647 struct svm_range_list *svms = prange->svms; 2648 2649 spin_lock(&svms->deferred_list_lock); 2650 if (list_empty(&prange->deferred_list) && 2651 list_empty(&prange->child_list)) { 2652 spin_unlock(&svms->deferred_list_lock); 2653 return false; 2654 } 2655 spin_unlock(&svms->deferred_list_lock); 2656 2657 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2658 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2659 svms, prange, prange->start, prange->last); 2660 return true; 2661 } 2662 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2663 prange->work_item.op == SVM_OP_ADD_RANGE) { 2664 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2665 svms, prange, prange->start, prange->last); 2666 return true; 2667 } 2668 return false; 2669 } 2670 2671 static void 2672 svm_range_count_fault(struct amdgpu_device *adev, struct kfd_process *p, 2673 int32_t gpuidx) 2674 { 2675 struct kfd_process_device *pdd; 2676 2677 /* fault is on different page of same range 2678 * or fault is skipped to recover later 2679 * or fault is on invalid virtual address 2680 */ 2681 if (gpuidx == MAX_GPU_INSTANCE) { 2682 uint32_t gpuid; 2683 int r; 2684 2685 r = kfd_process_gpuid_from_adev(p, adev, &gpuid, &gpuidx); 2686 if (r < 0) 2687 return; 2688 } 2689 2690 /* fault is recovered 2691 * or fault cannot recover because GPU no access on the range 2692 */ 2693 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2694 if (pdd) 2695 WRITE_ONCE(pdd->faults, pdd->faults + 1); 2696 } 2697 2698 static bool 2699 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 2700 { 2701 unsigned long requested = VM_READ; 2702 2703 if (write_fault) 2704 requested |= VM_WRITE; 2705 2706 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 2707 vma->vm_flags); 2708 return (vma->vm_flags & requested) == requested; 2709 } 2710 2711 int 2712 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 2713 uint64_t addr, bool write_fault) 2714 { 2715 struct mm_struct *mm = NULL; 2716 struct svm_range_list *svms; 2717 struct svm_range *prange; 2718 struct kfd_process *p; 2719 ktime_t timestamp = ktime_get_boottime(); 2720 int32_t best_loc; 2721 int32_t gpuidx = MAX_GPU_INSTANCE; 2722 bool write_locked = false; 2723 struct vm_area_struct *vma; 2724 bool migration = false; 2725 int r = 0; 2726 2727 if (!KFD_IS_SVM_API_SUPPORTED(adev->kfd.dev)) { 2728 pr_debug("device does not support SVM\n"); 2729 return -EFAULT; 2730 } 2731 2732 p = kfd_lookup_process_by_pasid(pasid); 2733 if (!p) { 2734 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 2735 return 0; 2736 } 2737 svms = &p->svms; 2738 2739 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 2740 2741 if (atomic_read(&svms->drain_pagefaults)) { 2742 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 2743 r = 0; 2744 goto out; 2745 } 2746 2747 if (!p->xnack_enabled) { 2748 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 2749 r = -EFAULT; 2750 goto out; 2751 } 2752 2753 /* p->lead_thread is available as kfd_process_wq_release flush the work 2754 * before releasing task ref. 2755 */ 2756 mm = get_task_mm(p->lead_thread); 2757 if (!mm) { 2758 pr_debug("svms 0x%p failed to get mm\n", svms); 2759 r = 0; 2760 goto out; 2761 } 2762 2763 mmap_read_lock(mm); 2764 retry_write_locked: 2765 mutex_lock(&svms->lock); 2766 prange = svm_range_from_addr(svms, addr, NULL); 2767 if (!prange) { 2768 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 2769 svms, addr); 2770 if (!write_locked) { 2771 /* Need the write lock to create new range with MMU notifier. 2772 * Also flush pending deferred work to make sure the interval 2773 * tree is up to date before we add a new range 2774 */ 2775 mutex_unlock(&svms->lock); 2776 mmap_read_unlock(mm); 2777 mmap_write_lock(mm); 2778 write_locked = true; 2779 goto retry_write_locked; 2780 } 2781 prange = svm_range_create_unregistered_range(adev, p, mm, addr); 2782 if (!prange) { 2783 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 2784 svms, addr); 2785 mmap_write_downgrade(mm); 2786 r = -EFAULT; 2787 goto out_unlock_svms; 2788 } 2789 } 2790 if (write_locked) 2791 mmap_write_downgrade(mm); 2792 2793 mutex_lock(&prange->migrate_mutex); 2794 2795 if (svm_range_skip_recover(prange)) { 2796 amdgpu_gmc_filter_faults_remove(adev, addr, pasid); 2797 r = 0; 2798 goto out_unlock_range; 2799 } 2800 2801 /* skip duplicate vm fault on different pages of same range */ 2802 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 2803 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 2804 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 2805 svms, prange->start, prange->last); 2806 r = 0; 2807 goto out_unlock_range; 2808 } 2809 2810 /* __do_munmap removed VMA, return success as we are handling stale 2811 * retry fault. 2812 */ 2813 vma = find_vma(mm, addr << PAGE_SHIFT); 2814 if (!vma || (addr << PAGE_SHIFT) < vma->vm_start) { 2815 pr_debug("address 0x%llx VMA is removed\n", addr); 2816 r = 0; 2817 goto out_unlock_range; 2818 } 2819 2820 if (!svm_fault_allowed(vma, write_fault)) { 2821 pr_debug("fault addr 0x%llx no %s permission\n", addr, 2822 write_fault ? "write" : "read"); 2823 r = -EPERM; 2824 goto out_unlock_range; 2825 } 2826 2827 best_loc = svm_range_best_restore_location(prange, adev, &gpuidx); 2828 if (best_loc == -1) { 2829 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 2830 svms, prange->start, prange->last); 2831 r = -EACCES; 2832 goto out_unlock_range; 2833 } 2834 2835 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 2836 svms, prange->start, prange->last, best_loc, 2837 prange->actual_loc); 2838 2839 kfd_smi_event_page_fault_start(adev->kfd.dev, p->lead_thread->pid, addr, 2840 write_fault, timestamp); 2841 2842 if (prange->actual_loc != best_loc) { 2843 migration = true; 2844 if (best_loc) { 2845 r = svm_migrate_to_vram(prange, best_loc, mm, 2846 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 2847 if (r) { 2848 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 2849 r, addr); 2850 /* Fallback to system memory if migration to 2851 * VRAM failed 2852 */ 2853 if (prange->actual_loc) 2854 r = svm_migrate_vram_to_ram(prange, mm, 2855 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 2856 else 2857 r = 0; 2858 } 2859 } else { 2860 r = svm_migrate_vram_to_ram(prange, mm, 2861 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 2862 } 2863 if (r) { 2864 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 2865 r, svms, prange->start, prange->last); 2866 goto out_unlock_range; 2867 } 2868 } 2869 2870 r = svm_range_validate_and_map(mm, prange, gpuidx, false, false, false); 2871 if (r) 2872 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 2873 r, svms, prange->start, prange->last); 2874 2875 kfd_smi_event_page_fault_end(adev->kfd.dev, p->lead_thread->pid, addr, 2876 migration); 2877 2878 out_unlock_range: 2879 mutex_unlock(&prange->migrate_mutex); 2880 out_unlock_svms: 2881 mutex_unlock(&svms->lock); 2882 mmap_read_unlock(mm); 2883 2884 svm_range_count_fault(adev, p, gpuidx); 2885 2886 mmput(mm); 2887 out: 2888 kfd_unref_process(p); 2889 2890 if (r == -EAGAIN) { 2891 pr_debug("recover vm fault later\n"); 2892 amdgpu_gmc_filter_faults_remove(adev, addr, pasid); 2893 r = 0; 2894 } 2895 return r; 2896 } 2897 2898 void svm_range_list_fini(struct kfd_process *p) 2899 { 2900 struct svm_range *prange; 2901 struct svm_range *next; 2902 2903 pr_debug("pasid 0x%x svms 0x%p\n", p->pasid, &p->svms); 2904 2905 cancel_delayed_work_sync(&p->svms.restore_work); 2906 2907 /* Ensure list work is finished before process is destroyed */ 2908 flush_work(&p->svms.deferred_list_work); 2909 2910 /* 2911 * Ensure no retry fault comes in afterwards, as page fault handler will 2912 * not find kfd process and take mm lock to recover fault. 2913 */ 2914 atomic_inc(&p->svms.drain_pagefaults); 2915 svm_range_drain_retry_fault(&p->svms); 2916 2917 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 2918 svm_range_unlink(prange); 2919 svm_range_remove_notifier(prange); 2920 svm_range_free(prange); 2921 } 2922 2923 mutex_destroy(&p->svms.lock); 2924 2925 pr_debug("pasid 0x%x svms 0x%p done\n", p->pasid, &p->svms); 2926 } 2927 2928 int svm_range_list_init(struct kfd_process *p) 2929 { 2930 struct svm_range_list *svms = &p->svms; 2931 int i; 2932 2933 svms->objects = RB_ROOT_CACHED; 2934 mutex_init(&svms->lock); 2935 INIT_LIST_HEAD(&svms->list); 2936 atomic_set(&svms->evicted_ranges, 0); 2937 atomic_set(&svms->drain_pagefaults, 0); 2938 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 2939 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 2940 INIT_LIST_HEAD(&svms->deferred_range_list); 2941 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 2942 spin_lock_init(&svms->deferred_list_lock); 2943 2944 for (i = 0; i < p->n_pdds; i++) 2945 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev)) 2946 bitmap_set(svms->bitmap_supported, i, 1); 2947 2948 return 0; 2949 } 2950 2951 /** 2952 * svm_range_check_vm - check if virtual address range mapped already 2953 * @p: current kfd_process 2954 * @start: range start address, in pages 2955 * @last: range last address, in pages 2956 * @bo_s: mapping start address in pages if address range already mapped 2957 * @bo_l: mapping last address in pages if address range already mapped 2958 * 2959 * The purpose is to avoid virtual address ranges already allocated by 2960 * kfd_ioctl_alloc_memory_of_gpu ioctl. 2961 * It looks for each pdd in the kfd_process. 2962 * 2963 * Context: Process context 2964 * 2965 * Return 0 - OK, if the range is not mapped. 2966 * Otherwise error code: 2967 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 2968 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 2969 * a signal. Release all buffer reservations and return to user-space. 2970 */ 2971 static int 2972 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 2973 uint64_t *bo_s, uint64_t *bo_l) 2974 { 2975 struct amdgpu_bo_va_mapping *mapping; 2976 struct interval_tree_node *node; 2977 uint32_t i; 2978 int r; 2979 2980 for (i = 0; i < p->n_pdds; i++) { 2981 struct amdgpu_vm *vm; 2982 2983 if (!p->pdds[i]->drm_priv) 2984 continue; 2985 2986 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2987 r = amdgpu_bo_reserve(vm->root.bo, false); 2988 if (r) 2989 return r; 2990 2991 node = interval_tree_iter_first(&vm->va, start, last); 2992 if (node) { 2993 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 2994 start, last); 2995 mapping = container_of((struct rb_node *)node, 2996 struct amdgpu_bo_va_mapping, rb); 2997 if (bo_s && bo_l) { 2998 *bo_s = mapping->start; 2999 *bo_l = mapping->last; 3000 } 3001 amdgpu_bo_unreserve(vm->root.bo); 3002 return -EADDRINUSE; 3003 } 3004 amdgpu_bo_unreserve(vm->root.bo); 3005 } 3006 3007 return 0; 3008 } 3009 3010 /** 3011 * svm_range_is_valid - check if virtual address range is valid 3012 * @p: current kfd_process 3013 * @start: range start address, in pages 3014 * @size: range size, in pages 3015 * 3016 * Valid virtual address range means it belongs to one or more VMAs 3017 * 3018 * Context: Process context 3019 * 3020 * Return: 3021 * 0 - OK, otherwise error code 3022 */ 3023 static int 3024 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3025 { 3026 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3027 struct vm_area_struct *vma; 3028 unsigned long end; 3029 unsigned long start_unchg = start; 3030 3031 start <<= PAGE_SHIFT; 3032 end = start + (size << PAGE_SHIFT); 3033 do { 3034 vma = find_vma(p->mm, start); 3035 if (!vma || start < vma->vm_start || 3036 (vma->vm_flags & device_vma)) 3037 return -EFAULT; 3038 start = min(end, vma->vm_end); 3039 } while (start < end); 3040 3041 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3042 NULL); 3043 } 3044 3045 /** 3046 * svm_range_best_prefetch_location - decide the best prefetch location 3047 * @prange: svm range structure 3048 * 3049 * For xnack off: 3050 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3051 * can be CPU or GPU. 3052 * 3053 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3054 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3055 * the best prefetch location is always CPU, because GPU can not have coherent 3056 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3057 * 3058 * For xnack on: 3059 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3060 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3061 * 3062 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3063 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3064 * prefetch location is always CPU. 3065 * 3066 * Context: Process context 3067 * 3068 * Return: 3069 * 0 for CPU or GPU id 3070 */ 3071 static uint32_t 3072 svm_range_best_prefetch_location(struct svm_range *prange) 3073 { 3074 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3075 uint32_t best_loc = prange->prefetch_loc; 3076 struct kfd_process_device *pdd; 3077 struct amdgpu_device *bo_adev; 3078 struct kfd_process *p; 3079 uint32_t gpuidx; 3080 3081 p = container_of(prange->svms, struct kfd_process, svms); 3082 3083 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3084 goto out; 3085 3086 bo_adev = svm_range_get_adev_by_id(prange, best_loc); 3087 if (!bo_adev) { 3088 WARN_ONCE(1, "failed to get device by id 0x%x\n", best_loc); 3089 best_loc = 0; 3090 goto out; 3091 } 3092 3093 if (p->xnack_enabled) 3094 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3095 else 3096 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3097 MAX_GPU_INSTANCE); 3098 3099 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3100 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3101 if (!pdd) { 3102 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3103 continue; 3104 } 3105 3106 if (pdd->dev->adev == bo_adev) 3107 continue; 3108 3109 if (!amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 3110 best_loc = 0; 3111 break; 3112 } 3113 } 3114 3115 out: 3116 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3117 p->xnack_enabled, &p->svms, prange->start, prange->last, 3118 best_loc); 3119 3120 return best_loc; 3121 } 3122 3123 /* FIXME: This is a workaround for page locking bug when some pages are 3124 * invalid during migration to VRAM 3125 */ 3126 void svm_range_prefault(struct svm_range *prange, struct mm_struct *mm, 3127 void *owner) 3128 { 3129 struct hmm_range *hmm_range; 3130 int r; 3131 3132 if (prange->validated_once) 3133 return; 3134 3135 r = amdgpu_hmm_range_get_pages(&prange->notifier, mm, NULL, 3136 prange->start << PAGE_SHIFT, 3137 prange->npages, &hmm_range, 3138 false, true, owner); 3139 if (!r) { 3140 amdgpu_hmm_range_get_pages_done(hmm_range); 3141 prange->validated_once = true; 3142 } 3143 } 3144 3145 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3146 * @mm: current process mm_struct 3147 * @prange: svm range structure 3148 * @migrated: output, true if migration is triggered 3149 * 3150 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3151 * from ram to vram. 3152 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3153 * from vram to ram. 3154 * 3155 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3156 * and restore work: 3157 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3158 * stops all queues, schedule restore work 3159 * 2. svm_range_restore_work wait for migration is done by 3160 * a. svm_range_validate_vram takes prange->migrate_mutex 3161 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3162 * 3. restore work update mappings of GPU, resume all queues. 3163 * 3164 * Context: Process context 3165 * 3166 * Return: 3167 * 0 - OK, otherwise - error code of migration 3168 */ 3169 static int 3170 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3171 bool *migrated) 3172 { 3173 uint32_t best_loc; 3174 int r = 0; 3175 3176 *migrated = false; 3177 best_loc = svm_range_best_prefetch_location(prange); 3178 3179 if (best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3180 best_loc == prange->actual_loc) 3181 return 0; 3182 3183 if (!best_loc) { 3184 r = svm_migrate_vram_to_ram(prange, mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3185 *migrated = !r; 3186 return r; 3187 } 3188 3189 r = svm_migrate_to_vram(prange, best_loc, mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3190 *migrated = !r; 3191 3192 return r; 3193 } 3194 3195 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3196 { 3197 if (!fence) 3198 return -EINVAL; 3199 3200 if (dma_fence_is_signaled(&fence->base)) 3201 return 0; 3202 3203 if (fence->svm_bo) { 3204 WRITE_ONCE(fence->svm_bo->evicting, 1); 3205 schedule_work(&fence->svm_bo->eviction_work); 3206 } 3207 3208 return 0; 3209 } 3210 3211 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3212 { 3213 struct svm_range_bo *svm_bo; 3214 struct kfd_process *p; 3215 struct mm_struct *mm; 3216 int r = 0; 3217 3218 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3219 if (!svm_bo_ref_unless_zero(svm_bo)) 3220 return; /* svm_bo was freed while eviction was pending */ 3221 3222 /* svm_range_bo_release destroys this worker thread. So during 3223 * the lifetime of this thread, kfd_process and mm will be valid. 3224 */ 3225 p = container_of(svm_bo->svms, struct kfd_process, svms); 3226 mm = p->mm; 3227 if (!mm) 3228 return; 3229 3230 mmap_read_lock(mm); 3231 spin_lock(&svm_bo->list_lock); 3232 while (!list_empty(&svm_bo->range_list) && !r) { 3233 struct svm_range *prange = 3234 list_first_entry(&svm_bo->range_list, 3235 struct svm_range, svm_bo_list); 3236 int retries = 3; 3237 3238 list_del_init(&prange->svm_bo_list); 3239 spin_unlock(&svm_bo->list_lock); 3240 3241 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3242 prange->start, prange->last); 3243 3244 mutex_lock(&prange->migrate_mutex); 3245 do { 3246 r = svm_migrate_vram_to_ram(prange, 3247 svm_bo->eviction_fence->mm, 3248 KFD_MIGRATE_TRIGGER_TTM_EVICTION); 3249 } while (!r && prange->actual_loc && --retries); 3250 3251 if (!r && prange->actual_loc) 3252 pr_info_once("Migration failed during eviction"); 3253 3254 if (!prange->actual_loc) { 3255 mutex_lock(&prange->lock); 3256 prange->svm_bo = NULL; 3257 mutex_unlock(&prange->lock); 3258 } 3259 mutex_unlock(&prange->migrate_mutex); 3260 3261 spin_lock(&svm_bo->list_lock); 3262 } 3263 spin_unlock(&svm_bo->list_lock); 3264 mmap_read_unlock(mm); 3265 3266 dma_fence_signal(&svm_bo->eviction_fence->base); 3267 3268 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3269 * has been called in svm_migrate_vram_to_ram 3270 */ 3271 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3272 svm_range_bo_unref(svm_bo); 3273 } 3274 3275 static int 3276 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3277 uint64_t start, uint64_t size, uint32_t nattr, 3278 struct kfd_ioctl_svm_attribute *attrs) 3279 { 3280 struct amdkfd_process_info *process_info = p->kgd_process_info; 3281 struct list_head update_list; 3282 struct list_head insert_list; 3283 struct list_head remove_list; 3284 struct svm_range_list *svms; 3285 struct svm_range *prange; 3286 struct svm_range *next; 3287 bool update_mapping = false; 3288 bool flush_tlb; 3289 int r = 0; 3290 3291 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3292 p->pasid, &p->svms, start, start + size - 1, size); 3293 3294 r = svm_range_check_attr(p, nattr, attrs); 3295 if (r) 3296 return r; 3297 3298 svms = &p->svms; 3299 3300 mutex_lock(&process_info->lock); 3301 3302 svm_range_list_lock_and_flush_work(svms, mm); 3303 3304 r = svm_range_is_valid(p, start, size); 3305 if (r) { 3306 pr_debug("invalid range r=%d\n", r); 3307 mmap_write_unlock(mm); 3308 goto out; 3309 } 3310 3311 mutex_lock(&svms->lock); 3312 3313 /* Add new range and split existing ranges as needed */ 3314 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3315 &insert_list, &remove_list); 3316 if (r) { 3317 mutex_unlock(&svms->lock); 3318 mmap_write_unlock(mm); 3319 goto out; 3320 } 3321 /* Apply changes as a transaction */ 3322 list_for_each_entry_safe(prange, next, &insert_list, list) { 3323 svm_range_add_to_svms(prange); 3324 svm_range_add_notifier_locked(mm, prange); 3325 } 3326 list_for_each_entry(prange, &update_list, update_list) { 3327 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3328 /* TODO: unmap ranges from GPU that lost access */ 3329 } 3330 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3331 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3332 prange->svms, prange, prange->start, 3333 prange->last); 3334 svm_range_unlink(prange); 3335 svm_range_remove_notifier(prange); 3336 svm_range_free(prange); 3337 } 3338 3339 mmap_write_downgrade(mm); 3340 /* Trigger migrations and revalidate and map to GPUs as needed. If 3341 * this fails we may be left with partially completed actions. There 3342 * is no clean way of rolling back to the previous state in such a 3343 * case because the rollback wouldn't be guaranteed to work either. 3344 */ 3345 list_for_each_entry(prange, &update_list, update_list) { 3346 bool migrated; 3347 3348 mutex_lock(&prange->migrate_mutex); 3349 3350 r = svm_range_trigger_migration(mm, prange, &migrated); 3351 if (r) 3352 goto out_unlock_range; 3353 3354 if (migrated && (!p->xnack_enabled || 3355 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3356 prange->mapped_to_gpu) { 3357 pr_debug("restore_work will update mappings of GPUs\n"); 3358 mutex_unlock(&prange->migrate_mutex); 3359 continue; 3360 } 3361 3362 if (!migrated && !update_mapping) { 3363 mutex_unlock(&prange->migrate_mutex); 3364 continue; 3365 } 3366 3367 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3368 3369 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 3370 true, true, flush_tlb); 3371 if (r) 3372 pr_debug("failed %d to map svm range\n", r); 3373 3374 out_unlock_range: 3375 mutex_unlock(&prange->migrate_mutex); 3376 if (r) 3377 break; 3378 } 3379 3380 svm_range_debug_dump(svms); 3381 3382 mutex_unlock(&svms->lock); 3383 mmap_read_unlock(mm); 3384 out: 3385 mutex_unlock(&process_info->lock); 3386 3387 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid, 3388 &p->svms, start, start + size - 1, r); 3389 3390 return r; 3391 } 3392 3393 static int 3394 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3395 uint64_t start, uint64_t size, uint32_t nattr, 3396 struct kfd_ioctl_svm_attribute *attrs) 3397 { 3398 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3399 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3400 bool get_preferred_loc = false; 3401 bool get_prefetch_loc = false; 3402 bool get_granularity = false; 3403 bool get_accessible = false; 3404 bool get_flags = false; 3405 uint64_t last = start + size - 1UL; 3406 uint8_t granularity = 0xff; 3407 struct interval_tree_node *node; 3408 struct svm_range_list *svms; 3409 struct svm_range *prange; 3410 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3411 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3412 uint32_t flags_and = 0xffffffff; 3413 uint32_t flags_or = 0; 3414 int gpuidx; 3415 uint32_t i; 3416 int r = 0; 3417 3418 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3419 start + size - 1, nattr); 3420 3421 /* Flush pending deferred work to avoid racing with deferred actions from 3422 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3423 * can still race with get_attr because we don't hold the mmap lock. But that 3424 * would be a race condition in the application anyway, and undefined 3425 * behaviour is acceptable in that case. 3426 */ 3427 flush_work(&p->svms.deferred_list_work); 3428 3429 mmap_read_lock(mm); 3430 r = svm_range_is_valid(p, start, size); 3431 mmap_read_unlock(mm); 3432 if (r) { 3433 pr_debug("invalid range r=%d\n", r); 3434 return r; 3435 } 3436 3437 for (i = 0; i < nattr; i++) { 3438 switch (attrs[i].type) { 3439 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3440 get_preferred_loc = true; 3441 break; 3442 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3443 get_prefetch_loc = true; 3444 break; 3445 case KFD_IOCTL_SVM_ATTR_ACCESS: 3446 get_accessible = true; 3447 break; 3448 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3449 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3450 get_flags = true; 3451 break; 3452 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3453 get_granularity = true; 3454 break; 3455 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3456 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3457 fallthrough; 3458 default: 3459 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3460 return -EINVAL; 3461 } 3462 } 3463 3464 svms = &p->svms; 3465 3466 mutex_lock(&svms->lock); 3467 3468 node = interval_tree_iter_first(&svms->objects, start, last); 3469 if (!node) { 3470 pr_debug("range attrs not found return default values\n"); 3471 svm_range_set_default_attributes(&location, &prefetch_loc, 3472 &granularity, &flags_and); 3473 flags_or = flags_and; 3474 if (p->xnack_enabled) 3475 bitmap_copy(bitmap_access, svms->bitmap_supported, 3476 MAX_GPU_INSTANCE); 3477 else 3478 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3479 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3480 goto fill_values; 3481 } 3482 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3483 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3484 3485 while (node) { 3486 struct interval_tree_node *next; 3487 3488 prange = container_of(node, struct svm_range, it_node); 3489 next = interval_tree_iter_next(node, start, last); 3490 3491 if (get_preferred_loc) { 3492 if (prange->preferred_loc == 3493 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3494 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3495 location != prange->preferred_loc)) { 3496 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3497 get_preferred_loc = false; 3498 } else { 3499 location = prange->preferred_loc; 3500 } 3501 } 3502 if (get_prefetch_loc) { 3503 if (prange->prefetch_loc == 3504 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3505 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3506 prefetch_loc != prange->prefetch_loc)) { 3507 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3508 get_prefetch_loc = false; 3509 } else { 3510 prefetch_loc = prange->prefetch_loc; 3511 } 3512 } 3513 if (get_accessible) { 3514 bitmap_and(bitmap_access, bitmap_access, 3515 prange->bitmap_access, MAX_GPU_INSTANCE); 3516 bitmap_and(bitmap_aip, bitmap_aip, 3517 prange->bitmap_aip, MAX_GPU_INSTANCE); 3518 } 3519 if (get_flags) { 3520 flags_and &= prange->flags; 3521 flags_or |= prange->flags; 3522 } 3523 3524 if (get_granularity && prange->granularity < granularity) 3525 granularity = prange->granularity; 3526 3527 node = next; 3528 } 3529 fill_values: 3530 mutex_unlock(&svms->lock); 3531 3532 for (i = 0; i < nattr; i++) { 3533 switch (attrs[i].type) { 3534 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3535 attrs[i].value = location; 3536 break; 3537 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3538 attrs[i].value = prefetch_loc; 3539 break; 3540 case KFD_IOCTL_SVM_ATTR_ACCESS: 3541 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3542 attrs[i].value); 3543 if (gpuidx < 0) { 3544 pr_debug("invalid gpuid %x\n", attrs[i].value); 3545 return -EINVAL; 3546 } 3547 if (test_bit(gpuidx, bitmap_access)) 3548 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3549 else if (test_bit(gpuidx, bitmap_aip)) 3550 attrs[i].type = 3551 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3552 else 3553 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3554 break; 3555 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3556 attrs[i].value = flags_and; 3557 break; 3558 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3559 attrs[i].value = ~flags_or; 3560 break; 3561 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3562 attrs[i].value = (uint32_t)granularity; 3563 break; 3564 } 3565 } 3566 3567 return 0; 3568 } 3569 3570 int kfd_criu_resume_svm(struct kfd_process *p) 3571 { 3572 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3573 int nattr_common = 4, nattr_accessibility = 1; 3574 struct criu_svm_metadata *criu_svm_md = NULL; 3575 struct svm_range_list *svms = &p->svms; 3576 struct criu_svm_metadata *next = NULL; 3577 uint32_t set_flags = 0xffffffff; 3578 int i, j, num_attrs, ret = 0; 3579 uint64_t set_attr_size; 3580 struct mm_struct *mm; 3581 3582 if (list_empty(&svms->criu_svm_metadata_list)) { 3583 pr_debug("No SVM data from CRIU restore stage 2\n"); 3584 return ret; 3585 } 3586 3587 mm = get_task_mm(p->lead_thread); 3588 if (!mm) { 3589 pr_err("failed to get mm for the target process\n"); 3590 return -ESRCH; 3591 } 3592 3593 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 3594 3595 i = j = 0; 3596 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 3597 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 3598 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 3599 3600 for (j = 0; j < num_attrs; j++) { 3601 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 3602 i, j, criu_svm_md->data.attrs[j].type, 3603 i, j, criu_svm_md->data.attrs[j].value); 3604 switch (criu_svm_md->data.attrs[j].type) { 3605 /* During Checkpoint operation, the query for 3606 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 3607 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 3608 * not used by the range which was checkpointed. Care 3609 * must be taken to not restore with an invalid value 3610 * otherwise the gpuidx value will be invalid and 3611 * set_attr would eventually fail so just replace those 3612 * with another dummy attribute such as 3613 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 3614 */ 3615 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3616 if (criu_svm_md->data.attrs[j].value == 3617 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 3618 criu_svm_md->data.attrs[j].type = 3619 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3620 criu_svm_md->data.attrs[j].value = 0; 3621 } 3622 break; 3623 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3624 set_flags = criu_svm_md->data.attrs[j].value; 3625 break; 3626 default: 3627 break; 3628 } 3629 } 3630 3631 /* CLR_FLAGS is not available via get_attr during checkpoint but 3632 * it needs to be inserted before restoring the ranges so 3633 * allocate extra space for it before calling set_attr 3634 */ 3635 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3636 (num_attrs + 1); 3637 set_attr_new = krealloc(set_attr, set_attr_size, 3638 GFP_KERNEL); 3639 if (!set_attr_new) { 3640 ret = -ENOMEM; 3641 goto exit; 3642 } 3643 set_attr = set_attr_new; 3644 3645 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 3646 sizeof(struct kfd_ioctl_svm_attribute)); 3647 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 3648 set_attr[num_attrs].value = ~set_flags; 3649 3650 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 3651 criu_svm_md->data.size, num_attrs + 1, 3652 set_attr); 3653 if (ret) { 3654 pr_err("CRIU: failed to set range attributes\n"); 3655 goto exit; 3656 } 3657 3658 i++; 3659 } 3660 exit: 3661 kfree(set_attr); 3662 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 3663 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 3664 criu_svm_md->data.start_addr); 3665 kfree(criu_svm_md); 3666 } 3667 3668 mmput(mm); 3669 return ret; 3670 3671 } 3672 3673 int kfd_criu_restore_svm(struct kfd_process *p, 3674 uint8_t __user *user_priv_ptr, 3675 uint64_t *priv_data_offset, 3676 uint64_t max_priv_data_size) 3677 { 3678 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 3679 int nattr_common = 4, nattr_accessibility = 1; 3680 struct criu_svm_metadata *criu_svm_md = NULL; 3681 struct svm_range_list *svms = &p->svms; 3682 uint32_t num_devices; 3683 int ret = 0; 3684 3685 num_devices = p->n_pdds; 3686 /* Handle one SVM range object at a time, also the number of gpus are 3687 * assumed to be same on the restore node, checking must be done while 3688 * evaluating the topology earlier 3689 */ 3690 3691 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 3692 (nattr_common + nattr_accessibility * num_devices); 3693 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 3694 3695 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 3696 svm_attrs_size; 3697 3698 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 3699 if (!criu_svm_md) { 3700 pr_err("failed to allocate memory to store svm metadata\n"); 3701 return -ENOMEM; 3702 } 3703 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 3704 ret = -EINVAL; 3705 goto exit; 3706 } 3707 3708 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 3709 svm_priv_data_size); 3710 if (ret) { 3711 ret = -EFAULT; 3712 goto exit; 3713 } 3714 *priv_data_offset += svm_priv_data_size; 3715 3716 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 3717 3718 return 0; 3719 3720 3721 exit: 3722 kfree(criu_svm_md); 3723 return ret; 3724 } 3725 3726 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 3727 uint64_t *svm_priv_data_size) 3728 { 3729 uint64_t total_size, accessibility_size, common_attr_size; 3730 int nattr_common = 4, nattr_accessibility = 1; 3731 int num_devices = p->n_pdds; 3732 struct svm_range_list *svms; 3733 struct svm_range *prange; 3734 uint32_t count = 0; 3735 3736 *svm_priv_data_size = 0; 3737 3738 svms = &p->svms; 3739 if (!svms) 3740 return -EINVAL; 3741 3742 mutex_lock(&svms->lock); 3743 list_for_each_entry(prange, &svms->list, list) { 3744 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 3745 prange, prange->start, prange->npages, 3746 prange->start + prange->npages - 1); 3747 count++; 3748 } 3749 mutex_unlock(&svms->lock); 3750 3751 *num_svm_ranges = count; 3752 /* Only the accessbility attributes need to be queried for all the gpus 3753 * individually, remaining ones are spanned across the entire process 3754 * regardless of the various gpu nodes. Of the remaining attributes, 3755 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 3756 * 3757 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 3758 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 3759 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 3760 * KFD_IOCTL_SVM_ATTR_GRANULARITY 3761 * 3762 * ** ACCESSBILITY ATTRIBUTES ** 3763 * (Considered as one, type is altered during query, value is gpuid) 3764 * KFD_IOCTL_SVM_ATTR_ACCESS 3765 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 3766 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 3767 */ 3768 if (*num_svm_ranges > 0) { 3769 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3770 nattr_common; 3771 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 3772 nattr_accessibility * num_devices; 3773 3774 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 3775 common_attr_size + accessibility_size; 3776 3777 *svm_priv_data_size = *num_svm_ranges * total_size; 3778 } 3779 3780 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 3781 *svm_priv_data_size); 3782 return 0; 3783 } 3784 3785 int kfd_criu_checkpoint_svm(struct kfd_process *p, 3786 uint8_t __user *user_priv_data, 3787 uint64_t *priv_data_offset) 3788 { 3789 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 3790 struct kfd_ioctl_svm_attribute *query_attr = NULL; 3791 uint64_t svm_priv_data_size, query_attr_size = 0; 3792 int index, nattr_common = 4, ret = 0; 3793 struct svm_range_list *svms; 3794 int num_devices = p->n_pdds; 3795 struct svm_range *prange; 3796 struct mm_struct *mm; 3797 3798 svms = &p->svms; 3799 if (!svms) 3800 return -EINVAL; 3801 3802 mm = get_task_mm(p->lead_thread); 3803 if (!mm) { 3804 pr_err("failed to get mm for the target process\n"); 3805 return -ESRCH; 3806 } 3807 3808 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3809 (nattr_common + num_devices); 3810 3811 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 3812 if (!query_attr) { 3813 ret = -ENOMEM; 3814 goto exit; 3815 } 3816 3817 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 3818 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 3819 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3820 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 3821 3822 for (index = 0; index < num_devices; index++) { 3823 struct kfd_process_device *pdd = p->pdds[index]; 3824 3825 query_attr[index + nattr_common].type = 3826 KFD_IOCTL_SVM_ATTR_ACCESS; 3827 query_attr[index + nattr_common].value = pdd->user_gpu_id; 3828 } 3829 3830 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 3831 3832 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 3833 if (!svm_priv) { 3834 ret = -ENOMEM; 3835 goto exit_query; 3836 } 3837 3838 index = 0; 3839 list_for_each_entry(prange, &svms->list, list) { 3840 3841 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 3842 svm_priv->start_addr = prange->start; 3843 svm_priv->size = prange->npages; 3844 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 3845 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 3846 prange, prange->start, prange->npages, 3847 prange->start + prange->npages - 1, 3848 prange->npages * PAGE_SIZE); 3849 3850 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 3851 svm_priv->size, 3852 (nattr_common + num_devices), 3853 svm_priv->attrs); 3854 if (ret) { 3855 pr_err("CRIU: failed to obtain range attributes\n"); 3856 goto exit_priv; 3857 } 3858 3859 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 3860 svm_priv_data_size)) { 3861 pr_err("Failed to copy svm priv to user\n"); 3862 ret = -EFAULT; 3863 goto exit_priv; 3864 } 3865 3866 *priv_data_offset += svm_priv_data_size; 3867 3868 } 3869 3870 3871 exit_priv: 3872 kfree(svm_priv); 3873 exit_query: 3874 kfree(query_attr); 3875 exit: 3876 mmput(mm); 3877 return ret; 3878 } 3879 3880 int 3881 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 3882 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 3883 { 3884 struct mm_struct *mm = current->mm; 3885 int r; 3886 3887 start >>= PAGE_SHIFT; 3888 size >>= PAGE_SHIFT; 3889 3890 switch (op) { 3891 case KFD_IOCTL_SVM_OP_SET_ATTR: 3892 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 3893 break; 3894 case KFD_IOCTL_SVM_OP_GET_ATTR: 3895 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 3896 break; 3897 default: 3898 r = EINVAL; 3899 break; 3900 } 3901 3902 return r; 3903 } 3904