1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 */ 24 25 #include <linux/slab.h> 26 #include <linux/list.h> 27 #include "kfd_device_queue_manager.h" 28 #include "kfd_priv.h" 29 #include "kfd_kernel_queue.h" 30 #include "amdgpu_amdkfd.h" 31 32 static inline struct process_queue_node *get_queue_by_qid( 33 struct process_queue_manager *pqm, unsigned int qid) 34 { 35 struct process_queue_node *pqn; 36 37 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 38 if ((pqn->q && pqn->q->properties.queue_id == qid) || 39 (pqn->kq && pqn->kq->queue->properties.queue_id == qid)) 40 return pqn; 41 } 42 43 return NULL; 44 } 45 46 static int assign_queue_slot_by_qid(struct process_queue_manager *pqm, 47 unsigned int qid) 48 { 49 if (qid >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) 50 return -EINVAL; 51 52 if (__test_and_set_bit(qid, pqm->queue_slot_bitmap)) { 53 pr_err("Cannot create new queue because requested qid(%u) is in use\n", qid); 54 return -ENOSPC; 55 } 56 57 return 0; 58 } 59 60 static int find_available_queue_slot(struct process_queue_manager *pqm, 61 unsigned int *qid) 62 { 63 unsigned long found; 64 65 found = find_first_zero_bit(pqm->queue_slot_bitmap, 66 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS); 67 68 pr_debug("The new slot id %lu\n", found); 69 70 if (found >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) { 71 pr_info("Cannot open more queues for process with pasid 0x%x\n", 72 pqm->process->pasid); 73 return -ENOMEM; 74 } 75 76 set_bit(found, pqm->queue_slot_bitmap); 77 *qid = found; 78 79 return 0; 80 } 81 82 void kfd_process_dequeue_from_device(struct kfd_process_device *pdd) 83 { 84 struct kfd_node *dev = pdd->dev; 85 86 if (pdd->already_dequeued) 87 return; 88 89 dev->dqm->ops.process_termination(dev->dqm, &pdd->qpd); 90 pdd->already_dequeued = true; 91 } 92 93 int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid, 94 void *gws) 95 { 96 struct kfd_node *dev = NULL; 97 struct process_queue_node *pqn; 98 struct kfd_process_device *pdd; 99 struct kgd_mem *mem = NULL; 100 int ret; 101 102 pqn = get_queue_by_qid(pqm, qid); 103 if (!pqn) { 104 pr_err("Queue id does not match any known queue\n"); 105 return -EINVAL; 106 } 107 108 if (pqn->q) 109 dev = pqn->q->device; 110 if (WARN_ON(!dev)) 111 return -ENODEV; 112 113 pdd = kfd_get_process_device_data(dev, pqm->process); 114 if (!pdd) { 115 pr_err("Process device data doesn't exist\n"); 116 return -EINVAL; 117 } 118 119 /* Only allow one queue per process can have GWS assigned */ 120 if (gws && pdd->qpd.num_gws) 121 return -EBUSY; 122 123 if (!gws && pdd->qpd.num_gws == 0) 124 return -EINVAL; 125 126 if (KFD_GC_VERSION(dev) != IP_VERSION(9, 4, 3) && !dev->kfd->shared_resources.enable_mes) { 127 if (gws) 128 ret = amdgpu_amdkfd_add_gws_to_process(pdd->process->kgd_process_info, 129 gws, &mem); 130 else 131 ret = amdgpu_amdkfd_remove_gws_from_process(pdd->process->kgd_process_info, 132 pqn->q->gws); 133 if (unlikely(ret)) 134 return ret; 135 pqn->q->gws = mem; 136 } else { 137 /* 138 * Intentionally set GWS to a non-NULL value 139 * for devices that do not use GWS for global wave 140 * synchronization but require the formality 141 * of setting GWS for cooperative groups. 142 */ 143 pqn->q->gws = gws ? ERR_PTR(-ENOMEM) : NULL; 144 } 145 146 pdd->qpd.num_gws = gws ? dev->adev->gds.gws_size : 0; 147 148 return pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm, 149 pqn->q, NULL); 150 } 151 152 void kfd_process_dequeue_from_all_devices(struct kfd_process *p) 153 { 154 int i; 155 156 for (i = 0; i < p->n_pdds; i++) 157 kfd_process_dequeue_from_device(p->pdds[i]); 158 } 159 160 int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p) 161 { 162 INIT_LIST_HEAD(&pqm->queues); 163 pqm->queue_slot_bitmap = bitmap_zalloc(KFD_MAX_NUM_OF_QUEUES_PER_PROCESS, 164 GFP_KERNEL); 165 if (!pqm->queue_slot_bitmap) 166 return -ENOMEM; 167 pqm->process = p; 168 169 return 0; 170 } 171 172 static void pqm_clean_queue_resource(struct process_queue_manager *pqm, 173 struct process_queue_node *pqn) 174 { 175 struct kfd_node *dev; 176 struct kfd_process_device *pdd; 177 178 dev = pqn->q->device; 179 180 pdd = kfd_get_process_device_data(dev, pqm->process); 181 if (!pdd) { 182 pr_err("Process device data doesn't exist\n"); 183 return; 184 } 185 186 if (pqn->q->gws) { 187 if (KFD_GC_VERSION(pqn->q->device) != IP_VERSION(9, 4, 3) && 188 !dev->kfd->shared_resources.enable_mes) 189 amdgpu_amdkfd_remove_gws_from_process( 190 pqm->process->kgd_process_info, pqn->q->gws); 191 pdd->qpd.num_gws = 0; 192 } 193 194 if (dev->kfd->shared_resources.enable_mes) { 195 amdgpu_amdkfd_free_gtt_mem(dev->adev, pqn->q->gang_ctx_bo); 196 if (pqn->q->wptr_bo) 197 amdgpu_amdkfd_free_gtt_mem(dev->adev, pqn->q->wptr_bo); 198 } 199 } 200 201 void pqm_uninit(struct process_queue_manager *pqm) 202 { 203 struct process_queue_node *pqn, *next; 204 205 list_for_each_entry_safe(pqn, next, &pqm->queues, process_queue_list) { 206 if (pqn->q) 207 pqm_clean_queue_resource(pqm, pqn); 208 209 kfd_procfs_del_queue(pqn->q); 210 uninit_queue(pqn->q); 211 list_del(&pqn->process_queue_list); 212 kfree(pqn); 213 } 214 215 bitmap_free(pqm->queue_slot_bitmap); 216 pqm->queue_slot_bitmap = NULL; 217 } 218 219 static int init_user_queue(struct process_queue_manager *pqm, 220 struct kfd_node *dev, struct queue **q, 221 struct queue_properties *q_properties, 222 struct file *f, struct amdgpu_bo *wptr_bo, 223 unsigned int qid) 224 { 225 int retval; 226 227 /* Doorbell initialized in user space*/ 228 q_properties->doorbell_ptr = NULL; 229 q_properties->exception_status = KFD_EC_MASK(EC_QUEUE_NEW); 230 231 /* let DQM handle it*/ 232 q_properties->vmid = 0; 233 q_properties->queue_id = qid; 234 235 retval = init_queue(q, q_properties); 236 if (retval != 0) 237 return retval; 238 239 (*q)->device = dev; 240 (*q)->process = pqm->process; 241 242 if (dev->kfd->shared_resources.enable_mes) { 243 retval = amdgpu_amdkfd_alloc_gtt_mem(dev->adev, 244 AMDGPU_MES_GANG_CTX_SIZE, 245 &(*q)->gang_ctx_bo, 246 &(*q)->gang_ctx_gpu_addr, 247 &(*q)->gang_ctx_cpu_ptr, 248 false); 249 if (retval) { 250 pr_err("failed to allocate gang context bo\n"); 251 goto cleanup; 252 } 253 memset((*q)->gang_ctx_cpu_ptr, 0, AMDGPU_MES_GANG_CTX_SIZE); 254 (*q)->wptr_bo = wptr_bo; 255 } 256 257 pr_debug("PQM After init queue"); 258 return 0; 259 260 cleanup: 261 uninit_queue(*q); 262 *q = NULL; 263 return retval; 264 } 265 266 int pqm_create_queue(struct process_queue_manager *pqm, 267 struct kfd_node *dev, 268 struct file *f, 269 struct queue_properties *properties, 270 unsigned int *qid, 271 struct amdgpu_bo *wptr_bo, 272 const struct kfd_criu_queue_priv_data *q_data, 273 const void *restore_mqd, 274 const void *restore_ctl_stack, 275 uint32_t *p_doorbell_offset_in_process) 276 { 277 int retval; 278 struct kfd_process_device *pdd; 279 struct queue *q; 280 struct process_queue_node *pqn; 281 struct kernel_queue *kq; 282 enum kfd_queue_type type = properties->type; 283 unsigned int max_queues = 127; /* HWS limit */ 284 285 /* 286 * On GFX 9.4.3, increase the number of queues that 287 * can be created to 255. No HWS limit on GFX 9.4.3. 288 */ 289 if (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 3)) 290 max_queues = 255; 291 292 q = NULL; 293 kq = NULL; 294 295 pdd = kfd_get_process_device_data(dev, pqm->process); 296 if (!pdd) { 297 pr_err("Process device data doesn't exist\n"); 298 return -1; 299 } 300 301 /* 302 * for debug process, verify that it is within the static queues limit 303 * currently limit is set to half of the total avail HQD slots 304 * If we are just about to create DIQ, the is_debug flag is not set yet 305 * Hence we also check the type as well 306 */ 307 if ((pdd->qpd.is_debug) || (type == KFD_QUEUE_TYPE_DIQ)) 308 max_queues = dev->kfd->device_info.max_no_of_hqd/2; 309 310 if (pdd->qpd.queue_count >= max_queues) 311 return -ENOSPC; 312 313 if (q_data) { 314 retval = assign_queue_slot_by_qid(pqm, q_data->q_id); 315 *qid = q_data->q_id; 316 } else 317 retval = find_available_queue_slot(pqm, qid); 318 319 if (retval != 0) 320 return retval; 321 322 if (list_empty(&pdd->qpd.queues_list) && 323 list_empty(&pdd->qpd.priv_queue_list)) 324 dev->dqm->ops.register_process(dev->dqm, &pdd->qpd); 325 326 pqn = kzalloc(sizeof(*pqn), GFP_KERNEL); 327 if (!pqn) { 328 retval = -ENOMEM; 329 goto err_allocate_pqn; 330 } 331 332 switch (type) { 333 case KFD_QUEUE_TYPE_SDMA: 334 case KFD_QUEUE_TYPE_SDMA_XGMI: 335 /* SDMA queues are always allocated statically no matter 336 * which scheduler mode is used. We also do not need to 337 * check whether a SDMA queue can be allocated here, because 338 * allocate_sdma_queue() in create_queue() has the 339 * corresponding check logic. 340 */ 341 retval = init_user_queue(pqm, dev, &q, properties, f, wptr_bo, *qid); 342 if (retval != 0) 343 goto err_create_queue; 344 pqn->q = q; 345 pqn->kq = NULL; 346 retval = dev->dqm->ops.create_queue(dev->dqm, q, &pdd->qpd, q_data, 347 restore_mqd, restore_ctl_stack); 348 print_queue(q); 349 break; 350 351 case KFD_QUEUE_TYPE_COMPUTE: 352 /* check if there is over subscription */ 353 if ((dev->dqm->sched_policy == 354 KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION) && 355 ((dev->dqm->processes_count >= dev->vm_info.vmid_num_kfd) || 356 (dev->dqm->active_queue_count >= get_cp_queues_num(dev->dqm)))) { 357 pr_debug("Over-subscription is not allowed when amdkfd.sched_policy == 1\n"); 358 retval = -EPERM; 359 goto err_create_queue; 360 } 361 362 retval = init_user_queue(pqm, dev, &q, properties, f, wptr_bo, *qid); 363 if (retval != 0) 364 goto err_create_queue; 365 pqn->q = q; 366 pqn->kq = NULL; 367 retval = dev->dqm->ops.create_queue(dev->dqm, q, &pdd->qpd, q_data, 368 restore_mqd, restore_ctl_stack); 369 print_queue(q); 370 break; 371 case KFD_QUEUE_TYPE_DIQ: 372 kq = kernel_queue_init(dev, KFD_QUEUE_TYPE_DIQ); 373 if (!kq) { 374 retval = -ENOMEM; 375 goto err_create_queue; 376 } 377 kq->queue->properties.queue_id = *qid; 378 pqn->kq = kq; 379 pqn->q = NULL; 380 retval = kfd_process_drain_interrupts(pdd); 381 if (retval) 382 break; 383 384 retval = dev->dqm->ops.create_kernel_queue(dev->dqm, 385 kq, &pdd->qpd); 386 break; 387 default: 388 WARN(1, "Invalid queue type %d", type); 389 retval = -EINVAL; 390 } 391 392 if (retval != 0) { 393 pr_err("Pasid 0x%x DQM create queue type %d failed. ret %d\n", 394 pqm->process->pasid, type, retval); 395 goto err_create_queue; 396 } 397 398 if (q && p_doorbell_offset_in_process) { 399 /* Return the doorbell offset within the doorbell page 400 * to the caller so it can be passed up to user mode 401 * (in bytes). 402 * relative doorbell index = Absolute doorbell index - 403 * absolute index of first doorbell in the page. 404 */ 405 uint32_t first_db_index = amdgpu_doorbell_index_on_bar(pdd->dev->adev, 406 pdd->qpd.proc_doorbells, 407 0, 408 pdd->dev->kfd->device_info.doorbell_size); 409 410 *p_doorbell_offset_in_process = (q->properties.doorbell_off 411 - first_db_index) * sizeof(uint32_t); 412 } 413 414 pr_debug("PQM After DQM create queue\n"); 415 416 list_add(&pqn->process_queue_list, &pqm->queues); 417 418 if (q) { 419 pr_debug("PQM done creating queue\n"); 420 kfd_procfs_add_queue(q); 421 print_queue_properties(&q->properties); 422 } 423 424 return retval; 425 426 err_create_queue: 427 uninit_queue(q); 428 if (kq) 429 kernel_queue_uninit(kq, false); 430 kfree(pqn); 431 err_allocate_pqn: 432 /* check if queues list is empty unregister process from device */ 433 clear_bit(*qid, pqm->queue_slot_bitmap); 434 if (list_empty(&pdd->qpd.queues_list) && 435 list_empty(&pdd->qpd.priv_queue_list)) 436 dev->dqm->ops.unregister_process(dev->dqm, &pdd->qpd); 437 return retval; 438 } 439 440 int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid) 441 { 442 struct process_queue_node *pqn; 443 struct kfd_process_device *pdd; 444 struct device_queue_manager *dqm; 445 struct kfd_node *dev; 446 int retval; 447 448 dqm = NULL; 449 450 retval = 0; 451 452 pqn = get_queue_by_qid(pqm, qid); 453 if (!pqn) { 454 pr_err("Queue id does not match any known queue\n"); 455 return -EINVAL; 456 } 457 458 dev = NULL; 459 if (pqn->kq) 460 dev = pqn->kq->dev; 461 if (pqn->q) 462 dev = pqn->q->device; 463 if (WARN_ON(!dev)) 464 return -ENODEV; 465 466 pdd = kfd_get_process_device_data(dev, pqm->process); 467 if (!pdd) { 468 pr_err("Process device data doesn't exist\n"); 469 return -1; 470 } 471 472 if (pqn->kq) { 473 /* destroy kernel queue (DIQ) */ 474 dqm = pqn->kq->dev->dqm; 475 dqm->ops.destroy_kernel_queue(dqm, pqn->kq, &pdd->qpd); 476 kernel_queue_uninit(pqn->kq, false); 477 } 478 479 if (pqn->q) { 480 kfd_procfs_del_queue(pqn->q); 481 dqm = pqn->q->device->dqm; 482 retval = dqm->ops.destroy_queue(dqm, &pdd->qpd, pqn->q); 483 if (retval) { 484 pr_err("Pasid 0x%x destroy queue %d failed, ret %d\n", 485 pqm->process->pasid, 486 pqn->q->properties.queue_id, retval); 487 if (retval != -ETIME) 488 goto err_destroy_queue; 489 } 490 491 pqm_clean_queue_resource(pqm, pqn); 492 uninit_queue(pqn->q); 493 } 494 495 list_del(&pqn->process_queue_list); 496 kfree(pqn); 497 clear_bit(qid, pqm->queue_slot_bitmap); 498 499 if (list_empty(&pdd->qpd.queues_list) && 500 list_empty(&pdd->qpd.priv_queue_list)) 501 dqm->ops.unregister_process(dqm, &pdd->qpd); 502 503 err_destroy_queue: 504 return retval; 505 } 506 507 int pqm_update_queue_properties(struct process_queue_manager *pqm, 508 unsigned int qid, struct queue_properties *p) 509 { 510 int retval; 511 struct process_queue_node *pqn; 512 513 pqn = get_queue_by_qid(pqm, qid); 514 if (!pqn) { 515 pr_debug("No queue %d exists for update operation\n", qid); 516 return -EFAULT; 517 } 518 519 pqn->q->properties.queue_address = p->queue_address; 520 pqn->q->properties.queue_size = p->queue_size; 521 pqn->q->properties.queue_percent = p->queue_percent; 522 pqn->q->properties.priority = p->priority; 523 pqn->q->properties.pm4_target_xcc = p->pm4_target_xcc; 524 525 retval = pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm, 526 pqn->q, NULL); 527 if (retval != 0) 528 return retval; 529 530 return 0; 531 } 532 533 int pqm_update_mqd(struct process_queue_manager *pqm, 534 unsigned int qid, struct mqd_update_info *minfo) 535 { 536 int retval; 537 struct process_queue_node *pqn; 538 539 pqn = get_queue_by_qid(pqm, qid); 540 if (!pqn) { 541 pr_debug("No queue %d exists for update operation\n", qid); 542 return -EFAULT; 543 } 544 545 /* CUs are masked for debugger requirements so deny user mask */ 546 if (pqn->q->properties.is_dbg_wa && minfo && minfo->cu_mask.ptr) 547 return -EBUSY; 548 549 /* ASICs that have WGPs must enforce pairwise enabled mask checks. */ 550 if (minfo && minfo->cu_mask.ptr && 551 KFD_GC_VERSION(pqn->q->device) >= IP_VERSION(10, 0, 0)) { 552 int i; 553 554 for (i = 0; i < minfo->cu_mask.count; i += 2) { 555 uint32_t cu_pair = (minfo->cu_mask.ptr[i / 32] >> (i % 32)) & 0x3; 556 557 if (cu_pair && cu_pair != 0x3) { 558 pr_debug("CUs must be adjacent pairwise enabled.\n"); 559 return -EINVAL; 560 } 561 } 562 } 563 564 retval = pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm, 565 pqn->q, minfo); 566 if (retval != 0) 567 return retval; 568 569 if (minfo && minfo->cu_mask.ptr) 570 pqn->q->properties.is_user_cu_masked = true; 571 572 return 0; 573 } 574 575 struct kernel_queue *pqm_get_kernel_queue( 576 struct process_queue_manager *pqm, 577 unsigned int qid) 578 { 579 struct process_queue_node *pqn; 580 581 pqn = get_queue_by_qid(pqm, qid); 582 if (pqn && pqn->kq) 583 return pqn->kq; 584 585 return NULL; 586 } 587 588 struct queue *pqm_get_user_queue(struct process_queue_manager *pqm, 589 unsigned int qid) 590 { 591 struct process_queue_node *pqn; 592 593 pqn = get_queue_by_qid(pqm, qid); 594 return pqn ? pqn->q : NULL; 595 } 596 597 int pqm_get_wave_state(struct process_queue_manager *pqm, 598 unsigned int qid, 599 void __user *ctl_stack, 600 u32 *ctl_stack_used_size, 601 u32 *save_area_used_size) 602 { 603 struct process_queue_node *pqn; 604 605 pqn = get_queue_by_qid(pqm, qid); 606 if (!pqn) { 607 pr_debug("amdkfd: No queue %d exists for operation\n", 608 qid); 609 return -EFAULT; 610 } 611 612 return pqn->q->device->dqm->ops.get_wave_state(pqn->q->device->dqm, 613 pqn->q, 614 ctl_stack, 615 ctl_stack_used_size, 616 save_area_used_size); 617 } 618 619 int pqm_get_queue_snapshot(struct process_queue_manager *pqm, 620 uint64_t exception_clear_mask, 621 void __user *buf, 622 int *num_qss_entries, 623 uint32_t *entry_size) 624 { 625 struct process_queue_node *pqn; 626 struct kfd_queue_snapshot_entry src; 627 uint32_t tmp_entry_size = *entry_size, tmp_qss_entries = *num_qss_entries; 628 int r = 0; 629 630 *num_qss_entries = 0; 631 if (!(*entry_size)) 632 return -EINVAL; 633 634 *entry_size = min_t(size_t, *entry_size, sizeof(struct kfd_queue_snapshot_entry)); 635 mutex_lock(&pqm->process->event_mutex); 636 637 memset(&src, 0, sizeof(src)); 638 639 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 640 if (!pqn->q) 641 continue; 642 643 if (*num_qss_entries < tmp_qss_entries) { 644 set_queue_snapshot_entry(pqn->q, exception_clear_mask, &src); 645 646 if (copy_to_user(buf, &src, *entry_size)) { 647 r = -EFAULT; 648 break; 649 } 650 buf += tmp_entry_size; 651 } 652 *num_qss_entries += 1; 653 } 654 655 mutex_unlock(&pqm->process->event_mutex); 656 return r; 657 } 658 659 static int get_queue_data_sizes(struct kfd_process_device *pdd, 660 struct queue *q, 661 uint32_t *mqd_size, 662 uint32_t *ctl_stack_size) 663 { 664 int ret; 665 666 ret = pqm_get_queue_checkpoint_info(&pdd->process->pqm, 667 q->properties.queue_id, 668 mqd_size, 669 ctl_stack_size); 670 if (ret) 671 pr_err("Failed to get queue dump info (%d)\n", ret); 672 673 return ret; 674 } 675 676 int kfd_process_get_queue_info(struct kfd_process *p, 677 uint32_t *num_queues, 678 uint64_t *priv_data_sizes) 679 { 680 uint32_t extra_data_sizes = 0; 681 struct queue *q; 682 int i; 683 int ret; 684 685 *num_queues = 0; 686 687 /* Run over all PDDs of the process */ 688 for (i = 0; i < p->n_pdds; i++) { 689 struct kfd_process_device *pdd = p->pdds[i]; 690 691 list_for_each_entry(q, &pdd->qpd.queues_list, list) { 692 if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE || 693 q->properties.type == KFD_QUEUE_TYPE_SDMA || 694 q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) { 695 uint32_t mqd_size, ctl_stack_size; 696 697 *num_queues = *num_queues + 1; 698 699 ret = get_queue_data_sizes(pdd, q, &mqd_size, &ctl_stack_size); 700 if (ret) 701 return ret; 702 703 extra_data_sizes += mqd_size + ctl_stack_size; 704 } else { 705 pr_err("Unsupported queue type (%d)\n", q->properties.type); 706 return -EOPNOTSUPP; 707 } 708 } 709 } 710 *priv_data_sizes = extra_data_sizes + 711 (*num_queues * sizeof(struct kfd_criu_queue_priv_data)); 712 713 return 0; 714 } 715 716 static int pqm_checkpoint_mqd(struct process_queue_manager *pqm, 717 unsigned int qid, 718 void *mqd, 719 void *ctl_stack) 720 { 721 struct process_queue_node *pqn; 722 723 pqn = get_queue_by_qid(pqm, qid); 724 if (!pqn) { 725 pr_debug("amdkfd: No queue %d exists for operation\n", qid); 726 return -EFAULT; 727 } 728 729 if (!pqn->q->device->dqm->ops.checkpoint_mqd) { 730 pr_err("amdkfd: queue dumping not supported on this device\n"); 731 return -EOPNOTSUPP; 732 } 733 734 return pqn->q->device->dqm->ops.checkpoint_mqd(pqn->q->device->dqm, 735 pqn->q, mqd, ctl_stack); 736 } 737 738 static int criu_checkpoint_queue(struct kfd_process_device *pdd, 739 struct queue *q, 740 struct kfd_criu_queue_priv_data *q_data) 741 { 742 uint8_t *mqd, *ctl_stack; 743 int ret; 744 745 mqd = (void *)(q_data + 1); 746 ctl_stack = mqd + q_data->mqd_size; 747 748 q_data->gpu_id = pdd->user_gpu_id; 749 q_data->type = q->properties.type; 750 q_data->format = q->properties.format; 751 q_data->q_id = q->properties.queue_id; 752 q_data->q_address = q->properties.queue_address; 753 q_data->q_size = q->properties.queue_size; 754 q_data->priority = q->properties.priority; 755 q_data->q_percent = q->properties.queue_percent; 756 q_data->read_ptr_addr = (uint64_t)q->properties.read_ptr; 757 q_data->write_ptr_addr = (uint64_t)q->properties.write_ptr; 758 q_data->doorbell_id = q->doorbell_id; 759 760 q_data->sdma_id = q->sdma_id; 761 762 q_data->eop_ring_buffer_address = 763 q->properties.eop_ring_buffer_address; 764 765 q_data->eop_ring_buffer_size = q->properties.eop_ring_buffer_size; 766 767 q_data->ctx_save_restore_area_address = 768 q->properties.ctx_save_restore_area_address; 769 770 q_data->ctx_save_restore_area_size = 771 q->properties.ctx_save_restore_area_size; 772 773 q_data->gws = !!q->gws; 774 775 ret = pqm_checkpoint_mqd(&pdd->process->pqm, q->properties.queue_id, mqd, ctl_stack); 776 if (ret) { 777 pr_err("Failed checkpoint queue_mqd (%d)\n", ret); 778 return ret; 779 } 780 781 pr_debug("Dumping Queue: gpu_id:%x queue_id:%u\n", q_data->gpu_id, q_data->q_id); 782 return ret; 783 } 784 785 static int criu_checkpoint_queues_device(struct kfd_process_device *pdd, 786 uint8_t __user *user_priv, 787 unsigned int *q_index, 788 uint64_t *queues_priv_data_offset) 789 { 790 unsigned int q_private_data_size = 0; 791 uint8_t *q_private_data = NULL; /* Local buffer to store individual queue private data */ 792 struct queue *q; 793 int ret = 0; 794 795 list_for_each_entry(q, &pdd->qpd.queues_list, list) { 796 struct kfd_criu_queue_priv_data *q_data; 797 uint64_t q_data_size; 798 uint32_t mqd_size; 799 uint32_t ctl_stack_size; 800 801 if (q->properties.type != KFD_QUEUE_TYPE_COMPUTE && 802 q->properties.type != KFD_QUEUE_TYPE_SDMA && 803 q->properties.type != KFD_QUEUE_TYPE_SDMA_XGMI) { 804 805 pr_err("Unsupported queue type (%d)\n", q->properties.type); 806 ret = -EOPNOTSUPP; 807 break; 808 } 809 810 ret = get_queue_data_sizes(pdd, q, &mqd_size, &ctl_stack_size); 811 if (ret) 812 break; 813 814 q_data_size = sizeof(*q_data) + mqd_size + ctl_stack_size; 815 816 /* Increase local buffer space if needed */ 817 if (q_private_data_size < q_data_size) { 818 kfree(q_private_data); 819 820 q_private_data = kzalloc(q_data_size, GFP_KERNEL); 821 if (!q_private_data) { 822 ret = -ENOMEM; 823 break; 824 } 825 q_private_data_size = q_data_size; 826 } 827 828 q_data = (struct kfd_criu_queue_priv_data *)q_private_data; 829 830 /* data stored in this order: priv_data, mqd, ctl_stack */ 831 q_data->mqd_size = mqd_size; 832 q_data->ctl_stack_size = ctl_stack_size; 833 834 ret = criu_checkpoint_queue(pdd, q, q_data); 835 if (ret) 836 break; 837 838 q_data->object_type = KFD_CRIU_OBJECT_TYPE_QUEUE; 839 840 ret = copy_to_user(user_priv + *queues_priv_data_offset, 841 q_data, q_data_size); 842 if (ret) { 843 ret = -EFAULT; 844 break; 845 } 846 *queues_priv_data_offset += q_data_size; 847 *q_index = *q_index + 1; 848 } 849 850 kfree(q_private_data); 851 852 return ret; 853 } 854 855 int kfd_criu_checkpoint_queues(struct kfd_process *p, 856 uint8_t __user *user_priv_data, 857 uint64_t *priv_data_offset) 858 { 859 int ret = 0, pdd_index, q_index = 0; 860 861 for (pdd_index = 0; pdd_index < p->n_pdds; pdd_index++) { 862 struct kfd_process_device *pdd = p->pdds[pdd_index]; 863 864 /* 865 * criu_checkpoint_queues_device will copy data to user and update q_index and 866 * queues_priv_data_offset 867 */ 868 ret = criu_checkpoint_queues_device(pdd, user_priv_data, &q_index, 869 priv_data_offset); 870 871 if (ret) 872 break; 873 } 874 875 return ret; 876 } 877 878 static void set_queue_properties_from_criu(struct queue_properties *qp, 879 struct kfd_criu_queue_priv_data *q_data) 880 { 881 qp->is_interop = false; 882 qp->queue_percent = q_data->q_percent; 883 qp->priority = q_data->priority; 884 qp->queue_address = q_data->q_address; 885 qp->queue_size = q_data->q_size; 886 qp->read_ptr = (uint32_t *) q_data->read_ptr_addr; 887 qp->write_ptr = (uint32_t *) q_data->write_ptr_addr; 888 qp->eop_ring_buffer_address = q_data->eop_ring_buffer_address; 889 qp->eop_ring_buffer_size = q_data->eop_ring_buffer_size; 890 qp->ctx_save_restore_area_address = q_data->ctx_save_restore_area_address; 891 qp->ctx_save_restore_area_size = q_data->ctx_save_restore_area_size; 892 qp->ctl_stack_size = q_data->ctl_stack_size; 893 qp->type = q_data->type; 894 qp->format = q_data->format; 895 } 896 897 int kfd_criu_restore_queue(struct kfd_process *p, 898 uint8_t __user *user_priv_ptr, 899 uint64_t *priv_data_offset, 900 uint64_t max_priv_data_size) 901 { 902 uint8_t *mqd, *ctl_stack, *q_extra_data = NULL; 903 struct kfd_criu_queue_priv_data *q_data; 904 struct kfd_process_device *pdd; 905 uint64_t q_extra_data_size; 906 struct queue_properties qp; 907 unsigned int queue_id; 908 int ret = 0; 909 910 if (*priv_data_offset + sizeof(*q_data) > max_priv_data_size) 911 return -EINVAL; 912 913 q_data = kmalloc(sizeof(*q_data), GFP_KERNEL); 914 if (!q_data) 915 return -ENOMEM; 916 917 ret = copy_from_user(q_data, user_priv_ptr + *priv_data_offset, sizeof(*q_data)); 918 if (ret) { 919 ret = -EFAULT; 920 goto exit; 921 } 922 923 *priv_data_offset += sizeof(*q_data); 924 q_extra_data_size = (uint64_t)q_data->ctl_stack_size + q_data->mqd_size; 925 926 if (*priv_data_offset + q_extra_data_size > max_priv_data_size) { 927 ret = -EINVAL; 928 goto exit; 929 } 930 931 q_extra_data = kmalloc(q_extra_data_size, GFP_KERNEL); 932 if (!q_extra_data) { 933 ret = -ENOMEM; 934 goto exit; 935 } 936 937 ret = copy_from_user(q_extra_data, user_priv_ptr + *priv_data_offset, q_extra_data_size); 938 if (ret) { 939 ret = -EFAULT; 940 goto exit; 941 } 942 943 *priv_data_offset += q_extra_data_size; 944 945 pdd = kfd_process_device_data_by_id(p, q_data->gpu_id); 946 if (!pdd) { 947 pr_err("Failed to get pdd\n"); 948 ret = -EINVAL; 949 goto exit; 950 } 951 952 /* data stored in this order: mqd, ctl_stack */ 953 mqd = q_extra_data; 954 ctl_stack = mqd + q_data->mqd_size; 955 956 memset(&qp, 0, sizeof(qp)); 957 set_queue_properties_from_criu(&qp, q_data); 958 959 print_queue_properties(&qp); 960 961 ret = pqm_create_queue(&p->pqm, pdd->dev, NULL, &qp, &queue_id, NULL, q_data, mqd, ctl_stack, 962 NULL); 963 if (ret) { 964 pr_err("Failed to create new queue err:%d\n", ret); 965 goto exit; 966 } 967 968 if (q_data->gws) 969 ret = pqm_set_gws(&p->pqm, q_data->q_id, pdd->dev->gws); 970 971 exit: 972 if (ret) 973 pr_err("Failed to restore queue (%d)\n", ret); 974 else 975 pr_debug("Queue id %d was restored successfully\n", queue_id); 976 977 kfree(q_data); 978 979 return ret; 980 } 981 982 int pqm_get_queue_checkpoint_info(struct process_queue_manager *pqm, 983 unsigned int qid, 984 uint32_t *mqd_size, 985 uint32_t *ctl_stack_size) 986 { 987 struct process_queue_node *pqn; 988 989 pqn = get_queue_by_qid(pqm, qid); 990 if (!pqn) { 991 pr_debug("amdkfd: No queue %d exists for operation\n", qid); 992 return -EFAULT; 993 } 994 995 if (!pqn->q->device->dqm->ops.get_queue_checkpoint_info) { 996 pr_err("amdkfd: queue dumping not supported on this device\n"); 997 return -EOPNOTSUPP; 998 } 999 1000 pqn->q->device->dqm->ops.get_queue_checkpoint_info(pqn->q->device->dqm, 1001 pqn->q, mqd_size, 1002 ctl_stack_size); 1003 return 0; 1004 } 1005 1006 #if defined(CONFIG_DEBUG_FS) 1007 1008 int pqm_debugfs_mqds(struct seq_file *m, void *data) 1009 { 1010 struct process_queue_manager *pqm = data; 1011 struct process_queue_node *pqn; 1012 struct queue *q; 1013 enum KFD_MQD_TYPE mqd_type; 1014 struct mqd_manager *mqd_mgr; 1015 int r = 0, xcc, num_xccs = 1; 1016 void *mqd; 1017 uint64_t size = 0; 1018 1019 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 1020 if (pqn->q) { 1021 q = pqn->q; 1022 switch (q->properties.type) { 1023 case KFD_QUEUE_TYPE_SDMA: 1024 case KFD_QUEUE_TYPE_SDMA_XGMI: 1025 seq_printf(m, " SDMA queue on device %x\n", 1026 q->device->id); 1027 mqd_type = KFD_MQD_TYPE_SDMA; 1028 break; 1029 case KFD_QUEUE_TYPE_COMPUTE: 1030 seq_printf(m, " Compute queue on device %x\n", 1031 q->device->id); 1032 mqd_type = KFD_MQD_TYPE_CP; 1033 num_xccs = NUM_XCC(q->device->xcc_mask); 1034 break; 1035 default: 1036 seq_printf(m, 1037 " Bad user queue type %d on device %x\n", 1038 q->properties.type, q->device->id); 1039 continue; 1040 } 1041 mqd_mgr = q->device->dqm->mqd_mgrs[mqd_type]; 1042 size = mqd_mgr->mqd_stride(mqd_mgr, 1043 &q->properties); 1044 } else if (pqn->kq) { 1045 q = pqn->kq->queue; 1046 mqd_mgr = pqn->kq->mqd_mgr; 1047 switch (q->properties.type) { 1048 case KFD_QUEUE_TYPE_DIQ: 1049 seq_printf(m, " DIQ on device %x\n", 1050 pqn->kq->dev->id); 1051 break; 1052 default: 1053 seq_printf(m, 1054 " Bad kernel queue type %d on device %x\n", 1055 q->properties.type, 1056 pqn->kq->dev->id); 1057 continue; 1058 } 1059 } else { 1060 seq_printf(m, 1061 " Weird: Queue node with neither kernel nor user queue\n"); 1062 continue; 1063 } 1064 1065 for (xcc = 0; xcc < num_xccs; xcc++) { 1066 mqd = q->mqd + size * xcc; 1067 r = mqd_mgr->debugfs_show_mqd(m, mqd); 1068 if (r != 0) 1069 break; 1070 } 1071 } 1072 1073 return r; 1074 } 1075 1076 #endif 1077