1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 */ 24 25 #include <linux/slab.h> 26 #include <linux/list.h> 27 #include "kfd_device_queue_manager.h" 28 #include "kfd_priv.h" 29 #include "kfd_kernel_queue.h" 30 #include "amdgpu_amdkfd.h" 31 32 static inline struct process_queue_node *get_queue_by_qid( 33 struct process_queue_manager *pqm, unsigned int qid) 34 { 35 struct process_queue_node *pqn; 36 37 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 38 if ((pqn->q && pqn->q->properties.queue_id == qid) || 39 (pqn->kq && pqn->kq->queue->properties.queue_id == qid)) 40 return pqn; 41 } 42 43 return NULL; 44 } 45 46 static int assign_queue_slot_by_qid(struct process_queue_manager *pqm, 47 unsigned int qid) 48 { 49 if (qid >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) 50 return -EINVAL; 51 52 if (__test_and_set_bit(qid, pqm->queue_slot_bitmap)) { 53 pr_err("Cannot create new queue because requested qid(%u) is in use\n", qid); 54 return -ENOSPC; 55 } 56 57 return 0; 58 } 59 60 static int find_available_queue_slot(struct process_queue_manager *pqm, 61 unsigned int *qid) 62 { 63 unsigned long found; 64 65 found = find_first_zero_bit(pqm->queue_slot_bitmap, 66 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS); 67 68 pr_debug("The new slot id %lu\n", found); 69 70 if (found >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) { 71 pr_info("Cannot open more queues for process with pasid 0x%x\n", 72 pqm->process->pasid); 73 return -ENOMEM; 74 } 75 76 set_bit(found, pqm->queue_slot_bitmap); 77 *qid = found; 78 79 return 0; 80 } 81 82 void kfd_process_dequeue_from_device(struct kfd_process_device *pdd) 83 { 84 struct kfd_node *dev = pdd->dev; 85 86 if (pdd->already_dequeued) 87 return; 88 89 dev->dqm->ops.process_termination(dev->dqm, &pdd->qpd); 90 pdd->already_dequeued = true; 91 } 92 93 int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid, 94 void *gws) 95 { 96 struct kfd_node *dev = NULL; 97 struct process_queue_node *pqn; 98 struct kfd_process_device *pdd; 99 struct kgd_mem *mem = NULL; 100 int ret; 101 102 pqn = get_queue_by_qid(pqm, qid); 103 if (!pqn) { 104 pr_err("Queue id does not match any known queue\n"); 105 return -EINVAL; 106 } 107 108 if (pqn->q) 109 dev = pqn->q->device; 110 if (WARN_ON(!dev)) 111 return -ENODEV; 112 113 pdd = kfd_get_process_device_data(dev, pqm->process); 114 if (!pdd) { 115 pr_err("Process device data doesn't exist\n"); 116 return -EINVAL; 117 } 118 119 /* Only allow one queue per process can have GWS assigned */ 120 if (gws && pdd->qpd.num_gws) 121 return -EBUSY; 122 123 if (!gws && pdd->qpd.num_gws == 0) 124 return -EINVAL; 125 126 if (KFD_GC_VERSION(dev) != IP_VERSION(9, 4, 3) && !dev->kfd->shared_resources.enable_mes) { 127 if (gws) 128 ret = amdgpu_amdkfd_add_gws_to_process(pdd->process->kgd_process_info, 129 gws, &mem); 130 else 131 ret = amdgpu_amdkfd_remove_gws_from_process(pdd->process->kgd_process_info, 132 pqn->q->gws); 133 if (unlikely(ret)) 134 return ret; 135 pqn->q->gws = mem; 136 } else { 137 /* 138 * Intentionally set GWS to a non-NULL value 139 * for devices that do not use GWS for global wave 140 * synchronization but require the formality 141 * of setting GWS for cooperative groups. 142 */ 143 pqn->q->gws = gws ? ERR_PTR(-ENOMEM) : NULL; 144 } 145 146 pdd->qpd.num_gws = gws ? dev->adev->gds.gws_size : 0; 147 148 return pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm, 149 pqn->q, NULL); 150 } 151 152 void kfd_process_dequeue_from_all_devices(struct kfd_process *p) 153 { 154 int i; 155 156 for (i = 0; i < p->n_pdds; i++) 157 kfd_process_dequeue_from_device(p->pdds[i]); 158 } 159 160 int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p) 161 { 162 INIT_LIST_HEAD(&pqm->queues); 163 pqm->queue_slot_bitmap = bitmap_zalloc(KFD_MAX_NUM_OF_QUEUES_PER_PROCESS, 164 GFP_KERNEL); 165 if (!pqm->queue_slot_bitmap) 166 return -ENOMEM; 167 pqm->process = p; 168 169 return 0; 170 } 171 172 void pqm_uninit(struct process_queue_manager *pqm) 173 { 174 struct process_queue_node *pqn, *next; 175 176 list_for_each_entry_safe(pqn, next, &pqm->queues, process_queue_list) { 177 if (pqn->q && pqn->q->gws && 178 KFD_GC_VERSION(pqn->q->device) != IP_VERSION(9, 4, 3) && 179 !pqn->q->device->kfd->shared_resources.enable_mes) 180 amdgpu_amdkfd_remove_gws_from_process(pqm->process->kgd_process_info, 181 pqn->q->gws); 182 kfd_procfs_del_queue(pqn->q); 183 uninit_queue(pqn->q); 184 list_del(&pqn->process_queue_list); 185 kfree(pqn); 186 } 187 188 bitmap_free(pqm->queue_slot_bitmap); 189 pqm->queue_slot_bitmap = NULL; 190 } 191 192 static int init_user_queue(struct process_queue_manager *pqm, 193 struct kfd_node *dev, struct queue **q, 194 struct queue_properties *q_properties, 195 struct file *f, struct amdgpu_bo *wptr_bo, 196 unsigned int qid) 197 { 198 int retval; 199 200 /* Doorbell initialized in user space*/ 201 q_properties->doorbell_ptr = NULL; 202 q_properties->exception_status = KFD_EC_MASK(EC_QUEUE_NEW); 203 204 /* let DQM handle it*/ 205 q_properties->vmid = 0; 206 q_properties->queue_id = qid; 207 208 retval = init_queue(q, q_properties); 209 if (retval != 0) 210 return retval; 211 212 (*q)->device = dev; 213 (*q)->process = pqm->process; 214 215 if (dev->kfd->shared_resources.enable_mes) { 216 retval = amdgpu_amdkfd_alloc_gtt_mem(dev->adev, 217 AMDGPU_MES_GANG_CTX_SIZE, 218 &(*q)->gang_ctx_bo, 219 &(*q)->gang_ctx_gpu_addr, 220 &(*q)->gang_ctx_cpu_ptr, 221 false); 222 if (retval) { 223 pr_err("failed to allocate gang context bo\n"); 224 goto cleanup; 225 } 226 memset((*q)->gang_ctx_cpu_ptr, 0, AMDGPU_MES_GANG_CTX_SIZE); 227 (*q)->wptr_bo = wptr_bo; 228 } 229 230 pr_debug("PQM After init queue"); 231 return 0; 232 233 cleanup: 234 uninit_queue(*q); 235 *q = NULL; 236 return retval; 237 } 238 239 int pqm_create_queue(struct process_queue_manager *pqm, 240 struct kfd_node *dev, 241 struct file *f, 242 struct queue_properties *properties, 243 unsigned int *qid, 244 struct amdgpu_bo *wptr_bo, 245 const struct kfd_criu_queue_priv_data *q_data, 246 const void *restore_mqd, 247 const void *restore_ctl_stack, 248 uint32_t *p_doorbell_offset_in_process) 249 { 250 int retval; 251 struct kfd_process_device *pdd; 252 struct queue *q; 253 struct process_queue_node *pqn; 254 struct kernel_queue *kq; 255 enum kfd_queue_type type = properties->type; 256 unsigned int max_queues = 127; /* HWS limit */ 257 258 /* 259 * On GFX 9.4.3, increase the number of queues that 260 * can be created to 255. No HWS limit on GFX 9.4.3. 261 */ 262 if (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 3)) 263 max_queues = 255; 264 265 q = NULL; 266 kq = NULL; 267 268 pdd = kfd_get_process_device_data(dev, pqm->process); 269 if (!pdd) { 270 pr_err("Process device data doesn't exist\n"); 271 return -1; 272 } 273 274 /* 275 * for debug process, verify that it is within the static queues limit 276 * currently limit is set to half of the total avail HQD slots 277 * If we are just about to create DIQ, the is_debug flag is not set yet 278 * Hence we also check the type as well 279 */ 280 if ((pdd->qpd.is_debug) || (type == KFD_QUEUE_TYPE_DIQ)) 281 max_queues = dev->kfd->device_info.max_no_of_hqd/2; 282 283 if (pdd->qpd.queue_count >= max_queues) 284 return -ENOSPC; 285 286 if (q_data) { 287 retval = assign_queue_slot_by_qid(pqm, q_data->q_id); 288 *qid = q_data->q_id; 289 } else 290 retval = find_available_queue_slot(pqm, qid); 291 292 if (retval != 0) 293 return retval; 294 295 if (list_empty(&pdd->qpd.queues_list) && 296 list_empty(&pdd->qpd.priv_queue_list)) 297 dev->dqm->ops.register_process(dev->dqm, &pdd->qpd); 298 299 pqn = kzalloc(sizeof(*pqn), GFP_KERNEL); 300 if (!pqn) { 301 retval = -ENOMEM; 302 goto err_allocate_pqn; 303 } 304 305 switch (type) { 306 case KFD_QUEUE_TYPE_SDMA: 307 case KFD_QUEUE_TYPE_SDMA_XGMI: 308 /* SDMA queues are always allocated statically no matter 309 * which scheduler mode is used. We also do not need to 310 * check whether a SDMA queue can be allocated here, because 311 * allocate_sdma_queue() in create_queue() has the 312 * corresponding check logic. 313 */ 314 retval = init_user_queue(pqm, dev, &q, properties, f, wptr_bo, *qid); 315 if (retval != 0) 316 goto err_create_queue; 317 pqn->q = q; 318 pqn->kq = NULL; 319 retval = dev->dqm->ops.create_queue(dev->dqm, q, &pdd->qpd, q_data, 320 restore_mqd, restore_ctl_stack); 321 print_queue(q); 322 break; 323 324 case KFD_QUEUE_TYPE_COMPUTE: 325 /* check if there is over subscription */ 326 if ((dev->dqm->sched_policy == 327 KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION) && 328 ((dev->dqm->processes_count >= dev->vm_info.vmid_num_kfd) || 329 (dev->dqm->active_queue_count >= get_cp_queues_num(dev->dqm)))) { 330 pr_debug("Over-subscription is not allowed when amdkfd.sched_policy == 1\n"); 331 retval = -EPERM; 332 goto err_create_queue; 333 } 334 335 retval = init_user_queue(pqm, dev, &q, properties, f, wptr_bo, *qid); 336 if (retval != 0) 337 goto err_create_queue; 338 pqn->q = q; 339 pqn->kq = NULL; 340 retval = dev->dqm->ops.create_queue(dev->dqm, q, &pdd->qpd, q_data, 341 restore_mqd, restore_ctl_stack); 342 print_queue(q); 343 break; 344 case KFD_QUEUE_TYPE_DIQ: 345 kq = kernel_queue_init(dev, KFD_QUEUE_TYPE_DIQ); 346 if (!kq) { 347 retval = -ENOMEM; 348 goto err_create_queue; 349 } 350 kq->queue->properties.queue_id = *qid; 351 pqn->kq = kq; 352 pqn->q = NULL; 353 retval = kfd_process_drain_interrupts(pdd); 354 if (retval) 355 break; 356 357 retval = dev->dqm->ops.create_kernel_queue(dev->dqm, 358 kq, &pdd->qpd); 359 break; 360 default: 361 WARN(1, "Invalid queue type %d", type); 362 retval = -EINVAL; 363 } 364 365 if (retval != 0) { 366 pr_err("Pasid 0x%x DQM create queue type %d failed. ret %d\n", 367 pqm->process->pasid, type, retval); 368 goto err_create_queue; 369 } 370 371 if (q && p_doorbell_offset_in_process) 372 /* Return the doorbell offset within the doorbell page 373 * to the caller so it can be passed up to user mode 374 * (in bytes). 375 * There are always 1024 doorbells per process, so in case 376 * of 8-byte doorbells, there are two doorbell pages per 377 * process. 378 */ 379 *p_doorbell_offset_in_process = 380 (q->properties.doorbell_off * sizeof(uint32_t)) & 381 (kfd_doorbell_process_slice(dev->kfd) - 1); 382 383 pr_debug("PQM After DQM create queue\n"); 384 385 list_add(&pqn->process_queue_list, &pqm->queues); 386 387 if (q) { 388 pr_debug("PQM done creating queue\n"); 389 kfd_procfs_add_queue(q); 390 print_queue_properties(&q->properties); 391 } 392 393 return retval; 394 395 err_create_queue: 396 uninit_queue(q); 397 if (kq) 398 kernel_queue_uninit(kq, false); 399 kfree(pqn); 400 err_allocate_pqn: 401 /* check if queues list is empty unregister process from device */ 402 clear_bit(*qid, pqm->queue_slot_bitmap); 403 if (list_empty(&pdd->qpd.queues_list) && 404 list_empty(&pdd->qpd.priv_queue_list)) 405 dev->dqm->ops.unregister_process(dev->dqm, &pdd->qpd); 406 return retval; 407 } 408 409 int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid) 410 { 411 struct process_queue_node *pqn; 412 struct kfd_process_device *pdd; 413 struct device_queue_manager *dqm; 414 struct kfd_node *dev; 415 int retval; 416 417 dqm = NULL; 418 419 retval = 0; 420 421 pqn = get_queue_by_qid(pqm, qid); 422 if (!pqn) { 423 pr_err("Queue id does not match any known queue\n"); 424 return -EINVAL; 425 } 426 427 dev = NULL; 428 if (pqn->kq) 429 dev = pqn->kq->dev; 430 if (pqn->q) 431 dev = pqn->q->device; 432 if (WARN_ON(!dev)) 433 return -ENODEV; 434 435 pdd = kfd_get_process_device_data(dev, pqm->process); 436 if (!pdd) { 437 pr_err("Process device data doesn't exist\n"); 438 return -1; 439 } 440 441 if (pqn->kq) { 442 /* destroy kernel queue (DIQ) */ 443 dqm = pqn->kq->dev->dqm; 444 dqm->ops.destroy_kernel_queue(dqm, pqn->kq, &pdd->qpd); 445 kernel_queue_uninit(pqn->kq, false); 446 } 447 448 if (pqn->q) { 449 kfd_procfs_del_queue(pqn->q); 450 dqm = pqn->q->device->dqm; 451 retval = dqm->ops.destroy_queue(dqm, &pdd->qpd, pqn->q); 452 if (retval) { 453 pr_err("Pasid 0x%x destroy queue %d failed, ret %d\n", 454 pqm->process->pasid, 455 pqn->q->properties.queue_id, retval); 456 if (retval != -ETIME) 457 goto err_destroy_queue; 458 } 459 460 if (pqn->q->gws) { 461 if (KFD_GC_VERSION(pqn->q->device) != IP_VERSION(9, 4, 3) && 462 !dev->kfd->shared_resources.enable_mes) 463 amdgpu_amdkfd_remove_gws_from_process( 464 pqm->process->kgd_process_info, 465 pqn->q->gws); 466 pdd->qpd.num_gws = 0; 467 } 468 469 if (dev->kfd->shared_resources.enable_mes) { 470 amdgpu_amdkfd_free_gtt_mem(dev->adev, 471 pqn->q->gang_ctx_bo); 472 if (pqn->q->wptr_bo) 473 amdgpu_amdkfd_free_gtt_mem(dev->adev, pqn->q->wptr_bo); 474 475 } 476 uninit_queue(pqn->q); 477 } 478 479 list_del(&pqn->process_queue_list); 480 kfree(pqn); 481 clear_bit(qid, pqm->queue_slot_bitmap); 482 483 if (list_empty(&pdd->qpd.queues_list) && 484 list_empty(&pdd->qpd.priv_queue_list)) 485 dqm->ops.unregister_process(dqm, &pdd->qpd); 486 487 err_destroy_queue: 488 return retval; 489 } 490 491 int pqm_update_queue_properties(struct process_queue_manager *pqm, 492 unsigned int qid, struct queue_properties *p) 493 { 494 int retval; 495 struct process_queue_node *pqn; 496 497 pqn = get_queue_by_qid(pqm, qid); 498 if (!pqn) { 499 pr_debug("No queue %d exists for update operation\n", qid); 500 return -EFAULT; 501 } 502 503 pqn->q->properties.queue_address = p->queue_address; 504 pqn->q->properties.queue_size = p->queue_size; 505 pqn->q->properties.queue_percent = p->queue_percent; 506 pqn->q->properties.priority = p->priority; 507 pqn->q->properties.pm4_target_xcc = p->pm4_target_xcc; 508 509 retval = pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm, 510 pqn->q, NULL); 511 if (retval != 0) 512 return retval; 513 514 return 0; 515 } 516 517 int pqm_update_mqd(struct process_queue_manager *pqm, 518 unsigned int qid, struct mqd_update_info *minfo) 519 { 520 int retval; 521 struct process_queue_node *pqn; 522 523 pqn = get_queue_by_qid(pqm, qid); 524 if (!pqn) { 525 pr_debug("No queue %d exists for update operation\n", qid); 526 return -EFAULT; 527 } 528 529 /* CUs are masked for debugger requirements so deny user mask */ 530 if (pqn->q->properties.is_dbg_wa && minfo && minfo->cu_mask.ptr) 531 return -EBUSY; 532 533 /* ASICs that have WGPs must enforce pairwise enabled mask checks. */ 534 if (minfo && minfo->cu_mask.ptr && 535 KFD_GC_VERSION(pqn->q->device) >= IP_VERSION(10, 0, 0)) { 536 int i; 537 538 for (i = 0; i < minfo->cu_mask.count; i += 2) { 539 uint32_t cu_pair = (minfo->cu_mask.ptr[i / 32] >> (i % 32)) & 0x3; 540 541 if (cu_pair && cu_pair != 0x3) { 542 pr_debug("CUs must be adjacent pairwise enabled.\n"); 543 return -EINVAL; 544 } 545 } 546 } 547 548 retval = pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm, 549 pqn->q, minfo); 550 if (retval != 0) 551 return retval; 552 553 if (minfo && minfo->cu_mask.ptr) 554 pqn->q->properties.is_user_cu_masked = true; 555 556 return 0; 557 } 558 559 struct kernel_queue *pqm_get_kernel_queue( 560 struct process_queue_manager *pqm, 561 unsigned int qid) 562 { 563 struct process_queue_node *pqn; 564 565 pqn = get_queue_by_qid(pqm, qid); 566 if (pqn && pqn->kq) 567 return pqn->kq; 568 569 return NULL; 570 } 571 572 struct queue *pqm_get_user_queue(struct process_queue_manager *pqm, 573 unsigned int qid) 574 { 575 struct process_queue_node *pqn; 576 577 pqn = get_queue_by_qid(pqm, qid); 578 return pqn ? pqn->q : NULL; 579 } 580 581 int pqm_get_wave_state(struct process_queue_manager *pqm, 582 unsigned int qid, 583 void __user *ctl_stack, 584 u32 *ctl_stack_used_size, 585 u32 *save_area_used_size) 586 { 587 struct process_queue_node *pqn; 588 589 pqn = get_queue_by_qid(pqm, qid); 590 if (!pqn) { 591 pr_debug("amdkfd: No queue %d exists for operation\n", 592 qid); 593 return -EFAULT; 594 } 595 596 return pqn->q->device->dqm->ops.get_wave_state(pqn->q->device->dqm, 597 pqn->q, 598 ctl_stack, 599 ctl_stack_used_size, 600 save_area_used_size); 601 } 602 603 int pqm_get_queue_snapshot(struct process_queue_manager *pqm, 604 uint64_t exception_clear_mask, 605 void __user *buf, 606 int *num_qss_entries, 607 uint32_t *entry_size) 608 { 609 struct process_queue_node *pqn; 610 struct kfd_queue_snapshot_entry src; 611 uint32_t tmp_entry_size = *entry_size, tmp_qss_entries = *num_qss_entries; 612 int r = 0; 613 614 *num_qss_entries = 0; 615 if (!(*entry_size)) 616 return -EINVAL; 617 618 *entry_size = min_t(size_t, *entry_size, sizeof(struct kfd_queue_snapshot_entry)); 619 mutex_lock(&pqm->process->event_mutex); 620 621 memset(&src, 0, sizeof(src)); 622 623 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 624 if (!pqn->q) 625 continue; 626 627 if (*num_qss_entries < tmp_qss_entries) { 628 set_queue_snapshot_entry(pqn->q, exception_clear_mask, &src); 629 630 if (copy_to_user(buf, &src, *entry_size)) { 631 r = -EFAULT; 632 break; 633 } 634 buf += tmp_entry_size; 635 } 636 *num_qss_entries += 1; 637 } 638 639 mutex_unlock(&pqm->process->event_mutex); 640 return r; 641 } 642 643 static int get_queue_data_sizes(struct kfd_process_device *pdd, 644 struct queue *q, 645 uint32_t *mqd_size, 646 uint32_t *ctl_stack_size) 647 { 648 int ret; 649 650 ret = pqm_get_queue_checkpoint_info(&pdd->process->pqm, 651 q->properties.queue_id, 652 mqd_size, 653 ctl_stack_size); 654 if (ret) 655 pr_err("Failed to get queue dump info (%d)\n", ret); 656 657 return ret; 658 } 659 660 int kfd_process_get_queue_info(struct kfd_process *p, 661 uint32_t *num_queues, 662 uint64_t *priv_data_sizes) 663 { 664 uint32_t extra_data_sizes = 0; 665 struct queue *q; 666 int i; 667 int ret; 668 669 *num_queues = 0; 670 671 /* Run over all PDDs of the process */ 672 for (i = 0; i < p->n_pdds; i++) { 673 struct kfd_process_device *pdd = p->pdds[i]; 674 675 list_for_each_entry(q, &pdd->qpd.queues_list, list) { 676 if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE || 677 q->properties.type == KFD_QUEUE_TYPE_SDMA || 678 q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) { 679 uint32_t mqd_size, ctl_stack_size; 680 681 *num_queues = *num_queues + 1; 682 683 ret = get_queue_data_sizes(pdd, q, &mqd_size, &ctl_stack_size); 684 if (ret) 685 return ret; 686 687 extra_data_sizes += mqd_size + ctl_stack_size; 688 } else { 689 pr_err("Unsupported queue type (%d)\n", q->properties.type); 690 return -EOPNOTSUPP; 691 } 692 } 693 } 694 *priv_data_sizes = extra_data_sizes + 695 (*num_queues * sizeof(struct kfd_criu_queue_priv_data)); 696 697 return 0; 698 } 699 700 static int pqm_checkpoint_mqd(struct process_queue_manager *pqm, 701 unsigned int qid, 702 void *mqd, 703 void *ctl_stack) 704 { 705 struct process_queue_node *pqn; 706 707 pqn = get_queue_by_qid(pqm, qid); 708 if (!pqn) { 709 pr_debug("amdkfd: No queue %d exists for operation\n", qid); 710 return -EFAULT; 711 } 712 713 if (!pqn->q->device->dqm->ops.checkpoint_mqd) { 714 pr_err("amdkfd: queue dumping not supported on this device\n"); 715 return -EOPNOTSUPP; 716 } 717 718 return pqn->q->device->dqm->ops.checkpoint_mqd(pqn->q->device->dqm, 719 pqn->q, mqd, ctl_stack); 720 } 721 722 static int criu_checkpoint_queue(struct kfd_process_device *pdd, 723 struct queue *q, 724 struct kfd_criu_queue_priv_data *q_data) 725 { 726 uint8_t *mqd, *ctl_stack; 727 int ret; 728 729 mqd = (void *)(q_data + 1); 730 ctl_stack = mqd + q_data->mqd_size; 731 732 q_data->gpu_id = pdd->user_gpu_id; 733 q_data->type = q->properties.type; 734 q_data->format = q->properties.format; 735 q_data->q_id = q->properties.queue_id; 736 q_data->q_address = q->properties.queue_address; 737 q_data->q_size = q->properties.queue_size; 738 q_data->priority = q->properties.priority; 739 q_data->q_percent = q->properties.queue_percent; 740 q_data->read_ptr_addr = (uint64_t)q->properties.read_ptr; 741 q_data->write_ptr_addr = (uint64_t)q->properties.write_ptr; 742 q_data->doorbell_id = q->doorbell_id; 743 744 q_data->sdma_id = q->sdma_id; 745 746 q_data->eop_ring_buffer_address = 747 q->properties.eop_ring_buffer_address; 748 749 q_data->eop_ring_buffer_size = q->properties.eop_ring_buffer_size; 750 751 q_data->ctx_save_restore_area_address = 752 q->properties.ctx_save_restore_area_address; 753 754 q_data->ctx_save_restore_area_size = 755 q->properties.ctx_save_restore_area_size; 756 757 q_data->gws = !!q->gws; 758 759 ret = pqm_checkpoint_mqd(&pdd->process->pqm, q->properties.queue_id, mqd, ctl_stack); 760 if (ret) { 761 pr_err("Failed checkpoint queue_mqd (%d)\n", ret); 762 return ret; 763 } 764 765 pr_debug("Dumping Queue: gpu_id:%x queue_id:%u\n", q_data->gpu_id, q_data->q_id); 766 return ret; 767 } 768 769 static int criu_checkpoint_queues_device(struct kfd_process_device *pdd, 770 uint8_t __user *user_priv, 771 unsigned int *q_index, 772 uint64_t *queues_priv_data_offset) 773 { 774 unsigned int q_private_data_size = 0; 775 uint8_t *q_private_data = NULL; /* Local buffer to store individual queue private data */ 776 struct queue *q; 777 int ret = 0; 778 779 list_for_each_entry(q, &pdd->qpd.queues_list, list) { 780 struct kfd_criu_queue_priv_data *q_data; 781 uint64_t q_data_size; 782 uint32_t mqd_size; 783 uint32_t ctl_stack_size; 784 785 if (q->properties.type != KFD_QUEUE_TYPE_COMPUTE && 786 q->properties.type != KFD_QUEUE_TYPE_SDMA && 787 q->properties.type != KFD_QUEUE_TYPE_SDMA_XGMI) { 788 789 pr_err("Unsupported queue type (%d)\n", q->properties.type); 790 ret = -EOPNOTSUPP; 791 break; 792 } 793 794 ret = get_queue_data_sizes(pdd, q, &mqd_size, &ctl_stack_size); 795 if (ret) 796 break; 797 798 q_data_size = sizeof(*q_data) + mqd_size + ctl_stack_size; 799 800 /* Increase local buffer space if needed */ 801 if (q_private_data_size < q_data_size) { 802 kfree(q_private_data); 803 804 q_private_data = kzalloc(q_data_size, GFP_KERNEL); 805 if (!q_private_data) { 806 ret = -ENOMEM; 807 break; 808 } 809 q_private_data_size = q_data_size; 810 } 811 812 q_data = (struct kfd_criu_queue_priv_data *)q_private_data; 813 814 /* data stored in this order: priv_data, mqd, ctl_stack */ 815 q_data->mqd_size = mqd_size; 816 q_data->ctl_stack_size = ctl_stack_size; 817 818 ret = criu_checkpoint_queue(pdd, q, q_data); 819 if (ret) 820 break; 821 822 q_data->object_type = KFD_CRIU_OBJECT_TYPE_QUEUE; 823 824 ret = copy_to_user(user_priv + *queues_priv_data_offset, 825 q_data, q_data_size); 826 if (ret) { 827 ret = -EFAULT; 828 break; 829 } 830 *queues_priv_data_offset += q_data_size; 831 *q_index = *q_index + 1; 832 } 833 834 kfree(q_private_data); 835 836 return ret; 837 } 838 839 int kfd_criu_checkpoint_queues(struct kfd_process *p, 840 uint8_t __user *user_priv_data, 841 uint64_t *priv_data_offset) 842 { 843 int ret = 0, pdd_index, q_index = 0; 844 845 for (pdd_index = 0; pdd_index < p->n_pdds; pdd_index++) { 846 struct kfd_process_device *pdd = p->pdds[pdd_index]; 847 848 /* 849 * criu_checkpoint_queues_device will copy data to user and update q_index and 850 * queues_priv_data_offset 851 */ 852 ret = criu_checkpoint_queues_device(pdd, user_priv_data, &q_index, 853 priv_data_offset); 854 855 if (ret) 856 break; 857 } 858 859 return ret; 860 } 861 862 static void set_queue_properties_from_criu(struct queue_properties *qp, 863 struct kfd_criu_queue_priv_data *q_data) 864 { 865 qp->is_interop = false; 866 qp->queue_percent = q_data->q_percent; 867 qp->priority = q_data->priority; 868 qp->queue_address = q_data->q_address; 869 qp->queue_size = q_data->q_size; 870 qp->read_ptr = (uint32_t *) q_data->read_ptr_addr; 871 qp->write_ptr = (uint32_t *) q_data->write_ptr_addr; 872 qp->eop_ring_buffer_address = q_data->eop_ring_buffer_address; 873 qp->eop_ring_buffer_size = q_data->eop_ring_buffer_size; 874 qp->ctx_save_restore_area_address = q_data->ctx_save_restore_area_address; 875 qp->ctx_save_restore_area_size = q_data->ctx_save_restore_area_size; 876 qp->ctl_stack_size = q_data->ctl_stack_size; 877 qp->type = q_data->type; 878 qp->format = q_data->format; 879 } 880 881 int kfd_criu_restore_queue(struct kfd_process *p, 882 uint8_t __user *user_priv_ptr, 883 uint64_t *priv_data_offset, 884 uint64_t max_priv_data_size) 885 { 886 uint8_t *mqd, *ctl_stack, *q_extra_data = NULL; 887 struct kfd_criu_queue_priv_data *q_data; 888 struct kfd_process_device *pdd; 889 uint64_t q_extra_data_size; 890 struct queue_properties qp; 891 unsigned int queue_id; 892 int ret = 0; 893 894 if (*priv_data_offset + sizeof(*q_data) > max_priv_data_size) 895 return -EINVAL; 896 897 q_data = kmalloc(sizeof(*q_data), GFP_KERNEL); 898 if (!q_data) 899 return -ENOMEM; 900 901 ret = copy_from_user(q_data, user_priv_ptr + *priv_data_offset, sizeof(*q_data)); 902 if (ret) { 903 ret = -EFAULT; 904 goto exit; 905 } 906 907 *priv_data_offset += sizeof(*q_data); 908 q_extra_data_size = (uint64_t)q_data->ctl_stack_size + q_data->mqd_size; 909 910 if (*priv_data_offset + q_extra_data_size > max_priv_data_size) { 911 ret = -EINVAL; 912 goto exit; 913 } 914 915 q_extra_data = kmalloc(q_extra_data_size, GFP_KERNEL); 916 if (!q_extra_data) { 917 ret = -ENOMEM; 918 goto exit; 919 } 920 921 ret = copy_from_user(q_extra_data, user_priv_ptr + *priv_data_offset, q_extra_data_size); 922 if (ret) { 923 ret = -EFAULT; 924 goto exit; 925 } 926 927 *priv_data_offset += q_extra_data_size; 928 929 pdd = kfd_process_device_data_by_id(p, q_data->gpu_id); 930 if (!pdd) { 931 pr_err("Failed to get pdd\n"); 932 ret = -EINVAL; 933 goto exit; 934 } 935 936 if (!pdd->doorbell_index && 937 kfd_alloc_process_doorbells(pdd->dev->kfd, &pdd->doorbell_index) < 0) { 938 ret = -ENOMEM; 939 goto exit; 940 } 941 942 /* data stored in this order: mqd, ctl_stack */ 943 mqd = q_extra_data; 944 ctl_stack = mqd + q_data->mqd_size; 945 946 memset(&qp, 0, sizeof(qp)); 947 set_queue_properties_from_criu(&qp, q_data); 948 949 print_queue_properties(&qp); 950 951 ret = pqm_create_queue(&p->pqm, pdd->dev, NULL, &qp, &queue_id, NULL, q_data, mqd, ctl_stack, 952 NULL); 953 if (ret) { 954 pr_err("Failed to create new queue err:%d\n", ret); 955 goto exit; 956 } 957 958 if (q_data->gws) 959 ret = pqm_set_gws(&p->pqm, q_data->q_id, pdd->dev->gws); 960 961 exit: 962 if (ret) 963 pr_err("Failed to restore queue (%d)\n", ret); 964 else 965 pr_debug("Queue id %d was restored successfully\n", queue_id); 966 967 kfree(q_data); 968 969 return ret; 970 } 971 972 int pqm_get_queue_checkpoint_info(struct process_queue_manager *pqm, 973 unsigned int qid, 974 uint32_t *mqd_size, 975 uint32_t *ctl_stack_size) 976 { 977 struct process_queue_node *pqn; 978 979 pqn = get_queue_by_qid(pqm, qid); 980 if (!pqn) { 981 pr_debug("amdkfd: No queue %d exists for operation\n", qid); 982 return -EFAULT; 983 } 984 985 if (!pqn->q->device->dqm->ops.get_queue_checkpoint_info) { 986 pr_err("amdkfd: queue dumping not supported on this device\n"); 987 return -EOPNOTSUPP; 988 } 989 990 pqn->q->device->dqm->ops.get_queue_checkpoint_info(pqn->q->device->dqm, 991 pqn->q, mqd_size, 992 ctl_stack_size); 993 return 0; 994 } 995 996 #if defined(CONFIG_DEBUG_FS) 997 998 int pqm_debugfs_mqds(struct seq_file *m, void *data) 999 { 1000 struct process_queue_manager *pqm = data; 1001 struct process_queue_node *pqn; 1002 struct queue *q; 1003 enum KFD_MQD_TYPE mqd_type; 1004 struct mqd_manager *mqd_mgr; 1005 int r = 0, xcc, num_xccs = 1; 1006 void *mqd; 1007 uint64_t size = 0; 1008 1009 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 1010 if (pqn->q) { 1011 q = pqn->q; 1012 switch (q->properties.type) { 1013 case KFD_QUEUE_TYPE_SDMA: 1014 case KFD_QUEUE_TYPE_SDMA_XGMI: 1015 seq_printf(m, " SDMA queue on device %x\n", 1016 q->device->id); 1017 mqd_type = KFD_MQD_TYPE_SDMA; 1018 break; 1019 case KFD_QUEUE_TYPE_COMPUTE: 1020 seq_printf(m, " Compute queue on device %x\n", 1021 q->device->id); 1022 mqd_type = KFD_MQD_TYPE_CP; 1023 num_xccs = NUM_XCC(q->device->xcc_mask); 1024 break; 1025 default: 1026 seq_printf(m, 1027 " Bad user queue type %d on device %x\n", 1028 q->properties.type, q->device->id); 1029 continue; 1030 } 1031 mqd_mgr = q->device->dqm->mqd_mgrs[mqd_type]; 1032 size = mqd_mgr->mqd_stride(mqd_mgr, 1033 &q->properties); 1034 } else if (pqn->kq) { 1035 q = pqn->kq->queue; 1036 mqd_mgr = pqn->kq->mqd_mgr; 1037 switch (q->properties.type) { 1038 case KFD_QUEUE_TYPE_DIQ: 1039 seq_printf(m, " DIQ on device %x\n", 1040 pqn->kq->dev->id); 1041 break; 1042 default: 1043 seq_printf(m, 1044 " Bad kernel queue type %d on device %x\n", 1045 q->properties.type, 1046 pqn->kq->dev->id); 1047 continue; 1048 } 1049 } else { 1050 seq_printf(m, 1051 " Weird: Queue node with neither kernel nor user queue\n"); 1052 continue; 1053 } 1054 1055 for (xcc = 0; xcc < num_xccs; xcc++) { 1056 mqd = q->mqd + size * xcc; 1057 r = mqd_mgr->debugfs_show_mqd(m, mqd); 1058 if (r != 0) 1059 break; 1060 } 1061 } 1062 1063 return r; 1064 } 1065 1066 #endif 1067