1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 */ 24 25 #include <linux/slab.h> 26 #include <linux/list.h> 27 #include "kfd_device_queue_manager.h" 28 #include "kfd_priv.h" 29 #include "kfd_kernel_queue.h" 30 #include "amdgpu_amdkfd.h" 31 32 static inline struct process_queue_node *get_queue_by_qid( 33 struct process_queue_manager *pqm, unsigned int qid) 34 { 35 struct process_queue_node *pqn; 36 37 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 38 if ((pqn->q && pqn->q->properties.queue_id == qid) || 39 (pqn->kq && pqn->kq->queue->properties.queue_id == qid)) 40 return pqn; 41 } 42 43 return NULL; 44 } 45 46 static int assign_queue_slot_by_qid(struct process_queue_manager *pqm, 47 unsigned int qid) 48 { 49 if (qid >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) 50 return -EINVAL; 51 52 if (__test_and_set_bit(qid, pqm->queue_slot_bitmap)) { 53 pr_err("Cannot create new queue because requested qid(%u) is in use\n", qid); 54 return -ENOSPC; 55 } 56 57 return 0; 58 } 59 60 static int find_available_queue_slot(struct process_queue_manager *pqm, 61 unsigned int *qid) 62 { 63 unsigned long found; 64 65 found = find_first_zero_bit(pqm->queue_slot_bitmap, 66 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS); 67 68 pr_debug("The new slot id %lu\n", found); 69 70 if (found >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) { 71 pr_info("Cannot open more queues for process with pasid 0x%x\n", 72 pqm->process->pasid); 73 return -ENOMEM; 74 } 75 76 set_bit(found, pqm->queue_slot_bitmap); 77 *qid = found; 78 79 return 0; 80 } 81 82 void kfd_process_dequeue_from_device(struct kfd_process_device *pdd) 83 { 84 struct kfd_node *dev = pdd->dev; 85 86 if (pdd->already_dequeued) 87 return; 88 89 dev->dqm->ops.process_termination(dev->dqm, &pdd->qpd); 90 pdd->already_dequeued = true; 91 } 92 93 int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid, 94 void *gws) 95 { 96 struct kfd_node *dev = NULL; 97 struct process_queue_node *pqn; 98 struct kfd_process_device *pdd; 99 struct kgd_mem *mem = NULL; 100 int ret; 101 102 pqn = get_queue_by_qid(pqm, qid); 103 if (!pqn) { 104 pr_err("Queue id does not match any known queue\n"); 105 return -EINVAL; 106 } 107 108 if (pqn->q) 109 dev = pqn->q->device; 110 if (WARN_ON(!dev)) 111 return -ENODEV; 112 113 pdd = kfd_get_process_device_data(dev, pqm->process); 114 if (!pdd) { 115 pr_err("Process device data doesn't exist\n"); 116 return -EINVAL; 117 } 118 119 /* Only allow one queue per process can have GWS assigned */ 120 if (gws && pdd->qpd.num_gws) 121 return -EBUSY; 122 123 if (!gws && pdd->qpd.num_gws == 0) 124 return -EINVAL; 125 126 if (gws) 127 ret = amdgpu_amdkfd_add_gws_to_process(pdd->process->kgd_process_info, 128 gws, &mem); 129 else 130 ret = amdgpu_amdkfd_remove_gws_from_process(pdd->process->kgd_process_info, 131 pqn->q->gws); 132 if (unlikely(ret)) 133 return ret; 134 135 pqn->q->gws = mem; 136 pdd->qpd.num_gws = gws ? dev->adev->gds.gws_size : 0; 137 138 return pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm, 139 pqn->q, NULL); 140 } 141 142 void kfd_process_dequeue_from_all_devices(struct kfd_process *p) 143 { 144 int i; 145 146 for (i = 0; i < p->n_pdds; i++) 147 kfd_process_dequeue_from_device(p->pdds[i]); 148 } 149 150 int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p) 151 { 152 INIT_LIST_HEAD(&pqm->queues); 153 pqm->queue_slot_bitmap = bitmap_zalloc(KFD_MAX_NUM_OF_QUEUES_PER_PROCESS, 154 GFP_KERNEL); 155 if (!pqm->queue_slot_bitmap) 156 return -ENOMEM; 157 pqm->process = p; 158 159 return 0; 160 } 161 162 void pqm_uninit(struct process_queue_manager *pqm) 163 { 164 struct process_queue_node *pqn, *next; 165 166 list_for_each_entry_safe(pqn, next, &pqm->queues, process_queue_list) { 167 if (pqn->q && pqn->q->gws) 168 amdgpu_amdkfd_remove_gws_from_process(pqm->process->kgd_process_info, 169 pqn->q->gws); 170 kfd_procfs_del_queue(pqn->q); 171 uninit_queue(pqn->q); 172 list_del(&pqn->process_queue_list); 173 kfree(pqn); 174 } 175 176 bitmap_free(pqm->queue_slot_bitmap); 177 pqm->queue_slot_bitmap = NULL; 178 } 179 180 static int init_user_queue(struct process_queue_manager *pqm, 181 struct kfd_node *dev, struct queue **q, 182 struct queue_properties *q_properties, 183 struct file *f, struct amdgpu_bo *wptr_bo, 184 unsigned int qid) 185 { 186 int retval; 187 188 /* Doorbell initialized in user space*/ 189 q_properties->doorbell_ptr = NULL; 190 191 /* let DQM handle it*/ 192 q_properties->vmid = 0; 193 q_properties->queue_id = qid; 194 195 retval = init_queue(q, q_properties); 196 if (retval != 0) 197 return retval; 198 199 (*q)->device = dev; 200 (*q)->process = pqm->process; 201 202 if (dev->kfd->shared_resources.enable_mes) { 203 retval = amdgpu_amdkfd_alloc_gtt_mem(dev->adev, 204 AMDGPU_MES_GANG_CTX_SIZE, 205 &(*q)->gang_ctx_bo, 206 &(*q)->gang_ctx_gpu_addr, 207 &(*q)->gang_ctx_cpu_ptr, 208 false); 209 if (retval) { 210 pr_err("failed to allocate gang context bo\n"); 211 goto cleanup; 212 } 213 memset((*q)->gang_ctx_cpu_ptr, 0, AMDGPU_MES_GANG_CTX_SIZE); 214 (*q)->wptr_bo = wptr_bo; 215 } 216 217 pr_debug("PQM After init queue"); 218 return 0; 219 220 cleanup: 221 uninit_queue(*q); 222 *q = NULL; 223 return retval; 224 } 225 226 int pqm_create_queue(struct process_queue_manager *pqm, 227 struct kfd_node *dev, 228 struct file *f, 229 struct queue_properties *properties, 230 unsigned int *qid, 231 struct amdgpu_bo *wptr_bo, 232 const struct kfd_criu_queue_priv_data *q_data, 233 const void *restore_mqd, 234 const void *restore_ctl_stack, 235 uint32_t *p_doorbell_offset_in_process) 236 { 237 int retval; 238 struct kfd_process_device *pdd; 239 struct queue *q; 240 struct process_queue_node *pqn; 241 struct kernel_queue *kq; 242 enum kfd_queue_type type = properties->type; 243 unsigned int max_queues = 127; /* HWS limit */ 244 245 /* 246 * On GFX 9.4.3, increase the number of queues that 247 * can be created to 255. No HWS limit on GFX 9.4.3. 248 */ 249 if (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 3)) 250 max_queues = 255; 251 252 q = NULL; 253 kq = NULL; 254 255 pdd = kfd_get_process_device_data(dev, pqm->process); 256 if (!pdd) { 257 pr_err("Process device data doesn't exist\n"); 258 return -1; 259 } 260 261 /* 262 * for debug process, verify that it is within the static queues limit 263 * currently limit is set to half of the total avail HQD slots 264 * If we are just about to create DIQ, the is_debug flag is not set yet 265 * Hence we also check the type as well 266 */ 267 if ((pdd->qpd.is_debug) || (type == KFD_QUEUE_TYPE_DIQ)) 268 max_queues = dev->kfd->device_info.max_no_of_hqd/2; 269 270 if (pdd->qpd.queue_count >= max_queues) 271 return -ENOSPC; 272 273 if (q_data) { 274 retval = assign_queue_slot_by_qid(pqm, q_data->q_id); 275 *qid = q_data->q_id; 276 } else 277 retval = find_available_queue_slot(pqm, qid); 278 279 if (retval != 0) 280 return retval; 281 282 if (list_empty(&pdd->qpd.queues_list) && 283 list_empty(&pdd->qpd.priv_queue_list)) 284 dev->dqm->ops.register_process(dev->dqm, &pdd->qpd); 285 286 pqn = kzalloc(sizeof(*pqn), GFP_KERNEL); 287 if (!pqn) { 288 retval = -ENOMEM; 289 goto err_allocate_pqn; 290 } 291 292 switch (type) { 293 case KFD_QUEUE_TYPE_SDMA: 294 case KFD_QUEUE_TYPE_SDMA_XGMI: 295 /* SDMA queues are always allocated statically no matter 296 * which scheduler mode is used. We also do not need to 297 * check whether a SDMA queue can be allocated here, because 298 * allocate_sdma_queue() in create_queue() has the 299 * corresponding check logic. 300 */ 301 retval = init_user_queue(pqm, dev, &q, properties, f, wptr_bo, *qid); 302 if (retval != 0) 303 goto err_create_queue; 304 pqn->q = q; 305 pqn->kq = NULL; 306 retval = dev->dqm->ops.create_queue(dev->dqm, q, &pdd->qpd, q_data, 307 restore_mqd, restore_ctl_stack); 308 print_queue(q); 309 break; 310 311 case KFD_QUEUE_TYPE_COMPUTE: 312 /* check if there is over subscription */ 313 if ((dev->dqm->sched_policy == 314 KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION) && 315 ((dev->dqm->processes_count >= dev->vm_info.vmid_num_kfd) || 316 (dev->dqm->active_queue_count >= get_cp_queues_num(dev->dqm)))) { 317 pr_debug("Over-subscription is not allowed when amdkfd.sched_policy == 1\n"); 318 retval = -EPERM; 319 goto err_create_queue; 320 } 321 322 retval = init_user_queue(pqm, dev, &q, properties, f, wptr_bo, *qid); 323 if (retval != 0) 324 goto err_create_queue; 325 pqn->q = q; 326 pqn->kq = NULL; 327 retval = dev->dqm->ops.create_queue(dev->dqm, q, &pdd->qpd, q_data, 328 restore_mqd, restore_ctl_stack); 329 print_queue(q); 330 break; 331 case KFD_QUEUE_TYPE_DIQ: 332 kq = kernel_queue_init(dev, KFD_QUEUE_TYPE_DIQ); 333 if (!kq) { 334 retval = -ENOMEM; 335 goto err_create_queue; 336 } 337 kq->queue->properties.queue_id = *qid; 338 pqn->kq = kq; 339 pqn->q = NULL; 340 retval = dev->dqm->ops.create_kernel_queue(dev->dqm, 341 kq, &pdd->qpd); 342 break; 343 default: 344 WARN(1, "Invalid queue type %d", type); 345 retval = -EINVAL; 346 } 347 348 if (retval != 0) { 349 pr_err("Pasid 0x%x DQM create queue type %d failed. ret %d\n", 350 pqm->process->pasid, type, retval); 351 goto err_create_queue; 352 } 353 354 if (q && p_doorbell_offset_in_process) 355 /* Return the doorbell offset within the doorbell page 356 * to the caller so it can be passed up to user mode 357 * (in bytes). 358 * There are always 1024 doorbells per process, so in case 359 * of 8-byte doorbells, there are two doorbell pages per 360 * process. 361 */ 362 *p_doorbell_offset_in_process = 363 (q->properties.doorbell_off * sizeof(uint32_t)) & 364 (kfd_doorbell_process_slice(dev->kfd) - 1); 365 366 pr_debug("PQM After DQM create queue\n"); 367 368 list_add(&pqn->process_queue_list, &pqm->queues); 369 370 if (q) { 371 pr_debug("PQM done creating queue\n"); 372 kfd_procfs_add_queue(q); 373 print_queue_properties(&q->properties); 374 } 375 376 return retval; 377 378 err_create_queue: 379 uninit_queue(q); 380 if (kq) 381 kernel_queue_uninit(kq, false); 382 kfree(pqn); 383 err_allocate_pqn: 384 /* check if queues list is empty unregister process from device */ 385 clear_bit(*qid, pqm->queue_slot_bitmap); 386 if (list_empty(&pdd->qpd.queues_list) && 387 list_empty(&pdd->qpd.priv_queue_list)) 388 dev->dqm->ops.unregister_process(dev->dqm, &pdd->qpd); 389 return retval; 390 } 391 392 int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid) 393 { 394 struct process_queue_node *pqn; 395 struct kfd_process_device *pdd; 396 struct device_queue_manager *dqm; 397 struct kfd_node *dev; 398 int retval; 399 400 dqm = NULL; 401 402 retval = 0; 403 404 pqn = get_queue_by_qid(pqm, qid); 405 if (!pqn) { 406 pr_err("Queue id does not match any known queue\n"); 407 return -EINVAL; 408 } 409 410 dev = NULL; 411 if (pqn->kq) 412 dev = pqn->kq->dev; 413 if (pqn->q) 414 dev = pqn->q->device; 415 if (WARN_ON(!dev)) 416 return -ENODEV; 417 418 pdd = kfd_get_process_device_data(dev, pqm->process); 419 if (!pdd) { 420 pr_err("Process device data doesn't exist\n"); 421 return -1; 422 } 423 424 if (pqn->kq) { 425 /* destroy kernel queue (DIQ) */ 426 dqm = pqn->kq->dev->dqm; 427 dqm->ops.destroy_kernel_queue(dqm, pqn->kq, &pdd->qpd); 428 kernel_queue_uninit(pqn->kq, false); 429 } 430 431 if (pqn->q) { 432 kfd_procfs_del_queue(pqn->q); 433 dqm = pqn->q->device->dqm; 434 retval = dqm->ops.destroy_queue(dqm, &pdd->qpd, pqn->q); 435 if (retval) { 436 pr_err("Pasid 0x%x destroy queue %d failed, ret %d\n", 437 pqm->process->pasid, 438 pqn->q->properties.queue_id, retval); 439 if (retval != -ETIME) 440 goto err_destroy_queue; 441 } 442 443 if (pqn->q->gws) { 444 amdgpu_amdkfd_remove_gws_from_process(pqm->process->kgd_process_info, 445 pqn->q->gws); 446 pdd->qpd.num_gws = 0; 447 } 448 449 if (dev->kfd->shared_resources.enable_mes) { 450 amdgpu_amdkfd_free_gtt_mem(dev->adev, 451 pqn->q->gang_ctx_bo); 452 if (pqn->q->wptr_bo) 453 amdgpu_amdkfd_free_gtt_mem(dev->adev, pqn->q->wptr_bo); 454 455 } 456 uninit_queue(pqn->q); 457 } 458 459 list_del(&pqn->process_queue_list); 460 kfree(pqn); 461 clear_bit(qid, pqm->queue_slot_bitmap); 462 463 if (list_empty(&pdd->qpd.queues_list) && 464 list_empty(&pdd->qpd.priv_queue_list)) 465 dqm->ops.unregister_process(dqm, &pdd->qpd); 466 467 err_destroy_queue: 468 return retval; 469 } 470 471 int pqm_update_queue_properties(struct process_queue_manager *pqm, 472 unsigned int qid, struct queue_properties *p) 473 { 474 int retval; 475 struct process_queue_node *pqn; 476 477 pqn = get_queue_by_qid(pqm, qid); 478 if (!pqn) { 479 pr_debug("No queue %d exists for update operation\n", qid); 480 return -EFAULT; 481 } 482 483 pqn->q->properties.queue_address = p->queue_address; 484 pqn->q->properties.queue_size = p->queue_size; 485 pqn->q->properties.queue_percent = p->queue_percent; 486 pqn->q->properties.priority = p->priority; 487 pqn->q->properties.pm4_target_xcc = p->pm4_target_xcc; 488 489 retval = pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm, 490 pqn->q, NULL); 491 if (retval != 0) 492 return retval; 493 494 return 0; 495 } 496 497 int pqm_update_mqd(struct process_queue_manager *pqm, 498 unsigned int qid, struct mqd_update_info *minfo) 499 { 500 int retval; 501 struct process_queue_node *pqn; 502 503 pqn = get_queue_by_qid(pqm, qid); 504 if (!pqn) { 505 pr_debug("No queue %d exists for update operation\n", qid); 506 return -EFAULT; 507 } 508 509 /* ASICs that have WGPs must enforce pairwise enabled mask checks. */ 510 if (minfo && minfo->update_flag == UPDATE_FLAG_CU_MASK && minfo->cu_mask.ptr && 511 KFD_GC_VERSION(pqn->q->device) >= IP_VERSION(10, 0, 0)) { 512 int i; 513 514 for (i = 0; i < minfo->cu_mask.count; i += 2) { 515 uint32_t cu_pair = (minfo->cu_mask.ptr[i / 32] >> (i % 32)) & 0x3; 516 517 if (cu_pair && cu_pair != 0x3) { 518 pr_debug("CUs must be adjacent pairwise enabled.\n"); 519 return -EINVAL; 520 } 521 } 522 } 523 524 retval = pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm, 525 pqn->q, minfo); 526 if (retval != 0) 527 return retval; 528 529 return 0; 530 } 531 532 struct kernel_queue *pqm_get_kernel_queue( 533 struct process_queue_manager *pqm, 534 unsigned int qid) 535 { 536 struct process_queue_node *pqn; 537 538 pqn = get_queue_by_qid(pqm, qid); 539 if (pqn && pqn->kq) 540 return pqn->kq; 541 542 return NULL; 543 } 544 545 struct queue *pqm_get_user_queue(struct process_queue_manager *pqm, 546 unsigned int qid) 547 { 548 struct process_queue_node *pqn; 549 550 pqn = get_queue_by_qid(pqm, qid); 551 return pqn ? pqn->q : NULL; 552 } 553 554 int pqm_get_wave_state(struct process_queue_manager *pqm, 555 unsigned int qid, 556 void __user *ctl_stack, 557 u32 *ctl_stack_used_size, 558 u32 *save_area_used_size) 559 { 560 struct process_queue_node *pqn; 561 562 pqn = get_queue_by_qid(pqm, qid); 563 if (!pqn) { 564 pr_debug("amdkfd: No queue %d exists for operation\n", 565 qid); 566 return -EFAULT; 567 } 568 569 return pqn->q->device->dqm->ops.get_wave_state(pqn->q->device->dqm, 570 pqn->q, 571 ctl_stack, 572 ctl_stack_used_size, 573 save_area_used_size); 574 } 575 576 static int get_queue_data_sizes(struct kfd_process_device *pdd, 577 struct queue *q, 578 uint32_t *mqd_size, 579 uint32_t *ctl_stack_size) 580 { 581 int ret; 582 583 ret = pqm_get_queue_checkpoint_info(&pdd->process->pqm, 584 q->properties.queue_id, 585 mqd_size, 586 ctl_stack_size); 587 if (ret) 588 pr_err("Failed to get queue dump info (%d)\n", ret); 589 590 return ret; 591 } 592 593 int kfd_process_get_queue_info(struct kfd_process *p, 594 uint32_t *num_queues, 595 uint64_t *priv_data_sizes) 596 { 597 uint32_t extra_data_sizes = 0; 598 struct queue *q; 599 int i; 600 int ret; 601 602 *num_queues = 0; 603 604 /* Run over all PDDs of the process */ 605 for (i = 0; i < p->n_pdds; i++) { 606 struct kfd_process_device *pdd = p->pdds[i]; 607 608 list_for_each_entry(q, &pdd->qpd.queues_list, list) { 609 if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE || 610 q->properties.type == KFD_QUEUE_TYPE_SDMA || 611 q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) { 612 uint32_t mqd_size, ctl_stack_size; 613 614 *num_queues = *num_queues + 1; 615 616 ret = get_queue_data_sizes(pdd, q, &mqd_size, &ctl_stack_size); 617 if (ret) 618 return ret; 619 620 extra_data_sizes += mqd_size + ctl_stack_size; 621 } else { 622 pr_err("Unsupported queue type (%d)\n", q->properties.type); 623 return -EOPNOTSUPP; 624 } 625 } 626 } 627 *priv_data_sizes = extra_data_sizes + 628 (*num_queues * sizeof(struct kfd_criu_queue_priv_data)); 629 630 return 0; 631 } 632 633 static int pqm_checkpoint_mqd(struct process_queue_manager *pqm, 634 unsigned int qid, 635 void *mqd, 636 void *ctl_stack) 637 { 638 struct process_queue_node *pqn; 639 640 pqn = get_queue_by_qid(pqm, qid); 641 if (!pqn) { 642 pr_debug("amdkfd: No queue %d exists for operation\n", qid); 643 return -EFAULT; 644 } 645 646 if (!pqn->q->device->dqm->ops.checkpoint_mqd) { 647 pr_err("amdkfd: queue dumping not supported on this device\n"); 648 return -EOPNOTSUPP; 649 } 650 651 return pqn->q->device->dqm->ops.checkpoint_mqd(pqn->q->device->dqm, 652 pqn->q, mqd, ctl_stack); 653 } 654 655 static int criu_checkpoint_queue(struct kfd_process_device *pdd, 656 struct queue *q, 657 struct kfd_criu_queue_priv_data *q_data) 658 { 659 uint8_t *mqd, *ctl_stack; 660 int ret; 661 662 mqd = (void *)(q_data + 1); 663 ctl_stack = mqd + q_data->mqd_size; 664 665 q_data->gpu_id = pdd->user_gpu_id; 666 q_data->type = q->properties.type; 667 q_data->format = q->properties.format; 668 q_data->q_id = q->properties.queue_id; 669 q_data->q_address = q->properties.queue_address; 670 q_data->q_size = q->properties.queue_size; 671 q_data->priority = q->properties.priority; 672 q_data->q_percent = q->properties.queue_percent; 673 q_data->read_ptr_addr = (uint64_t)q->properties.read_ptr; 674 q_data->write_ptr_addr = (uint64_t)q->properties.write_ptr; 675 q_data->doorbell_id = q->doorbell_id; 676 677 q_data->sdma_id = q->sdma_id; 678 679 q_data->eop_ring_buffer_address = 680 q->properties.eop_ring_buffer_address; 681 682 q_data->eop_ring_buffer_size = q->properties.eop_ring_buffer_size; 683 684 q_data->ctx_save_restore_area_address = 685 q->properties.ctx_save_restore_area_address; 686 687 q_data->ctx_save_restore_area_size = 688 q->properties.ctx_save_restore_area_size; 689 690 q_data->gws = !!q->gws; 691 692 ret = pqm_checkpoint_mqd(&pdd->process->pqm, q->properties.queue_id, mqd, ctl_stack); 693 if (ret) { 694 pr_err("Failed checkpoint queue_mqd (%d)\n", ret); 695 return ret; 696 } 697 698 pr_debug("Dumping Queue: gpu_id:%x queue_id:%u\n", q_data->gpu_id, q_data->q_id); 699 return ret; 700 } 701 702 static int criu_checkpoint_queues_device(struct kfd_process_device *pdd, 703 uint8_t __user *user_priv, 704 unsigned int *q_index, 705 uint64_t *queues_priv_data_offset) 706 { 707 unsigned int q_private_data_size = 0; 708 uint8_t *q_private_data = NULL; /* Local buffer to store individual queue private data */ 709 struct queue *q; 710 int ret = 0; 711 712 list_for_each_entry(q, &pdd->qpd.queues_list, list) { 713 struct kfd_criu_queue_priv_data *q_data; 714 uint64_t q_data_size; 715 uint32_t mqd_size; 716 uint32_t ctl_stack_size; 717 718 if (q->properties.type != KFD_QUEUE_TYPE_COMPUTE && 719 q->properties.type != KFD_QUEUE_TYPE_SDMA && 720 q->properties.type != KFD_QUEUE_TYPE_SDMA_XGMI) { 721 722 pr_err("Unsupported queue type (%d)\n", q->properties.type); 723 ret = -EOPNOTSUPP; 724 break; 725 } 726 727 ret = get_queue_data_sizes(pdd, q, &mqd_size, &ctl_stack_size); 728 if (ret) 729 break; 730 731 q_data_size = sizeof(*q_data) + mqd_size + ctl_stack_size; 732 733 /* Increase local buffer space if needed */ 734 if (q_private_data_size < q_data_size) { 735 kfree(q_private_data); 736 737 q_private_data = kzalloc(q_data_size, GFP_KERNEL); 738 if (!q_private_data) { 739 ret = -ENOMEM; 740 break; 741 } 742 q_private_data_size = q_data_size; 743 } 744 745 q_data = (struct kfd_criu_queue_priv_data *)q_private_data; 746 747 /* data stored in this order: priv_data, mqd, ctl_stack */ 748 q_data->mqd_size = mqd_size; 749 q_data->ctl_stack_size = ctl_stack_size; 750 751 ret = criu_checkpoint_queue(pdd, q, q_data); 752 if (ret) 753 break; 754 755 q_data->object_type = KFD_CRIU_OBJECT_TYPE_QUEUE; 756 757 ret = copy_to_user(user_priv + *queues_priv_data_offset, 758 q_data, q_data_size); 759 if (ret) { 760 ret = -EFAULT; 761 break; 762 } 763 *queues_priv_data_offset += q_data_size; 764 *q_index = *q_index + 1; 765 } 766 767 kfree(q_private_data); 768 769 return ret; 770 } 771 772 int kfd_criu_checkpoint_queues(struct kfd_process *p, 773 uint8_t __user *user_priv_data, 774 uint64_t *priv_data_offset) 775 { 776 int ret = 0, pdd_index, q_index = 0; 777 778 for (pdd_index = 0; pdd_index < p->n_pdds; pdd_index++) { 779 struct kfd_process_device *pdd = p->pdds[pdd_index]; 780 781 /* 782 * criu_checkpoint_queues_device will copy data to user and update q_index and 783 * queues_priv_data_offset 784 */ 785 ret = criu_checkpoint_queues_device(pdd, user_priv_data, &q_index, 786 priv_data_offset); 787 788 if (ret) 789 break; 790 } 791 792 return ret; 793 } 794 795 static void set_queue_properties_from_criu(struct queue_properties *qp, 796 struct kfd_criu_queue_priv_data *q_data) 797 { 798 qp->is_interop = false; 799 qp->queue_percent = q_data->q_percent; 800 qp->priority = q_data->priority; 801 qp->queue_address = q_data->q_address; 802 qp->queue_size = q_data->q_size; 803 qp->read_ptr = (uint32_t *) q_data->read_ptr_addr; 804 qp->write_ptr = (uint32_t *) q_data->write_ptr_addr; 805 qp->eop_ring_buffer_address = q_data->eop_ring_buffer_address; 806 qp->eop_ring_buffer_size = q_data->eop_ring_buffer_size; 807 qp->ctx_save_restore_area_address = q_data->ctx_save_restore_area_address; 808 qp->ctx_save_restore_area_size = q_data->ctx_save_restore_area_size; 809 qp->ctl_stack_size = q_data->ctl_stack_size; 810 qp->type = q_data->type; 811 qp->format = q_data->format; 812 } 813 814 int kfd_criu_restore_queue(struct kfd_process *p, 815 uint8_t __user *user_priv_ptr, 816 uint64_t *priv_data_offset, 817 uint64_t max_priv_data_size) 818 { 819 uint8_t *mqd, *ctl_stack, *q_extra_data = NULL; 820 struct kfd_criu_queue_priv_data *q_data; 821 struct kfd_process_device *pdd; 822 uint64_t q_extra_data_size; 823 struct queue_properties qp; 824 unsigned int queue_id; 825 int ret = 0; 826 827 if (*priv_data_offset + sizeof(*q_data) > max_priv_data_size) 828 return -EINVAL; 829 830 q_data = kmalloc(sizeof(*q_data), GFP_KERNEL); 831 if (!q_data) 832 return -ENOMEM; 833 834 ret = copy_from_user(q_data, user_priv_ptr + *priv_data_offset, sizeof(*q_data)); 835 if (ret) { 836 ret = -EFAULT; 837 goto exit; 838 } 839 840 *priv_data_offset += sizeof(*q_data); 841 q_extra_data_size = (uint64_t)q_data->ctl_stack_size + q_data->mqd_size; 842 843 if (*priv_data_offset + q_extra_data_size > max_priv_data_size) { 844 ret = -EINVAL; 845 goto exit; 846 } 847 848 q_extra_data = kmalloc(q_extra_data_size, GFP_KERNEL); 849 if (!q_extra_data) { 850 ret = -ENOMEM; 851 goto exit; 852 } 853 854 ret = copy_from_user(q_extra_data, user_priv_ptr + *priv_data_offset, q_extra_data_size); 855 if (ret) { 856 ret = -EFAULT; 857 goto exit; 858 } 859 860 *priv_data_offset += q_extra_data_size; 861 862 pdd = kfd_process_device_data_by_id(p, q_data->gpu_id); 863 if (!pdd) { 864 pr_err("Failed to get pdd\n"); 865 ret = -EINVAL; 866 goto exit; 867 } 868 869 if (!pdd->doorbell_index && 870 kfd_alloc_process_doorbells(pdd->dev->kfd, &pdd->doorbell_index) < 0) { 871 ret = -ENOMEM; 872 goto exit; 873 } 874 875 /* data stored in this order: mqd, ctl_stack */ 876 mqd = q_extra_data; 877 ctl_stack = mqd + q_data->mqd_size; 878 879 memset(&qp, 0, sizeof(qp)); 880 set_queue_properties_from_criu(&qp, q_data); 881 882 print_queue_properties(&qp); 883 884 ret = pqm_create_queue(&p->pqm, pdd->dev, NULL, &qp, &queue_id, NULL, q_data, mqd, ctl_stack, 885 NULL); 886 if (ret) { 887 pr_err("Failed to create new queue err:%d\n", ret); 888 goto exit; 889 } 890 891 if (q_data->gws) 892 ret = pqm_set_gws(&p->pqm, q_data->q_id, pdd->dev->gws); 893 894 exit: 895 if (ret) 896 pr_err("Failed to restore queue (%d)\n", ret); 897 else 898 pr_debug("Queue id %d was restored successfully\n", queue_id); 899 900 kfree(q_data); 901 902 return ret; 903 } 904 905 int pqm_get_queue_checkpoint_info(struct process_queue_manager *pqm, 906 unsigned int qid, 907 uint32_t *mqd_size, 908 uint32_t *ctl_stack_size) 909 { 910 struct process_queue_node *pqn; 911 912 pqn = get_queue_by_qid(pqm, qid); 913 if (!pqn) { 914 pr_debug("amdkfd: No queue %d exists for operation\n", qid); 915 return -EFAULT; 916 } 917 918 if (!pqn->q->device->dqm->ops.get_queue_checkpoint_info) { 919 pr_err("amdkfd: queue dumping not supported on this device\n"); 920 return -EOPNOTSUPP; 921 } 922 923 pqn->q->device->dqm->ops.get_queue_checkpoint_info(pqn->q->device->dqm, 924 pqn->q, mqd_size, 925 ctl_stack_size); 926 return 0; 927 } 928 929 #if defined(CONFIG_DEBUG_FS) 930 931 int pqm_debugfs_mqds(struct seq_file *m, void *data) 932 { 933 struct process_queue_manager *pqm = data; 934 struct process_queue_node *pqn; 935 struct queue *q; 936 enum KFD_MQD_TYPE mqd_type; 937 struct mqd_manager *mqd_mgr; 938 int r = 0, xcc, num_xccs = 1; 939 void *mqd; 940 uint64_t size = 0; 941 942 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 943 if (pqn->q) { 944 q = pqn->q; 945 switch (q->properties.type) { 946 case KFD_QUEUE_TYPE_SDMA: 947 case KFD_QUEUE_TYPE_SDMA_XGMI: 948 seq_printf(m, " SDMA queue on device %x\n", 949 q->device->id); 950 mqd_type = KFD_MQD_TYPE_SDMA; 951 break; 952 case KFD_QUEUE_TYPE_COMPUTE: 953 seq_printf(m, " Compute queue on device %x\n", 954 q->device->id); 955 mqd_type = KFD_MQD_TYPE_CP; 956 num_xccs = NUM_XCC(q->device->xcc_mask); 957 break; 958 default: 959 seq_printf(m, 960 " Bad user queue type %d on device %x\n", 961 q->properties.type, q->device->id); 962 continue; 963 } 964 mqd_mgr = q->device->dqm->mqd_mgrs[mqd_type]; 965 size = mqd_mgr->mqd_stride(mqd_mgr, 966 &q->properties); 967 } else if (pqn->kq) { 968 q = pqn->kq->queue; 969 mqd_mgr = pqn->kq->mqd_mgr; 970 switch (q->properties.type) { 971 case KFD_QUEUE_TYPE_DIQ: 972 seq_printf(m, " DIQ on device %x\n", 973 pqn->kq->dev->id); 974 break; 975 default: 976 seq_printf(m, 977 " Bad kernel queue type %d on device %x\n", 978 q->properties.type, 979 pqn->kq->dev->id); 980 continue; 981 } 982 } else { 983 seq_printf(m, 984 " Weird: Queue node with neither kernel nor user queue\n"); 985 continue; 986 } 987 988 for (xcc = 0; xcc < num_xccs; xcc++) { 989 mqd = q->mqd + size * xcc; 990 r = mqd_mgr->debugfs_show_mqd(m, mqd); 991 if (r != 0) 992 break; 993 } 994 } 995 996 return r; 997 } 998 999 #endif 1000