1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 */ 24 25 #include <linux/slab.h> 26 #include <linux/list.h> 27 #include "kfd_device_queue_manager.h" 28 #include "kfd_priv.h" 29 #include "kfd_kernel_queue.h" 30 #include "amdgpu_amdkfd.h" 31 #include "amdgpu_reset.h" 32 33 static inline struct process_queue_node *get_queue_by_qid( 34 struct process_queue_manager *pqm, unsigned int qid) 35 { 36 struct process_queue_node *pqn; 37 38 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 39 if ((pqn->q && pqn->q->properties.queue_id == qid) || 40 (pqn->kq && pqn->kq->queue->properties.queue_id == qid)) 41 return pqn; 42 } 43 44 return NULL; 45 } 46 47 static int assign_queue_slot_by_qid(struct process_queue_manager *pqm, 48 unsigned int qid) 49 { 50 if (qid >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) 51 return -EINVAL; 52 53 if (__test_and_set_bit(qid, pqm->queue_slot_bitmap)) { 54 pr_err("Cannot create new queue because requested qid(%u) is in use\n", qid); 55 return -ENOSPC; 56 } 57 58 return 0; 59 } 60 61 static int find_available_queue_slot(struct process_queue_manager *pqm, 62 unsigned int *qid) 63 { 64 unsigned long found; 65 66 found = find_first_zero_bit(pqm->queue_slot_bitmap, 67 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS); 68 69 pr_debug("The new slot id %lu\n", found); 70 71 if (found >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) { 72 pr_info("Cannot open more queues for process with pasid 0x%x\n", 73 pqm->process->pasid); 74 return -ENOMEM; 75 } 76 77 set_bit(found, pqm->queue_slot_bitmap); 78 *qid = found; 79 80 return 0; 81 } 82 83 void kfd_process_dequeue_from_device(struct kfd_process_device *pdd) 84 { 85 struct kfd_node *dev = pdd->dev; 86 87 if (pdd->already_dequeued) 88 return; 89 90 dev->dqm->ops.process_termination(dev->dqm, &pdd->qpd); 91 if (dev->kfd->shared_resources.enable_mes && 92 down_read_trylock(&dev->adev->reset_domain->sem)) { 93 amdgpu_mes_flush_shader_debugger(dev->adev, 94 pdd->proc_ctx_gpu_addr); 95 up_read(&dev->adev->reset_domain->sem); 96 } 97 pdd->already_dequeued = true; 98 } 99 100 int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid, 101 void *gws) 102 { 103 struct kfd_node *dev = NULL; 104 struct process_queue_node *pqn; 105 struct kfd_process_device *pdd; 106 struct kgd_mem *mem = NULL; 107 int ret; 108 109 pqn = get_queue_by_qid(pqm, qid); 110 if (!pqn) { 111 pr_err("Queue id does not match any known queue\n"); 112 return -EINVAL; 113 } 114 115 if (pqn->q) 116 dev = pqn->q->device; 117 if (WARN_ON(!dev)) 118 return -ENODEV; 119 120 pdd = kfd_get_process_device_data(dev, pqm->process); 121 if (!pdd) { 122 pr_err("Process device data doesn't exist\n"); 123 return -EINVAL; 124 } 125 126 /* Only allow one queue per process can have GWS assigned */ 127 if (gws && pdd->qpd.num_gws) 128 return -EBUSY; 129 130 if (!gws && pdd->qpd.num_gws == 0) 131 return -EINVAL; 132 133 if (KFD_GC_VERSION(dev) != IP_VERSION(9, 4, 3) && !dev->kfd->shared_resources.enable_mes) { 134 if (gws) 135 ret = amdgpu_amdkfd_add_gws_to_process(pdd->process->kgd_process_info, 136 gws, &mem); 137 else 138 ret = amdgpu_amdkfd_remove_gws_from_process(pdd->process->kgd_process_info, 139 pqn->q->gws); 140 if (unlikely(ret)) 141 return ret; 142 pqn->q->gws = mem; 143 } else { 144 /* 145 * Intentionally set GWS to a non-NULL value 146 * for devices that do not use GWS for global wave 147 * synchronization but require the formality 148 * of setting GWS for cooperative groups. 149 */ 150 pqn->q->gws = gws ? ERR_PTR(-ENOMEM) : NULL; 151 } 152 153 pdd->qpd.num_gws = gws ? dev->adev->gds.gws_size : 0; 154 155 return pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm, 156 pqn->q, NULL); 157 } 158 159 void kfd_process_dequeue_from_all_devices(struct kfd_process *p) 160 { 161 int i; 162 163 for (i = 0; i < p->n_pdds; i++) 164 kfd_process_dequeue_from_device(p->pdds[i]); 165 } 166 167 int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p) 168 { 169 INIT_LIST_HEAD(&pqm->queues); 170 pqm->queue_slot_bitmap = bitmap_zalloc(KFD_MAX_NUM_OF_QUEUES_PER_PROCESS, 171 GFP_KERNEL); 172 if (!pqm->queue_slot_bitmap) 173 return -ENOMEM; 174 pqm->process = p; 175 176 return 0; 177 } 178 179 static void pqm_clean_queue_resource(struct process_queue_manager *pqm, 180 struct process_queue_node *pqn) 181 { 182 struct kfd_node *dev; 183 struct kfd_process_device *pdd; 184 185 dev = pqn->q->device; 186 187 pdd = kfd_get_process_device_data(dev, pqm->process); 188 if (!pdd) { 189 pr_err("Process device data doesn't exist\n"); 190 return; 191 } 192 193 if (pqn->q->gws) { 194 if (KFD_GC_VERSION(pqn->q->device) != IP_VERSION(9, 4, 3) && 195 !dev->kfd->shared_resources.enable_mes) 196 amdgpu_amdkfd_remove_gws_from_process( 197 pqm->process->kgd_process_info, pqn->q->gws); 198 pdd->qpd.num_gws = 0; 199 } 200 201 if (dev->kfd->shared_resources.enable_mes) { 202 amdgpu_amdkfd_free_gtt_mem(dev->adev, pqn->q->gang_ctx_bo); 203 if (pqn->q->wptr_bo) 204 amdgpu_amdkfd_free_gtt_mem(dev->adev, pqn->q->wptr_bo); 205 } 206 } 207 208 void pqm_uninit(struct process_queue_manager *pqm) 209 { 210 struct process_queue_node *pqn, *next; 211 212 list_for_each_entry_safe(pqn, next, &pqm->queues, process_queue_list) { 213 if (pqn->q) 214 pqm_clean_queue_resource(pqm, pqn); 215 216 kfd_procfs_del_queue(pqn->q); 217 uninit_queue(pqn->q); 218 list_del(&pqn->process_queue_list); 219 kfree(pqn); 220 } 221 222 bitmap_free(pqm->queue_slot_bitmap); 223 pqm->queue_slot_bitmap = NULL; 224 } 225 226 static int init_user_queue(struct process_queue_manager *pqm, 227 struct kfd_node *dev, struct queue **q, 228 struct queue_properties *q_properties, 229 struct file *f, struct amdgpu_bo *wptr_bo, 230 unsigned int qid) 231 { 232 int retval; 233 234 /* Doorbell initialized in user space*/ 235 q_properties->doorbell_ptr = NULL; 236 q_properties->exception_status = KFD_EC_MASK(EC_QUEUE_NEW); 237 238 /* let DQM handle it*/ 239 q_properties->vmid = 0; 240 q_properties->queue_id = qid; 241 242 retval = init_queue(q, q_properties); 243 if (retval != 0) 244 return retval; 245 246 (*q)->device = dev; 247 (*q)->process = pqm->process; 248 249 if (dev->kfd->shared_resources.enable_mes) { 250 retval = amdgpu_amdkfd_alloc_gtt_mem(dev->adev, 251 AMDGPU_MES_GANG_CTX_SIZE, 252 &(*q)->gang_ctx_bo, 253 &(*q)->gang_ctx_gpu_addr, 254 &(*q)->gang_ctx_cpu_ptr, 255 false); 256 if (retval) { 257 pr_err("failed to allocate gang context bo\n"); 258 goto cleanup; 259 } 260 memset((*q)->gang_ctx_cpu_ptr, 0, AMDGPU_MES_GANG_CTX_SIZE); 261 (*q)->wptr_bo = wptr_bo; 262 } 263 264 pr_debug("PQM After init queue"); 265 return 0; 266 267 cleanup: 268 uninit_queue(*q); 269 *q = NULL; 270 return retval; 271 } 272 273 int pqm_create_queue(struct process_queue_manager *pqm, 274 struct kfd_node *dev, 275 struct file *f, 276 struct queue_properties *properties, 277 unsigned int *qid, 278 struct amdgpu_bo *wptr_bo, 279 const struct kfd_criu_queue_priv_data *q_data, 280 const void *restore_mqd, 281 const void *restore_ctl_stack, 282 uint32_t *p_doorbell_offset_in_process) 283 { 284 int retval; 285 struct kfd_process_device *pdd; 286 struct queue *q; 287 struct process_queue_node *pqn; 288 struct kernel_queue *kq; 289 enum kfd_queue_type type = properties->type; 290 unsigned int max_queues = 127; /* HWS limit */ 291 292 /* 293 * On GFX 9.4.3, increase the number of queues that 294 * can be created to 255. No HWS limit on GFX 9.4.3. 295 */ 296 if (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 3)) 297 max_queues = 255; 298 299 q = NULL; 300 kq = NULL; 301 302 pdd = kfd_get_process_device_data(dev, pqm->process); 303 if (!pdd) { 304 pr_err("Process device data doesn't exist\n"); 305 return -1; 306 } 307 308 /* 309 * for debug process, verify that it is within the static queues limit 310 * currently limit is set to half of the total avail HQD slots 311 * If we are just about to create DIQ, the is_debug flag is not set yet 312 * Hence we also check the type as well 313 */ 314 if ((pdd->qpd.is_debug) || (type == KFD_QUEUE_TYPE_DIQ)) 315 max_queues = dev->kfd->device_info.max_no_of_hqd/2; 316 317 if (pdd->qpd.queue_count >= max_queues) 318 return -ENOSPC; 319 320 if (q_data) { 321 retval = assign_queue_slot_by_qid(pqm, q_data->q_id); 322 *qid = q_data->q_id; 323 } else 324 retval = find_available_queue_slot(pqm, qid); 325 326 if (retval != 0) 327 return retval; 328 329 if (list_empty(&pdd->qpd.queues_list) && 330 list_empty(&pdd->qpd.priv_queue_list)) 331 dev->dqm->ops.register_process(dev->dqm, &pdd->qpd); 332 333 pqn = kzalloc(sizeof(*pqn), GFP_KERNEL); 334 if (!pqn) { 335 retval = -ENOMEM; 336 goto err_allocate_pqn; 337 } 338 339 switch (type) { 340 case KFD_QUEUE_TYPE_SDMA: 341 case KFD_QUEUE_TYPE_SDMA_XGMI: 342 /* SDMA queues are always allocated statically no matter 343 * which scheduler mode is used. We also do not need to 344 * check whether a SDMA queue can be allocated here, because 345 * allocate_sdma_queue() in create_queue() has the 346 * corresponding check logic. 347 */ 348 retval = init_user_queue(pqm, dev, &q, properties, f, wptr_bo, *qid); 349 if (retval != 0) 350 goto err_create_queue; 351 pqn->q = q; 352 pqn->kq = NULL; 353 retval = dev->dqm->ops.create_queue(dev->dqm, q, &pdd->qpd, q_data, 354 restore_mqd, restore_ctl_stack); 355 print_queue(q); 356 break; 357 358 case KFD_QUEUE_TYPE_COMPUTE: 359 /* check if there is over subscription */ 360 if ((dev->dqm->sched_policy == 361 KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION) && 362 ((dev->dqm->processes_count >= dev->vm_info.vmid_num_kfd) || 363 (dev->dqm->active_queue_count >= get_cp_queues_num(dev->dqm)))) { 364 pr_debug("Over-subscription is not allowed when amdkfd.sched_policy == 1\n"); 365 retval = -EPERM; 366 goto err_create_queue; 367 } 368 369 retval = init_user_queue(pqm, dev, &q, properties, f, wptr_bo, *qid); 370 if (retval != 0) 371 goto err_create_queue; 372 pqn->q = q; 373 pqn->kq = NULL; 374 retval = dev->dqm->ops.create_queue(dev->dqm, q, &pdd->qpd, q_data, 375 restore_mqd, restore_ctl_stack); 376 print_queue(q); 377 break; 378 case KFD_QUEUE_TYPE_DIQ: 379 kq = kernel_queue_init(dev, KFD_QUEUE_TYPE_DIQ); 380 if (!kq) { 381 retval = -ENOMEM; 382 goto err_create_queue; 383 } 384 kq->queue->properties.queue_id = *qid; 385 pqn->kq = kq; 386 pqn->q = NULL; 387 retval = kfd_process_drain_interrupts(pdd); 388 if (retval) 389 break; 390 391 retval = dev->dqm->ops.create_kernel_queue(dev->dqm, 392 kq, &pdd->qpd); 393 break; 394 default: 395 WARN(1, "Invalid queue type %d", type); 396 retval = -EINVAL; 397 } 398 399 if (retval != 0) { 400 pr_err("Pasid 0x%x DQM create queue type %d failed. ret %d\n", 401 pqm->process->pasid, type, retval); 402 goto err_create_queue; 403 } 404 405 if (q && p_doorbell_offset_in_process) { 406 /* Return the doorbell offset within the doorbell page 407 * to the caller so it can be passed up to user mode 408 * (in bytes). 409 * relative doorbell index = Absolute doorbell index - 410 * absolute index of first doorbell in the page. 411 */ 412 uint32_t first_db_index = amdgpu_doorbell_index_on_bar(pdd->dev->adev, 413 pdd->qpd.proc_doorbells, 414 0, 415 pdd->dev->kfd->device_info.doorbell_size); 416 417 *p_doorbell_offset_in_process = (q->properties.doorbell_off 418 - first_db_index) * sizeof(uint32_t); 419 } 420 421 pr_debug("PQM After DQM create queue\n"); 422 423 list_add(&pqn->process_queue_list, &pqm->queues); 424 425 if (q) { 426 pr_debug("PQM done creating queue\n"); 427 kfd_procfs_add_queue(q); 428 print_queue_properties(&q->properties); 429 } 430 431 return retval; 432 433 err_create_queue: 434 uninit_queue(q); 435 if (kq) 436 kernel_queue_uninit(kq, false); 437 kfree(pqn); 438 err_allocate_pqn: 439 /* check if queues list is empty unregister process from device */ 440 clear_bit(*qid, pqm->queue_slot_bitmap); 441 if (list_empty(&pdd->qpd.queues_list) && 442 list_empty(&pdd->qpd.priv_queue_list)) 443 dev->dqm->ops.unregister_process(dev->dqm, &pdd->qpd); 444 return retval; 445 } 446 447 int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid) 448 { 449 struct process_queue_node *pqn; 450 struct kfd_process_device *pdd; 451 struct device_queue_manager *dqm; 452 struct kfd_node *dev; 453 int retval; 454 455 dqm = NULL; 456 457 retval = 0; 458 459 pqn = get_queue_by_qid(pqm, qid); 460 if (!pqn) { 461 pr_err("Queue id does not match any known queue\n"); 462 return -EINVAL; 463 } 464 465 dev = NULL; 466 if (pqn->kq) 467 dev = pqn->kq->dev; 468 if (pqn->q) 469 dev = pqn->q->device; 470 if (WARN_ON(!dev)) 471 return -ENODEV; 472 473 pdd = kfd_get_process_device_data(dev, pqm->process); 474 if (!pdd) { 475 pr_err("Process device data doesn't exist\n"); 476 return -1; 477 } 478 479 if (pqn->kq) { 480 /* destroy kernel queue (DIQ) */ 481 dqm = pqn->kq->dev->dqm; 482 dqm->ops.destroy_kernel_queue(dqm, pqn->kq, &pdd->qpd); 483 kernel_queue_uninit(pqn->kq, false); 484 } 485 486 if (pqn->q) { 487 kfd_procfs_del_queue(pqn->q); 488 dqm = pqn->q->device->dqm; 489 retval = dqm->ops.destroy_queue(dqm, &pdd->qpd, pqn->q); 490 if (retval) { 491 pr_err("Pasid 0x%x destroy queue %d failed, ret %d\n", 492 pqm->process->pasid, 493 pqn->q->properties.queue_id, retval); 494 if (retval != -ETIME) 495 goto err_destroy_queue; 496 } 497 498 pqm_clean_queue_resource(pqm, pqn); 499 uninit_queue(pqn->q); 500 } 501 502 list_del(&pqn->process_queue_list); 503 kfree(pqn); 504 clear_bit(qid, pqm->queue_slot_bitmap); 505 506 if (list_empty(&pdd->qpd.queues_list) && 507 list_empty(&pdd->qpd.priv_queue_list)) 508 dqm->ops.unregister_process(dqm, &pdd->qpd); 509 510 err_destroy_queue: 511 return retval; 512 } 513 514 int pqm_update_queue_properties(struct process_queue_manager *pqm, 515 unsigned int qid, struct queue_properties *p) 516 { 517 int retval; 518 struct process_queue_node *pqn; 519 520 pqn = get_queue_by_qid(pqm, qid); 521 if (!pqn) { 522 pr_debug("No queue %d exists for update operation\n", qid); 523 return -EFAULT; 524 } 525 526 pqn->q->properties.queue_address = p->queue_address; 527 pqn->q->properties.queue_size = p->queue_size; 528 pqn->q->properties.queue_percent = p->queue_percent; 529 pqn->q->properties.priority = p->priority; 530 pqn->q->properties.pm4_target_xcc = p->pm4_target_xcc; 531 532 retval = pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm, 533 pqn->q, NULL); 534 if (retval != 0) 535 return retval; 536 537 return 0; 538 } 539 540 int pqm_update_mqd(struct process_queue_manager *pqm, 541 unsigned int qid, struct mqd_update_info *minfo) 542 { 543 int retval; 544 struct process_queue_node *pqn; 545 546 pqn = get_queue_by_qid(pqm, qid); 547 if (!pqn) { 548 pr_debug("No queue %d exists for update operation\n", qid); 549 return -EFAULT; 550 } 551 552 /* CUs are masked for debugger requirements so deny user mask */ 553 if (pqn->q->properties.is_dbg_wa && minfo && minfo->cu_mask.ptr) 554 return -EBUSY; 555 556 /* ASICs that have WGPs must enforce pairwise enabled mask checks. */ 557 if (minfo && minfo->cu_mask.ptr && 558 KFD_GC_VERSION(pqn->q->device) >= IP_VERSION(10, 0, 0)) { 559 int i; 560 561 for (i = 0; i < minfo->cu_mask.count; i += 2) { 562 uint32_t cu_pair = (minfo->cu_mask.ptr[i / 32] >> (i % 32)) & 0x3; 563 564 if (cu_pair && cu_pair != 0x3) { 565 pr_debug("CUs must be adjacent pairwise enabled.\n"); 566 return -EINVAL; 567 } 568 } 569 } 570 571 retval = pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm, 572 pqn->q, minfo); 573 if (retval != 0) 574 return retval; 575 576 if (minfo && minfo->cu_mask.ptr) 577 pqn->q->properties.is_user_cu_masked = true; 578 579 return 0; 580 } 581 582 struct kernel_queue *pqm_get_kernel_queue( 583 struct process_queue_manager *pqm, 584 unsigned int qid) 585 { 586 struct process_queue_node *pqn; 587 588 pqn = get_queue_by_qid(pqm, qid); 589 if (pqn && pqn->kq) 590 return pqn->kq; 591 592 return NULL; 593 } 594 595 struct queue *pqm_get_user_queue(struct process_queue_manager *pqm, 596 unsigned int qid) 597 { 598 struct process_queue_node *pqn; 599 600 pqn = get_queue_by_qid(pqm, qid); 601 return pqn ? pqn->q : NULL; 602 } 603 604 int pqm_get_wave_state(struct process_queue_manager *pqm, 605 unsigned int qid, 606 void __user *ctl_stack, 607 u32 *ctl_stack_used_size, 608 u32 *save_area_used_size) 609 { 610 struct process_queue_node *pqn; 611 612 pqn = get_queue_by_qid(pqm, qid); 613 if (!pqn) { 614 pr_debug("amdkfd: No queue %d exists for operation\n", 615 qid); 616 return -EFAULT; 617 } 618 619 return pqn->q->device->dqm->ops.get_wave_state(pqn->q->device->dqm, 620 pqn->q, 621 ctl_stack, 622 ctl_stack_used_size, 623 save_area_used_size); 624 } 625 626 int pqm_get_queue_snapshot(struct process_queue_manager *pqm, 627 uint64_t exception_clear_mask, 628 void __user *buf, 629 int *num_qss_entries, 630 uint32_t *entry_size) 631 { 632 struct process_queue_node *pqn; 633 struct kfd_queue_snapshot_entry src; 634 uint32_t tmp_entry_size = *entry_size, tmp_qss_entries = *num_qss_entries; 635 int r = 0; 636 637 *num_qss_entries = 0; 638 if (!(*entry_size)) 639 return -EINVAL; 640 641 *entry_size = min_t(size_t, *entry_size, sizeof(struct kfd_queue_snapshot_entry)); 642 mutex_lock(&pqm->process->event_mutex); 643 644 memset(&src, 0, sizeof(src)); 645 646 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 647 if (!pqn->q) 648 continue; 649 650 if (*num_qss_entries < tmp_qss_entries) { 651 set_queue_snapshot_entry(pqn->q, exception_clear_mask, &src); 652 653 if (copy_to_user(buf, &src, *entry_size)) { 654 r = -EFAULT; 655 break; 656 } 657 buf += tmp_entry_size; 658 } 659 *num_qss_entries += 1; 660 } 661 662 mutex_unlock(&pqm->process->event_mutex); 663 return r; 664 } 665 666 static int get_queue_data_sizes(struct kfd_process_device *pdd, 667 struct queue *q, 668 uint32_t *mqd_size, 669 uint32_t *ctl_stack_size) 670 { 671 int ret; 672 673 ret = pqm_get_queue_checkpoint_info(&pdd->process->pqm, 674 q->properties.queue_id, 675 mqd_size, 676 ctl_stack_size); 677 if (ret) 678 pr_err("Failed to get queue dump info (%d)\n", ret); 679 680 return ret; 681 } 682 683 int kfd_process_get_queue_info(struct kfd_process *p, 684 uint32_t *num_queues, 685 uint64_t *priv_data_sizes) 686 { 687 uint32_t extra_data_sizes = 0; 688 struct queue *q; 689 int i; 690 int ret; 691 692 *num_queues = 0; 693 694 /* Run over all PDDs of the process */ 695 for (i = 0; i < p->n_pdds; i++) { 696 struct kfd_process_device *pdd = p->pdds[i]; 697 698 list_for_each_entry(q, &pdd->qpd.queues_list, list) { 699 if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE || 700 q->properties.type == KFD_QUEUE_TYPE_SDMA || 701 q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) { 702 uint32_t mqd_size, ctl_stack_size; 703 704 *num_queues = *num_queues + 1; 705 706 ret = get_queue_data_sizes(pdd, q, &mqd_size, &ctl_stack_size); 707 if (ret) 708 return ret; 709 710 extra_data_sizes += mqd_size + ctl_stack_size; 711 } else { 712 pr_err("Unsupported queue type (%d)\n", q->properties.type); 713 return -EOPNOTSUPP; 714 } 715 } 716 } 717 *priv_data_sizes = extra_data_sizes + 718 (*num_queues * sizeof(struct kfd_criu_queue_priv_data)); 719 720 return 0; 721 } 722 723 static int pqm_checkpoint_mqd(struct process_queue_manager *pqm, 724 unsigned int qid, 725 void *mqd, 726 void *ctl_stack) 727 { 728 struct process_queue_node *pqn; 729 730 pqn = get_queue_by_qid(pqm, qid); 731 if (!pqn) { 732 pr_debug("amdkfd: No queue %d exists for operation\n", qid); 733 return -EFAULT; 734 } 735 736 if (!pqn->q->device->dqm->ops.checkpoint_mqd) { 737 pr_err("amdkfd: queue dumping not supported on this device\n"); 738 return -EOPNOTSUPP; 739 } 740 741 return pqn->q->device->dqm->ops.checkpoint_mqd(pqn->q->device->dqm, 742 pqn->q, mqd, ctl_stack); 743 } 744 745 static int criu_checkpoint_queue(struct kfd_process_device *pdd, 746 struct queue *q, 747 struct kfd_criu_queue_priv_data *q_data) 748 { 749 uint8_t *mqd, *ctl_stack; 750 int ret; 751 752 mqd = (void *)(q_data + 1); 753 ctl_stack = mqd + q_data->mqd_size; 754 755 q_data->gpu_id = pdd->user_gpu_id; 756 q_data->type = q->properties.type; 757 q_data->format = q->properties.format; 758 q_data->q_id = q->properties.queue_id; 759 q_data->q_address = q->properties.queue_address; 760 q_data->q_size = q->properties.queue_size; 761 q_data->priority = q->properties.priority; 762 q_data->q_percent = q->properties.queue_percent; 763 q_data->read_ptr_addr = (uint64_t)q->properties.read_ptr; 764 q_data->write_ptr_addr = (uint64_t)q->properties.write_ptr; 765 q_data->doorbell_id = q->doorbell_id; 766 767 q_data->sdma_id = q->sdma_id; 768 769 q_data->eop_ring_buffer_address = 770 q->properties.eop_ring_buffer_address; 771 772 q_data->eop_ring_buffer_size = q->properties.eop_ring_buffer_size; 773 774 q_data->ctx_save_restore_area_address = 775 q->properties.ctx_save_restore_area_address; 776 777 q_data->ctx_save_restore_area_size = 778 q->properties.ctx_save_restore_area_size; 779 780 q_data->gws = !!q->gws; 781 782 ret = pqm_checkpoint_mqd(&pdd->process->pqm, q->properties.queue_id, mqd, ctl_stack); 783 if (ret) { 784 pr_err("Failed checkpoint queue_mqd (%d)\n", ret); 785 return ret; 786 } 787 788 pr_debug("Dumping Queue: gpu_id:%x queue_id:%u\n", q_data->gpu_id, q_data->q_id); 789 return ret; 790 } 791 792 static int criu_checkpoint_queues_device(struct kfd_process_device *pdd, 793 uint8_t __user *user_priv, 794 unsigned int *q_index, 795 uint64_t *queues_priv_data_offset) 796 { 797 unsigned int q_private_data_size = 0; 798 uint8_t *q_private_data = NULL; /* Local buffer to store individual queue private data */ 799 struct queue *q; 800 int ret = 0; 801 802 list_for_each_entry(q, &pdd->qpd.queues_list, list) { 803 struct kfd_criu_queue_priv_data *q_data; 804 uint64_t q_data_size; 805 uint32_t mqd_size; 806 uint32_t ctl_stack_size; 807 808 if (q->properties.type != KFD_QUEUE_TYPE_COMPUTE && 809 q->properties.type != KFD_QUEUE_TYPE_SDMA && 810 q->properties.type != KFD_QUEUE_TYPE_SDMA_XGMI) { 811 812 pr_err("Unsupported queue type (%d)\n", q->properties.type); 813 ret = -EOPNOTSUPP; 814 break; 815 } 816 817 ret = get_queue_data_sizes(pdd, q, &mqd_size, &ctl_stack_size); 818 if (ret) 819 break; 820 821 q_data_size = sizeof(*q_data) + mqd_size + ctl_stack_size; 822 823 /* Increase local buffer space if needed */ 824 if (q_private_data_size < q_data_size) { 825 kfree(q_private_data); 826 827 q_private_data = kzalloc(q_data_size, GFP_KERNEL); 828 if (!q_private_data) { 829 ret = -ENOMEM; 830 break; 831 } 832 q_private_data_size = q_data_size; 833 } 834 835 q_data = (struct kfd_criu_queue_priv_data *)q_private_data; 836 837 /* data stored in this order: priv_data, mqd, ctl_stack */ 838 q_data->mqd_size = mqd_size; 839 q_data->ctl_stack_size = ctl_stack_size; 840 841 ret = criu_checkpoint_queue(pdd, q, q_data); 842 if (ret) 843 break; 844 845 q_data->object_type = KFD_CRIU_OBJECT_TYPE_QUEUE; 846 847 ret = copy_to_user(user_priv + *queues_priv_data_offset, 848 q_data, q_data_size); 849 if (ret) { 850 ret = -EFAULT; 851 break; 852 } 853 *queues_priv_data_offset += q_data_size; 854 *q_index = *q_index + 1; 855 } 856 857 kfree(q_private_data); 858 859 return ret; 860 } 861 862 int kfd_criu_checkpoint_queues(struct kfd_process *p, 863 uint8_t __user *user_priv_data, 864 uint64_t *priv_data_offset) 865 { 866 int ret = 0, pdd_index, q_index = 0; 867 868 for (pdd_index = 0; pdd_index < p->n_pdds; pdd_index++) { 869 struct kfd_process_device *pdd = p->pdds[pdd_index]; 870 871 /* 872 * criu_checkpoint_queues_device will copy data to user and update q_index and 873 * queues_priv_data_offset 874 */ 875 ret = criu_checkpoint_queues_device(pdd, user_priv_data, &q_index, 876 priv_data_offset); 877 878 if (ret) 879 break; 880 } 881 882 return ret; 883 } 884 885 static void set_queue_properties_from_criu(struct queue_properties *qp, 886 struct kfd_criu_queue_priv_data *q_data) 887 { 888 qp->is_interop = false; 889 qp->queue_percent = q_data->q_percent; 890 qp->priority = q_data->priority; 891 qp->queue_address = q_data->q_address; 892 qp->queue_size = q_data->q_size; 893 qp->read_ptr = (uint32_t *) q_data->read_ptr_addr; 894 qp->write_ptr = (uint32_t *) q_data->write_ptr_addr; 895 qp->eop_ring_buffer_address = q_data->eop_ring_buffer_address; 896 qp->eop_ring_buffer_size = q_data->eop_ring_buffer_size; 897 qp->ctx_save_restore_area_address = q_data->ctx_save_restore_area_address; 898 qp->ctx_save_restore_area_size = q_data->ctx_save_restore_area_size; 899 qp->ctl_stack_size = q_data->ctl_stack_size; 900 qp->type = q_data->type; 901 qp->format = q_data->format; 902 } 903 904 int kfd_criu_restore_queue(struct kfd_process *p, 905 uint8_t __user *user_priv_ptr, 906 uint64_t *priv_data_offset, 907 uint64_t max_priv_data_size) 908 { 909 uint8_t *mqd, *ctl_stack, *q_extra_data = NULL; 910 struct kfd_criu_queue_priv_data *q_data; 911 struct kfd_process_device *pdd; 912 uint64_t q_extra_data_size; 913 struct queue_properties qp; 914 unsigned int queue_id; 915 int ret = 0; 916 917 if (*priv_data_offset + sizeof(*q_data) > max_priv_data_size) 918 return -EINVAL; 919 920 q_data = kmalloc(sizeof(*q_data), GFP_KERNEL); 921 if (!q_data) 922 return -ENOMEM; 923 924 ret = copy_from_user(q_data, user_priv_ptr + *priv_data_offset, sizeof(*q_data)); 925 if (ret) { 926 ret = -EFAULT; 927 goto exit; 928 } 929 930 *priv_data_offset += sizeof(*q_data); 931 q_extra_data_size = (uint64_t)q_data->ctl_stack_size + q_data->mqd_size; 932 933 if (*priv_data_offset + q_extra_data_size > max_priv_data_size) { 934 ret = -EINVAL; 935 goto exit; 936 } 937 938 q_extra_data = kmalloc(q_extra_data_size, GFP_KERNEL); 939 if (!q_extra_data) { 940 ret = -ENOMEM; 941 goto exit; 942 } 943 944 ret = copy_from_user(q_extra_data, user_priv_ptr + *priv_data_offset, q_extra_data_size); 945 if (ret) { 946 ret = -EFAULT; 947 goto exit; 948 } 949 950 *priv_data_offset += q_extra_data_size; 951 952 pdd = kfd_process_device_data_by_id(p, q_data->gpu_id); 953 if (!pdd) { 954 pr_err("Failed to get pdd\n"); 955 ret = -EINVAL; 956 goto exit; 957 } 958 959 /* data stored in this order: mqd, ctl_stack */ 960 mqd = q_extra_data; 961 ctl_stack = mqd + q_data->mqd_size; 962 963 memset(&qp, 0, sizeof(qp)); 964 set_queue_properties_from_criu(&qp, q_data); 965 966 print_queue_properties(&qp); 967 968 ret = pqm_create_queue(&p->pqm, pdd->dev, NULL, &qp, &queue_id, NULL, q_data, mqd, ctl_stack, 969 NULL); 970 if (ret) { 971 pr_err("Failed to create new queue err:%d\n", ret); 972 goto exit; 973 } 974 975 if (q_data->gws) 976 ret = pqm_set_gws(&p->pqm, q_data->q_id, pdd->dev->gws); 977 978 exit: 979 if (ret) 980 pr_err("Failed to restore queue (%d)\n", ret); 981 else 982 pr_debug("Queue id %d was restored successfully\n", queue_id); 983 984 kfree(q_data); 985 986 return ret; 987 } 988 989 int pqm_get_queue_checkpoint_info(struct process_queue_manager *pqm, 990 unsigned int qid, 991 uint32_t *mqd_size, 992 uint32_t *ctl_stack_size) 993 { 994 struct process_queue_node *pqn; 995 996 pqn = get_queue_by_qid(pqm, qid); 997 if (!pqn) { 998 pr_debug("amdkfd: No queue %d exists for operation\n", qid); 999 return -EFAULT; 1000 } 1001 1002 if (!pqn->q->device->dqm->ops.get_queue_checkpoint_info) { 1003 pr_err("amdkfd: queue dumping not supported on this device\n"); 1004 return -EOPNOTSUPP; 1005 } 1006 1007 pqn->q->device->dqm->ops.get_queue_checkpoint_info(pqn->q->device->dqm, 1008 pqn->q, mqd_size, 1009 ctl_stack_size); 1010 return 0; 1011 } 1012 1013 #if defined(CONFIG_DEBUG_FS) 1014 1015 int pqm_debugfs_mqds(struct seq_file *m, void *data) 1016 { 1017 struct process_queue_manager *pqm = data; 1018 struct process_queue_node *pqn; 1019 struct queue *q; 1020 enum KFD_MQD_TYPE mqd_type; 1021 struct mqd_manager *mqd_mgr; 1022 int r = 0, xcc, num_xccs = 1; 1023 void *mqd; 1024 uint64_t size = 0; 1025 1026 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 1027 if (pqn->q) { 1028 q = pqn->q; 1029 switch (q->properties.type) { 1030 case KFD_QUEUE_TYPE_SDMA: 1031 case KFD_QUEUE_TYPE_SDMA_XGMI: 1032 seq_printf(m, " SDMA queue on device %x\n", 1033 q->device->id); 1034 mqd_type = KFD_MQD_TYPE_SDMA; 1035 break; 1036 case KFD_QUEUE_TYPE_COMPUTE: 1037 seq_printf(m, " Compute queue on device %x\n", 1038 q->device->id); 1039 mqd_type = KFD_MQD_TYPE_CP; 1040 num_xccs = NUM_XCC(q->device->xcc_mask); 1041 break; 1042 default: 1043 seq_printf(m, 1044 " Bad user queue type %d on device %x\n", 1045 q->properties.type, q->device->id); 1046 continue; 1047 } 1048 mqd_mgr = q->device->dqm->mqd_mgrs[mqd_type]; 1049 size = mqd_mgr->mqd_stride(mqd_mgr, 1050 &q->properties); 1051 } else if (pqn->kq) { 1052 q = pqn->kq->queue; 1053 mqd_mgr = pqn->kq->mqd_mgr; 1054 switch (q->properties.type) { 1055 case KFD_QUEUE_TYPE_DIQ: 1056 seq_printf(m, " DIQ on device %x\n", 1057 pqn->kq->dev->id); 1058 break; 1059 default: 1060 seq_printf(m, 1061 " Bad kernel queue type %d on device %x\n", 1062 q->properties.type, 1063 pqn->kq->dev->id); 1064 continue; 1065 } 1066 } else { 1067 seq_printf(m, 1068 " Weird: Queue node with neither kernel nor user queue\n"); 1069 continue; 1070 } 1071 1072 for (xcc = 0; xcc < num_xccs; xcc++) { 1073 mqd = q->mqd + size * xcc; 1074 r = mqd_mgr->debugfs_show_mqd(m, mqd); 1075 if (r != 0) 1076 break; 1077 } 1078 } 1079 1080 return r; 1081 } 1082 1083 #endif 1084