xref: /openbmc/linux/drivers/gpu/drm/amd/amdkfd/kfd_priv.h (revision 8781e5df)
1 /*
2  * Copyright 2014 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 
23 #ifndef KFD_PRIV_H_INCLUDED
24 #define KFD_PRIV_H_INCLUDED
25 
26 #include <linux/hashtable.h>
27 #include <linux/mmu_notifier.h>
28 #include <linux/mutex.h>
29 #include <linux/types.h>
30 #include <linux/atomic.h>
31 #include <linux/workqueue.h>
32 #include <linux/spinlock.h>
33 #include <linux/kfd_ioctl.h>
34 #include <linux/idr.h>
35 #include <linux/kfifo.h>
36 #include <linux/seq_file.h>
37 #include <linux/kref.h>
38 #include <linux/sysfs.h>
39 #include <linux/device_cgroup.h>
40 #include <drm/drm_file.h>
41 #include <drm/drm_drv.h>
42 #include <drm/drm_device.h>
43 #include <kgd_kfd_interface.h>
44 
45 #include "amd_shared.h"
46 
47 #define KFD_MAX_RING_ENTRY_SIZE	8
48 
49 #define KFD_SYSFS_FILE_MODE 0444
50 
51 /* GPU ID hash width in bits */
52 #define KFD_GPU_ID_HASH_WIDTH 16
53 
54 /* Use upper bits of mmap offset to store KFD driver specific information.
55  * BITS[63:62] - Encode MMAP type
56  * BITS[61:46] - Encode gpu_id. To identify to which GPU the offset belongs to
57  * BITS[45:0]  - MMAP offset value
58  *
59  * NOTE: struct vm_area_struct.vm_pgoff uses offset in pages. Hence, these
60  *  defines are w.r.t to PAGE_SIZE
61  */
62 #define KFD_MMAP_TYPE_SHIFT	62
63 #define KFD_MMAP_TYPE_MASK	(0x3ULL << KFD_MMAP_TYPE_SHIFT)
64 #define KFD_MMAP_TYPE_DOORBELL	(0x3ULL << KFD_MMAP_TYPE_SHIFT)
65 #define KFD_MMAP_TYPE_EVENTS	(0x2ULL << KFD_MMAP_TYPE_SHIFT)
66 #define KFD_MMAP_TYPE_RESERVED_MEM	(0x1ULL << KFD_MMAP_TYPE_SHIFT)
67 #define KFD_MMAP_TYPE_MMIO	(0x0ULL << KFD_MMAP_TYPE_SHIFT)
68 
69 #define KFD_MMAP_GPU_ID_SHIFT 46
70 #define KFD_MMAP_GPU_ID_MASK (((1ULL << KFD_GPU_ID_HASH_WIDTH) - 1) \
71 				<< KFD_MMAP_GPU_ID_SHIFT)
72 #define KFD_MMAP_GPU_ID(gpu_id) ((((uint64_t)gpu_id) << KFD_MMAP_GPU_ID_SHIFT)\
73 				& KFD_MMAP_GPU_ID_MASK)
74 #define KFD_MMAP_GET_GPU_ID(offset)    ((offset & KFD_MMAP_GPU_ID_MASK) \
75 				>> KFD_MMAP_GPU_ID_SHIFT)
76 
77 /*
78  * When working with cp scheduler we should assign the HIQ manually or via
79  * the amdgpu driver to a fixed hqd slot, here are the fixed HIQ hqd slot
80  * definitions for Kaveri. In Kaveri only the first ME queues participates
81  * in the cp scheduling taking that in mind we set the HIQ slot in the
82  * second ME.
83  */
84 #define KFD_CIK_HIQ_PIPE 4
85 #define KFD_CIK_HIQ_QUEUE 0
86 
87 /* Macro for allocating structures */
88 #define kfd_alloc_struct(ptr_to_struct)	\
89 	((typeof(ptr_to_struct)) kzalloc(sizeof(*ptr_to_struct), GFP_KERNEL))
90 
91 #define KFD_MAX_NUM_OF_PROCESSES 512
92 #define KFD_MAX_NUM_OF_QUEUES_PER_PROCESS 1024
93 
94 /*
95  * Size of the per-process TBA+TMA buffer: 2 pages
96  *
97  * The first page is the TBA used for the CWSR ISA code. The second
98  * page is used as TMA for daisy changing a user-mode trap handler.
99  */
100 #define KFD_CWSR_TBA_TMA_SIZE (PAGE_SIZE * 2)
101 #define KFD_CWSR_TMA_OFFSET PAGE_SIZE
102 
103 #define KFD_MAX_NUM_OF_QUEUES_PER_DEVICE		\
104 	(KFD_MAX_NUM_OF_PROCESSES *			\
105 			KFD_MAX_NUM_OF_QUEUES_PER_PROCESS)
106 
107 #define KFD_KERNEL_QUEUE_SIZE 2048
108 
109 #define KFD_UNMAP_LATENCY_MS	(4000)
110 
111 /*
112  * 512 = 0x200
113  * The doorbell index distance between SDMA RLC (2*i) and (2*i+1) in the
114  * same SDMA engine on SOC15, which has 8-byte doorbells for SDMA.
115  * 512 8-byte doorbell distance (i.e. one page away) ensures that SDMA RLC
116  * (2*i+1) doorbells (in terms of the lower 12 bit address) lie exactly in
117  * the OFFSET and SIZE set in registers like BIF_SDMA0_DOORBELL_RANGE.
118  */
119 #define KFD_QUEUE_DOORBELL_MIRROR_OFFSET 512
120 
121 
122 /*
123  * Kernel module parameter to specify maximum number of supported queues per
124  * device
125  */
126 extern int max_num_of_queues_per_device;
127 
128 
129 /* Kernel module parameter to specify the scheduling policy */
130 extern int sched_policy;
131 
132 /*
133  * Kernel module parameter to specify the maximum process
134  * number per HW scheduler
135  */
136 extern int hws_max_conc_proc;
137 
138 extern int cwsr_enable;
139 
140 /*
141  * Kernel module parameter to specify whether to send sigterm to HSA process on
142  * unhandled exception
143  */
144 extern int send_sigterm;
145 
146 /*
147  * This kernel module is used to simulate large bar machine on non-large bar
148  * enabled machines.
149  */
150 extern int debug_largebar;
151 
152 /*
153  * Ignore CRAT table during KFD initialization, can be used to work around
154  * broken CRAT tables on some AMD systems
155  */
156 extern int ignore_crat;
157 
158 /*
159  * Set sh_mem_config.retry_disable on Vega10
160  */
161 extern int amdgpu_noretry;
162 
163 /*
164  * Halt if HWS hang is detected
165  */
166 extern int halt_if_hws_hang;
167 
168 /*
169  * Whether MEC FW support GWS barriers
170  */
171 extern bool hws_gws_support;
172 
173 /*
174  * Queue preemption timeout in ms
175  */
176 extern int queue_preemption_timeout_ms;
177 
178 enum cache_policy {
179 	cache_policy_coherent,
180 	cache_policy_noncoherent
181 };
182 
183 #define KFD_IS_SOC15(chip) ((chip) >= CHIP_VEGA10)
184 
185 struct kfd_event_interrupt_class {
186 	bool (*interrupt_isr)(struct kfd_dev *dev,
187 			const uint32_t *ih_ring_entry, uint32_t *patched_ihre,
188 			bool *patched_flag);
189 	void (*interrupt_wq)(struct kfd_dev *dev,
190 			const uint32_t *ih_ring_entry);
191 };
192 
193 struct kfd_device_info {
194 	enum amd_asic_type asic_family;
195 	const char *asic_name;
196 	const struct kfd_event_interrupt_class *event_interrupt_class;
197 	unsigned int max_pasid_bits;
198 	unsigned int max_no_of_hqd;
199 	unsigned int doorbell_size;
200 	size_t ih_ring_entry_size;
201 	uint8_t num_of_watch_points;
202 	uint16_t mqd_size_aligned;
203 	bool supports_cwsr;
204 	bool needs_iommu_device;
205 	bool needs_pci_atomics;
206 	unsigned int num_sdma_engines;
207 	unsigned int num_xgmi_sdma_engines;
208 	unsigned int num_sdma_queues_per_engine;
209 };
210 
211 struct kfd_mem_obj {
212 	uint32_t range_start;
213 	uint32_t range_end;
214 	uint64_t gpu_addr;
215 	uint32_t *cpu_ptr;
216 	void *gtt_mem;
217 };
218 
219 struct kfd_vmid_info {
220 	uint32_t first_vmid_kfd;
221 	uint32_t last_vmid_kfd;
222 	uint32_t vmid_num_kfd;
223 };
224 
225 struct kfd_dev {
226 	struct kgd_dev *kgd;
227 
228 	const struct kfd_device_info *device_info;
229 	struct pci_dev *pdev;
230 	struct drm_device *ddev;
231 
232 	unsigned int id;		/* topology stub index */
233 
234 	phys_addr_t doorbell_base;	/* Start of actual doorbells used by
235 					 * KFD. It is aligned for mapping
236 					 * into user mode
237 					 */
238 	size_t doorbell_base_dw_offset;	/* Offset from the start of the PCI
239 					 * doorbell BAR to the first KFD
240 					 * doorbell in dwords. GFX reserves
241 					 * the segment before this offset.
242 					 */
243 	u32 __iomem *doorbell_kernel_ptr; /* This is a pointer for a doorbells
244 					   * page used by kernel queue
245 					   */
246 
247 	struct kgd2kfd_shared_resources shared_resources;
248 	struct kfd_vmid_info vm_info;
249 
250 	const struct kfd2kgd_calls *kfd2kgd;
251 	struct mutex doorbell_mutex;
252 	DECLARE_BITMAP(doorbell_available_index,
253 			KFD_MAX_NUM_OF_QUEUES_PER_PROCESS);
254 
255 	void *gtt_mem;
256 	uint64_t gtt_start_gpu_addr;
257 	void *gtt_start_cpu_ptr;
258 	void *gtt_sa_bitmap;
259 	struct mutex gtt_sa_lock;
260 	unsigned int gtt_sa_chunk_size;
261 	unsigned int gtt_sa_num_of_chunks;
262 
263 	/* Interrupts */
264 	struct kfifo ih_fifo;
265 	struct workqueue_struct *ih_wq;
266 	struct work_struct interrupt_work;
267 	spinlock_t interrupt_lock;
268 
269 	/* QCM Device instance */
270 	struct device_queue_manager *dqm;
271 
272 	bool init_complete;
273 	/*
274 	 * Interrupts of interest to KFD are copied
275 	 * from the HW ring into a SW ring.
276 	 */
277 	bool interrupts_active;
278 
279 	/* Debug manager */
280 	struct kfd_dbgmgr *dbgmgr;
281 
282 	/* Firmware versions */
283 	uint16_t mec_fw_version;
284 	uint16_t sdma_fw_version;
285 
286 	/* Maximum process number mapped to HW scheduler */
287 	unsigned int max_proc_per_quantum;
288 
289 	/* CWSR */
290 	bool cwsr_enabled;
291 	const void *cwsr_isa;
292 	unsigned int cwsr_isa_size;
293 
294 	/* xGMI */
295 	uint64_t hive_id;
296 
297 	bool pci_atomic_requested;
298 
299 	/* SRAM ECC flag */
300 	atomic_t sram_ecc_flag;
301 
302 	/* Compute Profile ref. count */
303 	atomic_t compute_profile;
304 
305 	/* Global GWS resource shared b/t processes*/
306 	void *gws;
307 };
308 
309 enum kfd_mempool {
310 	KFD_MEMPOOL_SYSTEM_CACHEABLE = 1,
311 	KFD_MEMPOOL_SYSTEM_WRITECOMBINE = 2,
312 	KFD_MEMPOOL_FRAMEBUFFER = 3,
313 };
314 
315 /* Character device interface */
316 int kfd_chardev_init(void);
317 void kfd_chardev_exit(void);
318 struct device *kfd_chardev(void);
319 
320 /**
321  * enum kfd_unmap_queues_filter
322  *
323  * @KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE: Preempts single queue.
324  *
325  * @KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES: Preempts all queues in the
326  *						running queues list.
327  *
328  * @KFD_UNMAP_QUEUES_FILTER_BY_PASID: Preempts queues that belongs to
329  *						specific process.
330  *
331  */
332 enum kfd_unmap_queues_filter {
333 	KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE,
334 	KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES,
335 	KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES,
336 	KFD_UNMAP_QUEUES_FILTER_BY_PASID
337 };
338 
339 /**
340  * enum kfd_queue_type
341  *
342  * @KFD_QUEUE_TYPE_COMPUTE: Regular user mode queue type.
343  *
344  * @KFD_QUEUE_TYPE_SDMA: Sdma user mode queue type.
345  *
346  * @KFD_QUEUE_TYPE_HIQ: HIQ queue type.
347  *
348  * @KFD_QUEUE_TYPE_DIQ: DIQ queue type.
349  */
350 enum kfd_queue_type  {
351 	KFD_QUEUE_TYPE_COMPUTE,
352 	KFD_QUEUE_TYPE_SDMA,
353 	KFD_QUEUE_TYPE_HIQ,
354 	KFD_QUEUE_TYPE_DIQ,
355 	KFD_QUEUE_TYPE_SDMA_XGMI
356 };
357 
358 enum kfd_queue_format {
359 	KFD_QUEUE_FORMAT_PM4,
360 	KFD_QUEUE_FORMAT_AQL
361 };
362 
363 enum KFD_QUEUE_PRIORITY {
364 	KFD_QUEUE_PRIORITY_MINIMUM = 0,
365 	KFD_QUEUE_PRIORITY_MAXIMUM = 15
366 };
367 
368 /**
369  * struct queue_properties
370  *
371  * @type: The queue type.
372  *
373  * @queue_id: Queue identifier.
374  *
375  * @queue_address: Queue ring buffer address.
376  *
377  * @queue_size: Queue ring buffer size.
378  *
379  * @priority: Defines the queue priority relative to other queues in the
380  * process.
381  * This is just an indication and HW scheduling may override the priority as
382  * necessary while keeping the relative prioritization.
383  * the priority granularity is from 0 to f which f is the highest priority.
384  * currently all queues are initialized with the highest priority.
385  *
386  * @queue_percent: This field is partially implemented and currently a zero in
387  * this field defines that the queue is non active.
388  *
389  * @read_ptr: User space address which points to the number of dwords the
390  * cp read from the ring buffer. This field updates automatically by the H/W.
391  *
392  * @write_ptr: Defines the number of dwords written to the ring buffer.
393  *
394  * @doorbell_ptr: This field aim is to notify the H/W of new packet written to
395  * the queue ring buffer. This field should be similar to write_ptr and the
396  * user should update this field after he updated the write_ptr.
397  *
398  * @doorbell_off: The doorbell offset in the doorbell pci-bar.
399  *
400  * @is_interop: Defines if this is a interop queue. Interop queue means that
401  * the queue can access both graphics and compute resources.
402  *
403  * @is_evicted: Defines if the queue is evicted. Only active queues
404  * are evicted, rendering them inactive.
405  *
406  * @is_active: Defines if the queue is active or not. @is_active and
407  * @is_evicted are protected by the DQM lock.
408  *
409  * @vmid: If the scheduling mode is no cp scheduling the field defines the vmid
410  * of the queue.
411  *
412  * This structure represents the queue properties for each queue no matter if
413  * it's user mode or kernel mode queue.
414  *
415  */
416 struct queue_properties {
417 	enum kfd_queue_type type;
418 	enum kfd_queue_format format;
419 	unsigned int queue_id;
420 	uint64_t queue_address;
421 	uint64_t  queue_size;
422 	uint32_t priority;
423 	uint32_t queue_percent;
424 	uint32_t *read_ptr;
425 	uint32_t *write_ptr;
426 	void __iomem *doorbell_ptr;
427 	uint32_t doorbell_off;
428 	bool is_interop;
429 	bool is_evicted;
430 	bool is_active;
431 	/* Not relevant for user mode queues in cp scheduling */
432 	unsigned int vmid;
433 	/* Relevant only for sdma queues*/
434 	uint32_t sdma_engine_id;
435 	uint32_t sdma_queue_id;
436 	uint32_t sdma_vm_addr;
437 	/* Relevant only for VI */
438 	uint64_t eop_ring_buffer_address;
439 	uint32_t eop_ring_buffer_size;
440 	uint64_t ctx_save_restore_area_address;
441 	uint32_t ctx_save_restore_area_size;
442 	uint32_t ctl_stack_size;
443 	uint64_t tba_addr;
444 	uint64_t tma_addr;
445 	/* Relevant for CU */
446 	uint32_t cu_mask_count; /* Must be a multiple of 32 */
447 	uint32_t *cu_mask;
448 };
449 
450 #define QUEUE_IS_ACTIVE(q) ((q).queue_size > 0 &&	\
451 			    (q).queue_address != 0 &&	\
452 			    (q).queue_percent > 0 &&	\
453 			    !(q).is_evicted)
454 
455 /**
456  * struct queue
457  *
458  * @list: Queue linked list.
459  *
460  * @mqd: The queue MQD.
461  *
462  * @mqd_mem_obj: The MQD local gpu memory object.
463  *
464  * @gart_mqd_addr: The MQD gart mc address.
465  *
466  * @properties: The queue properties.
467  *
468  * @mec: Used only in no cp scheduling mode and identifies to micro engine id
469  *	 that the queue should be execute on.
470  *
471  * @pipe: Used only in no cp scheduling mode and identifies the queue's pipe
472  *	  id.
473  *
474  * @queue: Used only in no cp scheduliong mode and identifies the queue's slot.
475  *
476  * @process: The kfd process that created this queue.
477  *
478  * @device: The kfd device that created this queue.
479  *
480  * @gws: Pointing to gws kgd_mem if this is a gws control queue; NULL
481  * otherwise.
482  *
483  * This structure represents user mode compute queues.
484  * It contains all the necessary data to handle such queues.
485  *
486  */
487 
488 struct queue {
489 	struct list_head list;
490 	void *mqd;
491 	struct kfd_mem_obj *mqd_mem_obj;
492 	uint64_t gart_mqd_addr;
493 	struct queue_properties properties;
494 
495 	uint32_t mec;
496 	uint32_t pipe;
497 	uint32_t queue;
498 
499 	unsigned int sdma_id;
500 	unsigned int doorbell_id;
501 
502 	struct kfd_process	*process;
503 	struct kfd_dev		*device;
504 	void *gws;
505 };
506 
507 /*
508  * Please read the kfd_mqd_manager.h description.
509  */
510 enum KFD_MQD_TYPE {
511 	KFD_MQD_TYPE_COMPUTE = 0,	/* for no cp scheduling */
512 	KFD_MQD_TYPE_HIQ,		/* for hiq */
513 	KFD_MQD_TYPE_CP,		/* for cp queues and diq */
514 	KFD_MQD_TYPE_SDMA,		/* for sdma queues */
515 	KFD_MQD_TYPE_DIQ,		/* for diq */
516 	KFD_MQD_TYPE_MAX
517 };
518 
519 enum KFD_PIPE_PRIORITY {
520 	KFD_PIPE_PRIORITY_CS_LOW = 0,
521 	KFD_PIPE_PRIORITY_CS_MEDIUM,
522 	KFD_PIPE_PRIORITY_CS_HIGH
523 };
524 
525 struct scheduling_resources {
526 	unsigned int vmid_mask;
527 	enum kfd_queue_type type;
528 	uint64_t queue_mask;
529 	uint64_t gws_mask;
530 	uint32_t oac_mask;
531 	uint32_t gds_heap_base;
532 	uint32_t gds_heap_size;
533 };
534 
535 struct process_queue_manager {
536 	/* data */
537 	struct kfd_process	*process;
538 	struct list_head	queues;
539 	unsigned long		*queue_slot_bitmap;
540 };
541 
542 struct qcm_process_device {
543 	/* The Device Queue Manager that owns this data */
544 	struct device_queue_manager *dqm;
545 	struct process_queue_manager *pqm;
546 	/* Queues list */
547 	struct list_head queues_list;
548 	struct list_head priv_queue_list;
549 
550 	unsigned int queue_count;
551 	unsigned int vmid;
552 	bool is_debug;
553 	unsigned int evicted; /* eviction counter, 0=active */
554 
555 	/* This flag tells if we should reset all wavefronts on
556 	 * process termination
557 	 */
558 	bool reset_wavefronts;
559 
560 	/*
561 	 * All the memory management data should be here too
562 	 */
563 	uint64_t gds_context_area;
564 	/* Contains page table flags such as AMDGPU_PTE_VALID since gfx9 */
565 	uint64_t page_table_base;
566 	uint32_t sh_mem_config;
567 	uint32_t sh_mem_bases;
568 	uint32_t sh_mem_ape1_base;
569 	uint32_t sh_mem_ape1_limit;
570 	uint32_t gds_size;
571 	uint32_t num_gws;
572 	uint32_t num_oac;
573 	uint32_t sh_hidden_private_base;
574 
575 	/* CWSR memory */
576 	void *cwsr_kaddr;
577 	uint64_t cwsr_base;
578 	uint64_t tba_addr;
579 	uint64_t tma_addr;
580 
581 	/* IB memory */
582 	uint64_t ib_base;
583 	void *ib_kaddr;
584 
585 	/* doorbell resources per process per device */
586 	unsigned long *doorbell_bitmap;
587 };
588 
589 /* KFD Memory Eviction */
590 
591 /* Approx. wait time before attempting to restore evicted BOs */
592 #define PROCESS_RESTORE_TIME_MS 100
593 /* Approx. back off time if restore fails due to lack of memory */
594 #define PROCESS_BACK_OFF_TIME_MS 100
595 /* Approx. time before evicting the process again */
596 #define PROCESS_ACTIVE_TIME_MS 10
597 
598 /* 8 byte handle containing GPU ID in the most significant 4 bytes and
599  * idr_handle in the least significant 4 bytes
600  */
601 #define MAKE_HANDLE(gpu_id, idr_handle) \
602 	(((uint64_t)(gpu_id) << 32) + idr_handle)
603 #define GET_GPU_ID(handle) (handle >> 32)
604 #define GET_IDR_HANDLE(handle) (handle & 0xFFFFFFFF)
605 
606 enum kfd_pdd_bound {
607 	PDD_UNBOUND = 0,
608 	PDD_BOUND,
609 	PDD_BOUND_SUSPENDED,
610 };
611 
612 /* Data that is per-process-per device. */
613 struct kfd_process_device {
614 	/*
615 	 * List of all per-device data for a process.
616 	 * Starts from kfd_process.per_device_data.
617 	 */
618 	struct list_head per_device_list;
619 
620 	/* The device that owns this data. */
621 	struct kfd_dev *dev;
622 
623 	/* The process that owns this kfd_process_device. */
624 	struct kfd_process *process;
625 
626 	/* per-process-per device QCM data structure */
627 	struct qcm_process_device qpd;
628 
629 	/*Apertures*/
630 	uint64_t lds_base;
631 	uint64_t lds_limit;
632 	uint64_t gpuvm_base;
633 	uint64_t gpuvm_limit;
634 	uint64_t scratch_base;
635 	uint64_t scratch_limit;
636 
637 	/* VM context for GPUVM allocations */
638 	struct file *drm_file;
639 	void *vm;
640 
641 	/* GPUVM allocations storage */
642 	struct idr alloc_idr;
643 
644 	/* Flag used to tell the pdd has dequeued from the dqm.
645 	 * This is used to prevent dev->dqm->ops.process_termination() from
646 	 * being called twice when it is already called in IOMMU callback
647 	 * function.
648 	 */
649 	bool already_dequeued;
650 
651 	/* Is this process/pasid bound to this device? (amd_iommu_bind_pasid) */
652 	enum kfd_pdd_bound bound;
653 };
654 
655 #define qpd_to_pdd(x) container_of(x, struct kfd_process_device, qpd)
656 
657 /* Process data */
658 struct kfd_process {
659 	/*
660 	 * kfd_process are stored in an mm_struct*->kfd_process*
661 	 * hash table (kfd_processes in kfd_process.c)
662 	 */
663 	struct hlist_node kfd_processes;
664 
665 	/*
666 	 * Opaque pointer to mm_struct. We don't hold a reference to
667 	 * it so it should never be dereferenced from here. This is
668 	 * only used for looking up processes by their mm.
669 	 */
670 	void *mm;
671 
672 	struct kref ref;
673 	struct work_struct release_work;
674 
675 	struct mutex mutex;
676 
677 	/*
678 	 * In any process, the thread that started main() is the lead
679 	 * thread and outlives the rest.
680 	 * It is here because amd_iommu_bind_pasid wants a task_struct.
681 	 * It can also be used for safely getting a reference to the
682 	 * mm_struct of the process.
683 	 */
684 	struct task_struct *lead_thread;
685 
686 	/* We want to receive a notification when the mm_struct is destroyed */
687 	struct mmu_notifier mmu_notifier;
688 
689 	uint16_t pasid;
690 	unsigned int doorbell_index;
691 
692 	/*
693 	 * List of kfd_process_device structures,
694 	 * one for each device the process is using.
695 	 */
696 	struct list_head per_device_data;
697 
698 	struct process_queue_manager pqm;
699 
700 	/*Is the user space process 32 bit?*/
701 	bool is_32bit_user_mode;
702 
703 	/* Event-related data */
704 	struct mutex event_mutex;
705 	/* Event ID allocator and lookup */
706 	struct idr event_idr;
707 	/* Event page */
708 	struct kfd_signal_page *signal_page;
709 	size_t signal_mapped_size;
710 	size_t signal_event_count;
711 	bool signal_event_limit_reached;
712 
713 	/* Information used for memory eviction */
714 	void *kgd_process_info;
715 	/* Eviction fence that is attached to all the BOs of this process. The
716 	 * fence will be triggered during eviction and new one will be created
717 	 * during restore
718 	 */
719 	struct dma_fence *ef;
720 
721 	/* Work items for evicting and restoring BOs */
722 	struct delayed_work eviction_work;
723 	struct delayed_work restore_work;
724 	/* seqno of the last scheduled eviction */
725 	unsigned int last_eviction_seqno;
726 	/* Approx. the last timestamp (in jiffies) when the process was
727 	 * restored after an eviction
728 	 */
729 	unsigned long last_restore_timestamp;
730 
731 	/* Kobj for our procfs */
732 	struct kobject *kobj;
733 	struct attribute attr_pasid;
734 };
735 
736 #define KFD_PROCESS_TABLE_SIZE 5 /* bits: 32 entries */
737 extern DECLARE_HASHTABLE(kfd_processes_table, KFD_PROCESS_TABLE_SIZE);
738 extern struct srcu_struct kfd_processes_srcu;
739 
740 /**
741  * Ioctl function type.
742  *
743  * \param filep pointer to file structure.
744  * \param p amdkfd process pointer.
745  * \param data pointer to arg that was copied from user.
746  */
747 typedef int amdkfd_ioctl_t(struct file *filep, struct kfd_process *p,
748 				void *data);
749 
750 struct amdkfd_ioctl_desc {
751 	unsigned int cmd;
752 	int flags;
753 	amdkfd_ioctl_t *func;
754 	unsigned int cmd_drv;
755 	const char *name;
756 };
757 bool kfd_dev_is_large_bar(struct kfd_dev *dev);
758 
759 int kfd_process_create_wq(void);
760 void kfd_process_destroy_wq(void);
761 struct kfd_process *kfd_create_process(struct file *filep);
762 struct kfd_process *kfd_get_process(const struct task_struct *);
763 struct kfd_process *kfd_lookup_process_by_pasid(unsigned int pasid);
764 struct kfd_process *kfd_lookup_process_by_mm(const struct mm_struct *mm);
765 void kfd_unref_process(struct kfd_process *p);
766 int kfd_process_evict_queues(struct kfd_process *p);
767 int kfd_process_restore_queues(struct kfd_process *p);
768 void kfd_suspend_all_processes(void);
769 int kfd_resume_all_processes(void);
770 
771 int kfd_process_device_init_vm(struct kfd_process_device *pdd,
772 			       struct file *drm_file);
773 struct kfd_process_device *kfd_bind_process_to_device(struct kfd_dev *dev,
774 						struct kfd_process *p);
775 struct kfd_process_device *kfd_get_process_device_data(struct kfd_dev *dev,
776 							struct kfd_process *p);
777 struct kfd_process_device *kfd_create_process_device_data(struct kfd_dev *dev,
778 							struct kfd_process *p);
779 
780 int kfd_reserved_mem_mmap(struct kfd_dev *dev, struct kfd_process *process,
781 			  struct vm_area_struct *vma);
782 
783 /* KFD process API for creating and translating handles */
784 int kfd_process_device_create_obj_handle(struct kfd_process_device *pdd,
785 					void *mem);
786 void *kfd_process_device_translate_handle(struct kfd_process_device *p,
787 					int handle);
788 void kfd_process_device_remove_obj_handle(struct kfd_process_device *pdd,
789 					int handle);
790 
791 /* Process device data iterator */
792 struct kfd_process_device *kfd_get_first_process_device_data(
793 							struct kfd_process *p);
794 struct kfd_process_device *kfd_get_next_process_device_data(
795 						struct kfd_process *p,
796 						struct kfd_process_device *pdd);
797 bool kfd_has_process_device_data(struct kfd_process *p);
798 
799 /* PASIDs */
800 int kfd_pasid_init(void);
801 void kfd_pasid_exit(void);
802 bool kfd_set_pasid_limit(unsigned int new_limit);
803 unsigned int kfd_get_pasid_limit(void);
804 unsigned int kfd_pasid_alloc(void);
805 void kfd_pasid_free(unsigned int pasid);
806 
807 /* Doorbells */
808 size_t kfd_doorbell_process_slice(struct kfd_dev *kfd);
809 int kfd_doorbell_init(struct kfd_dev *kfd);
810 void kfd_doorbell_fini(struct kfd_dev *kfd);
811 int kfd_doorbell_mmap(struct kfd_dev *dev, struct kfd_process *process,
812 		      struct vm_area_struct *vma);
813 void __iomem *kfd_get_kernel_doorbell(struct kfd_dev *kfd,
814 					unsigned int *doorbell_off);
815 void kfd_release_kernel_doorbell(struct kfd_dev *kfd, u32 __iomem *db_addr);
816 u32 read_kernel_doorbell(u32 __iomem *db);
817 void write_kernel_doorbell(void __iomem *db, u32 value);
818 void write_kernel_doorbell64(void __iomem *db, u64 value);
819 unsigned int kfd_get_doorbell_dw_offset_in_bar(struct kfd_dev *kfd,
820 					struct kfd_process *process,
821 					unsigned int doorbell_id);
822 phys_addr_t kfd_get_process_doorbells(struct kfd_dev *dev,
823 					struct kfd_process *process);
824 int kfd_alloc_process_doorbells(struct kfd_process *process);
825 void kfd_free_process_doorbells(struct kfd_process *process);
826 
827 /* GTT Sub-Allocator */
828 
829 int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size,
830 			struct kfd_mem_obj **mem_obj);
831 
832 int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj);
833 
834 extern struct device *kfd_device;
835 
836 /* KFD's procfs */
837 void kfd_procfs_init(void);
838 void kfd_procfs_shutdown(void);
839 
840 /* Topology */
841 int kfd_topology_init(void);
842 void kfd_topology_shutdown(void);
843 int kfd_topology_add_device(struct kfd_dev *gpu);
844 int kfd_topology_remove_device(struct kfd_dev *gpu);
845 struct kfd_topology_device *kfd_topology_device_by_proximity_domain(
846 						uint32_t proximity_domain);
847 struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id);
848 struct kfd_dev *kfd_device_by_id(uint32_t gpu_id);
849 struct kfd_dev *kfd_device_by_pci_dev(const struct pci_dev *pdev);
850 struct kfd_dev *kfd_device_by_kgd(const struct kgd_dev *kgd);
851 int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_dev **kdev);
852 int kfd_numa_node_to_apic_id(int numa_node_id);
853 
854 /* Interrupts */
855 int kfd_interrupt_init(struct kfd_dev *dev);
856 void kfd_interrupt_exit(struct kfd_dev *dev);
857 bool enqueue_ih_ring_entry(struct kfd_dev *kfd,	const void *ih_ring_entry);
858 bool interrupt_is_wanted(struct kfd_dev *dev,
859 				const uint32_t *ih_ring_entry,
860 				uint32_t *patched_ihre, bool *flag);
861 
862 /* amdkfd Apertures */
863 int kfd_init_apertures(struct kfd_process *process);
864 
865 /* Queue Context Management */
866 int init_queue(struct queue **q, const struct queue_properties *properties);
867 void uninit_queue(struct queue *q);
868 void print_queue_properties(struct queue_properties *q);
869 void print_queue(struct queue *q);
870 
871 struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type,
872 		struct kfd_dev *dev);
873 struct mqd_manager *mqd_manager_init_cik_hawaii(enum KFD_MQD_TYPE type,
874 		struct kfd_dev *dev);
875 struct mqd_manager *mqd_manager_init_vi(enum KFD_MQD_TYPE type,
876 		struct kfd_dev *dev);
877 struct mqd_manager *mqd_manager_init_vi_tonga(enum KFD_MQD_TYPE type,
878 		struct kfd_dev *dev);
879 struct mqd_manager *mqd_manager_init_v9(enum KFD_MQD_TYPE type,
880 		struct kfd_dev *dev);
881 struct mqd_manager *mqd_manager_init_v10(enum KFD_MQD_TYPE type,
882 		struct kfd_dev *dev);
883 struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev);
884 void device_queue_manager_uninit(struct device_queue_manager *dqm);
885 struct kernel_queue *kernel_queue_init(struct kfd_dev *dev,
886 					enum kfd_queue_type type);
887 void kernel_queue_uninit(struct kernel_queue *kq);
888 int kfd_process_vm_fault(struct device_queue_manager *dqm, unsigned int pasid);
889 
890 /* Process Queue Manager */
891 struct process_queue_node {
892 	struct queue *q;
893 	struct kernel_queue *kq;
894 	struct list_head process_queue_list;
895 };
896 
897 void kfd_process_dequeue_from_device(struct kfd_process_device *pdd);
898 void kfd_process_dequeue_from_all_devices(struct kfd_process *p);
899 int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p);
900 void pqm_uninit(struct process_queue_manager *pqm);
901 int pqm_create_queue(struct process_queue_manager *pqm,
902 			    struct kfd_dev *dev,
903 			    struct file *f,
904 			    struct queue_properties *properties,
905 			    unsigned int *qid,
906 			    uint32_t *p_doorbell_offset_in_process);
907 int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid);
908 int pqm_update_queue(struct process_queue_manager *pqm, unsigned int qid,
909 			struct queue_properties *p);
910 int pqm_set_cu_mask(struct process_queue_manager *pqm, unsigned int qid,
911 			struct queue_properties *p);
912 int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid,
913 			void *gws);
914 struct kernel_queue *pqm_get_kernel_queue(struct process_queue_manager *pqm,
915 						unsigned int qid);
916 int pqm_get_wave_state(struct process_queue_manager *pqm,
917 		       unsigned int qid,
918 		       void __user *ctl_stack,
919 		       u32 *ctl_stack_used_size,
920 		       u32 *save_area_used_size);
921 
922 int amdkfd_fence_wait_timeout(unsigned int *fence_addr,
923 			      unsigned int fence_value,
924 			      unsigned int timeout_ms);
925 
926 /* Packet Manager */
927 
928 #define KFD_FENCE_COMPLETED (100)
929 #define KFD_FENCE_INIT   (10)
930 
931 struct packet_manager {
932 	struct device_queue_manager *dqm;
933 	struct kernel_queue *priv_queue;
934 	struct mutex lock;
935 	bool allocated;
936 	struct kfd_mem_obj *ib_buffer_obj;
937 	unsigned int ib_size_bytes;
938 	bool is_over_subscription;
939 
940 	const struct packet_manager_funcs *pmf;
941 };
942 
943 struct packet_manager_funcs {
944 	/* Support ASIC-specific packet formats for PM4 packets */
945 	int (*map_process)(struct packet_manager *pm, uint32_t *buffer,
946 			struct qcm_process_device *qpd);
947 	int (*runlist)(struct packet_manager *pm, uint32_t *buffer,
948 			uint64_t ib, size_t ib_size_in_dwords, bool chain);
949 	int (*set_resources)(struct packet_manager *pm, uint32_t *buffer,
950 			struct scheduling_resources *res);
951 	int (*map_queues)(struct packet_manager *pm, uint32_t *buffer,
952 			struct queue *q, bool is_static);
953 	int (*unmap_queues)(struct packet_manager *pm, uint32_t *buffer,
954 			enum kfd_queue_type type,
955 			enum kfd_unmap_queues_filter mode,
956 			uint32_t filter_param, bool reset,
957 			unsigned int sdma_engine);
958 	int (*query_status)(struct packet_manager *pm, uint32_t *buffer,
959 			uint64_t fence_address,	uint32_t fence_value);
960 	int (*release_mem)(uint64_t gpu_addr, uint32_t *buffer);
961 
962 	/* Packet sizes */
963 	int map_process_size;
964 	int runlist_size;
965 	int set_resources_size;
966 	int map_queues_size;
967 	int unmap_queues_size;
968 	int query_status_size;
969 	int release_mem_size;
970 };
971 
972 extern const struct packet_manager_funcs kfd_vi_pm_funcs;
973 extern const struct packet_manager_funcs kfd_v9_pm_funcs;
974 
975 int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm);
976 void pm_uninit(struct packet_manager *pm);
977 int pm_send_set_resources(struct packet_manager *pm,
978 				struct scheduling_resources *res);
979 int pm_send_runlist(struct packet_manager *pm, struct list_head *dqm_queues);
980 int pm_send_query_status(struct packet_manager *pm, uint64_t fence_address,
981 				uint32_t fence_value);
982 
983 int pm_send_unmap_queue(struct packet_manager *pm, enum kfd_queue_type type,
984 			enum kfd_unmap_queues_filter mode,
985 			uint32_t filter_param, bool reset,
986 			unsigned int sdma_engine);
987 
988 void pm_release_ib(struct packet_manager *pm);
989 
990 /* Following PM funcs can be shared among VI and AI */
991 unsigned int pm_build_pm4_header(unsigned int opcode, size_t packet_size);
992 
993 uint64_t kfd_get_number_elems(struct kfd_dev *kfd);
994 
995 /* Events */
996 extern const struct kfd_event_interrupt_class event_interrupt_class_cik;
997 extern const struct kfd_event_interrupt_class event_interrupt_class_v9;
998 
999 extern const struct kfd_device_global_init_class device_global_init_class_cik;
1000 
1001 void kfd_event_init_process(struct kfd_process *p);
1002 void kfd_event_free_process(struct kfd_process *p);
1003 int kfd_event_mmap(struct kfd_process *process, struct vm_area_struct *vma);
1004 int kfd_wait_on_events(struct kfd_process *p,
1005 		       uint32_t num_events, void __user *data,
1006 		       bool all, uint32_t user_timeout_ms,
1007 		       uint32_t *wait_result);
1008 void kfd_signal_event_interrupt(unsigned int pasid, uint32_t partial_id,
1009 				uint32_t valid_id_bits);
1010 void kfd_signal_iommu_event(struct kfd_dev *dev,
1011 		unsigned int pasid, unsigned long address,
1012 		bool is_write_requested, bool is_execute_requested);
1013 void kfd_signal_hw_exception_event(unsigned int pasid);
1014 int kfd_set_event(struct kfd_process *p, uint32_t event_id);
1015 int kfd_reset_event(struct kfd_process *p, uint32_t event_id);
1016 int kfd_event_page_set(struct kfd_process *p, void *kernel_address,
1017 		       uint64_t size);
1018 int kfd_event_create(struct file *devkfd, struct kfd_process *p,
1019 		     uint32_t event_type, bool auto_reset, uint32_t node_id,
1020 		     uint32_t *event_id, uint32_t *event_trigger_data,
1021 		     uint64_t *event_page_offset, uint32_t *event_slot_index);
1022 int kfd_event_destroy(struct kfd_process *p, uint32_t event_id);
1023 
1024 void kfd_signal_vm_fault_event(struct kfd_dev *dev, unsigned int pasid,
1025 				struct kfd_vm_fault_info *info);
1026 
1027 void kfd_signal_reset_event(struct kfd_dev *dev);
1028 
1029 void kfd_flush_tlb(struct kfd_process_device *pdd);
1030 
1031 int dbgdev_wave_reset_wavefronts(struct kfd_dev *dev, struct kfd_process *p);
1032 
1033 bool kfd_is_locked(void);
1034 
1035 /* Compute profile */
1036 void kfd_inc_compute_active(struct kfd_dev *dev);
1037 void kfd_dec_compute_active(struct kfd_dev *dev);
1038 
1039 /* Cgroup Support */
1040 /* Check with device cgroup if @kfd device is accessible */
1041 static inline int kfd_devcgroup_check_permission(struct kfd_dev *kfd)
1042 {
1043 #if defined(CONFIG_CGROUP_DEVICE)
1044 	struct drm_device *ddev = kfd->ddev;
1045 
1046 	return devcgroup_check_permission(DEVCG_DEV_CHAR, ddev->driver->major,
1047 					  ddev->render->index,
1048 					  DEVCG_ACC_WRITE | DEVCG_ACC_READ);
1049 #else
1050 	return 0;
1051 #endif
1052 }
1053 
1054 /* Debugfs */
1055 #if defined(CONFIG_DEBUG_FS)
1056 
1057 void kfd_debugfs_init(void);
1058 void kfd_debugfs_fini(void);
1059 int kfd_debugfs_mqds_by_process(struct seq_file *m, void *data);
1060 int pqm_debugfs_mqds(struct seq_file *m, void *data);
1061 int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data);
1062 int dqm_debugfs_hqds(struct seq_file *m, void *data);
1063 int kfd_debugfs_rls_by_device(struct seq_file *m, void *data);
1064 int pm_debugfs_runlist(struct seq_file *m, void *data);
1065 
1066 int kfd_debugfs_hang_hws(struct kfd_dev *dev);
1067 int pm_debugfs_hang_hws(struct packet_manager *pm);
1068 int dqm_debugfs_execute_queues(struct device_queue_manager *dqm);
1069 
1070 #else
1071 
1072 static inline void kfd_debugfs_init(void) {}
1073 static inline void kfd_debugfs_fini(void) {}
1074 
1075 #endif
1076 
1077 #endif
1078