1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 #ifndef KFD_PRIV_H_INCLUDED 24 #define KFD_PRIV_H_INCLUDED 25 26 #include <linux/hashtable.h> 27 #include <linux/mmu_notifier.h> 28 #include <linux/mutex.h> 29 #include <linux/types.h> 30 #include <linux/atomic.h> 31 #include <linux/workqueue.h> 32 #include <linux/spinlock.h> 33 #include <linux/kfd_ioctl.h> 34 #include <linux/idr.h> 35 #include <linux/kfifo.h> 36 #include <linux/seq_file.h> 37 #include <linux/kref.h> 38 #include <linux/sysfs.h> 39 #include <linux/device_cgroup.h> 40 #include <drm/drm_file.h> 41 #include <drm/drm_drv.h> 42 #include <drm/drm_device.h> 43 #include <drm/drm_ioctl.h> 44 #include <kgd_kfd_interface.h> 45 #include <linux/swap.h> 46 47 #include "amd_shared.h" 48 #include "amdgpu.h" 49 50 #define KFD_MAX_RING_ENTRY_SIZE 8 51 52 #define KFD_SYSFS_FILE_MODE 0444 53 54 /* GPU ID hash width in bits */ 55 #define KFD_GPU_ID_HASH_WIDTH 16 56 57 /* Use upper bits of mmap offset to store KFD driver specific information. 58 * BITS[63:62] - Encode MMAP type 59 * BITS[61:46] - Encode gpu_id. To identify to which GPU the offset belongs to 60 * BITS[45:0] - MMAP offset value 61 * 62 * NOTE: struct vm_area_struct.vm_pgoff uses offset in pages. Hence, these 63 * defines are w.r.t to PAGE_SIZE 64 */ 65 #define KFD_MMAP_TYPE_SHIFT 62 66 #define KFD_MMAP_TYPE_MASK (0x3ULL << KFD_MMAP_TYPE_SHIFT) 67 #define KFD_MMAP_TYPE_DOORBELL (0x3ULL << KFD_MMAP_TYPE_SHIFT) 68 #define KFD_MMAP_TYPE_EVENTS (0x2ULL << KFD_MMAP_TYPE_SHIFT) 69 #define KFD_MMAP_TYPE_RESERVED_MEM (0x1ULL << KFD_MMAP_TYPE_SHIFT) 70 #define KFD_MMAP_TYPE_MMIO (0x0ULL << KFD_MMAP_TYPE_SHIFT) 71 72 #define KFD_MMAP_GPU_ID_SHIFT 46 73 #define KFD_MMAP_GPU_ID_MASK (((1ULL << KFD_GPU_ID_HASH_WIDTH) - 1) \ 74 << KFD_MMAP_GPU_ID_SHIFT) 75 #define KFD_MMAP_GPU_ID(gpu_id) ((((uint64_t)gpu_id) << KFD_MMAP_GPU_ID_SHIFT)\ 76 & KFD_MMAP_GPU_ID_MASK) 77 #define KFD_MMAP_GET_GPU_ID(offset) ((offset & KFD_MMAP_GPU_ID_MASK) \ 78 >> KFD_MMAP_GPU_ID_SHIFT) 79 80 /* 81 * When working with cp scheduler we should assign the HIQ manually or via 82 * the amdgpu driver to a fixed hqd slot, here are the fixed HIQ hqd slot 83 * definitions for Kaveri. In Kaveri only the first ME queues participates 84 * in the cp scheduling taking that in mind we set the HIQ slot in the 85 * second ME. 86 */ 87 #define KFD_CIK_HIQ_PIPE 4 88 #define KFD_CIK_HIQ_QUEUE 0 89 90 /* Macro for allocating structures */ 91 #define kfd_alloc_struct(ptr_to_struct) \ 92 ((typeof(ptr_to_struct)) kzalloc(sizeof(*ptr_to_struct), GFP_KERNEL)) 93 94 #define KFD_MAX_NUM_OF_PROCESSES 512 95 #define KFD_MAX_NUM_OF_QUEUES_PER_PROCESS 1024 96 97 /* 98 * Size of the per-process TBA+TMA buffer: 2 pages 99 * 100 * The first page is the TBA used for the CWSR ISA code. The second 101 * page is used as TMA for user-mode trap handler setup in daisy-chain mode. 102 */ 103 #define KFD_CWSR_TBA_TMA_SIZE (PAGE_SIZE * 2) 104 #define KFD_CWSR_TMA_OFFSET PAGE_SIZE 105 106 #define KFD_MAX_NUM_OF_QUEUES_PER_DEVICE \ 107 (KFD_MAX_NUM_OF_PROCESSES * \ 108 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) 109 110 #define KFD_KERNEL_QUEUE_SIZE 2048 111 112 #define KFD_UNMAP_LATENCY_MS (4000) 113 114 /* 115 * 512 = 0x200 116 * The doorbell index distance between SDMA RLC (2*i) and (2*i+1) in the 117 * same SDMA engine on SOC15, which has 8-byte doorbells for SDMA. 118 * 512 8-byte doorbell distance (i.e. one page away) ensures that SDMA RLC 119 * (2*i+1) doorbells (in terms of the lower 12 bit address) lie exactly in 120 * the OFFSET and SIZE set in registers like BIF_SDMA0_DOORBELL_RANGE. 121 */ 122 #define KFD_QUEUE_DOORBELL_MIRROR_OFFSET 512 123 124 125 /* 126 * Kernel module parameter to specify maximum number of supported queues per 127 * device 128 */ 129 extern int max_num_of_queues_per_device; 130 131 132 /* Kernel module parameter to specify the scheduling policy */ 133 extern int sched_policy; 134 135 /* 136 * Kernel module parameter to specify the maximum process 137 * number per HW scheduler 138 */ 139 extern int hws_max_conc_proc; 140 141 extern int cwsr_enable; 142 143 /* 144 * Kernel module parameter to specify whether to send sigterm to HSA process on 145 * unhandled exception 146 */ 147 extern int send_sigterm; 148 149 /* 150 * This kernel module is used to simulate large bar machine on non-large bar 151 * enabled machines. 152 */ 153 extern int debug_largebar; 154 155 /* 156 * Ignore CRAT table during KFD initialization, can be used to work around 157 * broken CRAT tables on some AMD systems 158 */ 159 extern int ignore_crat; 160 161 /* Set sh_mem_config.retry_disable on GFX v9 */ 162 extern int amdgpu_noretry; 163 164 /* Halt if HWS hang is detected */ 165 extern int halt_if_hws_hang; 166 167 /* Whether MEC FW support GWS barriers */ 168 extern bool hws_gws_support; 169 170 /* Queue preemption timeout in ms */ 171 extern int queue_preemption_timeout_ms; 172 173 /* 174 * Don't evict process queues on vm fault 175 */ 176 extern int amdgpu_no_queue_eviction_on_vm_fault; 177 178 /* Enable eviction debug messages */ 179 extern bool debug_evictions; 180 181 enum cache_policy { 182 cache_policy_coherent, 183 cache_policy_noncoherent 184 }; 185 186 #define KFD_IS_SOC15(chip) ((chip) >= CHIP_VEGA10) 187 188 struct kfd_event_interrupt_class { 189 bool (*interrupt_isr)(struct kfd_dev *dev, 190 const uint32_t *ih_ring_entry, uint32_t *patched_ihre, 191 bool *patched_flag); 192 void (*interrupt_wq)(struct kfd_dev *dev, 193 const uint32_t *ih_ring_entry); 194 }; 195 196 struct kfd_device_info { 197 enum amd_asic_type asic_family; 198 const char *asic_name; 199 uint32_t gfx_target_version; 200 const struct kfd_event_interrupt_class *event_interrupt_class; 201 unsigned int max_pasid_bits; 202 unsigned int max_no_of_hqd; 203 unsigned int doorbell_size; 204 size_t ih_ring_entry_size; 205 uint8_t num_of_watch_points; 206 uint16_t mqd_size_aligned; 207 bool supports_cwsr; 208 bool needs_iommu_device; 209 bool needs_pci_atomics; 210 unsigned int num_sdma_engines; 211 unsigned int num_xgmi_sdma_engines; 212 unsigned int num_sdma_queues_per_engine; 213 }; 214 215 struct kfd_mem_obj { 216 uint32_t range_start; 217 uint32_t range_end; 218 uint64_t gpu_addr; 219 uint32_t *cpu_ptr; 220 void *gtt_mem; 221 }; 222 223 struct kfd_vmid_info { 224 uint32_t first_vmid_kfd; 225 uint32_t last_vmid_kfd; 226 uint32_t vmid_num_kfd; 227 }; 228 229 struct kfd_dev { 230 struct kgd_dev *kgd; 231 232 const struct kfd_device_info *device_info; 233 struct pci_dev *pdev; 234 struct drm_device *ddev; 235 236 unsigned int id; /* topology stub index */ 237 238 phys_addr_t doorbell_base; /* Start of actual doorbells used by 239 * KFD. It is aligned for mapping 240 * into user mode 241 */ 242 size_t doorbell_base_dw_offset; /* Offset from the start of the PCI 243 * doorbell BAR to the first KFD 244 * doorbell in dwords. GFX reserves 245 * the segment before this offset. 246 */ 247 u32 __iomem *doorbell_kernel_ptr; /* This is a pointer for a doorbells 248 * page used by kernel queue 249 */ 250 251 struct kgd2kfd_shared_resources shared_resources; 252 struct kfd_vmid_info vm_info; 253 254 const struct kfd2kgd_calls *kfd2kgd; 255 struct mutex doorbell_mutex; 256 DECLARE_BITMAP(doorbell_available_index, 257 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS); 258 259 void *gtt_mem; 260 uint64_t gtt_start_gpu_addr; 261 void *gtt_start_cpu_ptr; 262 void *gtt_sa_bitmap; 263 struct mutex gtt_sa_lock; 264 unsigned int gtt_sa_chunk_size; 265 unsigned int gtt_sa_num_of_chunks; 266 267 /* Interrupts */ 268 struct kfifo ih_fifo; 269 struct workqueue_struct *ih_wq; 270 struct work_struct interrupt_work; 271 spinlock_t interrupt_lock; 272 273 /* QCM Device instance */ 274 struct device_queue_manager *dqm; 275 276 bool init_complete; 277 /* 278 * Interrupts of interest to KFD are copied 279 * from the HW ring into a SW ring. 280 */ 281 bool interrupts_active; 282 283 /* Debug manager */ 284 struct kfd_dbgmgr *dbgmgr; 285 286 /* Firmware versions */ 287 uint16_t mec_fw_version; 288 uint16_t mec2_fw_version; 289 uint16_t sdma_fw_version; 290 291 /* Maximum process number mapped to HW scheduler */ 292 unsigned int max_proc_per_quantum; 293 294 /* CWSR */ 295 bool cwsr_enabled; 296 const void *cwsr_isa; 297 unsigned int cwsr_isa_size; 298 299 /* xGMI */ 300 uint64_t hive_id; 301 302 bool pci_atomic_requested; 303 304 /* Use IOMMU v2 flag */ 305 bool use_iommu_v2; 306 307 /* SRAM ECC flag */ 308 atomic_t sram_ecc_flag; 309 310 /* Compute Profile ref. count */ 311 atomic_t compute_profile; 312 313 /* Global GWS resource shared between processes */ 314 void *gws; 315 316 /* Clients watching SMI events */ 317 struct list_head smi_clients; 318 spinlock_t smi_lock; 319 320 uint32_t reset_seq_num; 321 322 struct ida doorbell_ida; 323 unsigned int max_doorbell_slices; 324 325 int noretry; 326 327 /* HMM page migration MEMORY_DEVICE_PRIVATE mapping */ 328 struct dev_pagemap pgmap; 329 }; 330 331 enum kfd_mempool { 332 KFD_MEMPOOL_SYSTEM_CACHEABLE = 1, 333 KFD_MEMPOOL_SYSTEM_WRITECOMBINE = 2, 334 KFD_MEMPOOL_FRAMEBUFFER = 3, 335 }; 336 337 /* Character device interface */ 338 int kfd_chardev_init(void); 339 void kfd_chardev_exit(void); 340 struct device *kfd_chardev(void); 341 342 /** 343 * enum kfd_unmap_queues_filter - Enum for queue filters. 344 * 345 * @KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE: Preempts single queue. 346 * 347 * @KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES: Preempts all queues in the 348 * running queues list. 349 * 350 * @KFD_UNMAP_QUEUES_FILTER_BY_PASID: Preempts queues that belongs to 351 * specific process. 352 * 353 */ 354 enum kfd_unmap_queues_filter { 355 KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE, 356 KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 357 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 358 KFD_UNMAP_QUEUES_FILTER_BY_PASID 359 }; 360 361 /** 362 * enum kfd_queue_type - Enum for various queue types. 363 * 364 * @KFD_QUEUE_TYPE_COMPUTE: Regular user mode queue type. 365 * 366 * @KFD_QUEUE_TYPE_SDMA: SDMA user mode queue type. 367 * 368 * @KFD_QUEUE_TYPE_HIQ: HIQ queue type. 369 * 370 * @KFD_QUEUE_TYPE_DIQ: DIQ queue type. 371 * 372 * @KFD_QUEUE_TYPE_SDMA_XGMI: Special SDMA queue for XGMI interface. 373 */ 374 enum kfd_queue_type { 375 KFD_QUEUE_TYPE_COMPUTE, 376 KFD_QUEUE_TYPE_SDMA, 377 KFD_QUEUE_TYPE_HIQ, 378 KFD_QUEUE_TYPE_DIQ, 379 KFD_QUEUE_TYPE_SDMA_XGMI 380 }; 381 382 enum kfd_queue_format { 383 KFD_QUEUE_FORMAT_PM4, 384 KFD_QUEUE_FORMAT_AQL 385 }; 386 387 enum KFD_QUEUE_PRIORITY { 388 KFD_QUEUE_PRIORITY_MINIMUM = 0, 389 KFD_QUEUE_PRIORITY_MAXIMUM = 15 390 }; 391 392 /** 393 * struct queue_properties 394 * 395 * @type: The queue type. 396 * 397 * @queue_id: Queue identifier. 398 * 399 * @queue_address: Queue ring buffer address. 400 * 401 * @queue_size: Queue ring buffer size. 402 * 403 * @priority: Defines the queue priority relative to other queues in the 404 * process. 405 * This is just an indication and HW scheduling may override the priority as 406 * necessary while keeping the relative prioritization. 407 * the priority granularity is from 0 to f which f is the highest priority. 408 * currently all queues are initialized with the highest priority. 409 * 410 * @queue_percent: This field is partially implemented and currently a zero in 411 * this field defines that the queue is non active. 412 * 413 * @read_ptr: User space address which points to the number of dwords the 414 * cp read from the ring buffer. This field updates automatically by the H/W. 415 * 416 * @write_ptr: Defines the number of dwords written to the ring buffer. 417 * 418 * @doorbell_ptr: Notifies the H/W of new packet written to the queue ring 419 * buffer. This field should be similar to write_ptr and the user should 420 * update this field after updating the write_ptr. 421 * 422 * @doorbell_off: The doorbell offset in the doorbell pci-bar. 423 * 424 * @is_interop: Defines if this is a interop queue. Interop queue means that 425 * the queue can access both graphics and compute resources. 426 * 427 * @is_evicted: Defines if the queue is evicted. Only active queues 428 * are evicted, rendering them inactive. 429 * 430 * @is_active: Defines if the queue is active or not. @is_active and 431 * @is_evicted are protected by the DQM lock. 432 * 433 * @is_gws: Defines if the queue has been updated to be GWS-capable or not. 434 * @is_gws should be protected by the DQM lock, since changing it can yield the 435 * possibility of updating DQM state on number of GWS queues. 436 * 437 * @vmid: If the scheduling mode is no cp scheduling the field defines the vmid 438 * of the queue. 439 * 440 * This structure represents the queue properties for each queue no matter if 441 * it's user mode or kernel mode queue. 442 * 443 */ 444 struct queue_properties { 445 enum kfd_queue_type type; 446 enum kfd_queue_format format; 447 unsigned int queue_id; 448 uint64_t queue_address; 449 uint64_t queue_size; 450 uint32_t priority; 451 uint32_t queue_percent; 452 uint32_t *read_ptr; 453 uint32_t *write_ptr; 454 void __iomem *doorbell_ptr; 455 uint32_t doorbell_off; 456 bool is_interop; 457 bool is_evicted; 458 bool is_active; 459 bool is_gws; 460 /* Not relevant for user mode queues in cp scheduling */ 461 unsigned int vmid; 462 /* Relevant only for sdma queues*/ 463 uint32_t sdma_engine_id; 464 uint32_t sdma_queue_id; 465 uint32_t sdma_vm_addr; 466 /* Relevant only for VI */ 467 uint64_t eop_ring_buffer_address; 468 uint32_t eop_ring_buffer_size; 469 uint64_t ctx_save_restore_area_address; 470 uint32_t ctx_save_restore_area_size; 471 uint32_t ctl_stack_size; 472 uint64_t tba_addr; 473 uint64_t tma_addr; 474 /* Relevant for CU */ 475 uint32_t cu_mask_count; /* Must be a multiple of 32 */ 476 uint32_t *cu_mask; 477 }; 478 479 #define QUEUE_IS_ACTIVE(q) ((q).queue_size > 0 && \ 480 (q).queue_address != 0 && \ 481 (q).queue_percent > 0 && \ 482 !(q).is_evicted) 483 484 /** 485 * struct queue 486 * 487 * @list: Queue linked list. 488 * 489 * @mqd: The queue MQD (memory queue descriptor). 490 * 491 * @mqd_mem_obj: The MQD local gpu memory object. 492 * 493 * @gart_mqd_addr: The MQD gart mc address. 494 * 495 * @properties: The queue properties. 496 * 497 * @mec: Used only in no cp scheduling mode and identifies to micro engine id 498 * that the queue should be executed on. 499 * 500 * @pipe: Used only in no cp scheduling mode and identifies the queue's pipe 501 * id. 502 * 503 * @queue: Used only in no cp scheduliong mode and identifies the queue's slot. 504 * 505 * @process: The kfd process that created this queue. 506 * 507 * @device: The kfd device that created this queue. 508 * 509 * @gws: Pointing to gws kgd_mem if this is a gws control queue; NULL 510 * otherwise. 511 * 512 * This structure represents user mode compute queues. 513 * It contains all the necessary data to handle such queues. 514 * 515 */ 516 517 struct queue { 518 struct list_head list; 519 void *mqd; 520 struct kfd_mem_obj *mqd_mem_obj; 521 uint64_t gart_mqd_addr; 522 struct queue_properties properties; 523 524 uint32_t mec; 525 uint32_t pipe; 526 uint32_t queue; 527 528 unsigned int sdma_id; 529 unsigned int doorbell_id; 530 531 struct kfd_process *process; 532 struct kfd_dev *device; 533 void *gws; 534 535 /* procfs */ 536 struct kobject kobj; 537 }; 538 539 enum KFD_MQD_TYPE { 540 KFD_MQD_TYPE_HIQ = 0, /* for hiq */ 541 KFD_MQD_TYPE_CP, /* for cp queues and diq */ 542 KFD_MQD_TYPE_SDMA, /* for sdma queues */ 543 KFD_MQD_TYPE_DIQ, /* for diq */ 544 KFD_MQD_TYPE_MAX 545 }; 546 547 enum KFD_PIPE_PRIORITY { 548 KFD_PIPE_PRIORITY_CS_LOW = 0, 549 KFD_PIPE_PRIORITY_CS_MEDIUM, 550 KFD_PIPE_PRIORITY_CS_HIGH 551 }; 552 553 struct scheduling_resources { 554 unsigned int vmid_mask; 555 enum kfd_queue_type type; 556 uint64_t queue_mask; 557 uint64_t gws_mask; 558 uint32_t oac_mask; 559 uint32_t gds_heap_base; 560 uint32_t gds_heap_size; 561 }; 562 563 struct process_queue_manager { 564 /* data */ 565 struct kfd_process *process; 566 struct list_head queues; 567 unsigned long *queue_slot_bitmap; 568 }; 569 570 struct qcm_process_device { 571 /* The Device Queue Manager that owns this data */ 572 struct device_queue_manager *dqm; 573 struct process_queue_manager *pqm; 574 /* Queues list */ 575 struct list_head queues_list; 576 struct list_head priv_queue_list; 577 578 unsigned int queue_count; 579 unsigned int vmid; 580 bool is_debug; 581 unsigned int evicted; /* eviction counter, 0=active */ 582 583 /* This flag tells if we should reset all wavefronts on 584 * process termination 585 */ 586 bool reset_wavefronts; 587 588 /* This flag tells us if this process has a GWS-capable 589 * queue that will be mapped into the runlist. It's 590 * possible to request a GWS BO, but not have the queue 591 * currently mapped, and this changes how the MAP_PROCESS 592 * PM4 packet is configured. 593 */ 594 bool mapped_gws_queue; 595 596 /* All the memory management data should be here too */ 597 uint64_t gds_context_area; 598 /* Contains page table flags such as AMDGPU_PTE_VALID since gfx9 */ 599 uint64_t page_table_base; 600 uint32_t sh_mem_config; 601 uint32_t sh_mem_bases; 602 uint32_t sh_mem_ape1_base; 603 uint32_t sh_mem_ape1_limit; 604 uint32_t gds_size; 605 uint32_t num_gws; 606 uint32_t num_oac; 607 uint32_t sh_hidden_private_base; 608 609 /* CWSR memory */ 610 void *cwsr_kaddr; 611 uint64_t cwsr_base; 612 uint64_t tba_addr; 613 uint64_t tma_addr; 614 615 /* IB memory */ 616 uint64_t ib_base; 617 void *ib_kaddr; 618 619 /* doorbell resources per process per device */ 620 unsigned long *doorbell_bitmap; 621 }; 622 623 /* KFD Memory Eviction */ 624 625 /* Approx. wait time before attempting to restore evicted BOs */ 626 #define PROCESS_RESTORE_TIME_MS 100 627 /* Approx. back off time if restore fails due to lack of memory */ 628 #define PROCESS_BACK_OFF_TIME_MS 100 629 /* Approx. time before evicting the process again */ 630 #define PROCESS_ACTIVE_TIME_MS 10 631 632 /* 8 byte handle containing GPU ID in the most significant 4 bytes and 633 * idr_handle in the least significant 4 bytes 634 */ 635 #define MAKE_HANDLE(gpu_id, idr_handle) \ 636 (((uint64_t)(gpu_id) << 32) + idr_handle) 637 #define GET_GPU_ID(handle) (handle >> 32) 638 #define GET_IDR_HANDLE(handle) (handle & 0xFFFFFFFF) 639 640 enum kfd_pdd_bound { 641 PDD_UNBOUND = 0, 642 PDD_BOUND, 643 PDD_BOUND_SUSPENDED, 644 }; 645 646 #define MAX_SYSFS_FILENAME_LEN 15 647 648 /* 649 * SDMA counter runs at 100MHz frequency. 650 * We display SDMA activity in microsecond granularity in sysfs. 651 * As a result, the divisor is 100. 652 */ 653 #define SDMA_ACTIVITY_DIVISOR 100 654 655 /* Data that is per-process-per device. */ 656 struct kfd_process_device { 657 /* The device that owns this data. */ 658 struct kfd_dev *dev; 659 660 /* The process that owns this kfd_process_device. */ 661 struct kfd_process *process; 662 663 /* per-process-per device QCM data structure */ 664 struct qcm_process_device qpd; 665 666 /*Apertures*/ 667 uint64_t lds_base; 668 uint64_t lds_limit; 669 uint64_t gpuvm_base; 670 uint64_t gpuvm_limit; 671 uint64_t scratch_base; 672 uint64_t scratch_limit; 673 674 /* VM context for GPUVM allocations */ 675 struct file *drm_file; 676 void *drm_priv; 677 678 /* GPUVM allocations storage */ 679 struct idr alloc_idr; 680 681 /* Flag used to tell the pdd has dequeued from the dqm. 682 * This is used to prevent dev->dqm->ops.process_termination() from 683 * being called twice when it is already called in IOMMU callback 684 * function. 685 */ 686 bool already_dequeued; 687 bool runtime_inuse; 688 689 /* Is this process/pasid bound to this device? (amd_iommu_bind_pasid) */ 690 enum kfd_pdd_bound bound; 691 692 /* VRAM usage */ 693 uint64_t vram_usage; 694 struct attribute attr_vram; 695 char vram_filename[MAX_SYSFS_FILENAME_LEN]; 696 697 /* SDMA activity tracking */ 698 uint64_t sdma_past_activity_counter; 699 struct attribute attr_sdma; 700 char sdma_filename[MAX_SYSFS_FILENAME_LEN]; 701 702 /* Eviction activity tracking */ 703 uint64_t last_evict_timestamp; 704 atomic64_t evict_duration_counter; 705 struct attribute attr_evict; 706 707 struct kobject *kobj_stats; 708 unsigned int doorbell_index; 709 710 /* 711 * @cu_occupancy: Reports occupancy of Compute Units (CU) of a process 712 * that is associated with device encoded by "this" struct instance. The 713 * value reflects CU usage by all of the waves launched by this process 714 * on this device. A very important property of occupancy parameter is 715 * that its value is a snapshot of current use. 716 * 717 * Following is to be noted regarding how this parameter is reported: 718 * 719 * The number of waves that a CU can launch is limited by couple of 720 * parameters. These are encoded by struct amdgpu_cu_info instance 721 * that is part of every device definition. For GFX9 devices this 722 * translates to 40 waves (simd_per_cu * max_waves_per_simd) when waves 723 * do not use scratch memory and 32 waves (max_scratch_slots_per_cu) 724 * when they do use scratch memory. This could change for future 725 * devices and therefore this example should be considered as a guide. 726 * 727 * All CU's of a device are available for the process. This may not be true 728 * under certain conditions - e.g. CU masking. 729 * 730 * Finally number of CU's that are occupied by a process is affected by both 731 * number of CU's a device has along with number of other competing processes 732 */ 733 struct attribute attr_cu_occupancy; 734 735 /* sysfs counters for GPU retry fault and page migration tracking */ 736 struct kobject *kobj_counters; 737 struct attribute attr_faults; 738 struct attribute attr_page_in; 739 struct attribute attr_page_out; 740 uint64_t faults; 741 uint64_t page_in; 742 uint64_t page_out; 743 }; 744 745 #define qpd_to_pdd(x) container_of(x, struct kfd_process_device, qpd) 746 747 struct svm_range_list { 748 struct mutex lock; 749 struct rb_root_cached objects; 750 struct list_head list; 751 struct work_struct deferred_list_work; 752 struct list_head deferred_range_list; 753 spinlock_t deferred_list_lock; 754 atomic_t evicted_ranges; 755 struct delayed_work restore_work; 756 DECLARE_BITMAP(bitmap_supported, MAX_GPU_INSTANCE); 757 }; 758 759 /* Process data */ 760 struct kfd_process { 761 /* 762 * kfd_process are stored in an mm_struct*->kfd_process* 763 * hash table (kfd_processes in kfd_process.c) 764 */ 765 struct hlist_node kfd_processes; 766 767 /* 768 * Opaque pointer to mm_struct. We don't hold a reference to 769 * it so it should never be dereferenced from here. This is 770 * only used for looking up processes by their mm. 771 */ 772 void *mm; 773 774 struct kref ref; 775 struct work_struct release_work; 776 777 struct mutex mutex; 778 779 /* 780 * In any process, the thread that started main() is the lead 781 * thread and outlives the rest. 782 * It is here because amd_iommu_bind_pasid wants a task_struct. 783 * It can also be used for safely getting a reference to the 784 * mm_struct of the process. 785 */ 786 struct task_struct *lead_thread; 787 788 /* We want to receive a notification when the mm_struct is destroyed */ 789 struct mmu_notifier mmu_notifier; 790 791 u32 pasid; 792 793 /* 794 * Array of kfd_process_device pointers, 795 * one for each device the process is using. 796 */ 797 struct kfd_process_device *pdds[MAX_GPU_INSTANCE]; 798 uint32_t n_pdds; 799 800 struct process_queue_manager pqm; 801 802 /*Is the user space process 32 bit?*/ 803 bool is_32bit_user_mode; 804 805 /* Event-related data */ 806 struct mutex event_mutex; 807 /* Event ID allocator and lookup */ 808 struct idr event_idr; 809 /* Event page */ 810 struct kfd_signal_page *signal_page; 811 size_t signal_mapped_size; 812 size_t signal_event_count; 813 bool signal_event_limit_reached; 814 815 /* Information used for memory eviction */ 816 void *kgd_process_info; 817 /* Eviction fence that is attached to all the BOs of this process. The 818 * fence will be triggered during eviction and new one will be created 819 * during restore 820 */ 821 struct dma_fence *ef; 822 823 /* Work items for evicting and restoring BOs */ 824 struct delayed_work eviction_work; 825 struct delayed_work restore_work; 826 /* seqno of the last scheduled eviction */ 827 unsigned int last_eviction_seqno; 828 /* Approx. the last timestamp (in jiffies) when the process was 829 * restored after an eviction 830 */ 831 unsigned long last_restore_timestamp; 832 833 /* Kobj for our procfs */ 834 struct kobject *kobj; 835 struct kobject *kobj_queues; 836 struct attribute attr_pasid; 837 838 /* shared virtual memory registered by this process */ 839 struct svm_range_list svms; 840 841 bool xnack_enabled; 842 }; 843 844 #define KFD_PROCESS_TABLE_SIZE 5 /* bits: 32 entries */ 845 extern DECLARE_HASHTABLE(kfd_processes_table, KFD_PROCESS_TABLE_SIZE); 846 extern struct srcu_struct kfd_processes_srcu; 847 848 /** 849 * typedef amdkfd_ioctl_t - typedef for ioctl function pointer. 850 * 851 * @filep: pointer to file structure. 852 * @p: amdkfd process pointer. 853 * @data: pointer to arg that was copied from user. 854 * 855 * Return: returns ioctl completion code. 856 */ 857 typedef int amdkfd_ioctl_t(struct file *filep, struct kfd_process *p, 858 void *data); 859 860 struct amdkfd_ioctl_desc { 861 unsigned int cmd; 862 int flags; 863 amdkfd_ioctl_t *func; 864 unsigned int cmd_drv; 865 const char *name; 866 }; 867 bool kfd_dev_is_large_bar(struct kfd_dev *dev); 868 869 int kfd_process_create_wq(void); 870 void kfd_process_destroy_wq(void); 871 struct kfd_process *kfd_create_process(struct file *filep); 872 struct kfd_process *kfd_get_process(const struct task_struct *); 873 struct kfd_process *kfd_lookup_process_by_pasid(u32 pasid); 874 struct kfd_process *kfd_lookup_process_by_mm(const struct mm_struct *mm); 875 876 int kfd_process_gpuidx_from_gpuid(struct kfd_process *p, uint32_t gpu_id); 877 int kfd_process_gpuid_from_kgd(struct kfd_process *p, 878 struct amdgpu_device *adev, uint32_t *gpuid, 879 uint32_t *gpuidx); 880 static inline int kfd_process_gpuid_from_gpuidx(struct kfd_process *p, 881 uint32_t gpuidx, uint32_t *gpuid) { 882 return gpuidx < p->n_pdds ? p->pdds[gpuidx]->dev->id : -EINVAL; 883 } 884 static inline struct kfd_process_device *kfd_process_device_from_gpuidx( 885 struct kfd_process *p, uint32_t gpuidx) { 886 return gpuidx < p->n_pdds ? p->pdds[gpuidx] : NULL; 887 } 888 889 void kfd_unref_process(struct kfd_process *p); 890 int kfd_process_evict_queues(struct kfd_process *p); 891 int kfd_process_restore_queues(struct kfd_process *p); 892 void kfd_suspend_all_processes(void); 893 int kfd_resume_all_processes(void); 894 895 int kfd_process_device_init_vm(struct kfd_process_device *pdd, 896 struct file *drm_file); 897 struct kfd_process_device *kfd_bind_process_to_device(struct kfd_dev *dev, 898 struct kfd_process *p); 899 struct kfd_process_device *kfd_get_process_device_data(struct kfd_dev *dev, 900 struct kfd_process *p); 901 struct kfd_process_device *kfd_create_process_device_data(struct kfd_dev *dev, 902 struct kfd_process *p); 903 904 bool kfd_process_xnack_mode(struct kfd_process *p, bool supported); 905 906 int kfd_reserved_mem_mmap(struct kfd_dev *dev, struct kfd_process *process, 907 struct vm_area_struct *vma); 908 909 /* KFD process API for creating and translating handles */ 910 int kfd_process_device_create_obj_handle(struct kfd_process_device *pdd, 911 void *mem); 912 void *kfd_process_device_translate_handle(struct kfd_process_device *p, 913 int handle); 914 void kfd_process_device_remove_obj_handle(struct kfd_process_device *pdd, 915 int handle); 916 917 /* PASIDs */ 918 int kfd_pasid_init(void); 919 void kfd_pasid_exit(void); 920 bool kfd_set_pasid_limit(unsigned int new_limit); 921 unsigned int kfd_get_pasid_limit(void); 922 u32 kfd_pasid_alloc(void); 923 void kfd_pasid_free(u32 pasid); 924 925 /* Doorbells */ 926 size_t kfd_doorbell_process_slice(struct kfd_dev *kfd); 927 int kfd_doorbell_init(struct kfd_dev *kfd); 928 void kfd_doorbell_fini(struct kfd_dev *kfd); 929 int kfd_doorbell_mmap(struct kfd_dev *dev, struct kfd_process *process, 930 struct vm_area_struct *vma); 931 void __iomem *kfd_get_kernel_doorbell(struct kfd_dev *kfd, 932 unsigned int *doorbell_off); 933 void kfd_release_kernel_doorbell(struct kfd_dev *kfd, u32 __iomem *db_addr); 934 u32 read_kernel_doorbell(u32 __iomem *db); 935 void write_kernel_doorbell(void __iomem *db, u32 value); 936 void write_kernel_doorbell64(void __iomem *db, u64 value); 937 unsigned int kfd_get_doorbell_dw_offset_in_bar(struct kfd_dev *kfd, 938 struct kfd_process_device *pdd, 939 unsigned int doorbell_id); 940 phys_addr_t kfd_get_process_doorbells(struct kfd_process_device *pdd); 941 int kfd_alloc_process_doorbells(struct kfd_dev *kfd, 942 unsigned int *doorbell_index); 943 void kfd_free_process_doorbells(struct kfd_dev *kfd, 944 unsigned int doorbell_index); 945 /* GTT Sub-Allocator */ 946 947 int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size, 948 struct kfd_mem_obj **mem_obj); 949 950 int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj); 951 952 extern struct device *kfd_device; 953 954 /* KFD's procfs */ 955 void kfd_procfs_init(void); 956 void kfd_procfs_shutdown(void); 957 int kfd_procfs_add_queue(struct queue *q); 958 void kfd_procfs_del_queue(struct queue *q); 959 960 /* Topology */ 961 int kfd_topology_init(void); 962 void kfd_topology_shutdown(void); 963 int kfd_topology_add_device(struct kfd_dev *gpu); 964 int kfd_topology_remove_device(struct kfd_dev *gpu); 965 struct kfd_topology_device *kfd_topology_device_by_proximity_domain( 966 uint32_t proximity_domain); 967 struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id); 968 struct kfd_dev *kfd_device_by_id(uint32_t gpu_id); 969 struct kfd_dev *kfd_device_by_pci_dev(const struct pci_dev *pdev); 970 struct kfd_dev *kfd_device_by_kgd(const struct kgd_dev *kgd); 971 int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_dev **kdev); 972 int kfd_numa_node_to_apic_id(int numa_node_id); 973 void kfd_double_confirm_iommu_support(struct kfd_dev *gpu); 974 975 /* Interrupts */ 976 int kfd_interrupt_init(struct kfd_dev *dev); 977 void kfd_interrupt_exit(struct kfd_dev *dev); 978 bool enqueue_ih_ring_entry(struct kfd_dev *kfd, const void *ih_ring_entry); 979 bool interrupt_is_wanted(struct kfd_dev *dev, 980 const uint32_t *ih_ring_entry, 981 uint32_t *patched_ihre, bool *flag); 982 983 /* amdkfd Apertures */ 984 int kfd_init_apertures(struct kfd_process *process); 985 986 void kfd_process_set_trap_handler(struct qcm_process_device *qpd, 987 uint64_t tba_addr, 988 uint64_t tma_addr); 989 990 /* Queue Context Management */ 991 int init_queue(struct queue **q, const struct queue_properties *properties); 992 void uninit_queue(struct queue *q); 993 void print_queue_properties(struct queue_properties *q); 994 void print_queue(struct queue *q); 995 996 struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type, 997 struct kfd_dev *dev); 998 struct mqd_manager *mqd_manager_init_cik_hawaii(enum KFD_MQD_TYPE type, 999 struct kfd_dev *dev); 1000 struct mqd_manager *mqd_manager_init_vi(enum KFD_MQD_TYPE type, 1001 struct kfd_dev *dev); 1002 struct mqd_manager *mqd_manager_init_vi_tonga(enum KFD_MQD_TYPE type, 1003 struct kfd_dev *dev); 1004 struct mqd_manager *mqd_manager_init_v9(enum KFD_MQD_TYPE type, 1005 struct kfd_dev *dev); 1006 struct mqd_manager *mqd_manager_init_v10(enum KFD_MQD_TYPE type, 1007 struct kfd_dev *dev); 1008 struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev); 1009 void device_queue_manager_uninit(struct device_queue_manager *dqm); 1010 struct kernel_queue *kernel_queue_init(struct kfd_dev *dev, 1011 enum kfd_queue_type type); 1012 void kernel_queue_uninit(struct kernel_queue *kq, bool hanging); 1013 int kfd_process_vm_fault(struct device_queue_manager *dqm, u32 pasid); 1014 1015 /* Process Queue Manager */ 1016 struct process_queue_node { 1017 struct queue *q; 1018 struct kernel_queue *kq; 1019 struct list_head process_queue_list; 1020 }; 1021 1022 void kfd_process_dequeue_from_device(struct kfd_process_device *pdd); 1023 void kfd_process_dequeue_from_all_devices(struct kfd_process *p); 1024 int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p); 1025 void pqm_uninit(struct process_queue_manager *pqm); 1026 int pqm_create_queue(struct process_queue_manager *pqm, 1027 struct kfd_dev *dev, 1028 struct file *f, 1029 struct queue_properties *properties, 1030 unsigned int *qid, 1031 uint32_t *p_doorbell_offset_in_process); 1032 int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid); 1033 int pqm_update_queue(struct process_queue_manager *pqm, unsigned int qid, 1034 struct queue_properties *p); 1035 int pqm_set_cu_mask(struct process_queue_manager *pqm, unsigned int qid, 1036 struct queue_properties *p); 1037 int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid, 1038 void *gws); 1039 struct kernel_queue *pqm_get_kernel_queue(struct process_queue_manager *pqm, 1040 unsigned int qid); 1041 struct queue *pqm_get_user_queue(struct process_queue_manager *pqm, 1042 unsigned int qid); 1043 int pqm_get_wave_state(struct process_queue_manager *pqm, 1044 unsigned int qid, 1045 void __user *ctl_stack, 1046 u32 *ctl_stack_used_size, 1047 u32 *save_area_used_size); 1048 1049 int amdkfd_fence_wait_timeout(uint64_t *fence_addr, 1050 uint64_t fence_value, 1051 unsigned int timeout_ms); 1052 1053 /* Packet Manager */ 1054 1055 #define KFD_FENCE_COMPLETED (100) 1056 #define KFD_FENCE_INIT (10) 1057 1058 struct packet_manager { 1059 struct device_queue_manager *dqm; 1060 struct kernel_queue *priv_queue; 1061 struct mutex lock; 1062 bool allocated; 1063 struct kfd_mem_obj *ib_buffer_obj; 1064 unsigned int ib_size_bytes; 1065 bool is_over_subscription; 1066 1067 const struct packet_manager_funcs *pmf; 1068 }; 1069 1070 struct packet_manager_funcs { 1071 /* Support ASIC-specific packet formats for PM4 packets */ 1072 int (*map_process)(struct packet_manager *pm, uint32_t *buffer, 1073 struct qcm_process_device *qpd); 1074 int (*runlist)(struct packet_manager *pm, uint32_t *buffer, 1075 uint64_t ib, size_t ib_size_in_dwords, bool chain); 1076 int (*set_resources)(struct packet_manager *pm, uint32_t *buffer, 1077 struct scheduling_resources *res); 1078 int (*map_queues)(struct packet_manager *pm, uint32_t *buffer, 1079 struct queue *q, bool is_static); 1080 int (*unmap_queues)(struct packet_manager *pm, uint32_t *buffer, 1081 enum kfd_queue_type type, 1082 enum kfd_unmap_queues_filter mode, 1083 uint32_t filter_param, bool reset, 1084 unsigned int sdma_engine); 1085 int (*query_status)(struct packet_manager *pm, uint32_t *buffer, 1086 uint64_t fence_address, uint64_t fence_value); 1087 int (*release_mem)(uint64_t gpu_addr, uint32_t *buffer); 1088 1089 /* Packet sizes */ 1090 int map_process_size; 1091 int runlist_size; 1092 int set_resources_size; 1093 int map_queues_size; 1094 int unmap_queues_size; 1095 int query_status_size; 1096 int release_mem_size; 1097 }; 1098 1099 extern const struct packet_manager_funcs kfd_vi_pm_funcs; 1100 extern const struct packet_manager_funcs kfd_v9_pm_funcs; 1101 extern const struct packet_manager_funcs kfd_aldebaran_pm_funcs; 1102 1103 int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm); 1104 void pm_uninit(struct packet_manager *pm, bool hanging); 1105 int pm_send_set_resources(struct packet_manager *pm, 1106 struct scheduling_resources *res); 1107 int pm_send_runlist(struct packet_manager *pm, struct list_head *dqm_queues); 1108 int pm_send_query_status(struct packet_manager *pm, uint64_t fence_address, 1109 uint64_t fence_value); 1110 1111 int pm_send_unmap_queue(struct packet_manager *pm, enum kfd_queue_type type, 1112 enum kfd_unmap_queues_filter mode, 1113 uint32_t filter_param, bool reset, 1114 unsigned int sdma_engine); 1115 1116 void pm_release_ib(struct packet_manager *pm); 1117 1118 /* Following PM funcs can be shared among VI and AI */ 1119 unsigned int pm_build_pm4_header(unsigned int opcode, size_t packet_size); 1120 1121 uint64_t kfd_get_number_elems(struct kfd_dev *kfd); 1122 1123 /* Events */ 1124 extern const struct kfd_event_interrupt_class event_interrupt_class_cik; 1125 extern const struct kfd_event_interrupt_class event_interrupt_class_v9; 1126 1127 extern const struct kfd_device_global_init_class device_global_init_class_cik; 1128 1129 void kfd_event_init_process(struct kfd_process *p); 1130 void kfd_event_free_process(struct kfd_process *p); 1131 int kfd_event_mmap(struct kfd_process *process, struct vm_area_struct *vma); 1132 int kfd_wait_on_events(struct kfd_process *p, 1133 uint32_t num_events, void __user *data, 1134 bool all, uint32_t user_timeout_ms, 1135 uint32_t *wait_result); 1136 void kfd_signal_event_interrupt(u32 pasid, uint32_t partial_id, 1137 uint32_t valid_id_bits); 1138 void kfd_signal_iommu_event(struct kfd_dev *dev, 1139 u32 pasid, unsigned long address, 1140 bool is_write_requested, bool is_execute_requested); 1141 void kfd_signal_hw_exception_event(u32 pasid); 1142 int kfd_set_event(struct kfd_process *p, uint32_t event_id); 1143 int kfd_reset_event(struct kfd_process *p, uint32_t event_id); 1144 int kfd_event_page_set(struct kfd_process *p, void *kernel_address, 1145 uint64_t size); 1146 int kfd_event_create(struct file *devkfd, struct kfd_process *p, 1147 uint32_t event_type, bool auto_reset, uint32_t node_id, 1148 uint32_t *event_id, uint32_t *event_trigger_data, 1149 uint64_t *event_page_offset, uint32_t *event_slot_index); 1150 int kfd_event_destroy(struct kfd_process *p, uint32_t event_id); 1151 1152 void kfd_signal_vm_fault_event(struct kfd_dev *dev, u32 pasid, 1153 struct kfd_vm_fault_info *info); 1154 1155 void kfd_signal_reset_event(struct kfd_dev *dev); 1156 1157 void kfd_signal_poison_consumed_event(struct kfd_dev *dev, u32 pasid); 1158 1159 void kfd_flush_tlb(struct kfd_process_device *pdd, enum TLB_FLUSH_TYPE type); 1160 1161 int dbgdev_wave_reset_wavefronts(struct kfd_dev *dev, struct kfd_process *p); 1162 1163 bool kfd_is_locked(void); 1164 1165 /* Compute profile */ 1166 void kfd_inc_compute_active(struct kfd_dev *dev); 1167 void kfd_dec_compute_active(struct kfd_dev *dev); 1168 1169 /* Cgroup Support */ 1170 /* Check with device cgroup if @kfd device is accessible */ 1171 static inline int kfd_devcgroup_check_permission(struct kfd_dev *kfd) 1172 { 1173 #if defined(CONFIG_CGROUP_DEVICE) || defined(CONFIG_CGROUP_BPF) 1174 struct drm_device *ddev = kfd->ddev; 1175 1176 return devcgroup_check_permission(DEVCG_DEV_CHAR, DRM_MAJOR, 1177 ddev->render->index, 1178 DEVCG_ACC_WRITE | DEVCG_ACC_READ); 1179 #else 1180 return 0; 1181 #endif 1182 } 1183 1184 /* Debugfs */ 1185 #if defined(CONFIG_DEBUG_FS) 1186 1187 void kfd_debugfs_init(void); 1188 void kfd_debugfs_fini(void); 1189 int kfd_debugfs_mqds_by_process(struct seq_file *m, void *data); 1190 int pqm_debugfs_mqds(struct seq_file *m, void *data); 1191 int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data); 1192 int dqm_debugfs_hqds(struct seq_file *m, void *data); 1193 int kfd_debugfs_rls_by_device(struct seq_file *m, void *data); 1194 int pm_debugfs_runlist(struct seq_file *m, void *data); 1195 1196 int kfd_debugfs_hang_hws(struct kfd_dev *dev); 1197 int pm_debugfs_hang_hws(struct packet_manager *pm); 1198 int dqm_debugfs_hang_hws(struct device_queue_manager *dqm); 1199 1200 #else 1201 1202 static inline void kfd_debugfs_init(void) {} 1203 static inline void kfd_debugfs_fini(void) {} 1204 1205 #endif 1206 1207 #endif 1208