1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 #ifndef KFD_PRIV_H_INCLUDED 24 #define KFD_PRIV_H_INCLUDED 25 26 #include <linux/hashtable.h> 27 #include <linux/mmu_notifier.h> 28 #include <linux/mutex.h> 29 #include <linux/types.h> 30 #include <linux/atomic.h> 31 #include <linux/workqueue.h> 32 #include <linux/spinlock.h> 33 #include <linux/kfd_ioctl.h> 34 #include <linux/idr.h> 35 #include <linux/kfifo.h> 36 #include <linux/seq_file.h> 37 #include <linux/kref.h> 38 #include <linux/sysfs.h> 39 #include <linux/device_cgroup.h> 40 #include <drm/drm_file.h> 41 #include <drm/drm_drv.h> 42 #include <drm/drm_device.h> 43 #include <drm/drm_ioctl.h> 44 #include <kgd_kfd_interface.h> 45 #include <linux/swap.h> 46 47 #include "amd_shared.h" 48 49 #define KFD_MAX_RING_ENTRY_SIZE 8 50 51 #define KFD_SYSFS_FILE_MODE 0444 52 53 /* GPU ID hash width in bits */ 54 #define KFD_GPU_ID_HASH_WIDTH 16 55 56 /* Use upper bits of mmap offset to store KFD driver specific information. 57 * BITS[63:62] - Encode MMAP type 58 * BITS[61:46] - Encode gpu_id. To identify to which GPU the offset belongs to 59 * BITS[45:0] - MMAP offset value 60 * 61 * NOTE: struct vm_area_struct.vm_pgoff uses offset in pages. Hence, these 62 * defines are w.r.t to PAGE_SIZE 63 */ 64 #define KFD_MMAP_TYPE_SHIFT 62 65 #define KFD_MMAP_TYPE_MASK (0x3ULL << KFD_MMAP_TYPE_SHIFT) 66 #define KFD_MMAP_TYPE_DOORBELL (0x3ULL << KFD_MMAP_TYPE_SHIFT) 67 #define KFD_MMAP_TYPE_EVENTS (0x2ULL << KFD_MMAP_TYPE_SHIFT) 68 #define KFD_MMAP_TYPE_RESERVED_MEM (0x1ULL << KFD_MMAP_TYPE_SHIFT) 69 #define KFD_MMAP_TYPE_MMIO (0x0ULL << KFD_MMAP_TYPE_SHIFT) 70 71 #define KFD_MMAP_GPU_ID_SHIFT 46 72 #define KFD_MMAP_GPU_ID_MASK (((1ULL << KFD_GPU_ID_HASH_WIDTH) - 1) \ 73 << KFD_MMAP_GPU_ID_SHIFT) 74 #define KFD_MMAP_GPU_ID(gpu_id) ((((uint64_t)gpu_id) << KFD_MMAP_GPU_ID_SHIFT)\ 75 & KFD_MMAP_GPU_ID_MASK) 76 #define KFD_MMAP_GET_GPU_ID(offset) ((offset & KFD_MMAP_GPU_ID_MASK) \ 77 >> KFD_MMAP_GPU_ID_SHIFT) 78 79 /* 80 * When working with cp scheduler we should assign the HIQ manually or via 81 * the amdgpu driver to a fixed hqd slot, here are the fixed HIQ hqd slot 82 * definitions for Kaveri. In Kaveri only the first ME queues participates 83 * in the cp scheduling taking that in mind we set the HIQ slot in the 84 * second ME. 85 */ 86 #define KFD_CIK_HIQ_PIPE 4 87 #define KFD_CIK_HIQ_QUEUE 0 88 89 /* Macro for allocating structures */ 90 #define kfd_alloc_struct(ptr_to_struct) \ 91 ((typeof(ptr_to_struct)) kzalloc(sizeof(*ptr_to_struct), GFP_KERNEL)) 92 93 #define KFD_MAX_NUM_OF_PROCESSES 512 94 #define KFD_MAX_NUM_OF_QUEUES_PER_PROCESS 1024 95 96 /* 97 * Size of the per-process TBA+TMA buffer: 2 pages 98 * 99 * The first page is the TBA used for the CWSR ISA code. The second 100 * page is used as TMA for daisy changing a user-mode trap handler. 101 */ 102 #define KFD_CWSR_TBA_TMA_SIZE (PAGE_SIZE * 2) 103 #define KFD_CWSR_TMA_OFFSET PAGE_SIZE 104 105 #define KFD_MAX_NUM_OF_QUEUES_PER_DEVICE \ 106 (KFD_MAX_NUM_OF_PROCESSES * \ 107 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) 108 109 #define KFD_KERNEL_QUEUE_SIZE 2048 110 111 #define KFD_UNMAP_LATENCY_MS (4000) 112 113 /* 114 * 512 = 0x200 115 * The doorbell index distance between SDMA RLC (2*i) and (2*i+1) in the 116 * same SDMA engine on SOC15, which has 8-byte doorbells for SDMA. 117 * 512 8-byte doorbell distance (i.e. one page away) ensures that SDMA RLC 118 * (2*i+1) doorbells (in terms of the lower 12 bit address) lie exactly in 119 * the OFFSET and SIZE set in registers like BIF_SDMA0_DOORBELL_RANGE. 120 */ 121 #define KFD_QUEUE_DOORBELL_MIRROR_OFFSET 512 122 123 124 /* 125 * Kernel module parameter to specify maximum number of supported queues per 126 * device 127 */ 128 extern int max_num_of_queues_per_device; 129 130 131 /* Kernel module parameter to specify the scheduling policy */ 132 extern int sched_policy; 133 134 /* 135 * Kernel module parameter to specify the maximum process 136 * number per HW scheduler 137 */ 138 extern int hws_max_conc_proc; 139 140 extern int cwsr_enable; 141 142 /* 143 * Kernel module parameter to specify whether to send sigterm to HSA process on 144 * unhandled exception 145 */ 146 extern int send_sigterm; 147 148 /* 149 * This kernel module is used to simulate large bar machine on non-large bar 150 * enabled machines. 151 */ 152 extern int debug_largebar; 153 154 /* 155 * Ignore CRAT table during KFD initialization, can be used to work around 156 * broken CRAT tables on some AMD systems 157 */ 158 extern int ignore_crat; 159 160 /* 161 * Set sh_mem_config.retry_disable on Vega10 162 */ 163 extern int amdgpu_noretry; 164 165 /* 166 * Halt if HWS hang is detected 167 */ 168 extern int halt_if_hws_hang; 169 170 /* 171 * Whether MEC FW support GWS barriers 172 */ 173 extern bool hws_gws_support; 174 175 /* 176 * Queue preemption timeout in ms 177 */ 178 extern int queue_preemption_timeout_ms; 179 180 enum cache_policy { 181 cache_policy_coherent, 182 cache_policy_noncoherent 183 }; 184 185 #define KFD_IS_SOC15(chip) ((chip) >= CHIP_VEGA10) 186 187 struct kfd_event_interrupt_class { 188 bool (*interrupt_isr)(struct kfd_dev *dev, 189 const uint32_t *ih_ring_entry, uint32_t *patched_ihre, 190 bool *patched_flag); 191 void (*interrupt_wq)(struct kfd_dev *dev, 192 const uint32_t *ih_ring_entry); 193 }; 194 195 struct kfd_device_info { 196 enum amd_asic_type asic_family; 197 const char *asic_name; 198 const struct kfd_event_interrupt_class *event_interrupt_class; 199 unsigned int max_pasid_bits; 200 unsigned int max_no_of_hqd; 201 unsigned int doorbell_size; 202 size_t ih_ring_entry_size; 203 uint8_t num_of_watch_points; 204 uint16_t mqd_size_aligned; 205 bool supports_cwsr; 206 bool needs_iommu_device; 207 bool needs_pci_atomics; 208 unsigned int num_sdma_engines; 209 unsigned int num_xgmi_sdma_engines; 210 unsigned int num_sdma_queues_per_engine; 211 }; 212 213 struct kfd_mem_obj { 214 uint32_t range_start; 215 uint32_t range_end; 216 uint64_t gpu_addr; 217 uint32_t *cpu_ptr; 218 void *gtt_mem; 219 }; 220 221 struct kfd_vmid_info { 222 uint32_t first_vmid_kfd; 223 uint32_t last_vmid_kfd; 224 uint32_t vmid_num_kfd; 225 }; 226 227 struct kfd_dev { 228 struct kgd_dev *kgd; 229 230 const struct kfd_device_info *device_info; 231 struct pci_dev *pdev; 232 struct drm_device *ddev; 233 234 unsigned int id; /* topology stub index */ 235 236 phys_addr_t doorbell_base; /* Start of actual doorbells used by 237 * KFD. It is aligned for mapping 238 * into user mode 239 */ 240 size_t doorbell_base_dw_offset; /* Offset from the start of the PCI 241 * doorbell BAR to the first KFD 242 * doorbell in dwords. GFX reserves 243 * the segment before this offset. 244 */ 245 u32 __iomem *doorbell_kernel_ptr; /* This is a pointer for a doorbells 246 * page used by kernel queue 247 */ 248 249 struct kgd2kfd_shared_resources shared_resources; 250 struct kfd_vmid_info vm_info; 251 252 const struct kfd2kgd_calls *kfd2kgd; 253 struct mutex doorbell_mutex; 254 DECLARE_BITMAP(doorbell_available_index, 255 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS); 256 257 void *gtt_mem; 258 uint64_t gtt_start_gpu_addr; 259 void *gtt_start_cpu_ptr; 260 void *gtt_sa_bitmap; 261 struct mutex gtt_sa_lock; 262 unsigned int gtt_sa_chunk_size; 263 unsigned int gtt_sa_num_of_chunks; 264 265 /* Interrupts */ 266 struct kfifo ih_fifo; 267 struct workqueue_struct *ih_wq; 268 struct work_struct interrupt_work; 269 spinlock_t interrupt_lock; 270 271 /* QCM Device instance */ 272 struct device_queue_manager *dqm; 273 274 bool init_complete; 275 /* 276 * Interrupts of interest to KFD are copied 277 * from the HW ring into a SW ring. 278 */ 279 bool interrupts_active; 280 281 /* Debug manager */ 282 struct kfd_dbgmgr *dbgmgr; 283 284 /* Firmware versions */ 285 uint16_t mec_fw_version; 286 uint16_t mec2_fw_version; 287 uint16_t sdma_fw_version; 288 289 /* Maximum process number mapped to HW scheduler */ 290 unsigned int max_proc_per_quantum; 291 292 /* CWSR */ 293 bool cwsr_enabled; 294 const void *cwsr_isa; 295 unsigned int cwsr_isa_size; 296 297 /* xGMI */ 298 uint64_t hive_id; 299 300 /* UUID */ 301 uint64_t unique_id; 302 303 bool pci_atomic_requested; 304 305 /* SRAM ECC flag */ 306 atomic_t sram_ecc_flag; 307 308 /* Compute Profile ref. count */ 309 atomic_t compute_profile; 310 311 /* Global GWS resource shared b/t processes*/ 312 void *gws; 313 }; 314 315 enum kfd_mempool { 316 KFD_MEMPOOL_SYSTEM_CACHEABLE = 1, 317 KFD_MEMPOOL_SYSTEM_WRITECOMBINE = 2, 318 KFD_MEMPOOL_FRAMEBUFFER = 3, 319 }; 320 321 /* Character device interface */ 322 int kfd_chardev_init(void); 323 void kfd_chardev_exit(void); 324 struct device *kfd_chardev(void); 325 326 /** 327 * enum kfd_unmap_queues_filter 328 * 329 * @KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE: Preempts single queue. 330 * 331 * @KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES: Preempts all queues in the 332 * running queues list. 333 * 334 * @KFD_UNMAP_QUEUES_FILTER_BY_PASID: Preempts queues that belongs to 335 * specific process. 336 * 337 */ 338 enum kfd_unmap_queues_filter { 339 KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE, 340 KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 341 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 342 KFD_UNMAP_QUEUES_FILTER_BY_PASID 343 }; 344 345 /** 346 * enum kfd_queue_type 347 * 348 * @KFD_QUEUE_TYPE_COMPUTE: Regular user mode queue type. 349 * 350 * @KFD_QUEUE_TYPE_SDMA: Sdma user mode queue type. 351 * 352 * @KFD_QUEUE_TYPE_HIQ: HIQ queue type. 353 * 354 * @KFD_QUEUE_TYPE_DIQ: DIQ queue type. 355 */ 356 enum kfd_queue_type { 357 KFD_QUEUE_TYPE_COMPUTE, 358 KFD_QUEUE_TYPE_SDMA, 359 KFD_QUEUE_TYPE_HIQ, 360 KFD_QUEUE_TYPE_DIQ, 361 KFD_QUEUE_TYPE_SDMA_XGMI 362 }; 363 364 enum kfd_queue_format { 365 KFD_QUEUE_FORMAT_PM4, 366 KFD_QUEUE_FORMAT_AQL 367 }; 368 369 enum KFD_QUEUE_PRIORITY { 370 KFD_QUEUE_PRIORITY_MINIMUM = 0, 371 KFD_QUEUE_PRIORITY_MAXIMUM = 15 372 }; 373 374 /** 375 * struct queue_properties 376 * 377 * @type: The queue type. 378 * 379 * @queue_id: Queue identifier. 380 * 381 * @queue_address: Queue ring buffer address. 382 * 383 * @queue_size: Queue ring buffer size. 384 * 385 * @priority: Defines the queue priority relative to other queues in the 386 * process. 387 * This is just an indication and HW scheduling may override the priority as 388 * necessary while keeping the relative prioritization. 389 * the priority granularity is from 0 to f which f is the highest priority. 390 * currently all queues are initialized with the highest priority. 391 * 392 * @queue_percent: This field is partially implemented and currently a zero in 393 * this field defines that the queue is non active. 394 * 395 * @read_ptr: User space address which points to the number of dwords the 396 * cp read from the ring buffer. This field updates automatically by the H/W. 397 * 398 * @write_ptr: Defines the number of dwords written to the ring buffer. 399 * 400 * @doorbell_ptr: This field aim is to notify the H/W of new packet written to 401 * the queue ring buffer. This field should be similar to write_ptr and the 402 * user should update this field after he updated the write_ptr. 403 * 404 * @doorbell_off: The doorbell offset in the doorbell pci-bar. 405 * 406 * @is_interop: Defines if this is a interop queue. Interop queue means that 407 * the queue can access both graphics and compute resources. 408 * 409 * @is_evicted: Defines if the queue is evicted. Only active queues 410 * are evicted, rendering them inactive. 411 * 412 * @is_active: Defines if the queue is active or not. @is_active and 413 * @is_evicted are protected by the DQM lock. 414 * 415 * @is_gws: Defines if the queue has been updated to be GWS-capable or not. 416 * @is_gws should be protected by the DQM lock, since changing it can yield the 417 * possibility of updating DQM state on number of GWS queues. 418 * 419 * @vmid: If the scheduling mode is no cp scheduling the field defines the vmid 420 * of the queue. 421 * 422 * This structure represents the queue properties for each queue no matter if 423 * it's user mode or kernel mode queue. 424 * 425 */ 426 struct queue_properties { 427 enum kfd_queue_type type; 428 enum kfd_queue_format format; 429 unsigned int queue_id; 430 uint64_t queue_address; 431 uint64_t queue_size; 432 uint32_t priority; 433 uint32_t queue_percent; 434 uint32_t *read_ptr; 435 uint32_t *write_ptr; 436 void __iomem *doorbell_ptr; 437 uint32_t doorbell_off; 438 bool is_interop; 439 bool is_evicted; 440 bool is_active; 441 bool is_gws; 442 /* Not relevant for user mode queues in cp scheduling */ 443 unsigned int vmid; 444 /* Relevant only for sdma queues*/ 445 uint32_t sdma_engine_id; 446 uint32_t sdma_queue_id; 447 uint32_t sdma_vm_addr; 448 /* Relevant only for VI */ 449 uint64_t eop_ring_buffer_address; 450 uint32_t eop_ring_buffer_size; 451 uint64_t ctx_save_restore_area_address; 452 uint32_t ctx_save_restore_area_size; 453 uint32_t ctl_stack_size; 454 uint64_t tba_addr; 455 uint64_t tma_addr; 456 /* Relevant for CU */ 457 uint32_t cu_mask_count; /* Must be a multiple of 32 */ 458 uint32_t *cu_mask; 459 }; 460 461 #define QUEUE_IS_ACTIVE(q) ((q).queue_size > 0 && \ 462 (q).queue_address != 0 && \ 463 (q).queue_percent > 0 && \ 464 !(q).is_evicted) 465 466 /** 467 * struct queue 468 * 469 * @list: Queue linked list. 470 * 471 * @mqd: The queue MQD. 472 * 473 * @mqd_mem_obj: The MQD local gpu memory object. 474 * 475 * @gart_mqd_addr: The MQD gart mc address. 476 * 477 * @properties: The queue properties. 478 * 479 * @mec: Used only in no cp scheduling mode and identifies to micro engine id 480 * that the queue should be execute on. 481 * 482 * @pipe: Used only in no cp scheduling mode and identifies the queue's pipe 483 * id. 484 * 485 * @queue: Used only in no cp scheduliong mode and identifies the queue's slot. 486 * 487 * @process: The kfd process that created this queue. 488 * 489 * @device: The kfd device that created this queue. 490 * 491 * @gws: Pointing to gws kgd_mem if this is a gws control queue; NULL 492 * otherwise. 493 * 494 * This structure represents user mode compute queues. 495 * It contains all the necessary data to handle such queues. 496 * 497 */ 498 499 struct queue { 500 struct list_head list; 501 void *mqd; 502 struct kfd_mem_obj *mqd_mem_obj; 503 uint64_t gart_mqd_addr; 504 struct queue_properties properties; 505 506 uint32_t mec; 507 uint32_t pipe; 508 uint32_t queue; 509 510 unsigned int sdma_id; 511 unsigned int doorbell_id; 512 513 struct kfd_process *process; 514 struct kfd_dev *device; 515 void *gws; 516 517 /* procfs */ 518 struct kobject kobj; 519 }; 520 521 /* 522 * Please read the kfd_mqd_manager.h description. 523 */ 524 enum KFD_MQD_TYPE { 525 KFD_MQD_TYPE_HIQ = 0, /* for hiq */ 526 KFD_MQD_TYPE_CP, /* for cp queues and diq */ 527 KFD_MQD_TYPE_SDMA, /* for sdma queues */ 528 KFD_MQD_TYPE_DIQ, /* for diq */ 529 KFD_MQD_TYPE_MAX 530 }; 531 532 enum KFD_PIPE_PRIORITY { 533 KFD_PIPE_PRIORITY_CS_LOW = 0, 534 KFD_PIPE_PRIORITY_CS_MEDIUM, 535 KFD_PIPE_PRIORITY_CS_HIGH 536 }; 537 538 struct scheduling_resources { 539 unsigned int vmid_mask; 540 enum kfd_queue_type type; 541 uint64_t queue_mask; 542 uint64_t gws_mask; 543 uint32_t oac_mask; 544 uint32_t gds_heap_base; 545 uint32_t gds_heap_size; 546 }; 547 548 struct process_queue_manager { 549 /* data */ 550 struct kfd_process *process; 551 struct list_head queues; 552 unsigned long *queue_slot_bitmap; 553 }; 554 555 struct qcm_process_device { 556 /* The Device Queue Manager that owns this data */ 557 struct device_queue_manager *dqm; 558 struct process_queue_manager *pqm; 559 /* Queues list */ 560 struct list_head queues_list; 561 struct list_head priv_queue_list; 562 563 unsigned int queue_count; 564 unsigned int vmid; 565 bool is_debug; 566 unsigned int evicted; /* eviction counter, 0=active */ 567 568 /* This flag tells if we should reset all wavefronts on 569 * process termination 570 */ 571 bool reset_wavefronts; 572 573 /* This flag tells us if this process has a GWS-capable 574 * queue that will be mapped into the runlist. It's 575 * possible to request a GWS BO, but not have the queue 576 * currently mapped, and this changes how the MAP_PROCESS 577 * PM4 packet is configured. 578 */ 579 bool mapped_gws_queue; 580 581 /* 582 * All the memory management data should be here too 583 */ 584 uint64_t gds_context_area; 585 /* Contains page table flags such as AMDGPU_PTE_VALID since gfx9 */ 586 uint64_t page_table_base; 587 uint32_t sh_mem_config; 588 uint32_t sh_mem_bases; 589 uint32_t sh_mem_ape1_base; 590 uint32_t sh_mem_ape1_limit; 591 uint32_t gds_size; 592 uint32_t num_gws; 593 uint32_t num_oac; 594 uint32_t sh_hidden_private_base; 595 596 /* CWSR memory */ 597 void *cwsr_kaddr; 598 uint64_t cwsr_base; 599 uint64_t tba_addr; 600 uint64_t tma_addr; 601 602 /* IB memory */ 603 uint64_t ib_base; 604 void *ib_kaddr; 605 606 /* doorbell resources per process per device */ 607 unsigned long *doorbell_bitmap; 608 }; 609 610 /* KFD Memory Eviction */ 611 612 /* Approx. wait time before attempting to restore evicted BOs */ 613 #define PROCESS_RESTORE_TIME_MS 100 614 /* Approx. back off time if restore fails due to lack of memory */ 615 #define PROCESS_BACK_OFF_TIME_MS 100 616 /* Approx. time before evicting the process again */ 617 #define PROCESS_ACTIVE_TIME_MS 10 618 619 /* 8 byte handle containing GPU ID in the most significant 4 bytes and 620 * idr_handle in the least significant 4 bytes 621 */ 622 #define MAKE_HANDLE(gpu_id, idr_handle) \ 623 (((uint64_t)(gpu_id) << 32) + idr_handle) 624 #define GET_GPU_ID(handle) (handle >> 32) 625 #define GET_IDR_HANDLE(handle) (handle & 0xFFFFFFFF) 626 627 enum kfd_pdd_bound { 628 PDD_UNBOUND = 0, 629 PDD_BOUND, 630 PDD_BOUND_SUSPENDED, 631 }; 632 633 #define MAX_VRAM_FILENAME_LEN 11 634 635 /* Data that is per-process-per device. */ 636 struct kfd_process_device { 637 /* 638 * List of all per-device data for a process. 639 * Starts from kfd_process.per_device_data. 640 */ 641 struct list_head per_device_list; 642 643 /* The device that owns this data. */ 644 struct kfd_dev *dev; 645 646 /* The process that owns this kfd_process_device. */ 647 struct kfd_process *process; 648 649 /* per-process-per device QCM data structure */ 650 struct qcm_process_device qpd; 651 652 /*Apertures*/ 653 uint64_t lds_base; 654 uint64_t lds_limit; 655 uint64_t gpuvm_base; 656 uint64_t gpuvm_limit; 657 uint64_t scratch_base; 658 uint64_t scratch_limit; 659 660 /* VM context for GPUVM allocations */ 661 struct file *drm_file; 662 void *vm; 663 664 /* GPUVM allocations storage */ 665 struct idr alloc_idr; 666 667 /* Flag used to tell the pdd has dequeued from the dqm. 668 * This is used to prevent dev->dqm->ops.process_termination() from 669 * being called twice when it is already called in IOMMU callback 670 * function. 671 */ 672 bool already_dequeued; 673 bool runtime_inuse; 674 675 /* Is this process/pasid bound to this device? (amd_iommu_bind_pasid) */ 676 enum kfd_pdd_bound bound; 677 678 /* VRAM usage */ 679 uint64_t vram_usage; 680 struct attribute attr_vram; 681 char vram_filename[MAX_VRAM_FILENAME_LEN]; 682 }; 683 684 #define qpd_to_pdd(x) container_of(x, struct kfd_process_device, qpd) 685 686 /* Process data */ 687 struct kfd_process { 688 /* 689 * kfd_process are stored in an mm_struct*->kfd_process* 690 * hash table (kfd_processes in kfd_process.c) 691 */ 692 struct hlist_node kfd_processes; 693 694 /* 695 * Opaque pointer to mm_struct. We don't hold a reference to 696 * it so it should never be dereferenced from here. This is 697 * only used for looking up processes by their mm. 698 */ 699 void *mm; 700 701 struct kref ref; 702 struct work_struct release_work; 703 704 struct mutex mutex; 705 706 /* 707 * In any process, the thread that started main() is the lead 708 * thread and outlives the rest. 709 * It is here because amd_iommu_bind_pasid wants a task_struct. 710 * It can also be used for safely getting a reference to the 711 * mm_struct of the process. 712 */ 713 struct task_struct *lead_thread; 714 715 /* We want to receive a notification when the mm_struct is destroyed */ 716 struct mmu_notifier mmu_notifier; 717 718 uint16_t pasid; 719 unsigned int doorbell_index; 720 721 /* 722 * List of kfd_process_device structures, 723 * one for each device the process is using. 724 */ 725 struct list_head per_device_data; 726 727 struct process_queue_manager pqm; 728 729 /*Is the user space process 32 bit?*/ 730 bool is_32bit_user_mode; 731 732 /* Event-related data */ 733 struct mutex event_mutex; 734 /* Event ID allocator and lookup */ 735 struct idr event_idr; 736 /* Event page */ 737 struct kfd_signal_page *signal_page; 738 size_t signal_mapped_size; 739 size_t signal_event_count; 740 bool signal_event_limit_reached; 741 742 /* Information used for memory eviction */ 743 void *kgd_process_info; 744 /* Eviction fence that is attached to all the BOs of this process. The 745 * fence will be triggered during eviction and new one will be created 746 * during restore 747 */ 748 struct dma_fence *ef; 749 750 /* Work items for evicting and restoring BOs */ 751 struct delayed_work eviction_work; 752 struct delayed_work restore_work; 753 /* seqno of the last scheduled eviction */ 754 unsigned int last_eviction_seqno; 755 /* Approx. the last timestamp (in jiffies) when the process was 756 * restored after an eviction 757 */ 758 unsigned long last_restore_timestamp; 759 760 /* Kobj for our procfs */ 761 struct kobject *kobj; 762 struct kobject *kobj_queues; 763 struct attribute attr_pasid; 764 }; 765 766 #define KFD_PROCESS_TABLE_SIZE 5 /* bits: 32 entries */ 767 extern DECLARE_HASHTABLE(kfd_processes_table, KFD_PROCESS_TABLE_SIZE); 768 extern struct srcu_struct kfd_processes_srcu; 769 770 /** 771 * Ioctl function type. 772 * 773 * \param filep pointer to file structure. 774 * \param p amdkfd process pointer. 775 * \param data pointer to arg that was copied from user. 776 */ 777 typedef int amdkfd_ioctl_t(struct file *filep, struct kfd_process *p, 778 void *data); 779 780 struct amdkfd_ioctl_desc { 781 unsigned int cmd; 782 int flags; 783 amdkfd_ioctl_t *func; 784 unsigned int cmd_drv; 785 const char *name; 786 }; 787 bool kfd_dev_is_large_bar(struct kfd_dev *dev); 788 789 int kfd_process_create_wq(void); 790 void kfd_process_destroy_wq(void); 791 struct kfd_process *kfd_create_process(struct file *filep); 792 struct kfd_process *kfd_get_process(const struct task_struct *); 793 struct kfd_process *kfd_lookup_process_by_pasid(unsigned int pasid); 794 struct kfd_process *kfd_lookup_process_by_mm(const struct mm_struct *mm); 795 void kfd_unref_process(struct kfd_process *p); 796 int kfd_process_evict_queues(struct kfd_process *p); 797 int kfd_process_restore_queues(struct kfd_process *p); 798 void kfd_suspend_all_processes(void); 799 int kfd_resume_all_processes(void); 800 801 int kfd_process_device_init_vm(struct kfd_process_device *pdd, 802 struct file *drm_file); 803 struct kfd_process_device *kfd_bind_process_to_device(struct kfd_dev *dev, 804 struct kfd_process *p); 805 struct kfd_process_device *kfd_get_process_device_data(struct kfd_dev *dev, 806 struct kfd_process *p); 807 struct kfd_process_device *kfd_create_process_device_data(struct kfd_dev *dev, 808 struct kfd_process *p); 809 810 int kfd_reserved_mem_mmap(struct kfd_dev *dev, struct kfd_process *process, 811 struct vm_area_struct *vma); 812 813 /* KFD process API for creating and translating handles */ 814 int kfd_process_device_create_obj_handle(struct kfd_process_device *pdd, 815 void *mem); 816 void *kfd_process_device_translate_handle(struct kfd_process_device *p, 817 int handle); 818 void kfd_process_device_remove_obj_handle(struct kfd_process_device *pdd, 819 int handle); 820 821 /* Process device data iterator */ 822 struct kfd_process_device *kfd_get_first_process_device_data( 823 struct kfd_process *p); 824 struct kfd_process_device *kfd_get_next_process_device_data( 825 struct kfd_process *p, 826 struct kfd_process_device *pdd); 827 bool kfd_has_process_device_data(struct kfd_process *p); 828 829 /* PASIDs */ 830 int kfd_pasid_init(void); 831 void kfd_pasid_exit(void); 832 bool kfd_set_pasid_limit(unsigned int new_limit); 833 unsigned int kfd_get_pasid_limit(void); 834 unsigned int kfd_pasid_alloc(void); 835 void kfd_pasid_free(unsigned int pasid); 836 837 /* Doorbells */ 838 size_t kfd_doorbell_process_slice(struct kfd_dev *kfd); 839 int kfd_doorbell_init(struct kfd_dev *kfd); 840 void kfd_doorbell_fini(struct kfd_dev *kfd); 841 int kfd_doorbell_mmap(struct kfd_dev *dev, struct kfd_process *process, 842 struct vm_area_struct *vma); 843 void __iomem *kfd_get_kernel_doorbell(struct kfd_dev *kfd, 844 unsigned int *doorbell_off); 845 void kfd_release_kernel_doorbell(struct kfd_dev *kfd, u32 __iomem *db_addr); 846 u32 read_kernel_doorbell(u32 __iomem *db); 847 void write_kernel_doorbell(void __iomem *db, u32 value); 848 void write_kernel_doorbell64(void __iomem *db, u64 value); 849 unsigned int kfd_get_doorbell_dw_offset_in_bar(struct kfd_dev *kfd, 850 struct kfd_process *process, 851 unsigned int doorbell_id); 852 phys_addr_t kfd_get_process_doorbells(struct kfd_dev *dev, 853 struct kfd_process *process); 854 int kfd_alloc_process_doorbells(struct kfd_process *process); 855 void kfd_free_process_doorbells(struct kfd_process *process); 856 857 /* GTT Sub-Allocator */ 858 859 int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size, 860 struct kfd_mem_obj **mem_obj); 861 862 int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj); 863 864 extern struct device *kfd_device; 865 866 /* KFD's procfs */ 867 void kfd_procfs_init(void); 868 void kfd_procfs_shutdown(void); 869 int kfd_procfs_add_queue(struct queue *q); 870 void kfd_procfs_del_queue(struct queue *q); 871 872 /* Topology */ 873 int kfd_topology_init(void); 874 void kfd_topology_shutdown(void); 875 int kfd_topology_add_device(struct kfd_dev *gpu); 876 int kfd_topology_remove_device(struct kfd_dev *gpu); 877 struct kfd_topology_device *kfd_topology_device_by_proximity_domain( 878 uint32_t proximity_domain); 879 struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id); 880 struct kfd_dev *kfd_device_by_id(uint32_t gpu_id); 881 struct kfd_dev *kfd_device_by_pci_dev(const struct pci_dev *pdev); 882 struct kfd_dev *kfd_device_by_kgd(const struct kgd_dev *kgd); 883 int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_dev **kdev); 884 int kfd_numa_node_to_apic_id(int numa_node_id); 885 886 /* Interrupts */ 887 int kfd_interrupt_init(struct kfd_dev *dev); 888 void kfd_interrupt_exit(struct kfd_dev *dev); 889 bool enqueue_ih_ring_entry(struct kfd_dev *kfd, const void *ih_ring_entry); 890 bool interrupt_is_wanted(struct kfd_dev *dev, 891 const uint32_t *ih_ring_entry, 892 uint32_t *patched_ihre, bool *flag); 893 894 /* amdkfd Apertures */ 895 int kfd_init_apertures(struct kfd_process *process); 896 897 /* Queue Context Management */ 898 int init_queue(struct queue **q, const struct queue_properties *properties); 899 void uninit_queue(struct queue *q); 900 void print_queue_properties(struct queue_properties *q); 901 void print_queue(struct queue *q); 902 903 struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type, 904 struct kfd_dev *dev); 905 struct mqd_manager *mqd_manager_init_cik_hawaii(enum KFD_MQD_TYPE type, 906 struct kfd_dev *dev); 907 struct mqd_manager *mqd_manager_init_vi(enum KFD_MQD_TYPE type, 908 struct kfd_dev *dev); 909 struct mqd_manager *mqd_manager_init_vi_tonga(enum KFD_MQD_TYPE type, 910 struct kfd_dev *dev); 911 struct mqd_manager *mqd_manager_init_v9(enum KFD_MQD_TYPE type, 912 struct kfd_dev *dev); 913 struct mqd_manager *mqd_manager_init_v10(enum KFD_MQD_TYPE type, 914 struct kfd_dev *dev); 915 struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev); 916 void device_queue_manager_uninit(struct device_queue_manager *dqm); 917 struct kernel_queue *kernel_queue_init(struct kfd_dev *dev, 918 enum kfd_queue_type type); 919 void kernel_queue_uninit(struct kernel_queue *kq, bool hanging); 920 int kfd_process_vm_fault(struct device_queue_manager *dqm, unsigned int pasid); 921 922 /* Process Queue Manager */ 923 struct process_queue_node { 924 struct queue *q; 925 struct kernel_queue *kq; 926 struct list_head process_queue_list; 927 }; 928 929 void kfd_process_dequeue_from_device(struct kfd_process_device *pdd); 930 void kfd_process_dequeue_from_all_devices(struct kfd_process *p); 931 int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p); 932 void pqm_uninit(struct process_queue_manager *pqm); 933 int pqm_create_queue(struct process_queue_manager *pqm, 934 struct kfd_dev *dev, 935 struct file *f, 936 struct queue_properties *properties, 937 unsigned int *qid, 938 uint32_t *p_doorbell_offset_in_process); 939 int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid); 940 int pqm_update_queue(struct process_queue_manager *pqm, unsigned int qid, 941 struct queue_properties *p); 942 int pqm_set_cu_mask(struct process_queue_manager *pqm, unsigned int qid, 943 struct queue_properties *p); 944 int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid, 945 void *gws); 946 struct kernel_queue *pqm_get_kernel_queue(struct process_queue_manager *pqm, 947 unsigned int qid); 948 struct queue *pqm_get_user_queue(struct process_queue_manager *pqm, 949 unsigned int qid); 950 int pqm_get_wave_state(struct process_queue_manager *pqm, 951 unsigned int qid, 952 void __user *ctl_stack, 953 u32 *ctl_stack_used_size, 954 u32 *save_area_used_size); 955 956 int amdkfd_fence_wait_timeout(unsigned int *fence_addr, 957 unsigned int fence_value, 958 unsigned int timeout_ms); 959 960 /* Packet Manager */ 961 962 #define KFD_FENCE_COMPLETED (100) 963 #define KFD_FENCE_INIT (10) 964 965 struct packet_manager { 966 struct device_queue_manager *dqm; 967 struct kernel_queue *priv_queue; 968 struct mutex lock; 969 bool allocated; 970 struct kfd_mem_obj *ib_buffer_obj; 971 unsigned int ib_size_bytes; 972 bool is_over_subscription; 973 974 const struct packet_manager_funcs *pmf; 975 }; 976 977 struct packet_manager_funcs { 978 /* Support ASIC-specific packet formats for PM4 packets */ 979 int (*map_process)(struct packet_manager *pm, uint32_t *buffer, 980 struct qcm_process_device *qpd); 981 int (*runlist)(struct packet_manager *pm, uint32_t *buffer, 982 uint64_t ib, size_t ib_size_in_dwords, bool chain); 983 int (*set_resources)(struct packet_manager *pm, uint32_t *buffer, 984 struct scheduling_resources *res); 985 int (*map_queues)(struct packet_manager *pm, uint32_t *buffer, 986 struct queue *q, bool is_static); 987 int (*unmap_queues)(struct packet_manager *pm, uint32_t *buffer, 988 enum kfd_queue_type type, 989 enum kfd_unmap_queues_filter mode, 990 uint32_t filter_param, bool reset, 991 unsigned int sdma_engine); 992 int (*query_status)(struct packet_manager *pm, uint32_t *buffer, 993 uint64_t fence_address, uint32_t fence_value); 994 int (*release_mem)(uint64_t gpu_addr, uint32_t *buffer); 995 996 /* Packet sizes */ 997 int map_process_size; 998 int runlist_size; 999 int set_resources_size; 1000 int map_queues_size; 1001 int unmap_queues_size; 1002 int query_status_size; 1003 int release_mem_size; 1004 }; 1005 1006 extern const struct packet_manager_funcs kfd_vi_pm_funcs; 1007 extern const struct packet_manager_funcs kfd_v9_pm_funcs; 1008 1009 int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm); 1010 void pm_uninit(struct packet_manager *pm, bool hanging); 1011 int pm_send_set_resources(struct packet_manager *pm, 1012 struct scheduling_resources *res); 1013 int pm_send_runlist(struct packet_manager *pm, struct list_head *dqm_queues); 1014 int pm_send_query_status(struct packet_manager *pm, uint64_t fence_address, 1015 uint32_t fence_value); 1016 1017 int pm_send_unmap_queue(struct packet_manager *pm, enum kfd_queue_type type, 1018 enum kfd_unmap_queues_filter mode, 1019 uint32_t filter_param, bool reset, 1020 unsigned int sdma_engine); 1021 1022 void pm_release_ib(struct packet_manager *pm); 1023 1024 /* Following PM funcs can be shared among VI and AI */ 1025 unsigned int pm_build_pm4_header(unsigned int opcode, size_t packet_size); 1026 1027 uint64_t kfd_get_number_elems(struct kfd_dev *kfd); 1028 1029 /* Events */ 1030 extern const struct kfd_event_interrupt_class event_interrupt_class_cik; 1031 extern const struct kfd_event_interrupt_class event_interrupt_class_v9; 1032 1033 extern const struct kfd_device_global_init_class device_global_init_class_cik; 1034 1035 void kfd_event_init_process(struct kfd_process *p); 1036 void kfd_event_free_process(struct kfd_process *p); 1037 int kfd_event_mmap(struct kfd_process *process, struct vm_area_struct *vma); 1038 int kfd_wait_on_events(struct kfd_process *p, 1039 uint32_t num_events, void __user *data, 1040 bool all, uint32_t user_timeout_ms, 1041 uint32_t *wait_result); 1042 void kfd_signal_event_interrupt(unsigned int pasid, uint32_t partial_id, 1043 uint32_t valid_id_bits); 1044 void kfd_signal_iommu_event(struct kfd_dev *dev, 1045 unsigned int pasid, unsigned long address, 1046 bool is_write_requested, bool is_execute_requested); 1047 void kfd_signal_hw_exception_event(unsigned int pasid); 1048 int kfd_set_event(struct kfd_process *p, uint32_t event_id); 1049 int kfd_reset_event(struct kfd_process *p, uint32_t event_id); 1050 int kfd_event_page_set(struct kfd_process *p, void *kernel_address, 1051 uint64_t size); 1052 int kfd_event_create(struct file *devkfd, struct kfd_process *p, 1053 uint32_t event_type, bool auto_reset, uint32_t node_id, 1054 uint32_t *event_id, uint32_t *event_trigger_data, 1055 uint64_t *event_page_offset, uint32_t *event_slot_index); 1056 int kfd_event_destroy(struct kfd_process *p, uint32_t event_id); 1057 1058 void kfd_signal_vm_fault_event(struct kfd_dev *dev, unsigned int pasid, 1059 struct kfd_vm_fault_info *info); 1060 1061 void kfd_signal_reset_event(struct kfd_dev *dev); 1062 1063 void kfd_flush_tlb(struct kfd_process_device *pdd); 1064 1065 int dbgdev_wave_reset_wavefronts(struct kfd_dev *dev, struct kfd_process *p); 1066 1067 bool kfd_is_locked(void); 1068 1069 /* Compute profile */ 1070 void kfd_inc_compute_active(struct kfd_dev *dev); 1071 void kfd_dec_compute_active(struct kfd_dev *dev); 1072 1073 /* Cgroup Support */ 1074 /* Check with device cgroup if @kfd device is accessible */ 1075 static inline int kfd_devcgroup_check_permission(struct kfd_dev *kfd) 1076 { 1077 #if defined(CONFIG_CGROUP_DEVICE) || defined(CONFIG_CGROUP_BPF) 1078 struct drm_device *ddev = kfd->ddev; 1079 1080 return devcgroup_check_permission(DEVCG_DEV_CHAR, DRM_MAJOR, 1081 ddev->render->index, 1082 DEVCG_ACC_WRITE | DEVCG_ACC_READ); 1083 #else 1084 return 0; 1085 #endif 1086 } 1087 1088 /* Debugfs */ 1089 #if defined(CONFIG_DEBUG_FS) 1090 1091 void kfd_debugfs_init(void); 1092 void kfd_debugfs_fini(void); 1093 int kfd_debugfs_mqds_by_process(struct seq_file *m, void *data); 1094 int pqm_debugfs_mqds(struct seq_file *m, void *data); 1095 int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data); 1096 int dqm_debugfs_hqds(struct seq_file *m, void *data); 1097 int kfd_debugfs_rls_by_device(struct seq_file *m, void *data); 1098 int pm_debugfs_runlist(struct seq_file *m, void *data); 1099 1100 int kfd_debugfs_hang_hws(struct kfd_dev *dev); 1101 int pm_debugfs_hang_hws(struct packet_manager *pm); 1102 int dqm_debugfs_execute_queues(struct device_queue_manager *dqm); 1103 1104 #else 1105 1106 static inline void kfd_debugfs_init(void) {} 1107 static inline void kfd_debugfs_fini(void) {} 1108 1109 #endif 1110 1111 #endif 1112