1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 #ifndef KFD_PRIV_H_INCLUDED 24 #define KFD_PRIV_H_INCLUDED 25 26 #include <linux/hashtable.h> 27 #include <linux/mmu_notifier.h> 28 #include <linux/mutex.h> 29 #include <linux/types.h> 30 #include <linux/atomic.h> 31 #include <linux/workqueue.h> 32 #include <linux/spinlock.h> 33 #include <linux/kfd_ioctl.h> 34 #include <linux/idr.h> 35 #include <linux/kfifo.h> 36 #include <linux/seq_file.h> 37 #include <linux/kref.h> 38 #include <linux/sysfs.h> 39 #include <linux/device_cgroup.h> 40 #include <drm/drm_file.h> 41 #include <drm/drm_drv.h> 42 #include <drm/drm_device.h> 43 #include <drm/drm_ioctl.h> 44 #include <kgd_kfd_interface.h> 45 #include <linux/swap.h> 46 47 #include "amd_shared.h" 48 #include "amdgpu.h" 49 50 #define KFD_MAX_RING_ENTRY_SIZE 8 51 52 #define KFD_SYSFS_FILE_MODE 0444 53 54 /* GPU ID hash width in bits */ 55 #define KFD_GPU_ID_HASH_WIDTH 16 56 57 /* Use upper bits of mmap offset to store KFD driver specific information. 58 * BITS[63:62] - Encode MMAP type 59 * BITS[61:46] - Encode gpu_id. To identify to which GPU the offset belongs to 60 * BITS[45:0] - MMAP offset value 61 * 62 * NOTE: struct vm_area_struct.vm_pgoff uses offset in pages. Hence, these 63 * defines are w.r.t to PAGE_SIZE 64 */ 65 #define KFD_MMAP_TYPE_SHIFT 62 66 #define KFD_MMAP_TYPE_MASK (0x3ULL << KFD_MMAP_TYPE_SHIFT) 67 #define KFD_MMAP_TYPE_DOORBELL (0x3ULL << KFD_MMAP_TYPE_SHIFT) 68 #define KFD_MMAP_TYPE_EVENTS (0x2ULL << KFD_MMAP_TYPE_SHIFT) 69 #define KFD_MMAP_TYPE_RESERVED_MEM (0x1ULL << KFD_MMAP_TYPE_SHIFT) 70 #define KFD_MMAP_TYPE_MMIO (0x0ULL << KFD_MMAP_TYPE_SHIFT) 71 72 #define KFD_MMAP_GPU_ID_SHIFT 46 73 #define KFD_MMAP_GPU_ID_MASK (((1ULL << KFD_GPU_ID_HASH_WIDTH) - 1) \ 74 << KFD_MMAP_GPU_ID_SHIFT) 75 #define KFD_MMAP_GPU_ID(gpu_id) ((((uint64_t)gpu_id) << KFD_MMAP_GPU_ID_SHIFT)\ 76 & KFD_MMAP_GPU_ID_MASK) 77 #define KFD_MMAP_GET_GPU_ID(offset) ((offset & KFD_MMAP_GPU_ID_MASK) \ 78 >> KFD_MMAP_GPU_ID_SHIFT) 79 80 /* 81 * When working with cp scheduler we should assign the HIQ manually or via 82 * the amdgpu driver to a fixed hqd slot, here are the fixed HIQ hqd slot 83 * definitions for Kaveri. In Kaveri only the first ME queues participates 84 * in the cp scheduling taking that in mind we set the HIQ slot in the 85 * second ME. 86 */ 87 #define KFD_CIK_HIQ_PIPE 4 88 #define KFD_CIK_HIQ_QUEUE 0 89 90 /* Macro for allocating structures */ 91 #define kfd_alloc_struct(ptr_to_struct) \ 92 ((typeof(ptr_to_struct)) kzalloc(sizeof(*ptr_to_struct), GFP_KERNEL)) 93 94 #define KFD_MAX_NUM_OF_PROCESSES 512 95 #define KFD_MAX_NUM_OF_QUEUES_PER_PROCESS 1024 96 97 /* 98 * Size of the per-process TBA+TMA buffer: 2 pages 99 * 100 * The first page is the TBA used for the CWSR ISA code. The second 101 * page is used as TMA for user-mode trap handler setup in daisy-chain mode. 102 */ 103 #define KFD_CWSR_TBA_TMA_SIZE (PAGE_SIZE * 2) 104 #define KFD_CWSR_TMA_OFFSET PAGE_SIZE 105 106 #define KFD_MAX_NUM_OF_QUEUES_PER_DEVICE \ 107 (KFD_MAX_NUM_OF_PROCESSES * \ 108 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) 109 110 #define KFD_KERNEL_QUEUE_SIZE 2048 111 112 #define KFD_UNMAP_LATENCY_MS (4000) 113 114 /* 115 * 512 = 0x200 116 * The doorbell index distance between SDMA RLC (2*i) and (2*i+1) in the 117 * same SDMA engine on SOC15, which has 8-byte doorbells for SDMA. 118 * 512 8-byte doorbell distance (i.e. one page away) ensures that SDMA RLC 119 * (2*i+1) doorbells (in terms of the lower 12 bit address) lie exactly in 120 * the OFFSET and SIZE set in registers like BIF_SDMA0_DOORBELL_RANGE. 121 */ 122 #define KFD_QUEUE_DOORBELL_MIRROR_OFFSET 512 123 124 /** 125 * enum kfd_ioctl_flags - KFD ioctl flags 126 * Various flags that can be set in &amdkfd_ioctl_desc.flags to control how 127 * userspace can use a given ioctl. 128 */ 129 enum kfd_ioctl_flags { 130 /* 131 * @KFD_IOC_FLAG_CHECKPOINT_RESTORE: 132 * Certain KFD ioctls such as AMDKFD_IOC_CRIU_OP can potentially 133 * perform privileged operations and load arbitrary data into MQDs and 134 * eventually HQD registers when the queue is mapped by HWS. In order to 135 * prevent this we should perform additional security checks. 136 * 137 * This is equivalent to callers with the CHECKPOINT_RESTORE capability. 138 * 139 * Note: Since earlier versions of docker do not support CHECKPOINT_RESTORE, 140 * we also allow ioctls with SYS_ADMIN capability. 141 */ 142 KFD_IOC_FLAG_CHECKPOINT_RESTORE = BIT(0), 143 }; 144 /* 145 * Kernel module parameter to specify maximum number of supported queues per 146 * device 147 */ 148 extern int max_num_of_queues_per_device; 149 150 151 /* Kernel module parameter to specify the scheduling policy */ 152 extern int sched_policy; 153 154 /* 155 * Kernel module parameter to specify the maximum process 156 * number per HW scheduler 157 */ 158 extern int hws_max_conc_proc; 159 160 extern int cwsr_enable; 161 162 /* 163 * Kernel module parameter to specify whether to send sigterm to HSA process on 164 * unhandled exception 165 */ 166 extern int send_sigterm; 167 168 /* 169 * This kernel module is used to simulate large bar machine on non-large bar 170 * enabled machines. 171 */ 172 extern int debug_largebar; 173 174 /* 175 * Ignore CRAT table during KFD initialization, can be used to work around 176 * broken CRAT tables on some AMD systems 177 */ 178 extern int ignore_crat; 179 180 /* Set sh_mem_config.retry_disable on GFX v9 */ 181 extern int amdgpu_noretry; 182 183 /* Halt if HWS hang is detected */ 184 extern int halt_if_hws_hang; 185 186 /* Whether MEC FW support GWS barriers */ 187 extern bool hws_gws_support; 188 189 /* Queue preemption timeout in ms */ 190 extern int queue_preemption_timeout_ms; 191 192 /* 193 * Don't evict process queues on vm fault 194 */ 195 extern int amdgpu_no_queue_eviction_on_vm_fault; 196 197 /* Enable eviction debug messages */ 198 extern bool debug_evictions; 199 200 enum cache_policy { 201 cache_policy_coherent, 202 cache_policy_noncoherent 203 }; 204 205 #define KFD_GC_VERSION(dev) ((dev)->adev->ip_versions[GC_HWIP][0]) 206 #define KFD_IS_SOC15(dev) ((KFD_GC_VERSION(dev)) >= (IP_VERSION(9, 0, 1))) 207 208 struct kfd_event_interrupt_class { 209 bool (*interrupt_isr)(struct kfd_dev *dev, 210 const uint32_t *ih_ring_entry, uint32_t *patched_ihre, 211 bool *patched_flag); 212 void (*interrupt_wq)(struct kfd_dev *dev, 213 const uint32_t *ih_ring_entry); 214 }; 215 216 struct kfd_device_info { 217 uint32_t gfx_target_version; 218 const struct kfd_event_interrupt_class *event_interrupt_class; 219 unsigned int max_pasid_bits; 220 unsigned int max_no_of_hqd; 221 unsigned int doorbell_size; 222 size_t ih_ring_entry_size; 223 uint8_t num_of_watch_points; 224 uint16_t mqd_size_aligned; 225 bool supports_cwsr; 226 bool needs_iommu_device; 227 bool needs_pci_atomics; 228 uint32_t no_atomic_fw_version; 229 unsigned int num_sdma_queues_per_engine; 230 }; 231 232 unsigned int kfd_get_num_sdma_engines(struct kfd_dev *kdev); 233 unsigned int kfd_get_num_xgmi_sdma_engines(struct kfd_dev *kdev); 234 235 struct kfd_mem_obj { 236 uint32_t range_start; 237 uint32_t range_end; 238 uint64_t gpu_addr; 239 uint32_t *cpu_ptr; 240 void *gtt_mem; 241 }; 242 243 struct kfd_vmid_info { 244 uint32_t first_vmid_kfd; 245 uint32_t last_vmid_kfd; 246 uint32_t vmid_num_kfd; 247 }; 248 249 struct kfd_dev { 250 struct amdgpu_device *adev; 251 252 struct kfd_device_info device_info; 253 struct pci_dev *pdev; 254 struct drm_device *ddev; 255 256 unsigned int id; /* topology stub index */ 257 258 phys_addr_t doorbell_base; /* Start of actual doorbells used by 259 * KFD. It is aligned for mapping 260 * into user mode 261 */ 262 size_t doorbell_base_dw_offset; /* Offset from the start of the PCI 263 * doorbell BAR to the first KFD 264 * doorbell in dwords. GFX reserves 265 * the segment before this offset. 266 */ 267 u32 __iomem *doorbell_kernel_ptr; /* This is a pointer for a doorbells 268 * page used by kernel queue 269 */ 270 271 struct kgd2kfd_shared_resources shared_resources; 272 struct kfd_vmid_info vm_info; 273 274 const struct kfd2kgd_calls *kfd2kgd; 275 struct mutex doorbell_mutex; 276 DECLARE_BITMAP(doorbell_available_index, 277 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS); 278 279 void *gtt_mem; 280 uint64_t gtt_start_gpu_addr; 281 void *gtt_start_cpu_ptr; 282 void *gtt_sa_bitmap; 283 struct mutex gtt_sa_lock; 284 unsigned int gtt_sa_chunk_size; 285 unsigned int gtt_sa_num_of_chunks; 286 287 /* Interrupts */ 288 struct kfifo ih_fifo; 289 struct workqueue_struct *ih_wq; 290 struct work_struct interrupt_work; 291 spinlock_t interrupt_lock; 292 293 /* QCM Device instance */ 294 struct device_queue_manager *dqm; 295 296 bool init_complete; 297 /* 298 * Interrupts of interest to KFD are copied 299 * from the HW ring into a SW ring. 300 */ 301 bool interrupts_active; 302 303 /* Debug manager */ 304 struct kfd_dbgmgr *dbgmgr; 305 306 /* Firmware versions */ 307 uint16_t mec_fw_version; 308 uint16_t mec2_fw_version; 309 uint16_t sdma_fw_version; 310 311 /* Maximum process number mapped to HW scheduler */ 312 unsigned int max_proc_per_quantum; 313 314 /* CWSR */ 315 bool cwsr_enabled; 316 const void *cwsr_isa; 317 unsigned int cwsr_isa_size; 318 319 /* xGMI */ 320 uint64_t hive_id; 321 322 bool pci_atomic_requested; 323 324 /* Use IOMMU v2 flag */ 325 bool use_iommu_v2; 326 327 /* SRAM ECC flag */ 328 atomic_t sram_ecc_flag; 329 330 /* Compute Profile ref. count */ 331 atomic_t compute_profile; 332 333 /* Global GWS resource shared between processes */ 334 void *gws; 335 336 /* Clients watching SMI events */ 337 struct list_head smi_clients; 338 spinlock_t smi_lock; 339 340 uint32_t reset_seq_num; 341 342 struct ida doorbell_ida; 343 unsigned int max_doorbell_slices; 344 345 int noretry; 346 347 /* HMM page migration MEMORY_DEVICE_PRIVATE mapping */ 348 struct dev_pagemap pgmap; 349 }; 350 351 enum kfd_mempool { 352 KFD_MEMPOOL_SYSTEM_CACHEABLE = 1, 353 KFD_MEMPOOL_SYSTEM_WRITECOMBINE = 2, 354 KFD_MEMPOOL_FRAMEBUFFER = 3, 355 }; 356 357 /* Character device interface */ 358 int kfd_chardev_init(void); 359 void kfd_chardev_exit(void); 360 struct device *kfd_chardev(void); 361 362 /** 363 * enum kfd_unmap_queues_filter - Enum for queue filters. 364 * 365 * @KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE: Preempts single queue. 366 * 367 * @KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES: Preempts all queues in the 368 * running queues list. 369 * 370 * @KFD_UNMAP_QUEUES_FILTER_BY_PASID: Preempts queues that belongs to 371 * specific process. 372 * 373 */ 374 enum kfd_unmap_queues_filter { 375 KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE, 376 KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 377 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 378 KFD_UNMAP_QUEUES_FILTER_BY_PASID 379 }; 380 381 /** 382 * enum kfd_queue_type - Enum for various queue types. 383 * 384 * @KFD_QUEUE_TYPE_COMPUTE: Regular user mode queue type. 385 * 386 * @KFD_QUEUE_TYPE_SDMA: SDMA user mode queue type. 387 * 388 * @KFD_QUEUE_TYPE_HIQ: HIQ queue type. 389 * 390 * @KFD_QUEUE_TYPE_DIQ: DIQ queue type. 391 * 392 * @KFD_QUEUE_TYPE_SDMA_XGMI: Special SDMA queue for XGMI interface. 393 */ 394 enum kfd_queue_type { 395 KFD_QUEUE_TYPE_COMPUTE, 396 KFD_QUEUE_TYPE_SDMA, 397 KFD_QUEUE_TYPE_HIQ, 398 KFD_QUEUE_TYPE_DIQ, 399 KFD_QUEUE_TYPE_SDMA_XGMI 400 }; 401 402 enum kfd_queue_format { 403 KFD_QUEUE_FORMAT_PM4, 404 KFD_QUEUE_FORMAT_AQL 405 }; 406 407 enum KFD_QUEUE_PRIORITY { 408 KFD_QUEUE_PRIORITY_MINIMUM = 0, 409 KFD_QUEUE_PRIORITY_MAXIMUM = 15 410 }; 411 412 /** 413 * struct queue_properties 414 * 415 * @type: The queue type. 416 * 417 * @queue_id: Queue identifier. 418 * 419 * @queue_address: Queue ring buffer address. 420 * 421 * @queue_size: Queue ring buffer size. 422 * 423 * @priority: Defines the queue priority relative to other queues in the 424 * process. 425 * This is just an indication and HW scheduling may override the priority as 426 * necessary while keeping the relative prioritization. 427 * the priority granularity is from 0 to f which f is the highest priority. 428 * currently all queues are initialized with the highest priority. 429 * 430 * @queue_percent: This field is partially implemented and currently a zero in 431 * this field defines that the queue is non active. 432 * 433 * @read_ptr: User space address which points to the number of dwords the 434 * cp read from the ring buffer. This field updates automatically by the H/W. 435 * 436 * @write_ptr: Defines the number of dwords written to the ring buffer. 437 * 438 * @doorbell_ptr: Notifies the H/W of new packet written to the queue ring 439 * buffer. This field should be similar to write_ptr and the user should 440 * update this field after updating the write_ptr. 441 * 442 * @doorbell_off: The doorbell offset in the doorbell pci-bar. 443 * 444 * @is_interop: Defines if this is a interop queue. Interop queue means that 445 * the queue can access both graphics and compute resources. 446 * 447 * @is_evicted: Defines if the queue is evicted. Only active queues 448 * are evicted, rendering them inactive. 449 * 450 * @is_active: Defines if the queue is active or not. @is_active and 451 * @is_evicted are protected by the DQM lock. 452 * 453 * @is_gws: Defines if the queue has been updated to be GWS-capable or not. 454 * @is_gws should be protected by the DQM lock, since changing it can yield the 455 * possibility of updating DQM state on number of GWS queues. 456 * 457 * @vmid: If the scheduling mode is no cp scheduling the field defines the vmid 458 * of the queue. 459 * 460 * This structure represents the queue properties for each queue no matter if 461 * it's user mode or kernel mode queue. 462 * 463 */ 464 struct queue_properties { 465 enum kfd_queue_type type; 466 enum kfd_queue_format format; 467 unsigned int queue_id; 468 uint64_t queue_address; 469 uint64_t queue_size; 470 uint32_t priority; 471 uint32_t queue_percent; 472 uint32_t *read_ptr; 473 uint32_t *write_ptr; 474 void __iomem *doorbell_ptr; 475 uint32_t doorbell_off; 476 bool is_interop; 477 bool is_evicted; 478 bool is_active; 479 bool is_gws; 480 /* Not relevant for user mode queues in cp scheduling */ 481 unsigned int vmid; 482 /* Relevant only for sdma queues*/ 483 uint32_t sdma_engine_id; 484 uint32_t sdma_queue_id; 485 uint32_t sdma_vm_addr; 486 /* Relevant only for VI */ 487 uint64_t eop_ring_buffer_address; 488 uint32_t eop_ring_buffer_size; 489 uint64_t ctx_save_restore_area_address; 490 uint32_t ctx_save_restore_area_size; 491 uint32_t ctl_stack_size; 492 uint64_t tba_addr; 493 uint64_t tma_addr; 494 }; 495 496 #define QUEUE_IS_ACTIVE(q) ((q).queue_size > 0 && \ 497 (q).queue_address != 0 && \ 498 (q).queue_percent > 0 && \ 499 !(q).is_evicted) 500 501 enum mqd_update_flag { 502 UPDATE_FLAG_CU_MASK = 0, 503 }; 504 505 struct mqd_update_info { 506 union { 507 struct { 508 uint32_t count; /* Must be a multiple of 32 */ 509 uint32_t *ptr; 510 } cu_mask; 511 }; 512 enum mqd_update_flag update_flag; 513 }; 514 515 /** 516 * struct queue 517 * 518 * @list: Queue linked list. 519 * 520 * @mqd: The queue MQD (memory queue descriptor). 521 * 522 * @mqd_mem_obj: The MQD local gpu memory object. 523 * 524 * @gart_mqd_addr: The MQD gart mc address. 525 * 526 * @properties: The queue properties. 527 * 528 * @mec: Used only in no cp scheduling mode and identifies to micro engine id 529 * that the queue should be executed on. 530 * 531 * @pipe: Used only in no cp scheduling mode and identifies the queue's pipe 532 * id. 533 * 534 * @queue: Used only in no cp scheduliong mode and identifies the queue's slot. 535 * 536 * @process: The kfd process that created this queue. 537 * 538 * @device: The kfd device that created this queue. 539 * 540 * @gws: Pointing to gws kgd_mem if this is a gws control queue; NULL 541 * otherwise. 542 * 543 * This structure represents user mode compute queues. 544 * It contains all the necessary data to handle such queues. 545 * 546 */ 547 548 struct queue { 549 struct list_head list; 550 void *mqd; 551 struct kfd_mem_obj *mqd_mem_obj; 552 uint64_t gart_mqd_addr; 553 struct queue_properties properties; 554 555 uint32_t mec; 556 uint32_t pipe; 557 uint32_t queue; 558 559 unsigned int sdma_id; 560 unsigned int doorbell_id; 561 562 struct kfd_process *process; 563 struct kfd_dev *device; 564 void *gws; 565 566 /* procfs */ 567 struct kobject kobj; 568 }; 569 570 enum KFD_MQD_TYPE { 571 KFD_MQD_TYPE_HIQ = 0, /* for hiq */ 572 KFD_MQD_TYPE_CP, /* for cp queues and diq */ 573 KFD_MQD_TYPE_SDMA, /* for sdma queues */ 574 KFD_MQD_TYPE_DIQ, /* for diq */ 575 KFD_MQD_TYPE_MAX 576 }; 577 578 enum KFD_PIPE_PRIORITY { 579 KFD_PIPE_PRIORITY_CS_LOW = 0, 580 KFD_PIPE_PRIORITY_CS_MEDIUM, 581 KFD_PIPE_PRIORITY_CS_HIGH 582 }; 583 584 struct scheduling_resources { 585 unsigned int vmid_mask; 586 enum kfd_queue_type type; 587 uint64_t queue_mask; 588 uint64_t gws_mask; 589 uint32_t oac_mask; 590 uint32_t gds_heap_base; 591 uint32_t gds_heap_size; 592 }; 593 594 struct process_queue_manager { 595 /* data */ 596 struct kfd_process *process; 597 struct list_head queues; 598 unsigned long *queue_slot_bitmap; 599 }; 600 601 struct qcm_process_device { 602 /* The Device Queue Manager that owns this data */ 603 struct device_queue_manager *dqm; 604 struct process_queue_manager *pqm; 605 /* Queues list */ 606 struct list_head queues_list; 607 struct list_head priv_queue_list; 608 609 unsigned int queue_count; 610 unsigned int vmid; 611 bool is_debug; 612 unsigned int evicted; /* eviction counter, 0=active */ 613 614 /* This flag tells if we should reset all wavefronts on 615 * process termination 616 */ 617 bool reset_wavefronts; 618 619 /* This flag tells us if this process has a GWS-capable 620 * queue that will be mapped into the runlist. It's 621 * possible to request a GWS BO, but not have the queue 622 * currently mapped, and this changes how the MAP_PROCESS 623 * PM4 packet is configured. 624 */ 625 bool mapped_gws_queue; 626 627 /* All the memory management data should be here too */ 628 uint64_t gds_context_area; 629 /* Contains page table flags such as AMDGPU_PTE_VALID since gfx9 */ 630 uint64_t page_table_base; 631 uint32_t sh_mem_config; 632 uint32_t sh_mem_bases; 633 uint32_t sh_mem_ape1_base; 634 uint32_t sh_mem_ape1_limit; 635 uint32_t gds_size; 636 uint32_t num_gws; 637 uint32_t num_oac; 638 uint32_t sh_hidden_private_base; 639 640 /* CWSR memory */ 641 struct kgd_mem *cwsr_mem; 642 void *cwsr_kaddr; 643 uint64_t cwsr_base; 644 uint64_t tba_addr; 645 uint64_t tma_addr; 646 647 /* IB memory */ 648 struct kgd_mem *ib_mem; 649 uint64_t ib_base; 650 void *ib_kaddr; 651 652 /* doorbell resources per process per device */ 653 unsigned long *doorbell_bitmap; 654 }; 655 656 /* KFD Memory Eviction */ 657 658 /* Approx. wait time before attempting to restore evicted BOs */ 659 #define PROCESS_RESTORE_TIME_MS 100 660 /* Approx. back off time if restore fails due to lack of memory */ 661 #define PROCESS_BACK_OFF_TIME_MS 100 662 /* Approx. time before evicting the process again */ 663 #define PROCESS_ACTIVE_TIME_MS 10 664 665 /* 8 byte handle containing GPU ID in the most significant 4 bytes and 666 * idr_handle in the least significant 4 bytes 667 */ 668 #define MAKE_HANDLE(gpu_id, idr_handle) \ 669 (((uint64_t)(gpu_id) << 32) + idr_handle) 670 #define GET_GPU_ID(handle) (handle >> 32) 671 #define GET_IDR_HANDLE(handle) (handle & 0xFFFFFFFF) 672 673 enum kfd_pdd_bound { 674 PDD_UNBOUND = 0, 675 PDD_BOUND, 676 PDD_BOUND_SUSPENDED, 677 }; 678 679 #define MAX_SYSFS_FILENAME_LEN 15 680 681 /* 682 * SDMA counter runs at 100MHz frequency. 683 * We display SDMA activity in microsecond granularity in sysfs. 684 * As a result, the divisor is 100. 685 */ 686 #define SDMA_ACTIVITY_DIVISOR 100 687 688 /* Data that is per-process-per device. */ 689 struct kfd_process_device { 690 /* The device that owns this data. */ 691 struct kfd_dev *dev; 692 693 /* The process that owns this kfd_process_device. */ 694 struct kfd_process *process; 695 696 /* per-process-per device QCM data structure */ 697 struct qcm_process_device qpd; 698 699 /*Apertures*/ 700 uint64_t lds_base; 701 uint64_t lds_limit; 702 uint64_t gpuvm_base; 703 uint64_t gpuvm_limit; 704 uint64_t scratch_base; 705 uint64_t scratch_limit; 706 707 /* VM context for GPUVM allocations */ 708 struct file *drm_file; 709 void *drm_priv; 710 711 /* GPUVM allocations storage */ 712 struct idr alloc_idr; 713 714 /* Flag used to tell the pdd has dequeued from the dqm. 715 * This is used to prevent dev->dqm->ops.process_termination() from 716 * being called twice when it is already called in IOMMU callback 717 * function. 718 */ 719 bool already_dequeued; 720 bool runtime_inuse; 721 722 /* Is this process/pasid bound to this device? (amd_iommu_bind_pasid) */ 723 enum kfd_pdd_bound bound; 724 725 /* VRAM usage */ 726 uint64_t vram_usage; 727 struct attribute attr_vram; 728 char vram_filename[MAX_SYSFS_FILENAME_LEN]; 729 730 /* SDMA activity tracking */ 731 uint64_t sdma_past_activity_counter; 732 struct attribute attr_sdma; 733 char sdma_filename[MAX_SYSFS_FILENAME_LEN]; 734 735 /* Eviction activity tracking */ 736 uint64_t last_evict_timestamp; 737 atomic64_t evict_duration_counter; 738 struct attribute attr_evict; 739 740 struct kobject *kobj_stats; 741 unsigned int doorbell_index; 742 743 /* 744 * @cu_occupancy: Reports occupancy of Compute Units (CU) of a process 745 * that is associated with device encoded by "this" struct instance. The 746 * value reflects CU usage by all of the waves launched by this process 747 * on this device. A very important property of occupancy parameter is 748 * that its value is a snapshot of current use. 749 * 750 * Following is to be noted regarding how this parameter is reported: 751 * 752 * The number of waves that a CU can launch is limited by couple of 753 * parameters. These are encoded by struct amdgpu_cu_info instance 754 * that is part of every device definition. For GFX9 devices this 755 * translates to 40 waves (simd_per_cu * max_waves_per_simd) when waves 756 * do not use scratch memory and 32 waves (max_scratch_slots_per_cu) 757 * when they do use scratch memory. This could change for future 758 * devices and therefore this example should be considered as a guide. 759 * 760 * All CU's of a device are available for the process. This may not be true 761 * under certain conditions - e.g. CU masking. 762 * 763 * Finally number of CU's that are occupied by a process is affected by both 764 * number of CU's a device has along with number of other competing processes 765 */ 766 struct attribute attr_cu_occupancy; 767 768 /* sysfs counters for GPU retry fault and page migration tracking */ 769 struct kobject *kobj_counters; 770 struct attribute attr_faults; 771 struct attribute attr_page_in; 772 struct attribute attr_page_out; 773 uint64_t faults; 774 uint64_t page_in; 775 uint64_t page_out; 776 }; 777 778 #define qpd_to_pdd(x) container_of(x, struct kfd_process_device, qpd) 779 780 struct svm_range_list { 781 struct mutex lock; 782 struct rb_root_cached objects; 783 struct list_head list; 784 struct work_struct deferred_list_work; 785 struct list_head deferred_range_list; 786 spinlock_t deferred_list_lock; 787 atomic_t evicted_ranges; 788 atomic_t drain_pagefaults; 789 struct delayed_work restore_work; 790 DECLARE_BITMAP(bitmap_supported, MAX_GPU_INSTANCE); 791 struct task_struct *faulting_task; 792 }; 793 794 /* Process data */ 795 struct kfd_process { 796 /* 797 * kfd_process are stored in an mm_struct*->kfd_process* 798 * hash table (kfd_processes in kfd_process.c) 799 */ 800 struct hlist_node kfd_processes; 801 802 /* 803 * Opaque pointer to mm_struct. We don't hold a reference to 804 * it so it should never be dereferenced from here. This is 805 * only used for looking up processes by their mm. 806 */ 807 void *mm; 808 809 struct kref ref; 810 struct work_struct release_work; 811 812 struct mutex mutex; 813 814 /* 815 * In any process, the thread that started main() is the lead 816 * thread and outlives the rest. 817 * It is here because amd_iommu_bind_pasid wants a task_struct. 818 * It can also be used for safely getting a reference to the 819 * mm_struct of the process. 820 */ 821 struct task_struct *lead_thread; 822 823 /* We want to receive a notification when the mm_struct is destroyed */ 824 struct mmu_notifier mmu_notifier; 825 826 u32 pasid; 827 828 /* 829 * Array of kfd_process_device pointers, 830 * one for each device the process is using. 831 */ 832 struct kfd_process_device *pdds[MAX_GPU_INSTANCE]; 833 uint32_t n_pdds; 834 835 struct process_queue_manager pqm; 836 837 /*Is the user space process 32 bit?*/ 838 bool is_32bit_user_mode; 839 840 /* Event-related data */ 841 struct mutex event_mutex; 842 /* Event ID allocator and lookup */ 843 struct idr event_idr; 844 /* Event page */ 845 u64 signal_handle; 846 struct kfd_signal_page *signal_page; 847 size_t signal_mapped_size; 848 size_t signal_event_count; 849 bool signal_event_limit_reached; 850 851 /* Information used for memory eviction */ 852 void *kgd_process_info; 853 /* Eviction fence that is attached to all the BOs of this process. The 854 * fence will be triggered during eviction and new one will be created 855 * during restore 856 */ 857 struct dma_fence *ef; 858 859 /* Work items for evicting and restoring BOs */ 860 struct delayed_work eviction_work; 861 struct delayed_work restore_work; 862 /* seqno of the last scheduled eviction */ 863 unsigned int last_eviction_seqno; 864 /* Approx. the last timestamp (in jiffies) when the process was 865 * restored after an eviction 866 */ 867 unsigned long last_restore_timestamp; 868 869 /* Kobj for our procfs */ 870 struct kobject *kobj; 871 struct kobject *kobj_queues; 872 struct attribute attr_pasid; 873 874 /* shared virtual memory registered by this process */ 875 struct svm_range_list svms; 876 877 bool xnack_enabled; 878 879 atomic_t poison; 880 }; 881 882 #define KFD_PROCESS_TABLE_SIZE 5 /* bits: 32 entries */ 883 extern DECLARE_HASHTABLE(kfd_processes_table, KFD_PROCESS_TABLE_SIZE); 884 extern struct srcu_struct kfd_processes_srcu; 885 886 /** 887 * typedef amdkfd_ioctl_t - typedef for ioctl function pointer. 888 * 889 * @filep: pointer to file structure. 890 * @p: amdkfd process pointer. 891 * @data: pointer to arg that was copied from user. 892 * 893 * Return: returns ioctl completion code. 894 */ 895 typedef int amdkfd_ioctl_t(struct file *filep, struct kfd_process *p, 896 void *data); 897 898 struct amdkfd_ioctl_desc { 899 unsigned int cmd; 900 int flags; 901 amdkfd_ioctl_t *func; 902 unsigned int cmd_drv; 903 const char *name; 904 }; 905 bool kfd_dev_is_large_bar(struct kfd_dev *dev); 906 907 int kfd_process_create_wq(void); 908 void kfd_process_destroy_wq(void); 909 struct kfd_process *kfd_create_process(struct file *filep); 910 struct kfd_process *kfd_get_process(const struct task_struct *); 911 struct kfd_process *kfd_lookup_process_by_pasid(u32 pasid); 912 struct kfd_process *kfd_lookup_process_by_mm(const struct mm_struct *mm); 913 914 int kfd_process_gpuidx_from_gpuid(struct kfd_process *p, uint32_t gpu_id); 915 int kfd_process_gpuid_from_adev(struct kfd_process *p, 916 struct amdgpu_device *adev, uint32_t *gpuid, 917 uint32_t *gpuidx); 918 static inline int kfd_process_gpuid_from_gpuidx(struct kfd_process *p, 919 uint32_t gpuidx, uint32_t *gpuid) { 920 return gpuidx < p->n_pdds ? p->pdds[gpuidx]->dev->id : -EINVAL; 921 } 922 static inline struct kfd_process_device *kfd_process_device_from_gpuidx( 923 struct kfd_process *p, uint32_t gpuidx) { 924 return gpuidx < p->n_pdds ? p->pdds[gpuidx] : NULL; 925 } 926 927 void kfd_unref_process(struct kfd_process *p); 928 int kfd_process_evict_queues(struct kfd_process *p); 929 int kfd_process_restore_queues(struct kfd_process *p); 930 void kfd_suspend_all_processes(void); 931 int kfd_resume_all_processes(void); 932 933 int kfd_process_device_init_vm(struct kfd_process_device *pdd, 934 struct file *drm_file); 935 struct kfd_process_device *kfd_bind_process_to_device(struct kfd_dev *dev, 936 struct kfd_process *p); 937 struct kfd_process_device *kfd_get_process_device_data(struct kfd_dev *dev, 938 struct kfd_process *p); 939 struct kfd_process_device *kfd_create_process_device_data(struct kfd_dev *dev, 940 struct kfd_process *p); 941 942 bool kfd_process_xnack_mode(struct kfd_process *p, bool supported); 943 944 int kfd_reserved_mem_mmap(struct kfd_dev *dev, struct kfd_process *process, 945 struct vm_area_struct *vma); 946 947 /* KFD process API for creating and translating handles */ 948 int kfd_process_device_create_obj_handle(struct kfd_process_device *pdd, 949 void *mem); 950 void *kfd_process_device_translate_handle(struct kfd_process_device *p, 951 int handle); 952 void kfd_process_device_remove_obj_handle(struct kfd_process_device *pdd, 953 int handle); 954 struct kfd_process *kfd_lookup_process_by_pid(struct pid *pid); 955 956 /* PASIDs */ 957 int kfd_pasid_init(void); 958 void kfd_pasid_exit(void); 959 bool kfd_set_pasid_limit(unsigned int new_limit); 960 unsigned int kfd_get_pasid_limit(void); 961 u32 kfd_pasid_alloc(void); 962 void kfd_pasid_free(u32 pasid); 963 964 /* Doorbells */ 965 size_t kfd_doorbell_process_slice(struct kfd_dev *kfd); 966 int kfd_doorbell_init(struct kfd_dev *kfd); 967 void kfd_doorbell_fini(struct kfd_dev *kfd); 968 int kfd_doorbell_mmap(struct kfd_dev *dev, struct kfd_process *process, 969 struct vm_area_struct *vma); 970 void __iomem *kfd_get_kernel_doorbell(struct kfd_dev *kfd, 971 unsigned int *doorbell_off); 972 void kfd_release_kernel_doorbell(struct kfd_dev *kfd, u32 __iomem *db_addr); 973 u32 read_kernel_doorbell(u32 __iomem *db); 974 void write_kernel_doorbell(void __iomem *db, u32 value); 975 void write_kernel_doorbell64(void __iomem *db, u64 value); 976 unsigned int kfd_get_doorbell_dw_offset_in_bar(struct kfd_dev *kfd, 977 struct kfd_process_device *pdd, 978 unsigned int doorbell_id); 979 phys_addr_t kfd_get_process_doorbells(struct kfd_process_device *pdd); 980 int kfd_alloc_process_doorbells(struct kfd_dev *kfd, 981 unsigned int *doorbell_index); 982 void kfd_free_process_doorbells(struct kfd_dev *kfd, 983 unsigned int doorbell_index); 984 /* GTT Sub-Allocator */ 985 986 int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size, 987 struct kfd_mem_obj **mem_obj); 988 989 int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj); 990 991 extern struct device *kfd_device; 992 993 /* KFD's procfs */ 994 void kfd_procfs_init(void); 995 void kfd_procfs_shutdown(void); 996 int kfd_procfs_add_queue(struct queue *q); 997 void kfd_procfs_del_queue(struct queue *q); 998 999 /* Topology */ 1000 int kfd_topology_init(void); 1001 void kfd_topology_shutdown(void); 1002 int kfd_topology_add_device(struct kfd_dev *gpu); 1003 int kfd_topology_remove_device(struct kfd_dev *gpu); 1004 struct kfd_topology_device *kfd_topology_device_by_proximity_domain( 1005 uint32_t proximity_domain); 1006 struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id); 1007 struct kfd_dev *kfd_device_by_id(uint32_t gpu_id); 1008 struct kfd_dev *kfd_device_by_pci_dev(const struct pci_dev *pdev); 1009 struct kfd_dev *kfd_device_by_adev(const struct amdgpu_device *adev); 1010 int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_dev **kdev); 1011 int kfd_numa_node_to_apic_id(int numa_node_id); 1012 void kfd_double_confirm_iommu_support(struct kfd_dev *gpu); 1013 1014 /* Interrupts */ 1015 int kfd_interrupt_init(struct kfd_dev *dev); 1016 void kfd_interrupt_exit(struct kfd_dev *dev); 1017 bool enqueue_ih_ring_entry(struct kfd_dev *kfd, const void *ih_ring_entry); 1018 bool interrupt_is_wanted(struct kfd_dev *dev, 1019 const uint32_t *ih_ring_entry, 1020 uint32_t *patched_ihre, bool *flag); 1021 1022 /* amdkfd Apertures */ 1023 int kfd_init_apertures(struct kfd_process *process); 1024 1025 void kfd_process_set_trap_handler(struct qcm_process_device *qpd, 1026 uint64_t tba_addr, 1027 uint64_t tma_addr); 1028 1029 /* CRIU */ 1030 /* 1031 * Need to increment KFD_CRIU_PRIV_VERSION each time a change is made to any of the CRIU private 1032 * structures: 1033 * kfd_criu_process_priv_data 1034 * kfd_criu_device_priv_data 1035 * kfd_criu_bo_priv_data 1036 * kfd_criu_queue_priv_data 1037 * kfd_criu_event_priv_data 1038 * kfd_criu_svm_range_priv_data 1039 */ 1040 1041 #define KFD_CRIU_PRIV_VERSION 1 1042 1043 struct kfd_criu_process_priv_data { 1044 uint32_t version; 1045 }; 1046 1047 struct kfd_criu_device_priv_data { 1048 /* For future use */ 1049 uint64_t reserved; 1050 }; 1051 1052 struct kfd_criu_bo_priv_data { 1053 uint64_t user_addr; 1054 uint32_t idr_handle; 1055 uint32_t mapped_gpuids[MAX_GPU_INSTANCE]; 1056 }; 1057 1058 struct kfd_criu_svm_range_priv_data { 1059 uint32_t object_type; 1060 uint32_t reserved; 1061 }; 1062 1063 struct kfd_criu_queue_priv_data { 1064 uint32_t object_type; 1065 uint32_t reserved; 1066 }; 1067 1068 struct kfd_criu_event_priv_data { 1069 uint32_t object_type; 1070 uint32_t reserved; 1071 }; 1072 1073 /* CRIU - End */ 1074 1075 /* Queue Context Management */ 1076 int init_queue(struct queue **q, const struct queue_properties *properties); 1077 void uninit_queue(struct queue *q); 1078 void print_queue_properties(struct queue_properties *q); 1079 void print_queue(struct queue *q); 1080 1081 struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type, 1082 struct kfd_dev *dev); 1083 struct mqd_manager *mqd_manager_init_cik_hawaii(enum KFD_MQD_TYPE type, 1084 struct kfd_dev *dev); 1085 struct mqd_manager *mqd_manager_init_vi(enum KFD_MQD_TYPE type, 1086 struct kfd_dev *dev); 1087 struct mqd_manager *mqd_manager_init_vi_tonga(enum KFD_MQD_TYPE type, 1088 struct kfd_dev *dev); 1089 struct mqd_manager *mqd_manager_init_v9(enum KFD_MQD_TYPE type, 1090 struct kfd_dev *dev); 1091 struct mqd_manager *mqd_manager_init_v10(enum KFD_MQD_TYPE type, 1092 struct kfd_dev *dev); 1093 struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev); 1094 void device_queue_manager_uninit(struct device_queue_manager *dqm); 1095 struct kernel_queue *kernel_queue_init(struct kfd_dev *dev, 1096 enum kfd_queue_type type); 1097 void kernel_queue_uninit(struct kernel_queue *kq, bool hanging); 1098 int kfd_process_vm_fault(struct device_queue_manager *dqm, u32 pasid); 1099 1100 /* Process Queue Manager */ 1101 struct process_queue_node { 1102 struct queue *q; 1103 struct kernel_queue *kq; 1104 struct list_head process_queue_list; 1105 }; 1106 1107 void kfd_process_dequeue_from_device(struct kfd_process_device *pdd); 1108 void kfd_process_dequeue_from_all_devices(struct kfd_process *p); 1109 int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p); 1110 void pqm_uninit(struct process_queue_manager *pqm); 1111 int pqm_create_queue(struct process_queue_manager *pqm, 1112 struct kfd_dev *dev, 1113 struct file *f, 1114 struct queue_properties *properties, 1115 unsigned int *qid, 1116 uint32_t *p_doorbell_offset_in_process); 1117 int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid); 1118 int pqm_update_queue_properties(struct process_queue_manager *pqm, unsigned int qid, 1119 struct queue_properties *p); 1120 int pqm_update_mqd(struct process_queue_manager *pqm, unsigned int qid, 1121 struct mqd_update_info *minfo); 1122 int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid, 1123 void *gws); 1124 struct kernel_queue *pqm_get_kernel_queue(struct process_queue_manager *pqm, 1125 unsigned int qid); 1126 struct queue *pqm_get_user_queue(struct process_queue_manager *pqm, 1127 unsigned int qid); 1128 int pqm_get_wave_state(struct process_queue_manager *pqm, 1129 unsigned int qid, 1130 void __user *ctl_stack, 1131 u32 *ctl_stack_used_size, 1132 u32 *save_area_used_size); 1133 1134 int amdkfd_fence_wait_timeout(uint64_t *fence_addr, 1135 uint64_t fence_value, 1136 unsigned int timeout_ms); 1137 1138 /* Packet Manager */ 1139 1140 #define KFD_FENCE_COMPLETED (100) 1141 #define KFD_FENCE_INIT (10) 1142 1143 struct packet_manager { 1144 struct device_queue_manager *dqm; 1145 struct kernel_queue *priv_queue; 1146 struct mutex lock; 1147 bool allocated; 1148 struct kfd_mem_obj *ib_buffer_obj; 1149 unsigned int ib_size_bytes; 1150 bool is_over_subscription; 1151 1152 const struct packet_manager_funcs *pmf; 1153 }; 1154 1155 struct packet_manager_funcs { 1156 /* Support ASIC-specific packet formats for PM4 packets */ 1157 int (*map_process)(struct packet_manager *pm, uint32_t *buffer, 1158 struct qcm_process_device *qpd); 1159 int (*runlist)(struct packet_manager *pm, uint32_t *buffer, 1160 uint64_t ib, size_t ib_size_in_dwords, bool chain); 1161 int (*set_resources)(struct packet_manager *pm, uint32_t *buffer, 1162 struct scheduling_resources *res); 1163 int (*map_queues)(struct packet_manager *pm, uint32_t *buffer, 1164 struct queue *q, bool is_static); 1165 int (*unmap_queues)(struct packet_manager *pm, uint32_t *buffer, 1166 enum kfd_queue_type type, 1167 enum kfd_unmap_queues_filter mode, 1168 uint32_t filter_param, bool reset, 1169 unsigned int sdma_engine); 1170 int (*query_status)(struct packet_manager *pm, uint32_t *buffer, 1171 uint64_t fence_address, uint64_t fence_value); 1172 int (*release_mem)(uint64_t gpu_addr, uint32_t *buffer); 1173 1174 /* Packet sizes */ 1175 int map_process_size; 1176 int runlist_size; 1177 int set_resources_size; 1178 int map_queues_size; 1179 int unmap_queues_size; 1180 int query_status_size; 1181 int release_mem_size; 1182 }; 1183 1184 extern const struct packet_manager_funcs kfd_vi_pm_funcs; 1185 extern const struct packet_manager_funcs kfd_v9_pm_funcs; 1186 extern const struct packet_manager_funcs kfd_aldebaran_pm_funcs; 1187 1188 int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm); 1189 void pm_uninit(struct packet_manager *pm, bool hanging); 1190 int pm_send_set_resources(struct packet_manager *pm, 1191 struct scheduling_resources *res); 1192 int pm_send_runlist(struct packet_manager *pm, struct list_head *dqm_queues); 1193 int pm_send_query_status(struct packet_manager *pm, uint64_t fence_address, 1194 uint64_t fence_value); 1195 1196 int pm_send_unmap_queue(struct packet_manager *pm, enum kfd_queue_type type, 1197 enum kfd_unmap_queues_filter mode, 1198 uint32_t filter_param, bool reset, 1199 unsigned int sdma_engine); 1200 1201 void pm_release_ib(struct packet_manager *pm); 1202 1203 /* Following PM funcs can be shared among VI and AI */ 1204 unsigned int pm_build_pm4_header(unsigned int opcode, size_t packet_size); 1205 1206 uint64_t kfd_get_number_elems(struct kfd_dev *kfd); 1207 1208 /* Events */ 1209 extern const struct kfd_event_interrupt_class event_interrupt_class_cik; 1210 extern const struct kfd_event_interrupt_class event_interrupt_class_v9; 1211 1212 extern const struct kfd_device_global_init_class device_global_init_class_cik; 1213 1214 void kfd_event_init_process(struct kfd_process *p); 1215 void kfd_event_free_process(struct kfd_process *p); 1216 int kfd_event_mmap(struct kfd_process *process, struct vm_area_struct *vma); 1217 int kfd_wait_on_events(struct kfd_process *p, 1218 uint32_t num_events, void __user *data, 1219 bool all, uint32_t user_timeout_ms, 1220 uint32_t *wait_result); 1221 void kfd_signal_event_interrupt(u32 pasid, uint32_t partial_id, 1222 uint32_t valid_id_bits); 1223 void kfd_signal_iommu_event(struct kfd_dev *dev, 1224 u32 pasid, unsigned long address, 1225 bool is_write_requested, bool is_execute_requested); 1226 void kfd_signal_hw_exception_event(u32 pasid); 1227 int kfd_set_event(struct kfd_process *p, uint32_t event_id); 1228 int kfd_reset_event(struct kfd_process *p, uint32_t event_id); 1229 int kfd_event_page_set(struct kfd_process *p, void *kernel_address, 1230 uint64_t size); 1231 int kfd_event_create(struct file *devkfd, struct kfd_process *p, 1232 uint32_t event_type, bool auto_reset, uint32_t node_id, 1233 uint32_t *event_id, uint32_t *event_trigger_data, 1234 uint64_t *event_page_offset, uint32_t *event_slot_index); 1235 int kfd_event_destroy(struct kfd_process *p, uint32_t event_id); 1236 1237 void kfd_signal_vm_fault_event(struct kfd_dev *dev, u32 pasid, 1238 struct kfd_vm_fault_info *info); 1239 1240 void kfd_signal_reset_event(struct kfd_dev *dev); 1241 1242 void kfd_signal_poison_consumed_event(struct kfd_dev *dev, u32 pasid); 1243 1244 void kfd_flush_tlb(struct kfd_process_device *pdd, enum TLB_FLUSH_TYPE type); 1245 1246 int dbgdev_wave_reset_wavefronts(struct kfd_dev *dev, struct kfd_process *p); 1247 1248 bool kfd_is_locked(void); 1249 1250 /* Compute profile */ 1251 void kfd_inc_compute_active(struct kfd_dev *dev); 1252 void kfd_dec_compute_active(struct kfd_dev *dev); 1253 1254 /* Cgroup Support */ 1255 /* Check with device cgroup if @kfd device is accessible */ 1256 static inline int kfd_devcgroup_check_permission(struct kfd_dev *kfd) 1257 { 1258 #if defined(CONFIG_CGROUP_DEVICE) || defined(CONFIG_CGROUP_BPF) 1259 struct drm_device *ddev = kfd->ddev; 1260 1261 return devcgroup_check_permission(DEVCG_DEV_CHAR, DRM_MAJOR, 1262 ddev->render->index, 1263 DEVCG_ACC_WRITE | DEVCG_ACC_READ); 1264 #else 1265 return 0; 1266 #endif 1267 } 1268 1269 /* Debugfs */ 1270 #if defined(CONFIG_DEBUG_FS) 1271 1272 void kfd_debugfs_init(void); 1273 void kfd_debugfs_fini(void); 1274 int kfd_debugfs_mqds_by_process(struct seq_file *m, void *data); 1275 int pqm_debugfs_mqds(struct seq_file *m, void *data); 1276 int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data); 1277 int dqm_debugfs_hqds(struct seq_file *m, void *data); 1278 int kfd_debugfs_rls_by_device(struct seq_file *m, void *data); 1279 int pm_debugfs_runlist(struct seq_file *m, void *data); 1280 1281 int kfd_debugfs_hang_hws(struct kfd_dev *dev); 1282 int pm_debugfs_hang_hws(struct packet_manager *pm); 1283 int dqm_debugfs_hang_hws(struct device_queue_manager *dqm); 1284 1285 #else 1286 1287 static inline void kfd_debugfs_init(void) {} 1288 static inline void kfd_debugfs_fini(void) {} 1289 1290 #endif 1291 1292 #endif 1293