1d87f36a0SRajneesh Bhardwaj /* SPDX-License-Identifier: GPL-2.0 OR MIT */ 24a488a7aSOded Gabbay /* 3d87f36a0SRajneesh Bhardwaj * Copyright 2014-2022 Advanced Micro Devices, Inc. 44a488a7aSOded Gabbay * 54a488a7aSOded Gabbay * Permission is hereby granted, free of charge, to any person obtaining a 64a488a7aSOded Gabbay * copy of this software and associated documentation files (the "Software"), 74a488a7aSOded Gabbay * to deal in the Software without restriction, including without limitation 84a488a7aSOded Gabbay * the rights to use, copy, modify, merge, publish, distribute, sublicense, 94a488a7aSOded Gabbay * and/or sell copies of the Software, and to permit persons to whom the 104a488a7aSOded Gabbay * Software is furnished to do so, subject to the following conditions: 114a488a7aSOded Gabbay * 124a488a7aSOded Gabbay * The above copyright notice and this permission notice shall be included in 134a488a7aSOded Gabbay * all copies or substantial portions of the Software. 144a488a7aSOded Gabbay * 154a488a7aSOded Gabbay * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 164a488a7aSOded Gabbay * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 174a488a7aSOded Gabbay * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 184a488a7aSOded Gabbay * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 194a488a7aSOded Gabbay * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 204a488a7aSOded Gabbay * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 214a488a7aSOded Gabbay * OTHER DEALINGS IN THE SOFTWARE. 224a488a7aSOded Gabbay */ 234a488a7aSOded Gabbay 244a488a7aSOded Gabbay #ifndef KFD_PRIV_H_INCLUDED 254a488a7aSOded Gabbay #define KFD_PRIV_H_INCLUDED 264a488a7aSOded Gabbay 274a488a7aSOded Gabbay #include <linux/hashtable.h> 284a488a7aSOded Gabbay #include <linux/mmu_notifier.h> 29dc90f084SChristoph Hellwig #include <linux/memremap.h> 304a488a7aSOded Gabbay #include <linux/mutex.h> 314a488a7aSOded Gabbay #include <linux/types.h> 324a488a7aSOded Gabbay #include <linux/atomic.h> 334a488a7aSOded Gabbay #include <linux/workqueue.h> 344a488a7aSOded Gabbay #include <linux/spinlock.h> 3519f6d2a6SOded Gabbay #include <linux/kfd_ioctl.h> 36482f0777SFelix Kuehling #include <linux/idr.h> 3704ad47bdSAndres Rodriguez #include <linux/kfifo.h> 38851a645eSFelix Kuehling #include <linux/seq_file.h> 395ce10687SFelix Kuehling #include <linux/kref.h> 40de9f26bbSKent Russell #include <linux/sysfs.h> 416b855f7bSHarish Kasiviswanathan #include <linux/device_cgroup.h> 421cd4d9eeSStephen Rothwell #include <drm/drm_file.h> 431cd4d9eeSStephen Rothwell #include <drm/drm_drv.h> 441cd4d9eeSStephen Rothwell #include <drm/drm_device.h> 4599c7b309SLorenz Brun #include <drm/drm_ioctl.h> 464a488a7aSOded Gabbay #include <kgd_kfd_interface.h> 476d220a7eSAmber Lin #include <linux/swap.h> 484a488a7aSOded Gabbay 49e596b903SYong Zhao #include "amd_shared.h" 506ae27841SAlex Sierra #include "amdgpu.h" 51e596b903SYong Zhao 52af47b390SLaura Abbott #define KFD_MAX_RING_ENTRY_SIZE 8 53af47b390SLaura Abbott 545b5c4e40SEvgeny Pinchuk #define KFD_SYSFS_FILE_MODE 0444 555b5c4e40SEvgeny Pinchuk 56df03ef93SHarish Kasiviswanathan /* GPU ID hash width in bits */ 57df03ef93SHarish Kasiviswanathan #define KFD_GPU_ID_HASH_WIDTH 16 58df03ef93SHarish Kasiviswanathan 59df03ef93SHarish Kasiviswanathan /* Use upper bits of mmap offset to store KFD driver specific information. 60df03ef93SHarish Kasiviswanathan * BITS[63:62] - Encode MMAP type 61df03ef93SHarish Kasiviswanathan * BITS[61:46] - Encode gpu_id. To identify to which GPU the offset belongs to 62df03ef93SHarish Kasiviswanathan * BITS[45:0] - MMAP offset value 63df03ef93SHarish Kasiviswanathan * 64df03ef93SHarish Kasiviswanathan * NOTE: struct vm_area_struct.vm_pgoff uses offset in pages. Hence, these 65df03ef93SHarish Kasiviswanathan * defines are w.r.t to PAGE_SIZE 66df03ef93SHarish Kasiviswanathan */ 6729453755SYong Zhao #define KFD_MMAP_TYPE_SHIFT 62 68df03ef93SHarish Kasiviswanathan #define KFD_MMAP_TYPE_MASK (0x3ULL << KFD_MMAP_TYPE_SHIFT) 69df03ef93SHarish Kasiviswanathan #define KFD_MMAP_TYPE_DOORBELL (0x3ULL << KFD_MMAP_TYPE_SHIFT) 70df03ef93SHarish Kasiviswanathan #define KFD_MMAP_TYPE_EVENTS (0x2ULL << KFD_MMAP_TYPE_SHIFT) 71df03ef93SHarish Kasiviswanathan #define KFD_MMAP_TYPE_RESERVED_MEM (0x1ULL << KFD_MMAP_TYPE_SHIFT) 72d33ea570SOak Zeng #define KFD_MMAP_TYPE_MMIO (0x0ULL << KFD_MMAP_TYPE_SHIFT) 73df03ef93SHarish Kasiviswanathan 7429453755SYong Zhao #define KFD_MMAP_GPU_ID_SHIFT 46 75df03ef93SHarish Kasiviswanathan #define KFD_MMAP_GPU_ID_MASK (((1ULL << KFD_GPU_ID_HASH_WIDTH) - 1) \ 76df03ef93SHarish Kasiviswanathan << KFD_MMAP_GPU_ID_SHIFT) 77df03ef93SHarish Kasiviswanathan #define KFD_MMAP_GPU_ID(gpu_id) ((((uint64_t)gpu_id) << KFD_MMAP_GPU_ID_SHIFT)\ 78df03ef93SHarish Kasiviswanathan & KFD_MMAP_GPU_ID_MASK) 7929453755SYong Zhao #define KFD_MMAP_GET_GPU_ID(offset) ((offset & KFD_MMAP_GPU_ID_MASK) \ 80df03ef93SHarish Kasiviswanathan >> KFD_MMAP_GPU_ID_SHIFT) 81df03ef93SHarish Kasiviswanathan 82ed6e6a34SBen Goz /* 83ed6e6a34SBen Goz * When working with cp scheduler we should assign the HIQ manually or via 84e7016d8eSYong Zhao * the amdgpu driver to a fixed hqd slot, here are the fixed HIQ hqd slot 85ed6e6a34SBen Goz * definitions for Kaveri. In Kaveri only the first ME queues participates 86ed6e6a34SBen Goz * in the cp scheduling taking that in mind we set the HIQ slot in the 87ed6e6a34SBen Goz * second ME. 88ed6e6a34SBen Goz */ 89ed6e6a34SBen Goz #define KFD_CIK_HIQ_PIPE 4 90ed6e6a34SBen Goz #define KFD_CIK_HIQ_QUEUE 0 91ed6e6a34SBen Goz 925b5c4e40SEvgeny Pinchuk /* Macro for allocating structures */ 935b5c4e40SEvgeny Pinchuk #define kfd_alloc_struct(ptr_to_struct) \ 945b5c4e40SEvgeny Pinchuk ((typeof(ptr_to_struct)) kzalloc(sizeof(*ptr_to_struct), GFP_KERNEL)) 955b5c4e40SEvgeny Pinchuk 9619f6d2a6SOded Gabbay #define KFD_MAX_NUM_OF_PROCESSES 512 97b8cbab04SOded Gabbay #define KFD_MAX_NUM_OF_QUEUES_PER_PROCESS 1024 9819f6d2a6SOded Gabbay 9919f6d2a6SOded Gabbay /* 100373d7080SFelix Kuehling * Size of the per-process TBA+TMA buffer: 2 pages 101373d7080SFelix Kuehling * 102373d7080SFelix Kuehling * The first page is the TBA used for the CWSR ISA code. The second 103a4497974SRajneesh Bhardwaj * page is used as TMA for user-mode trap handler setup in daisy-chain mode. 104373d7080SFelix Kuehling */ 105373d7080SFelix Kuehling #define KFD_CWSR_TBA_TMA_SIZE (PAGE_SIZE * 2) 106373d7080SFelix Kuehling #define KFD_CWSR_TMA_OFFSET PAGE_SIZE 107373d7080SFelix Kuehling 10874523943SYong Zhao #define KFD_MAX_NUM_OF_QUEUES_PER_DEVICE \ 10974523943SYong Zhao (KFD_MAX_NUM_OF_PROCESSES * \ 11074523943SYong Zhao KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) 11174523943SYong Zhao 11274523943SYong Zhao #define KFD_KERNEL_QUEUE_SIZE 2048 11374523943SYong Zhao 11414328aa5SPhilip Cox #define KFD_UNMAP_LATENCY_MS (4000) 11514328aa5SPhilip Cox 116373d7080SFelix Kuehling /* 1171f86805aSYong Zhao * 512 = 0x200 1181f86805aSYong Zhao * The doorbell index distance between SDMA RLC (2*i) and (2*i+1) in the 1191f86805aSYong Zhao * same SDMA engine on SOC15, which has 8-byte doorbells for SDMA. 1201f86805aSYong Zhao * 512 8-byte doorbell distance (i.e. one page away) ensures that SDMA RLC 1211f86805aSYong Zhao * (2*i+1) doorbells (in terms of the lower 12 bit address) lie exactly in 1221f86805aSYong Zhao * the OFFSET and SIZE set in registers like BIF_SDMA0_DOORBELL_RANGE. 1231f86805aSYong Zhao */ 1241f86805aSYong Zhao #define KFD_QUEUE_DOORBELL_MIRROR_OFFSET 512 1251f86805aSYong Zhao 12636988070SRajneesh Bhardwaj /** 12736988070SRajneesh Bhardwaj * enum kfd_ioctl_flags - KFD ioctl flags 12836988070SRajneesh Bhardwaj * Various flags that can be set in &amdkfd_ioctl_desc.flags to control how 12936988070SRajneesh Bhardwaj * userspace can use a given ioctl. 13036988070SRajneesh Bhardwaj */ 13136988070SRajneesh Bhardwaj enum kfd_ioctl_flags { 13236988070SRajneesh Bhardwaj /* 13336988070SRajneesh Bhardwaj * @KFD_IOC_FLAG_CHECKPOINT_RESTORE: 13436988070SRajneesh Bhardwaj * Certain KFD ioctls such as AMDKFD_IOC_CRIU_OP can potentially 13536988070SRajneesh Bhardwaj * perform privileged operations and load arbitrary data into MQDs and 13636988070SRajneesh Bhardwaj * eventually HQD registers when the queue is mapped by HWS. In order to 13736988070SRajneesh Bhardwaj * prevent this we should perform additional security checks. 13836988070SRajneesh Bhardwaj * 13936988070SRajneesh Bhardwaj * This is equivalent to callers with the CHECKPOINT_RESTORE capability. 14036988070SRajneesh Bhardwaj * 14136988070SRajneesh Bhardwaj * Note: Since earlier versions of docker do not support CHECKPOINT_RESTORE, 14236988070SRajneesh Bhardwaj * we also allow ioctls with SYS_ADMIN capability. 14336988070SRajneesh Bhardwaj */ 14436988070SRajneesh Bhardwaj KFD_IOC_FLAG_CHECKPOINT_RESTORE = BIT(0), 14536988070SRajneesh Bhardwaj }; 1461f86805aSYong Zhao /* 147b8cbab04SOded Gabbay * Kernel module parameter to specify maximum number of supported queues per 148b8cbab04SOded Gabbay * device 14919f6d2a6SOded Gabbay */ 150b8cbab04SOded Gabbay extern int max_num_of_queues_per_device; 15119f6d2a6SOded Gabbay 152ed6e6a34SBen Goz 15331c21fecSBen Goz /* Kernel module parameter to specify the scheduling policy */ 15431c21fecSBen Goz extern int sched_policy; 15531c21fecSBen Goz 156a99c6d4fSFelix Kuehling /* 157a99c6d4fSFelix Kuehling * Kernel module parameter to specify the maximum process 158a99c6d4fSFelix Kuehling * number per HW scheduler 159a99c6d4fSFelix Kuehling */ 160a99c6d4fSFelix Kuehling extern int hws_max_conc_proc; 161a99c6d4fSFelix Kuehling 162373d7080SFelix Kuehling extern int cwsr_enable; 163373d7080SFelix Kuehling 16481663016SOded Gabbay /* 16581663016SOded Gabbay * Kernel module parameter to specify whether to send sigterm to HSA process on 16681663016SOded Gabbay * unhandled exception 16781663016SOded Gabbay */ 16881663016SOded Gabbay extern int send_sigterm; 16981663016SOded Gabbay 170ebcfd1e2SFelix Kuehling /* 171374200b1SFelix Kuehling * This kernel module is used to simulate large bar machine on non-large bar 172374200b1SFelix Kuehling * enabled machines. 173374200b1SFelix Kuehling */ 174374200b1SFelix Kuehling extern int debug_largebar; 175374200b1SFelix Kuehling 176374200b1SFelix Kuehling /* 177ebcfd1e2SFelix Kuehling * Ignore CRAT table during KFD initialization, can be used to work around 178ebcfd1e2SFelix Kuehling * broken CRAT tables on some AMD systems 179ebcfd1e2SFelix Kuehling */ 180ebcfd1e2SFelix Kuehling extern int ignore_crat; 181ebcfd1e2SFelix Kuehling 182a4497974SRajneesh Bhardwaj /* Set sh_mem_config.retry_disable on GFX v9 */ 18375ee6487SFelix Kuehling extern int amdgpu_noretry; 184bed4f110SFelix Kuehling 185a4497974SRajneesh Bhardwaj /* Halt if HWS hang is detected */ 1860e9a860cSYong Zhao extern int halt_if_hws_hang; 1870e9a860cSYong Zhao 188a4497974SRajneesh Bhardwaj /* Whether MEC FW support GWS barriers */ 18929e76462SOak Zeng extern bool hws_gws_support; 19029e76462SOak Zeng 191a4497974SRajneesh Bhardwaj /* Queue preemption timeout in ms */ 19214328aa5SPhilip Cox extern int queue_preemption_timeout_ms; 19314328aa5SPhilip Cox 1946d909c5dSOak Zeng /* 1956d909c5dSOak Zeng * Don't evict process queues on vm fault 1966d909c5dSOak Zeng */ 1976d909c5dSOak Zeng extern int amdgpu_no_queue_eviction_on_vm_fault; 1986d909c5dSOak Zeng 199a4497974SRajneesh Bhardwaj /* Enable eviction debug messages */ 200b2057956SFelix Kuehling extern bool debug_evictions; 201b2057956SFelix Kuehling 202ed6e6a34SBen Goz enum cache_policy { 203ed6e6a34SBen Goz cache_policy_coherent, 204ed6e6a34SBen Goz cache_policy_noncoherent 205ed6e6a34SBen Goz }; 206ed6e6a34SBen Goz 207dd0ae064SGraham Sider #define KFD_GC_VERSION(dev) ((dev)->adev->ip_versions[GC_HWIP][0]) 208dd0ae064SGraham Sider #define KFD_IS_SOC15(dev) ((KFD_GC_VERSION(dev)) >= (IP_VERSION(9, 0, 1))) 209ef568db7SFelix Kuehling 210f3a39818SAndrew Lewycky struct kfd_event_interrupt_class { 211f3a39818SAndrew Lewycky bool (*interrupt_isr)(struct kfd_dev *dev, 21258e69886SLan Xiao const uint32_t *ih_ring_entry, uint32_t *patched_ihre, 21358e69886SLan Xiao bool *patched_flag); 214f3a39818SAndrew Lewycky void (*interrupt_wq)(struct kfd_dev *dev, 215f3a39818SAndrew Lewycky const uint32_t *ih_ring_entry); 216f3a39818SAndrew Lewycky }; 217f3a39818SAndrew Lewycky 2184a488a7aSOded Gabbay struct kfd_device_info { 2199d6fa9c7SGraham Sider uint32_t gfx_target_version; 220f3a39818SAndrew Lewycky const struct kfd_event_interrupt_class *event_interrupt_class; 2214a488a7aSOded Gabbay unsigned int max_pasid_bits; 222992839adSYair Shachar unsigned int max_no_of_hqd; 223ada2b29cSFelix Kuehling unsigned int doorbell_size; 2244a488a7aSOded Gabbay size_t ih_ring_entry_size; 225f7c826adSAlexey Skidanov uint8_t num_of_watch_points; 22619f6d2a6SOded Gabbay uint16_t mqd_size_aligned; 227373d7080SFelix Kuehling bool supports_cwsr; 22864d1c3a4SFelix Kuehling bool needs_iommu_device; 2293ee2d00cSFelix Kuehling bool needs_pci_atomics; 230fb932dfeSFelix Kuehling uint32_t no_atomic_fw_version; 231d5094189SShaoyun Liu unsigned int num_sdma_queues_per_engine; 232cc009e61SMukul Joshi unsigned int num_reserved_sdma_queues_per_engine; 233cc009e61SMukul Joshi uint64_t reserved_sdma_queues_bitmap; 2344a488a7aSOded Gabbay }; 2354a488a7aSOded Gabbay 236ee2f17f4SAmber Lin unsigned int kfd_get_num_sdma_engines(struct kfd_dev *kdev); 237ee2f17f4SAmber Lin unsigned int kfd_get_num_xgmi_sdma_engines(struct kfd_dev *kdev); 238ee2f17f4SAmber Lin 23936b5c08fSOded Gabbay struct kfd_mem_obj { 24036b5c08fSOded Gabbay uint32_t range_start; 24136b5c08fSOded Gabbay uint32_t range_end; 24236b5c08fSOded Gabbay uint64_t gpu_addr; 24336b5c08fSOded Gabbay uint32_t *cpu_ptr; 244b91d43ddSFelix Kuehling void *gtt_mem; 24536b5c08fSOded Gabbay }; 24636b5c08fSOded Gabbay 24744008d7aSYong Zhao struct kfd_vmid_info { 24844008d7aSYong Zhao uint32_t first_vmid_kfd; 24944008d7aSYong Zhao uint32_t last_vmid_kfd; 25044008d7aSYong Zhao uint32_t vmid_num_kfd; 25144008d7aSYong Zhao }; 25244008d7aSYong Zhao 2534a488a7aSOded Gabbay struct kfd_dev { 254c6c57446SGraham Sider struct amdgpu_device *adev; 2554a488a7aSOded Gabbay 256f0dc99a6SGraham Sider struct kfd_device_info device_info; 2574a488a7aSOded Gabbay struct pci_dev *pdev; 2583a0c3423SHarish Kasiviswanathan struct drm_device *ddev; 2594a488a7aSOded Gabbay 2604a488a7aSOded Gabbay unsigned int id; /* topology stub index */ 2614a488a7aSOded Gabbay 26219f6d2a6SOded Gabbay phys_addr_t doorbell_base; /* Start of actual doorbells used by 26319f6d2a6SOded Gabbay * KFD. It is aligned for mapping 26419f6d2a6SOded Gabbay * into user mode 26519f6d2a6SOded Gabbay */ 266339903faSYong Zhao size_t doorbell_base_dw_offset; /* Offset from the start of the PCI 267339903faSYong Zhao * doorbell BAR to the first KFD 268339903faSYong Zhao * doorbell in dwords. GFX reserves 269339903faSYong Zhao * the segment before this offset. 27019f6d2a6SOded Gabbay */ 27119f6d2a6SOded Gabbay u32 __iomem *doorbell_kernel_ptr; /* This is a pointer for a doorbells 27219f6d2a6SOded Gabbay * page used by kernel queue 27319f6d2a6SOded Gabbay */ 27419f6d2a6SOded Gabbay 2754a488a7aSOded Gabbay struct kgd2kfd_shared_resources shared_resources; 27644008d7aSYong Zhao struct kfd_vmid_info vm_info; 277b179fc28SMukul Joshi struct kfd_local_mem_info local_mem_info; 2784a488a7aSOded Gabbay 279cea405b1SXihan Zhang const struct kfd2kgd_calls *kfd2kgd; 280cea405b1SXihan Zhang struct mutex doorbell_mutex; 281f761d8bdSJoe Perches DECLARE_BITMAP(doorbell_available_index, 282f761d8bdSJoe Perches KFD_MAX_NUM_OF_QUEUES_PER_PROCESS); 283cea405b1SXihan Zhang 28436b5c08fSOded Gabbay void *gtt_mem; 28536b5c08fSOded Gabbay uint64_t gtt_start_gpu_addr; 28636b5c08fSOded Gabbay void *gtt_start_cpu_ptr; 28736b5c08fSOded Gabbay void *gtt_sa_bitmap; 28836b5c08fSOded Gabbay struct mutex gtt_sa_lock; 28936b5c08fSOded Gabbay unsigned int gtt_sa_chunk_size; 29036b5c08fSOded Gabbay unsigned int gtt_sa_num_of_chunks; 29136b5c08fSOded Gabbay 2922249d558SAndrew Lewycky /* Interrupts */ 29304ad47bdSAndres Rodriguez struct kfifo ih_fifo; 29448e876a2SAndres Rodriguez struct workqueue_struct *ih_wq; 2952249d558SAndrew Lewycky struct work_struct interrupt_work; 2962249d558SAndrew Lewycky spinlock_t interrupt_lock; 2972249d558SAndrew Lewycky 298ed6e6a34SBen Goz /* QCM Device instance */ 299ed6e6a34SBen Goz struct device_queue_manager *dqm; 3004a488a7aSOded Gabbay 301ed6e6a34SBen Goz bool init_complete; 3022249d558SAndrew Lewycky /* 3032249d558SAndrew Lewycky * Interrupts of interest to KFD are copied 3042249d558SAndrew Lewycky * from the HW ring into a SW ring. 3052249d558SAndrew Lewycky */ 3062249d558SAndrew Lewycky bool interrupts_active; 307fbeb661bSYair Shachar 3085ade6c9cSFelix Kuehling /* Firmware versions */ 3095ade6c9cSFelix Kuehling uint16_t mec_fw_version; 31029633d0eSJoseph Greathouse uint16_t mec2_fw_version; 3115ade6c9cSFelix Kuehling uint16_t sdma_fw_version; 3125ade6c9cSFelix Kuehling 313a99c6d4fSFelix Kuehling /* Maximum process number mapped to HW scheduler */ 314a99c6d4fSFelix Kuehling unsigned int max_proc_per_quantum; 315a99c6d4fSFelix Kuehling 316373d7080SFelix Kuehling /* CWSR */ 317373d7080SFelix Kuehling bool cwsr_enabled; 318373d7080SFelix Kuehling const void *cwsr_isa; 319373d7080SFelix Kuehling unsigned int cwsr_isa_size; 3200c1690e3SShaoyun Liu 3210c1690e3SShaoyun Liu /* xGMI */ 3220c1690e3SShaoyun Liu uint64_t hive_id; 3230c663695SDivya Shikre 324d35f00d8SEric Huang bool pci_atomic_requested; 3259b54d201SEric Huang 3266127896fSHuang Rui /* Use IOMMU v2 flag */ 3276127896fSHuang Rui bool use_iommu_v2; 3286127896fSHuang Rui 3299b54d201SEric Huang /* SRAM ECC flag */ 3309b54d201SEric Huang atomic_t sram_ecc_flag; 331f756e631SHarish Kasiviswanathan 332f756e631SHarish Kasiviswanathan /* Compute Profile ref. count */ 333f756e631SHarish Kasiviswanathan atomic_t compute_profile; 334e09d4fc8SOak Zeng 335a4497974SRajneesh Bhardwaj /* Global GWS resource shared between processes */ 336e09d4fc8SOak Zeng void *gws; 337938a0650SAmber Lin 338938a0650SAmber Lin /* Clients watching SMI events */ 339938a0650SAmber Lin struct list_head smi_clients; 340938a0650SAmber Lin spinlock_t smi_lock; 34155977744SMukul Joshi 34255977744SMukul Joshi uint32_t reset_seq_num; 34359d7115dSMukul Joshi 34459d7115dSMukul Joshi struct ida doorbell_ida; 34559d7115dSMukul Joshi unsigned int max_doorbell_slices; 3469b498efaSAlex Deucher 3479b498efaSAlex Deucher int noretry; 348814ab993SPhilip Yang 349814ab993SPhilip Yang /* HMM page migration MEMORY_DEVICE_PRIVATE mapping */ 350814ab993SPhilip Yang struct dev_pagemap pgmap; 3514a488a7aSOded Gabbay }; 3524a488a7aSOded Gabbay 35319f6d2a6SOded Gabbay enum kfd_mempool { 35419f6d2a6SOded Gabbay KFD_MEMPOOL_SYSTEM_CACHEABLE = 1, 35519f6d2a6SOded Gabbay KFD_MEMPOOL_SYSTEM_WRITECOMBINE = 2, 35619f6d2a6SOded Gabbay KFD_MEMPOOL_FRAMEBUFFER = 3, 35719f6d2a6SOded Gabbay }; 35819f6d2a6SOded Gabbay 3594a488a7aSOded Gabbay /* Character device interface */ 3604a488a7aSOded Gabbay int kfd_chardev_init(void); 3614a488a7aSOded Gabbay void kfd_chardev_exit(void); 3624a488a7aSOded Gabbay 363241f24f8SBen Goz /** 364a4497974SRajneesh Bhardwaj * enum kfd_unmap_queues_filter - Enum for queue filters. 365241f24f8SBen Goz * 3667da2bcf8SYong Zhao * @KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES: Preempts all queues in the 367241f24f8SBen Goz * running queues list. 368241f24f8SBen Goz * 369d2cb0b21SJonathan Kim * @KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES: Preempts all non-static queues 370d2cb0b21SJonathan Kim * in the run list. 371d2cb0b21SJonathan Kim * 3727da2bcf8SYong Zhao * @KFD_UNMAP_QUEUES_FILTER_BY_PASID: Preempts queues that belongs to 373241f24f8SBen Goz * specific process. 374241f24f8SBen Goz * 375241f24f8SBen Goz */ 3767da2bcf8SYong Zhao enum kfd_unmap_queues_filter { 377d2cb0b21SJonathan Kim KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES = 1, 378d2cb0b21SJonathan Kim KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES = 2, 379d2cb0b21SJonathan Kim KFD_UNMAP_QUEUES_FILTER_BY_PASID = 3 380241f24f8SBen Goz }; 38119f6d2a6SOded Gabbay 382ed8aab45SBen Goz /** 383a4497974SRajneesh Bhardwaj * enum kfd_queue_type - Enum for various queue types. 384ed8aab45SBen Goz * 385ed8aab45SBen Goz * @KFD_QUEUE_TYPE_COMPUTE: Regular user mode queue type. 386ed8aab45SBen Goz * 387a4497974SRajneesh Bhardwaj * @KFD_QUEUE_TYPE_SDMA: SDMA user mode queue type. 388ed8aab45SBen Goz * 389ed8aab45SBen Goz * @KFD_QUEUE_TYPE_HIQ: HIQ queue type. 390ed8aab45SBen Goz * 391ed8aab45SBen Goz * @KFD_QUEUE_TYPE_DIQ: DIQ queue type. 392a4497974SRajneesh Bhardwaj * 393a4497974SRajneesh Bhardwaj * @KFD_QUEUE_TYPE_SDMA_XGMI: Special SDMA queue for XGMI interface. 394ed8aab45SBen Goz */ 395ed8aab45SBen Goz enum kfd_queue_type { 396ed8aab45SBen Goz KFD_QUEUE_TYPE_COMPUTE, 397ed8aab45SBen Goz KFD_QUEUE_TYPE_SDMA, 398ed8aab45SBen Goz KFD_QUEUE_TYPE_HIQ, 3991b4670f6SOak Zeng KFD_QUEUE_TYPE_DIQ, 4001b4670f6SOak Zeng KFD_QUEUE_TYPE_SDMA_XGMI 401ed8aab45SBen Goz }; 402ed8aab45SBen Goz 4036e99df57SBen Goz enum kfd_queue_format { 4046e99df57SBen Goz KFD_QUEUE_FORMAT_PM4, 4056e99df57SBen Goz KFD_QUEUE_FORMAT_AQL 4066e99df57SBen Goz }; 4076e99df57SBen Goz 4080ccbc7cdSOak Zeng enum KFD_QUEUE_PRIORITY { 4090ccbc7cdSOak Zeng KFD_QUEUE_PRIORITY_MINIMUM = 0, 4100ccbc7cdSOak Zeng KFD_QUEUE_PRIORITY_MAXIMUM = 15 4110ccbc7cdSOak Zeng }; 4120ccbc7cdSOak Zeng 413ed8aab45SBen Goz /** 414ed8aab45SBen Goz * struct queue_properties 415ed8aab45SBen Goz * 416ed8aab45SBen Goz * @type: The queue type. 417ed8aab45SBen Goz * 418ed8aab45SBen Goz * @queue_id: Queue identifier. 419ed8aab45SBen Goz * 420ed8aab45SBen Goz * @queue_address: Queue ring buffer address. 421ed8aab45SBen Goz * 422ed8aab45SBen Goz * @queue_size: Queue ring buffer size. 423ed8aab45SBen Goz * 424ed8aab45SBen Goz * @priority: Defines the queue priority relative to other queues in the 425ed8aab45SBen Goz * process. 426ed8aab45SBen Goz * This is just an indication and HW scheduling may override the priority as 427ed8aab45SBen Goz * necessary while keeping the relative prioritization. 428ed8aab45SBen Goz * the priority granularity is from 0 to f which f is the highest priority. 429ed8aab45SBen Goz * currently all queues are initialized with the highest priority. 430ed8aab45SBen Goz * 431ed8aab45SBen Goz * @queue_percent: This field is partially implemented and currently a zero in 432ed8aab45SBen Goz * this field defines that the queue is non active. 433ed8aab45SBen Goz * 434ed8aab45SBen Goz * @read_ptr: User space address which points to the number of dwords the 435ed8aab45SBen Goz * cp read from the ring buffer. This field updates automatically by the H/W. 436ed8aab45SBen Goz * 437ed8aab45SBen Goz * @write_ptr: Defines the number of dwords written to the ring buffer. 438ed8aab45SBen Goz * 439a4497974SRajneesh Bhardwaj * @doorbell_ptr: Notifies the H/W of new packet written to the queue ring 440a4497974SRajneesh Bhardwaj * buffer. This field should be similar to write_ptr and the user should 441a4497974SRajneesh Bhardwaj * update this field after updating the write_ptr. 442ed8aab45SBen Goz * 443ed8aab45SBen Goz * @doorbell_off: The doorbell offset in the doorbell pci-bar. 444ed8aab45SBen Goz * 4458eabaf54SKent Russell * @is_interop: Defines if this is a interop queue. Interop queue means that 4468eabaf54SKent Russell * the queue can access both graphics and compute resources. 447ed8aab45SBen Goz * 44826103436SFelix Kuehling * @is_evicted: Defines if the queue is evicted. Only active queues 44926103436SFelix Kuehling * are evicted, rendering them inactive. 45026103436SFelix Kuehling * 45126103436SFelix Kuehling * @is_active: Defines if the queue is active or not. @is_active and 45226103436SFelix Kuehling * @is_evicted are protected by the DQM lock. 453ed8aab45SBen Goz * 454b8020b03SJoseph Greathouse * @is_gws: Defines if the queue has been updated to be GWS-capable or not. 455b8020b03SJoseph Greathouse * @is_gws should be protected by the DQM lock, since changing it can yield the 456b8020b03SJoseph Greathouse * possibility of updating DQM state on number of GWS queues. 457b8020b03SJoseph Greathouse * 458ed8aab45SBen Goz * @vmid: If the scheduling mode is no cp scheduling the field defines the vmid 459ed8aab45SBen Goz * of the queue. 460ed8aab45SBen Goz * 461ed8aab45SBen Goz * This structure represents the queue properties for each queue no matter if 462ed8aab45SBen Goz * it's user mode or kernel mode queue. 463ed8aab45SBen Goz * 464ed8aab45SBen Goz */ 4658668dfc3SDavid Yat Sin 466ed8aab45SBen Goz struct queue_properties { 467ed8aab45SBen Goz enum kfd_queue_type type; 4686e99df57SBen Goz enum kfd_queue_format format; 469ed8aab45SBen Goz unsigned int queue_id; 470ed8aab45SBen Goz uint64_t queue_address; 471ed8aab45SBen Goz uint64_t queue_size; 472ed8aab45SBen Goz uint32_t priority; 473ed8aab45SBen Goz uint32_t queue_percent; 474ed8aab45SBen Goz uint32_t *read_ptr; 475ed8aab45SBen Goz uint32_t *write_ptr; 476ada2b29cSFelix Kuehling void __iomem *doorbell_ptr; 477ed8aab45SBen Goz uint32_t doorbell_off; 478ed8aab45SBen Goz bool is_interop; 47926103436SFelix Kuehling bool is_evicted; 480ed8aab45SBen Goz bool is_active; 481b8020b03SJoseph Greathouse bool is_gws; 482ed8aab45SBen Goz /* Not relevant for user mode queues in cp scheduling */ 483ed8aab45SBen Goz unsigned int vmid; 48477669eb8SBen Goz /* Relevant only for sdma queues*/ 48577669eb8SBen Goz uint32_t sdma_engine_id; 48677669eb8SBen Goz uint32_t sdma_queue_id; 48777669eb8SBen Goz uint32_t sdma_vm_addr; 488ff3d04a1SBen Goz /* Relevant only for VI */ 489ff3d04a1SBen Goz uint64_t eop_ring_buffer_address; 490ff3d04a1SBen Goz uint32_t eop_ring_buffer_size; 491ff3d04a1SBen Goz uint64_t ctx_save_restore_area_address; 492ff3d04a1SBen Goz uint32_t ctx_save_restore_area_size; 493373d7080SFelix Kuehling uint32_t ctl_stack_size; 494373d7080SFelix Kuehling uint64_t tba_addr; 495373d7080SFelix Kuehling uint64_t tma_addr; 496ed8aab45SBen Goz }; 497ed8aab45SBen Goz 498bb2d2128SFelix Kuehling #define QUEUE_IS_ACTIVE(q) ((q).queue_size > 0 && \ 499bb2d2128SFelix Kuehling (q).queue_address != 0 && \ 500bb2d2128SFelix Kuehling (q).queue_percent > 0 && \ 501bb2d2128SFelix Kuehling !(q).is_evicted) 502bb2d2128SFelix Kuehling 5037c695a2cSLang Yu enum mqd_update_flag { 5047c695a2cSLang Yu UPDATE_FLAG_CU_MASK = 0, 5057c695a2cSLang Yu }; 5067c695a2cSLang Yu 5077c695a2cSLang Yu struct mqd_update_info { 5087c695a2cSLang Yu union { 5097c695a2cSLang Yu struct { 5107c695a2cSLang Yu uint32_t count; /* Must be a multiple of 32 */ 5117c695a2cSLang Yu uint32_t *ptr; 5127c695a2cSLang Yu } cu_mask; 5137c695a2cSLang Yu }; 5147c695a2cSLang Yu enum mqd_update_flag update_flag; 5157c695a2cSLang Yu }; 516c6e559ebSLang Yu 517ed8aab45SBen Goz /** 518ed8aab45SBen Goz * struct queue 519ed8aab45SBen Goz * 520ed8aab45SBen Goz * @list: Queue linked list. 521ed8aab45SBen Goz * 522a4497974SRajneesh Bhardwaj * @mqd: The queue MQD (memory queue descriptor). 523ed8aab45SBen Goz * 524ed8aab45SBen Goz * @mqd_mem_obj: The MQD local gpu memory object. 525ed8aab45SBen Goz * 526ed8aab45SBen Goz * @gart_mqd_addr: The MQD gart mc address. 527ed8aab45SBen Goz * 528ed8aab45SBen Goz * @properties: The queue properties. 529ed8aab45SBen Goz * 530ed8aab45SBen Goz * @mec: Used only in no cp scheduling mode and identifies to micro engine id 531a4497974SRajneesh Bhardwaj * that the queue should be executed on. 532ed8aab45SBen Goz * 5338eabaf54SKent Russell * @pipe: Used only in no cp scheduling mode and identifies the queue's pipe 5348eabaf54SKent Russell * id. 535ed8aab45SBen Goz * 536ed8aab45SBen Goz * @queue: Used only in no cp scheduliong mode and identifies the queue's slot. 537ed8aab45SBen Goz * 538ed8aab45SBen Goz * @process: The kfd process that created this queue. 539ed8aab45SBen Goz * 540ed8aab45SBen Goz * @device: The kfd device that created this queue. 541ed8aab45SBen Goz * 542eb82da1dSOak Zeng * @gws: Pointing to gws kgd_mem if this is a gws control queue; NULL 543eb82da1dSOak Zeng * otherwise. 544eb82da1dSOak Zeng * 545ed8aab45SBen Goz * This structure represents user mode compute queues. 546ed8aab45SBen Goz * It contains all the necessary data to handle such queues. 547ed8aab45SBen Goz * 548ed8aab45SBen Goz */ 549ed8aab45SBen Goz 550ed8aab45SBen Goz struct queue { 551ed8aab45SBen Goz struct list_head list; 552ed8aab45SBen Goz void *mqd; 553ed8aab45SBen Goz struct kfd_mem_obj *mqd_mem_obj; 554ed8aab45SBen Goz uint64_t gart_mqd_addr; 555ed8aab45SBen Goz struct queue_properties properties; 556ed8aab45SBen Goz 557ed8aab45SBen Goz uint32_t mec; 558ed8aab45SBen Goz uint32_t pipe; 559ed8aab45SBen Goz uint32_t queue; 560ed8aab45SBen Goz 56177669eb8SBen Goz unsigned int sdma_id; 562ef568db7SFelix Kuehling unsigned int doorbell_id; 56377669eb8SBen Goz 564ed8aab45SBen Goz struct kfd_process *process; 565ed8aab45SBen Goz struct kfd_dev *device; 566eb82da1dSOak Zeng void *gws; 5676d220a7eSAmber Lin 5686d220a7eSAmber Lin /* procfs */ 5696d220a7eSAmber Lin struct kobject kobj; 570cc009e61SMukul Joshi 571cc009e61SMukul Joshi void *gang_ctx_bo; 572cc009e61SMukul Joshi uint64_t gang_ctx_gpu_addr; 573cc009e61SMukul Joshi void *gang_ctx_cpu_ptr; 574e77a541fSGraham Sider 575e77a541fSGraham Sider struct amdgpu_bo *wptr_bo; 576ed8aab45SBen Goz }; 577ed8aab45SBen Goz 5786e99df57SBen Goz enum KFD_MQD_TYPE { 579d7c0b047SYong Zhao KFD_MQD_TYPE_HIQ = 0, /* for hiq */ 58085d258f9SBen Goz KFD_MQD_TYPE_CP, /* for cp queues and diq */ 58185d258f9SBen Goz KFD_MQD_TYPE_SDMA, /* for sdma queues */ 58259f650a0SOak Zeng KFD_MQD_TYPE_DIQ, /* for diq */ 5836e99df57SBen Goz KFD_MQD_TYPE_MAX 5846e99df57SBen Goz }; 5856e99df57SBen Goz 5860ccbc7cdSOak Zeng enum KFD_PIPE_PRIORITY { 5870ccbc7cdSOak Zeng KFD_PIPE_PRIORITY_CS_LOW = 0, 5880ccbc7cdSOak Zeng KFD_PIPE_PRIORITY_CS_MEDIUM, 5890ccbc7cdSOak Zeng KFD_PIPE_PRIORITY_CS_HIGH 5900ccbc7cdSOak Zeng }; 5910ccbc7cdSOak Zeng 592241f24f8SBen Goz struct scheduling_resources { 593241f24f8SBen Goz unsigned int vmid_mask; 594241f24f8SBen Goz enum kfd_queue_type type; 595241f24f8SBen Goz uint64_t queue_mask; 596241f24f8SBen Goz uint64_t gws_mask; 597241f24f8SBen Goz uint32_t oac_mask; 598241f24f8SBen Goz uint32_t gds_heap_base; 599241f24f8SBen Goz uint32_t gds_heap_size; 600241f24f8SBen Goz }; 601241f24f8SBen Goz 602241f24f8SBen Goz struct process_queue_manager { 603241f24f8SBen Goz /* data */ 604241f24f8SBen Goz struct kfd_process *process; 605241f24f8SBen Goz struct list_head queues; 606241f24f8SBen Goz unsigned long *queue_slot_bitmap; 607241f24f8SBen Goz }; 608241f24f8SBen Goz 609241f24f8SBen Goz struct qcm_process_device { 610241f24f8SBen Goz /* The Device Queue Manager that owns this data */ 611241f24f8SBen Goz struct device_queue_manager *dqm; 612241f24f8SBen Goz struct process_queue_manager *pqm; 613241f24f8SBen Goz /* Queues list */ 614241f24f8SBen Goz struct list_head queues_list; 615241f24f8SBen Goz struct list_head priv_queue_list; 616241f24f8SBen Goz 617241f24f8SBen Goz unsigned int queue_count; 618241f24f8SBen Goz unsigned int vmid; 619241f24f8SBen Goz bool is_debug; 62026103436SFelix Kuehling unsigned int evicted; /* eviction counter, 0=active */ 6219fd3f1bfSFelix Kuehling 6229fd3f1bfSFelix Kuehling /* This flag tells if we should reset all wavefronts on 6239fd3f1bfSFelix Kuehling * process termination 6249fd3f1bfSFelix Kuehling */ 6259fd3f1bfSFelix Kuehling bool reset_wavefronts; 6269fd3f1bfSFelix Kuehling 627b8020b03SJoseph Greathouse /* This flag tells us if this process has a GWS-capable 628b8020b03SJoseph Greathouse * queue that will be mapped into the runlist. It's 629b8020b03SJoseph Greathouse * possible to request a GWS BO, but not have the queue 630b8020b03SJoseph Greathouse * currently mapped, and this changes how the MAP_PROCESS 631b8020b03SJoseph Greathouse * PM4 packet is configured. 632b8020b03SJoseph Greathouse */ 633b8020b03SJoseph Greathouse bool mapped_gws_queue; 634b8020b03SJoseph Greathouse 635a4497974SRajneesh Bhardwaj /* All the memory management data should be here too */ 636241f24f8SBen Goz uint64_t gds_context_area; 637435e2f97SYong Zhao /* Contains page table flags such as AMDGPU_PTE_VALID since gfx9 */ 638e715c6d0SShaoyun Liu uint64_t page_table_base; 639241f24f8SBen Goz uint32_t sh_mem_config; 640241f24f8SBen Goz uint32_t sh_mem_bases; 641241f24f8SBen Goz uint32_t sh_mem_ape1_base; 642241f24f8SBen Goz uint32_t sh_mem_ape1_limit; 643241f24f8SBen Goz uint32_t gds_size; 644241f24f8SBen Goz uint32_t num_gws; 645241f24f8SBen Goz uint32_t num_oac; 6466a1c9510SMoses Reuben uint32_t sh_hidden_private_base; 647373d7080SFelix Kuehling 648373d7080SFelix Kuehling /* CWSR memory */ 64968df0f19SLang Yu struct kgd_mem *cwsr_mem; 650373d7080SFelix Kuehling void *cwsr_kaddr; 651d01994c2SFelix Kuehling uint64_t cwsr_base; 652373d7080SFelix Kuehling uint64_t tba_addr; 653373d7080SFelix Kuehling uint64_t tma_addr; 654d01994c2SFelix Kuehling 655d01994c2SFelix Kuehling /* IB memory */ 65668df0f19SLang Yu struct kgd_mem *ib_mem; 657d01994c2SFelix Kuehling uint64_t ib_base; 658552764b6SFelix Kuehling void *ib_kaddr; 659ef568db7SFelix Kuehling 660ef568db7SFelix Kuehling /* doorbell resources per process per device */ 661ef568db7SFelix Kuehling unsigned long *doorbell_bitmap; 662241f24f8SBen Goz }; 663241f24f8SBen Goz 66426103436SFelix Kuehling /* KFD Memory Eviction */ 66526103436SFelix Kuehling 66626103436SFelix Kuehling /* Approx. wait time before attempting to restore evicted BOs */ 66726103436SFelix Kuehling #define PROCESS_RESTORE_TIME_MS 100 66826103436SFelix Kuehling /* Approx. back off time if restore fails due to lack of memory */ 66926103436SFelix Kuehling #define PROCESS_BACK_OFF_TIME_MS 100 67026103436SFelix Kuehling /* Approx. time before evicting the process again */ 67126103436SFelix Kuehling #define PROCESS_ACTIVE_TIME_MS 10 67226103436SFelix Kuehling 6735ec7e028SFelix Kuehling /* 8 byte handle containing GPU ID in the most significant 4 bytes and 6745ec7e028SFelix Kuehling * idr_handle in the least significant 4 bytes 6755ec7e028SFelix Kuehling */ 6765ec7e028SFelix Kuehling #define MAKE_HANDLE(gpu_id, idr_handle) \ 6775ec7e028SFelix Kuehling (((uint64_t)(gpu_id) << 32) + idr_handle) 6785ec7e028SFelix Kuehling #define GET_GPU_ID(handle) (handle >> 32) 6795ec7e028SFelix Kuehling #define GET_IDR_HANDLE(handle) (handle & 0xFFFFFFFF) 6805ec7e028SFelix Kuehling 681733fa1f7SYong Zhao enum kfd_pdd_bound { 682733fa1f7SYong Zhao PDD_UNBOUND = 0, 683733fa1f7SYong Zhao PDD_BOUND, 684733fa1f7SYong Zhao PDD_BOUND_SUSPENDED, 685733fa1f7SYong Zhao }; 686733fa1f7SYong Zhao 6874327bed2SPhilip Cox #define MAX_SYSFS_FILENAME_LEN 15 68832cb59f3SMukul Joshi 68932cb59f3SMukul Joshi /* 69032cb59f3SMukul Joshi * SDMA counter runs at 100MHz frequency. 69132cb59f3SMukul Joshi * We display SDMA activity in microsecond granularity in sysfs. 69232cb59f3SMukul Joshi * As a result, the divisor is 100. 69332cb59f3SMukul Joshi */ 69432cb59f3SMukul Joshi #define SDMA_ACTIVITY_DIVISOR 100 695d4566deeSMukul Joshi 69619f6d2a6SOded Gabbay /* Data that is per-process-per device. */ 69719f6d2a6SOded Gabbay struct kfd_process_device { 69819f6d2a6SOded Gabbay /* The device that owns this data. */ 69919f6d2a6SOded Gabbay struct kfd_dev *dev; 70019f6d2a6SOded Gabbay 7019fd3f1bfSFelix Kuehling /* The process that owns this kfd_process_device. */ 7029fd3f1bfSFelix Kuehling struct kfd_process *process; 70319f6d2a6SOded Gabbay 70445102048SBen Goz /* per-process-per device QCM data structure */ 70545102048SBen Goz struct qcm_process_device qpd; 70645102048SBen Goz 70719f6d2a6SOded Gabbay /*Apertures*/ 70819f6d2a6SOded Gabbay uint64_t lds_base; 70919f6d2a6SOded Gabbay uint64_t lds_limit; 71019f6d2a6SOded Gabbay uint64_t gpuvm_base; 71119f6d2a6SOded Gabbay uint64_t gpuvm_limit; 71219f6d2a6SOded Gabbay uint64_t scratch_base; 71319f6d2a6SOded Gabbay uint64_t scratch_limit; 71419f6d2a6SOded Gabbay 715403575c4SFelix Kuehling /* VM context for GPUVM allocations */ 716b84394e2SFelix Kuehling struct file *drm_file; 717b40a6ab2SFelix Kuehling void *drm_priv; 7188fde0248SPhilip Yang atomic64_t tlb_seq; 719403575c4SFelix Kuehling 72052b29d73SFelix Kuehling /* GPUVM allocations storage */ 72152b29d73SFelix Kuehling struct idr alloc_idr; 72252b29d73SFelix Kuehling 7239fd3f1bfSFelix Kuehling /* Flag used to tell the pdd has dequeued from the dqm. 7249fd3f1bfSFelix Kuehling * This is used to prevent dev->dqm->ops.process_termination() from 7259fd3f1bfSFelix Kuehling * being called twice when it is already called in IOMMU callback 7269fd3f1bfSFelix Kuehling * function. 727a82918f1SBen Goz */ 7289fd3f1bfSFelix Kuehling bool already_dequeued; 7299593f4d6SRajneesh Bhardwaj bool runtime_inuse; 73064d1c3a4SFelix Kuehling 73164d1c3a4SFelix Kuehling /* Is this process/pasid bound to this device? (amd_iommu_bind_pasid) */ 73264d1c3a4SFelix Kuehling enum kfd_pdd_bound bound; 733d4566deeSMukul Joshi 734d4566deeSMukul Joshi /* VRAM usage */ 735d4566deeSMukul Joshi uint64_t vram_usage; 736d4566deeSMukul Joshi struct attribute attr_vram; 73732cb59f3SMukul Joshi char vram_filename[MAX_SYSFS_FILENAME_LEN]; 73832cb59f3SMukul Joshi 73932cb59f3SMukul Joshi /* SDMA activity tracking */ 74032cb59f3SMukul Joshi uint64_t sdma_past_activity_counter; 74132cb59f3SMukul Joshi struct attribute attr_sdma; 74232cb59f3SMukul Joshi char sdma_filename[MAX_SYSFS_FILENAME_LEN]; 7434327bed2SPhilip Cox 7444327bed2SPhilip Cox /* Eviction activity tracking */ 7454327bed2SPhilip Cox uint64_t last_evict_timestamp; 7464327bed2SPhilip Cox atomic64_t evict_duration_counter; 7474327bed2SPhilip Cox struct attribute attr_evict; 7484327bed2SPhilip Cox 7494327bed2SPhilip Cox struct kobject *kobj_stats; 75059d7115dSMukul Joshi unsigned int doorbell_index; 751f2fa07b3SRamesh Errabolu 752f2fa07b3SRamesh Errabolu /* 753f2fa07b3SRamesh Errabolu * @cu_occupancy: Reports occupancy of Compute Units (CU) of a process 754f2fa07b3SRamesh Errabolu * that is associated with device encoded by "this" struct instance. The 755f2fa07b3SRamesh Errabolu * value reflects CU usage by all of the waves launched by this process 756f2fa07b3SRamesh Errabolu * on this device. A very important property of occupancy parameter is 757f2fa07b3SRamesh Errabolu * that its value is a snapshot of current use. 758f2fa07b3SRamesh Errabolu * 759f2fa07b3SRamesh Errabolu * Following is to be noted regarding how this parameter is reported: 760f2fa07b3SRamesh Errabolu * 761f2fa07b3SRamesh Errabolu * The number of waves that a CU can launch is limited by couple of 762f2fa07b3SRamesh Errabolu * parameters. These are encoded by struct amdgpu_cu_info instance 763f2fa07b3SRamesh Errabolu * that is part of every device definition. For GFX9 devices this 764f2fa07b3SRamesh Errabolu * translates to 40 waves (simd_per_cu * max_waves_per_simd) when waves 765f2fa07b3SRamesh Errabolu * do not use scratch memory and 32 waves (max_scratch_slots_per_cu) 766f2fa07b3SRamesh Errabolu * when they do use scratch memory. This could change for future 767f2fa07b3SRamesh Errabolu * devices and therefore this example should be considered as a guide. 768f2fa07b3SRamesh Errabolu * 769f2fa07b3SRamesh Errabolu * All CU's of a device are available for the process. This may not be true 770f2fa07b3SRamesh Errabolu * under certain conditions - e.g. CU masking. 771f2fa07b3SRamesh Errabolu * 772f2fa07b3SRamesh Errabolu * Finally number of CU's that are occupied by a process is affected by both 773f2fa07b3SRamesh Errabolu * number of CU's a device has along with number of other competing processes 774f2fa07b3SRamesh Errabolu */ 775f2fa07b3SRamesh Errabolu struct attribute attr_cu_occupancy; 776751580b3SPhilip Yang 777751580b3SPhilip Yang /* sysfs counters for GPU retry fault and page migration tracking */ 778751580b3SPhilip Yang struct kobject *kobj_counters; 779751580b3SPhilip Yang struct attribute attr_faults; 780751580b3SPhilip Yang struct attribute attr_page_in; 781751580b3SPhilip Yang struct attribute attr_page_out; 782751580b3SPhilip Yang uint64_t faults; 783751580b3SPhilip Yang uint64_t page_in; 784751580b3SPhilip Yang uint64_t page_out; 785bef153b7SDavid Yat Sin /* 786bef153b7SDavid Yat Sin * If this process has been checkpointed before, then the user 787bef153b7SDavid Yat Sin * application will use the original gpu_id on the 788bef153b7SDavid Yat Sin * checkpointed node to refer to this device. 789bef153b7SDavid Yat Sin */ 790bef153b7SDavid Yat Sin uint32_t user_gpu_id; 791cc009e61SMukul Joshi 792cc009e61SMukul Joshi void *proc_ctx_bo; 793cc009e61SMukul Joshi uint64_t proc_ctx_gpu_addr; 794cc009e61SMukul Joshi void *proc_ctx_cpu_ptr; 79519f6d2a6SOded Gabbay }; 79619f6d2a6SOded Gabbay 79752a5fdceSAlexey Skidanov #define qpd_to_pdd(x) container_of(x, struct kfd_process_device, qpd) 79852a5fdceSAlexey Skidanov 79942de677fSPhilip Yang struct svm_range_list { 80042de677fSPhilip Yang struct mutex lock; 80142de677fSPhilip Yang struct rb_root_cached objects; 80242de677fSPhilip Yang struct list_head list; 8034683cfecSPhilip Yang struct work_struct deferred_list_work; 8044683cfecSPhilip Yang struct list_head deferred_range_list; 805c2db32ceSRajneesh Bhardwaj struct list_head criu_svm_metadata_list; 8064683cfecSPhilip Yang spinlock_t deferred_list_lock; 8078a7c184aSFelix Kuehling atomic_t evicted_ranges; 8082e447728SPhilip Yang atomic_t drain_pagefaults; 8098a7c184aSFelix Kuehling struct delayed_work restore_work; 8105a75ea56SFelix Kuehling DECLARE_BITMAP(bitmap_supported, MAX_GPU_INSTANCE); 811a6283010SAlex Sierra struct task_struct *faulting_task; 81242de677fSPhilip Yang }; 81342de677fSPhilip Yang 8144a488a7aSOded Gabbay /* Process data */ 8154a488a7aSOded Gabbay struct kfd_process { 81619f6d2a6SOded Gabbay /* 81719f6d2a6SOded Gabbay * kfd_process are stored in an mm_struct*->kfd_process* 81819f6d2a6SOded Gabbay * hash table (kfd_processes in kfd_process.c) 81919f6d2a6SOded Gabbay */ 82019f6d2a6SOded Gabbay struct hlist_node kfd_processes; 82119f6d2a6SOded Gabbay 8229b56bb11SFelix Kuehling /* 8239b56bb11SFelix Kuehling * Opaque pointer to mm_struct. We don't hold a reference to 8249b56bb11SFelix Kuehling * it so it should never be dereferenced from here. This is 8259b56bb11SFelix Kuehling * only used for looking up processes by their mm. 8269b56bb11SFelix Kuehling */ 8279b56bb11SFelix Kuehling void *mm; 82819f6d2a6SOded Gabbay 8295ce10687SFelix Kuehling struct kref ref; 8305ce10687SFelix Kuehling struct work_struct release_work; 8315ce10687SFelix Kuehling 83219f6d2a6SOded Gabbay struct mutex mutex; 83319f6d2a6SOded Gabbay 83419f6d2a6SOded Gabbay /* 83519f6d2a6SOded Gabbay * In any process, the thread that started main() is the lead 83619f6d2a6SOded Gabbay * thread and outlives the rest. 83719f6d2a6SOded Gabbay * It is here because amd_iommu_bind_pasid wants a task_struct. 838894a8293SFelix Kuehling * It can also be used for safely getting a reference to the 839894a8293SFelix Kuehling * mm_struct of the process. 84019f6d2a6SOded Gabbay */ 84119f6d2a6SOded Gabbay struct task_struct *lead_thread; 84219f6d2a6SOded Gabbay 84319f6d2a6SOded Gabbay /* We want to receive a notification when the mm_struct is destroyed */ 84419f6d2a6SOded Gabbay struct mmu_notifier mmu_notifier; 84519f6d2a6SOded Gabbay 846c7b6bac9SFenghua Yu u32 pasid; 84719f6d2a6SOded Gabbay 84819f6d2a6SOded Gabbay /* 8496ae27841SAlex Sierra * Array of kfd_process_device pointers, 85019f6d2a6SOded Gabbay * one for each device the process is using. 85119f6d2a6SOded Gabbay */ 8526ae27841SAlex Sierra struct kfd_process_device *pdds[MAX_GPU_INSTANCE]; 8536ae27841SAlex Sierra uint32_t n_pdds; 85419f6d2a6SOded Gabbay 85545102048SBen Goz struct process_queue_manager pqm; 85645102048SBen Goz 85719f6d2a6SOded Gabbay /*Is the user space process 32 bit?*/ 85819f6d2a6SOded Gabbay bool is_32bit_user_mode; 859f3a39818SAndrew Lewycky 860f3a39818SAndrew Lewycky /* Event-related data */ 861f3a39818SAndrew Lewycky struct mutex event_mutex; 862482f0777SFelix Kuehling /* Event ID allocator and lookup */ 863482f0777SFelix Kuehling struct idr event_idr; 86450cb7dd9SFelix Kuehling /* Event page */ 86568df0f19SLang Yu u64 signal_handle; 86650cb7dd9SFelix Kuehling struct kfd_signal_page *signal_page; 867b9a5d0a5SFelix Kuehling size_t signal_mapped_size; 868f3a39818SAndrew Lewycky size_t signal_event_count; 869c986169fSFelix Kuehling bool signal_event_limit_reached; 870403575c4SFelix Kuehling 871403575c4SFelix Kuehling /* Information used for memory eviction */ 872403575c4SFelix Kuehling void *kgd_process_info; 873403575c4SFelix Kuehling /* Eviction fence that is attached to all the BOs of this process. The 874403575c4SFelix Kuehling * fence will be triggered during eviction and new one will be created 875403575c4SFelix Kuehling * during restore 876403575c4SFelix Kuehling */ 877403575c4SFelix Kuehling struct dma_fence *ef; 87826103436SFelix Kuehling 87926103436SFelix Kuehling /* Work items for evicting and restoring BOs */ 88026103436SFelix Kuehling struct delayed_work eviction_work; 88126103436SFelix Kuehling struct delayed_work restore_work; 88226103436SFelix Kuehling /* seqno of the last scheduled eviction */ 88326103436SFelix Kuehling unsigned int last_eviction_seqno; 88426103436SFelix Kuehling /* Approx. the last timestamp (in jiffies) when the process was 88526103436SFelix Kuehling * restored after an eviction 88626103436SFelix Kuehling */ 88726103436SFelix Kuehling unsigned long last_restore_timestamp; 888de9f26bbSKent Russell 889de9f26bbSKent Russell /* Kobj for our procfs */ 890de9f26bbSKent Russell struct kobject *kobj; 8916d220a7eSAmber Lin struct kobject *kobj_queues; 892de9f26bbSKent Russell struct attribute attr_pasid; 89340ce74d1SPhilip Yang 89442de677fSPhilip Yang /* shared virtual memory registered by this process */ 89542de677fSPhilip Yang struct svm_range_list svms; 896063e33c5SAlex Sierra 897063e33c5SAlex Sierra bool xnack_enabled; 898b6485bedSTao Zhou 899b6485bedSTao Zhou atomic_t poison; 900cd9f7910SDavid Yat Sin /* Queues are in paused stated because we are in the process of doing a CRIU checkpoint */ 901cd9f7910SDavid Yat Sin bool queues_paused; 9024a488a7aSOded Gabbay }; 9034a488a7aSOded Gabbay 90464d1c3a4SFelix Kuehling #define KFD_PROCESS_TABLE_SIZE 5 /* bits: 32 entries */ 90564d1c3a4SFelix Kuehling extern DECLARE_HASHTABLE(kfd_processes_table, KFD_PROCESS_TABLE_SIZE); 90664d1c3a4SFelix Kuehling extern struct srcu_struct kfd_processes_srcu; 90764d1c3a4SFelix Kuehling 90876baee6cSOded Gabbay /** 909a4497974SRajneesh Bhardwaj * typedef amdkfd_ioctl_t - typedef for ioctl function pointer. 91076baee6cSOded Gabbay * 911a4497974SRajneesh Bhardwaj * @filep: pointer to file structure. 912a4497974SRajneesh Bhardwaj * @p: amdkfd process pointer. 913a4497974SRajneesh Bhardwaj * @data: pointer to arg that was copied from user. 914a4497974SRajneesh Bhardwaj * 915a4497974SRajneesh Bhardwaj * Return: returns ioctl completion code. 91676baee6cSOded Gabbay */ 91776baee6cSOded Gabbay typedef int amdkfd_ioctl_t(struct file *filep, struct kfd_process *p, 91876baee6cSOded Gabbay void *data); 91976baee6cSOded Gabbay 92076baee6cSOded Gabbay struct amdkfd_ioctl_desc { 92176baee6cSOded Gabbay unsigned int cmd; 92276baee6cSOded Gabbay int flags; 92376baee6cSOded Gabbay amdkfd_ioctl_t *func; 92476baee6cSOded Gabbay unsigned int cmd_drv; 92576baee6cSOded Gabbay const char *name; 92676baee6cSOded Gabbay }; 92767f7cf9fSshaoyunl bool kfd_dev_is_large_bar(struct kfd_dev *dev); 92876baee6cSOded Gabbay 9291679ae8fSFelix Kuehling int kfd_process_create_wq(void); 93019f6d2a6SOded Gabbay void kfd_process_destroy_wq(void); 931373d7080SFelix Kuehling struct kfd_process *kfd_create_process(struct file *filep); 9322243f493SRajneesh Bhardwaj struct kfd_process *kfd_get_process(const struct task_struct *task); 933c7b6bac9SFenghua Yu struct kfd_process *kfd_lookup_process_by_pasid(u32 pasid); 93426103436SFelix Kuehling struct kfd_process *kfd_lookup_process_by_mm(const struct mm_struct *mm); 9352aeb742bSAlex Sierra 9362aeb742bSAlex Sierra int kfd_process_gpuidx_from_gpuid(struct kfd_process *p, uint32_t gpu_id); 93756c5977eSGraham Sider int kfd_process_gpuid_from_adev(struct kfd_process *p, 938cda0f85bSFelix Kuehling struct amdgpu_device *adev, uint32_t *gpuid, 939cda0f85bSFelix Kuehling uint32_t *gpuidx); 9402aeb742bSAlex Sierra static inline int kfd_process_gpuid_from_gpuidx(struct kfd_process *p, 9412aeb742bSAlex Sierra uint32_t gpuidx, uint32_t *gpuid) { 9422aeb742bSAlex Sierra return gpuidx < p->n_pdds ? p->pdds[gpuidx]->dev->id : -EINVAL; 9432aeb742bSAlex Sierra } 9442aeb742bSAlex Sierra static inline struct kfd_process_device *kfd_process_device_from_gpuidx( 9452aeb742bSAlex Sierra struct kfd_process *p, uint32_t gpuidx) { 9462aeb742bSAlex Sierra return gpuidx < p->n_pdds ? p->pdds[gpuidx] : NULL; 9472aeb742bSAlex Sierra } 9482aeb742bSAlex Sierra 949abb208a8SFelix Kuehling void kfd_unref_process(struct kfd_process *p); 950c7f21978SPhilip Yang int kfd_process_evict_queues(struct kfd_process *p, uint32_t trigger); 9516b95e797SFelix Kuehling int kfd_process_restore_queues(struct kfd_process *p); 95226103436SFelix Kuehling void kfd_suspend_all_processes(void); 95326103436SFelix Kuehling int kfd_resume_all_processes(void); 95419f6d2a6SOded Gabbay 955bef153b7SDavid Yat Sin struct kfd_process_device *kfd_process_device_data_by_id(struct kfd_process *process, 956bef153b7SDavid Yat Sin uint32_t gpu_id); 957bef153b7SDavid Yat Sin 958bef153b7SDavid Yat Sin int kfd_process_get_user_gpu_id(struct kfd_process *p, uint32_t actual_gpu_id); 959bef153b7SDavid Yat Sin 960b84394e2SFelix Kuehling int kfd_process_device_init_vm(struct kfd_process_device *pdd, 961b84394e2SFelix Kuehling struct file *drm_file); 96264c7f8cfSBen Goz struct kfd_process_device *kfd_bind_process_to_device(struct kfd_dev *dev, 96364c7f8cfSBen Goz struct kfd_process *p); 96419f6d2a6SOded Gabbay struct kfd_process_device *kfd_get_process_device_data(struct kfd_dev *dev, 965093c7d8cSAlexey Skidanov struct kfd_process *p); 966093c7d8cSAlexey Skidanov struct kfd_process_device *kfd_create_process_device_data(struct kfd_dev *dev, 967093c7d8cSAlexey Skidanov struct kfd_process *p); 96819f6d2a6SOded Gabbay 969063e33c5SAlex Sierra bool kfd_process_xnack_mode(struct kfd_process *p, bool supported); 970063e33c5SAlex Sierra 971df03ef93SHarish Kasiviswanathan int kfd_reserved_mem_mmap(struct kfd_dev *dev, struct kfd_process *process, 972373d7080SFelix Kuehling struct vm_area_struct *vma); 973373d7080SFelix Kuehling 97452b29d73SFelix Kuehling /* KFD process API for creating and translating handles */ 97552b29d73SFelix Kuehling int kfd_process_device_create_obj_handle(struct kfd_process_device *pdd, 97652b29d73SFelix Kuehling void *mem); 97752b29d73SFelix Kuehling void *kfd_process_device_translate_handle(struct kfd_process_device *p, 97852b29d73SFelix Kuehling int handle); 97952b29d73SFelix Kuehling void kfd_process_device_remove_obj_handle(struct kfd_process_device *pdd, 98052b29d73SFelix Kuehling int handle); 981011bbb03SRajneesh Bhardwaj struct kfd_process *kfd_lookup_process_by_pid(struct pid *pid); 98252b29d73SFelix Kuehling 98319f6d2a6SOded Gabbay /* PASIDs */ 98419f6d2a6SOded Gabbay int kfd_pasid_init(void); 98519f6d2a6SOded Gabbay void kfd_pasid_exit(void); 98619f6d2a6SOded Gabbay bool kfd_set_pasid_limit(unsigned int new_limit); 98719f6d2a6SOded Gabbay unsigned int kfd_get_pasid_limit(void); 988c7b6bac9SFenghua Yu u32 kfd_pasid_alloc(void); 989c7b6bac9SFenghua Yu void kfd_pasid_free(u32 pasid); 99019f6d2a6SOded Gabbay 99119f6d2a6SOded Gabbay /* Doorbells */ 992ef568db7SFelix Kuehling size_t kfd_doorbell_process_slice(struct kfd_dev *kfd); 993735df2baSFelix Kuehling int kfd_doorbell_init(struct kfd_dev *kfd); 994735df2baSFelix Kuehling void kfd_doorbell_fini(struct kfd_dev *kfd); 995df03ef93SHarish Kasiviswanathan int kfd_doorbell_mmap(struct kfd_dev *dev, struct kfd_process *process, 996df03ef93SHarish Kasiviswanathan struct vm_area_struct *vma); 997ada2b29cSFelix Kuehling void __iomem *kfd_get_kernel_doorbell(struct kfd_dev *kfd, 99819f6d2a6SOded Gabbay unsigned int *doorbell_off); 99919f6d2a6SOded Gabbay void kfd_release_kernel_doorbell(struct kfd_dev *kfd, u32 __iomem *db_addr); 100019f6d2a6SOded Gabbay u32 read_kernel_doorbell(u32 __iomem *db); 1001ada2b29cSFelix Kuehling void write_kernel_doorbell(void __iomem *db, u32 value); 10029d7d0248SFelix Kuehling void write_kernel_doorbell64(void __iomem *db, u64 value); 1003339903faSYong Zhao unsigned int kfd_get_doorbell_dw_offset_in_bar(struct kfd_dev *kfd, 100459d7115dSMukul Joshi struct kfd_process_device *pdd, 1005ef568db7SFelix Kuehling unsigned int doorbell_id); 100659d7115dSMukul Joshi phys_addr_t kfd_get_process_doorbells(struct kfd_process_device *pdd); 100759d7115dSMukul Joshi int kfd_alloc_process_doorbells(struct kfd_dev *kfd, 100859d7115dSMukul Joshi unsigned int *doorbell_index); 100959d7115dSMukul Joshi void kfd_free_process_doorbells(struct kfd_dev *kfd, 101059d7115dSMukul Joshi unsigned int doorbell_index); 10116e81090bSOded Gabbay /* GTT Sub-Allocator */ 10126e81090bSOded Gabbay 10136e81090bSOded Gabbay int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size, 10146e81090bSOded Gabbay struct kfd_mem_obj **mem_obj); 10156e81090bSOded Gabbay 10166e81090bSOded Gabbay int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj); 10176e81090bSOded Gabbay 10184a488a7aSOded Gabbay extern struct device *kfd_device; 10194a488a7aSOded Gabbay 1020de9f26bbSKent Russell /* KFD's procfs */ 1021de9f26bbSKent Russell void kfd_procfs_init(void); 1022de9f26bbSKent Russell void kfd_procfs_shutdown(void); 10236d220a7eSAmber Lin int kfd_procfs_add_queue(struct queue *q); 10246d220a7eSAmber Lin void kfd_procfs_del_queue(struct queue *q); 1025de9f26bbSKent Russell 10265b5c4e40SEvgeny Pinchuk /* Topology */ 10275b5c4e40SEvgeny Pinchuk int kfd_topology_init(void); 10285b5c4e40SEvgeny Pinchuk void kfd_topology_shutdown(void); 10295b5c4e40SEvgeny Pinchuk int kfd_topology_add_device(struct kfd_dev *gpu); 10305b5c4e40SEvgeny Pinchuk int kfd_topology_remove_device(struct kfd_dev *gpu); 10313a87177eSHarish Kasiviswanathan struct kfd_topology_device *kfd_topology_device_by_proximity_domain( 10323a87177eSHarish Kasiviswanathan uint32_t proximity_domain); 103346d18d51SMukul Joshi struct kfd_topology_device *kfd_topology_device_by_proximity_domain_no_lock( 103446d18d51SMukul Joshi uint32_t proximity_domain); 103544d8cc6fSYong Zhao struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id); 10365b5c4e40SEvgeny Pinchuk struct kfd_dev *kfd_device_by_id(uint32_t gpu_id); 10375b5c4e40SEvgeny Pinchuk struct kfd_dev *kfd_device_by_pci_dev(const struct pci_dev *pdev); 1038574c4183SGraham Sider struct kfd_dev *kfd_device_by_adev(const struct amdgpu_device *adev); 10396d82eb0eSHarish Kasiviswanathan int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_dev **kdev); 1040520b8fb7SFelix Kuehling int kfd_numa_node_to_apic_id(int numa_node_id); 10416127896fSHuang Rui void kfd_double_confirm_iommu_support(struct kfd_dev *gpu); 10425b5c4e40SEvgeny Pinchuk 10434a488a7aSOded Gabbay /* Interrupts */ 10442249d558SAndrew Lewycky int kfd_interrupt_init(struct kfd_dev *dev); 10452249d558SAndrew Lewycky void kfd_interrupt_exit(struct kfd_dev *dev); 10462249d558SAndrew Lewycky bool enqueue_ih_ring_entry(struct kfd_dev *kfd, const void *ih_ring_entry); 104758e69886SLan Xiao bool interrupt_is_wanted(struct kfd_dev *dev, 104858e69886SLan Xiao const uint32_t *ih_ring_entry, 104958e69886SLan Xiao uint32_t *patched_ihre, bool *flag); 10504a488a7aSOded Gabbay 105119f6d2a6SOded Gabbay /* amdkfd Apertures */ 105219f6d2a6SOded Gabbay int kfd_init_apertures(struct kfd_process *process); 105319f6d2a6SOded Gabbay 10547c9631afSJay Cornwall void kfd_process_set_trap_handler(struct qcm_process_device *qpd, 10557c9631afSJay Cornwall uint64_t tba_addr, 10567c9631afSJay Cornwall uint64_t tma_addr); 10577c9631afSJay Cornwall 105836988070SRajneesh Bhardwaj /* CRIU */ 105936988070SRajneesh Bhardwaj /* 106036988070SRajneesh Bhardwaj * Need to increment KFD_CRIU_PRIV_VERSION each time a change is made to any of the CRIU private 106136988070SRajneesh Bhardwaj * structures: 106236988070SRajneesh Bhardwaj * kfd_criu_process_priv_data 106336988070SRajneesh Bhardwaj * kfd_criu_device_priv_data 106436988070SRajneesh Bhardwaj * kfd_criu_bo_priv_data 106536988070SRajneesh Bhardwaj * kfd_criu_queue_priv_data 106636988070SRajneesh Bhardwaj * kfd_criu_event_priv_data 106736988070SRajneesh Bhardwaj * kfd_criu_svm_range_priv_data 106836988070SRajneesh Bhardwaj */ 106936988070SRajneesh Bhardwaj 107036988070SRajneesh Bhardwaj #define KFD_CRIU_PRIV_VERSION 1 107136988070SRajneesh Bhardwaj 107236988070SRajneesh Bhardwaj struct kfd_criu_process_priv_data { 107336988070SRajneesh Bhardwaj uint32_t version; 10744717fe3dSRajneesh Bhardwaj uint32_t xnack_mode; 107536988070SRajneesh Bhardwaj }; 107636988070SRajneesh Bhardwaj 107736988070SRajneesh Bhardwaj struct kfd_criu_device_priv_data { 107836988070SRajneesh Bhardwaj /* For future use */ 107936988070SRajneesh Bhardwaj uint64_t reserved; 108036988070SRajneesh Bhardwaj }; 108136988070SRajneesh Bhardwaj 108236988070SRajneesh Bhardwaj struct kfd_criu_bo_priv_data { 10835ccbb057SRajneesh Bhardwaj uint64_t user_addr; 10845ccbb057SRajneesh Bhardwaj uint32_t idr_handle; 10855ccbb057SRajneesh Bhardwaj uint32_t mapped_gpuids[MAX_GPU_INSTANCE]; 108636988070SRajneesh Bhardwaj }; 108736988070SRajneesh Bhardwaj 1088626f7b31SDavid Yat Sin /* 1089626f7b31SDavid Yat Sin * The first 4 bytes of kfd_criu_queue_priv_data, kfd_criu_event_priv_data, 1090626f7b31SDavid Yat Sin * kfd_criu_svm_range_priv_data is the object type 1091626f7b31SDavid Yat Sin */ 1092626f7b31SDavid Yat Sin enum kfd_criu_object_type { 1093626f7b31SDavid Yat Sin KFD_CRIU_OBJECT_TYPE_QUEUE, 1094626f7b31SDavid Yat Sin KFD_CRIU_OBJECT_TYPE_EVENT, 1095626f7b31SDavid Yat Sin KFD_CRIU_OBJECT_TYPE_SVM_RANGE, 1096626f7b31SDavid Yat Sin }; 1097626f7b31SDavid Yat Sin 109836988070SRajneesh Bhardwaj struct kfd_criu_svm_range_priv_data { 109936988070SRajneesh Bhardwaj uint32_t object_type; 110008a987a8SRajneesh Bhardwaj uint64_t start_addr; 110108a987a8SRajneesh Bhardwaj uint64_t size; 110208a987a8SRajneesh Bhardwaj /* Variable length array of attributes */ 1103d5c83156SChangcheng Deng struct kfd_ioctl_svm_attribute attrs[]; 110436988070SRajneesh Bhardwaj }; 110536988070SRajneesh Bhardwaj 110636988070SRajneesh Bhardwaj struct kfd_criu_queue_priv_data { 110736988070SRajneesh Bhardwaj uint32_t object_type; 1108626f7b31SDavid Yat Sin uint64_t q_address; 1109626f7b31SDavid Yat Sin uint64_t q_size; 1110626f7b31SDavid Yat Sin uint64_t read_ptr_addr; 1111626f7b31SDavid Yat Sin uint64_t write_ptr_addr; 1112626f7b31SDavid Yat Sin uint64_t doorbell_off; 1113626f7b31SDavid Yat Sin uint64_t eop_ring_buffer_address; 1114626f7b31SDavid Yat Sin uint64_t ctx_save_restore_area_address; 1115626f7b31SDavid Yat Sin uint32_t gpu_id; 1116626f7b31SDavid Yat Sin uint32_t type; 1117626f7b31SDavid Yat Sin uint32_t format; 1118626f7b31SDavid Yat Sin uint32_t q_id; 1119626f7b31SDavid Yat Sin uint32_t priority; 1120626f7b31SDavid Yat Sin uint32_t q_percent; 1121626f7b31SDavid Yat Sin uint32_t doorbell_id; 1122747eea07SDavid Yat Sin uint32_t gws; 1123626f7b31SDavid Yat Sin uint32_t sdma_id; 1124626f7b31SDavid Yat Sin uint32_t eop_ring_buffer_size; 1125626f7b31SDavid Yat Sin uint32_t ctx_save_restore_area_size; 1126626f7b31SDavid Yat Sin uint32_t ctl_stack_size; 1127626f7b31SDavid Yat Sin uint32_t mqd_size; 112836988070SRajneesh Bhardwaj }; 112936988070SRajneesh Bhardwaj 113036988070SRajneesh Bhardwaj struct kfd_criu_event_priv_data { 113136988070SRajneesh Bhardwaj uint32_t object_type; 113240e8a766SDavid Yat Sin uint64_t user_handle; 113340e8a766SDavid Yat Sin uint32_t event_id; 113440e8a766SDavid Yat Sin uint32_t auto_reset; 113540e8a766SDavid Yat Sin uint32_t type; 113640e8a766SDavid Yat Sin uint32_t signaled; 113740e8a766SDavid Yat Sin 113840e8a766SDavid Yat Sin union { 113940e8a766SDavid Yat Sin struct kfd_hsa_memory_exception_data memory_exception_data; 114040e8a766SDavid Yat Sin struct kfd_hsa_hw_exception_data hw_exception_data; 114140e8a766SDavid Yat Sin }; 114236988070SRajneesh Bhardwaj }; 114336988070SRajneesh Bhardwaj 1144626f7b31SDavid Yat Sin int kfd_process_get_queue_info(struct kfd_process *p, 1145626f7b31SDavid Yat Sin uint32_t *num_queues, 1146626f7b31SDavid Yat Sin uint64_t *priv_data_sizes); 1147626f7b31SDavid Yat Sin 1148626f7b31SDavid Yat Sin int kfd_criu_checkpoint_queues(struct kfd_process *p, 1149626f7b31SDavid Yat Sin uint8_t __user *user_priv_data, 1150626f7b31SDavid Yat Sin uint64_t *priv_data_offset); 1151626f7b31SDavid Yat Sin 1152626f7b31SDavid Yat Sin int kfd_criu_restore_queue(struct kfd_process *p, 1153626f7b31SDavid Yat Sin uint8_t __user *user_priv_data, 1154626f7b31SDavid Yat Sin uint64_t *priv_data_offset, 1155626f7b31SDavid Yat Sin uint64_t max_priv_data_size); 115640e8a766SDavid Yat Sin 115740e8a766SDavid Yat Sin int kfd_criu_checkpoint_events(struct kfd_process *p, 115840e8a766SDavid Yat Sin uint8_t __user *user_priv_data, 115940e8a766SDavid Yat Sin uint64_t *priv_data_offset); 116040e8a766SDavid Yat Sin 116140e8a766SDavid Yat Sin int kfd_criu_restore_event(struct file *devkfd, 116240e8a766SDavid Yat Sin struct kfd_process *p, 116340e8a766SDavid Yat Sin uint8_t __user *user_priv_data, 116440e8a766SDavid Yat Sin uint64_t *priv_data_offset, 116540e8a766SDavid Yat Sin uint64_t max_priv_data_size); 116636988070SRajneesh Bhardwaj /* CRIU - End */ 116736988070SRajneesh Bhardwaj 1168ed6e6a34SBen Goz /* Queue Context Management */ 1169e88a614cSEdward O'Callaghan int init_queue(struct queue **q, const struct queue_properties *properties); 1170ed6e6a34SBen Goz void uninit_queue(struct queue *q); 117145102048SBen Goz void print_queue_properties(struct queue_properties *q); 1172ed6e6a34SBen Goz void print_queue(struct queue *q); 1173ed6e6a34SBen Goz 11744b8f589bSBen Goz struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type, 11754b8f589bSBen Goz struct kfd_dev *dev); 1176ee04955aSFelix Kuehling struct mqd_manager *mqd_manager_init_cik_hawaii(enum KFD_MQD_TYPE type, 1177ee04955aSFelix Kuehling struct kfd_dev *dev); 11784b8f589bSBen Goz struct mqd_manager *mqd_manager_init_vi(enum KFD_MQD_TYPE type, 11794b8f589bSBen Goz struct kfd_dev *dev); 1180ee04955aSFelix Kuehling struct mqd_manager *mqd_manager_init_vi_tonga(enum KFD_MQD_TYPE type, 1181ee04955aSFelix Kuehling struct kfd_dev *dev); 1182b91d43ddSFelix Kuehling struct mqd_manager *mqd_manager_init_v9(enum KFD_MQD_TYPE type, 1183b91d43ddSFelix Kuehling struct kfd_dev *dev); 118414328aa5SPhilip Cox struct mqd_manager *mqd_manager_init_v10(enum KFD_MQD_TYPE type, 118514328aa5SPhilip Cox struct kfd_dev *dev); 1186cc009e61SMukul Joshi struct mqd_manager *mqd_manager_init_v11(enum KFD_MQD_TYPE type, 1187cc009e61SMukul Joshi struct kfd_dev *dev); 118864c7f8cfSBen Goz struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev); 118964c7f8cfSBen Goz void device_queue_manager_uninit(struct device_queue_manager *dqm); 1190241f24f8SBen Goz struct kernel_queue *kernel_queue_init(struct kfd_dev *dev, 1191241f24f8SBen Goz enum kfd_queue_type type); 1192c2a77fdeSFelix Kuehling void kernel_queue_uninit(struct kernel_queue *kq, bool hanging); 119303e5b167STao Zhou int kfd_dqm_evict_pasid(struct device_queue_manager *dqm, u32 pasid); 1194241f24f8SBen Goz 119545102048SBen Goz /* Process Queue Manager */ 119645102048SBen Goz struct process_queue_node { 119745102048SBen Goz struct queue *q; 119845102048SBen Goz struct kernel_queue *kq; 119945102048SBen Goz struct list_head process_queue_list; 120045102048SBen Goz }; 120145102048SBen Goz 12029fd3f1bfSFelix Kuehling void kfd_process_dequeue_from_device(struct kfd_process_device *pdd); 12039fd3f1bfSFelix Kuehling void kfd_process_dequeue_from_all_devices(struct kfd_process *p); 120445102048SBen Goz int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p); 120545102048SBen Goz void pqm_uninit(struct process_queue_manager *pqm); 120645102048SBen Goz int pqm_create_queue(struct process_queue_manager *pqm, 120745102048SBen Goz struct kfd_dev *dev, 120845102048SBen Goz struct file *f, 120945102048SBen Goz struct queue_properties *properties, 1210e47a8b52SYong Zhao unsigned int *qid, 1211e77a541fSGraham Sider struct amdgpu_bo *wptr_bo, 12128668dfc3SDavid Yat Sin const struct kfd_criu_queue_priv_data *q_data, 121342c6c482SDavid Yat Sin const void *restore_mqd, 12143a9822d7SDavid Yat Sin const void *restore_ctl_stack, 1215e47a8b52SYong Zhao uint32_t *p_doorbell_offset_in_process); 121645102048SBen Goz int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid); 12177c695a2cSLang Yu int pqm_update_queue_properties(struct process_queue_manager *pqm, unsigned int qid, 121845102048SBen Goz struct queue_properties *p); 12197c695a2cSLang Yu int pqm_update_mqd(struct process_queue_manager *pqm, unsigned int qid, 12207c695a2cSLang Yu struct mqd_update_info *minfo); 1221eb82da1dSOak Zeng int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid, 1222eb82da1dSOak Zeng void *gws); 1223fbeb661bSYair Shachar struct kernel_queue *pqm_get_kernel_queue(struct process_queue_manager *pqm, 1224fbeb661bSYair Shachar unsigned int qid); 12255bb4b78bSOak Zeng struct queue *pqm_get_user_queue(struct process_queue_manager *pqm, 12265bb4b78bSOak Zeng unsigned int qid); 12275df099e8SJay Cornwall int pqm_get_wave_state(struct process_queue_manager *pqm, 12285df099e8SJay Cornwall unsigned int qid, 12295df099e8SJay Cornwall void __user *ctl_stack, 12305df099e8SJay Cornwall u32 *ctl_stack_used_size, 12315df099e8SJay Cornwall u32 *save_area_used_size); 123245102048SBen Goz 1233b010affeSQu Huang int amdkfd_fence_wait_timeout(uint64_t *fence_addr, 1234b010affeSQu Huang uint64_t fence_value, 12358c72c3d7SYong Zhao unsigned int timeout_ms); 1236788bf83dSYair Shachar 123742c6c482SDavid Yat Sin int pqm_get_queue_checkpoint_info(struct process_queue_manager *pqm, 123842c6c482SDavid Yat Sin unsigned int qid, 12393a9822d7SDavid Yat Sin u32 *mqd_size, 12403a9822d7SDavid Yat Sin u32 *ctl_stack_size); 1241ed6e6a34SBen Goz /* Packet Manager */ 1242ed6e6a34SBen Goz 124364c7f8cfSBen Goz #define KFD_FENCE_COMPLETED (100) 124464c7f8cfSBen Goz #define KFD_FENCE_INIT (10) 1245241f24f8SBen Goz 1246ed6e6a34SBen Goz struct packet_manager { 1247ed6e6a34SBen Goz struct device_queue_manager *dqm; 1248ed6e6a34SBen Goz struct kernel_queue *priv_queue; 1249ed6e6a34SBen Goz struct mutex lock; 1250ed6e6a34SBen Goz bool allocated; 1251ed6e6a34SBen Goz struct kfd_mem_obj *ib_buffer_obj; 1252851a645eSFelix Kuehling unsigned int ib_size_bytes; 1253819ec5acSFelix Kuehling bool is_over_subscription; 1254f6e27ff1SFelix Kuehling 1255f6e27ff1SFelix Kuehling const struct packet_manager_funcs *pmf; 1256ed6e6a34SBen Goz }; 1257ed6e6a34SBen Goz 1258f6e27ff1SFelix Kuehling struct packet_manager_funcs { 1259f6e27ff1SFelix Kuehling /* Support ASIC-specific packet formats for PM4 packets */ 1260f6e27ff1SFelix Kuehling int (*map_process)(struct packet_manager *pm, uint32_t *buffer, 1261f6e27ff1SFelix Kuehling struct qcm_process_device *qpd); 1262f6e27ff1SFelix Kuehling int (*runlist)(struct packet_manager *pm, uint32_t *buffer, 1263f6e27ff1SFelix Kuehling uint64_t ib, size_t ib_size_in_dwords, bool chain); 1264f6e27ff1SFelix Kuehling int (*set_resources)(struct packet_manager *pm, uint32_t *buffer, 1265f6e27ff1SFelix Kuehling struct scheduling_resources *res); 1266f6e27ff1SFelix Kuehling int (*map_queues)(struct packet_manager *pm, uint32_t *buffer, 1267f6e27ff1SFelix Kuehling struct queue *q, bool is_static); 1268f6e27ff1SFelix Kuehling int (*unmap_queues)(struct packet_manager *pm, uint32_t *buffer, 1269f6e27ff1SFelix Kuehling enum kfd_unmap_queues_filter mode, 1270d2cb0b21SJonathan Kim uint32_t filter_param, bool reset); 1271f6e27ff1SFelix Kuehling int (*query_status)(struct packet_manager *pm, uint32_t *buffer, 1272b010affeSQu Huang uint64_t fence_address, uint64_t fence_value); 1273f6e27ff1SFelix Kuehling int (*release_mem)(uint64_t gpu_addr, uint32_t *buffer); 1274f6e27ff1SFelix Kuehling 1275f6e27ff1SFelix Kuehling /* Packet sizes */ 1276f6e27ff1SFelix Kuehling int map_process_size; 1277f6e27ff1SFelix Kuehling int runlist_size; 1278f6e27ff1SFelix Kuehling int set_resources_size; 1279f6e27ff1SFelix Kuehling int map_queues_size; 1280f6e27ff1SFelix Kuehling int unmap_queues_size; 1281f6e27ff1SFelix Kuehling int query_status_size; 1282f6e27ff1SFelix Kuehling int release_mem_size; 1283f6e27ff1SFelix Kuehling }; 1284f6e27ff1SFelix Kuehling 1285f6e27ff1SFelix Kuehling extern const struct packet_manager_funcs kfd_vi_pm_funcs; 1286454150b1SFelix Kuehling extern const struct packet_manager_funcs kfd_v9_pm_funcs; 1287fd6a440eSJonathan Kim extern const struct packet_manager_funcs kfd_aldebaran_pm_funcs; 1288f6e27ff1SFelix Kuehling 128964c7f8cfSBen Goz int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm); 1290c2a77fdeSFelix Kuehling void pm_uninit(struct packet_manager *pm, bool hanging); 129164c7f8cfSBen Goz int pm_send_set_resources(struct packet_manager *pm, 129264c7f8cfSBen Goz struct scheduling_resources *res); 129364c7f8cfSBen Goz int pm_send_runlist(struct packet_manager *pm, struct list_head *dqm_queues); 129464c7f8cfSBen Goz int pm_send_query_status(struct packet_manager *pm, uint64_t fence_address, 1295b010affeSQu Huang uint64_t fence_value); 129664c7f8cfSBen Goz 1297d2cb0b21SJonathan Kim int pm_send_unmap_queue(struct packet_manager *pm, 12987da2bcf8SYong Zhao enum kfd_unmap_queues_filter mode, 1299d2cb0b21SJonathan Kim uint32_t filter_param, bool reset); 130064c7f8cfSBen Goz 1301241f24f8SBen Goz void pm_release_ib(struct packet_manager *pm); 1302241f24f8SBen Goz 1303454150b1SFelix Kuehling /* Following PM funcs can be shared among VI and AI */ 1304454150b1SFelix Kuehling unsigned int pm_build_pm4_header(unsigned int opcode, size_t packet_size); 130514328aa5SPhilip Cox 130619f6d2a6SOded Gabbay uint64_t kfd_get_number_elems(struct kfd_dev *kfd); 130719f6d2a6SOded Gabbay 1308f3a39818SAndrew Lewycky /* Events */ 1309f3a39818SAndrew Lewycky extern const struct kfd_event_interrupt_class event_interrupt_class_cik; 1310ca750681SFelix Kuehling extern const struct kfd_event_interrupt_class event_interrupt_class_v9; 1311cc009e61SMukul Joshi extern const struct kfd_event_interrupt_class event_interrupt_class_v11; 1312ca750681SFelix Kuehling 1313930c5ff4SAlexey Skidanov extern const struct kfd_device_global_init_class device_global_init_class_cik; 1314f3a39818SAndrew Lewycky 1315c3eb12dfSFelix Kuehling int kfd_event_init_process(struct kfd_process *p); 1316f3a39818SAndrew Lewycky void kfd_event_free_process(struct kfd_process *p); 1317f3a39818SAndrew Lewycky int kfd_event_mmap(struct kfd_process *process, struct vm_area_struct *vma); 1318f3a39818SAndrew Lewycky int kfd_wait_on_events(struct kfd_process *p, 131959d3e8beSAlexey Skidanov uint32_t num_events, void __user *data, 1320*bea9a56aSFelix Kuehling bool all, uint32_t *user_timeout_ms, 1321fdf0c833SFelix Kuehling uint32_t *wait_result); 1322c7b6bac9SFenghua Yu void kfd_signal_event_interrupt(u32 pasid, uint32_t partial_id, 1323f3a39818SAndrew Lewycky uint32_t valid_id_bits); 132459d3e8beSAlexey Skidanov void kfd_signal_iommu_event(struct kfd_dev *dev, 1325c7b6bac9SFenghua Yu u32 pasid, unsigned long address, 132659d3e8beSAlexey Skidanov bool is_write_requested, bool is_execute_requested); 1327c7b6bac9SFenghua Yu void kfd_signal_hw_exception_event(u32 pasid); 1328f3a39818SAndrew Lewycky int kfd_set_event(struct kfd_process *p, uint32_t event_id); 1329f3a39818SAndrew Lewycky int kfd_reset_event(struct kfd_process *p, uint32_t event_id); 133040e8a766SDavid Yat Sin int kfd_kmap_event_page(struct kfd_process *p, uint64_t event_page_offset); 133140e8a766SDavid Yat Sin 1332f3a39818SAndrew Lewycky int kfd_event_create(struct file *devkfd, struct kfd_process *p, 1333f3a39818SAndrew Lewycky uint32_t event_type, bool auto_reset, uint32_t node_id, 1334f3a39818SAndrew Lewycky uint32_t *event_id, uint32_t *event_trigger_data, 1335f3a39818SAndrew Lewycky uint64_t *event_page_offset, uint32_t *event_slot_index); 133640e8a766SDavid Yat Sin 133740e8a766SDavid Yat Sin int kfd_get_num_events(struct kfd_process *p); 1338f3a39818SAndrew Lewycky int kfd_event_destroy(struct kfd_process *p, uint32_t event_id); 1339f3a39818SAndrew Lewycky 1340c7b6bac9SFenghua Yu void kfd_signal_vm_fault_event(struct kfd_dev *dev, u32 pasid, 13412640c3faSshaoyunl struct kfd_vm_fault_info *info); 13422640c3faSshaoyunl 1343e42051d2SShaoyun Liu void kfd_signal_reset_event(struct kfd_dev *dev); 1344e42051d2SShaoyun Liu 1345e2b1f9f5SDennis Li void kfd_signal_poison_consumed_event(struct kfd_dev *dev, u32 pasid); 1346e2b1f9f5SDennis Li 13473543b055SEric Huang void kfd_flush_tlb(struct kfd_process_device *pdd, enum TLB_FLUSH_TYPE type); 1348403575c4SFelix Kuehling 1349459ccca5SLang Yu static inline bool kfd_flush_tlb_after_unmap(struct kfd_dev *dev) 1350459ccca5SLang Yu { 1351459ccca5SLang Yu return KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2) || 1352459ccca5SLang Yu (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 1) && 1353459ccca5SLang Yu dev->adev->sdma.instance[0].fw_version >= 18) || 1354459ccca5SLang Yu KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 0); 1355459ccca5SLang Yu } 1356459ccca5SLang Yu 1357e42051d2SShaoyun Liu bool kfd_is_locked(void); 1358e42051d2SShaoyun Liu 1359f756e631SHarish Kasiviswanathan /* Compute profile */ 1360f756e631SHarish Kasiviswanathan void kfd_inc_compute_active(struct kfd_dev *dev); 1361f756e631SHarish Kasiviswanathan void kfd_dec_compute_active(struct kfd_dev *dev); 1362f756e631SHarish Kasiviswanathan 13636b855f7bSHarish Kasiviswanathan /* Cgroup Support */ 13646b855f7bSHarish Kasiviswanathan /* Check with device cgroup if @kfd device is accessible */ 13656b855f7bSHarish Kasiviswanathan static inline int kfd_devcgroup_check_permission(struct kfd_dev *kfd) 13666b855f7bSHarish Kasiviswanathan { 1367eec8fd02SOdin Ugedal #if defined(CONFIG_CGROUP_DEVICE) || defined(CONFIG_CGROUP_BPF) 13686b855f7bSHarish Kasiviswanathan struct drm_device *ddev = kfd->ddev; 13696b855f7bSHarish Kasiviswanathan 137099c7b309SLorenz Brun return devcgroup_check_permission(DEVCG_DEV_CHAR, DRM_MAJOR, 13716b855f7bSHarish Kasiviswanathan ddev->render->index, 13726b855f7bSHarish Kasiviswanathan DEVCG_ACC_WRITE | DEVCG_ACC_READ); 13736b855f7bSHarish Kasiviswanathan #else 13746b855f7bSHarish Kasiviswanathan return 0; 13756b855f7bSHarish Kasiviswanathan #endif 13766b855f7bSHarish Kasiviswanathan } 13776b855f7bSHarish Kasiviswanathan 1378851a645eSFelix Kuehling /* Debugfs */ 1379851a645eSFelix Kuehling #if defined(CONFIG_DEBUG_FS) 1380851a645eSFelix Kuehling 1381851a645eSFelix Kuehling void kfd_debugfs_init(void); 1382851a645eSFelix Kuehling void kfd_debugfs_fini(void); 1383851a645eSFelix Kuehling int kfd_debugfs_mqds_by_process(struct seq_file *m, void *data); 1384851a645eSFelix Kuehling int pqm_debugfs_mqds(struct seq_file *m, void *data); 1385851a645eSFelix Kuehling int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data); 1386851a645eSFelix Kuehling int dqm_debugfs_hqds(struct seq_file *m, void *data); 1387851a645eSFelix Kuehling int kfd_debugfs_rls_by_device(struct seq_file *m, void *data); 1388851a645eSFelix Kuehling int pm_debugfs_runlist(struct seq_file *m, void *data); 1389851a645eSFelix Kuehling 1390a29ec470SShaoyun Liu int kfd_debugfs_hang_hws(struct kfd_dev *dev); 1391a29ec470SShaoyun Liu int pm_debugfs_hang_hws(struct packet_manager *pm); 13924f942aaeSOak Zeng int dqm_debugfs_hang_hws(struct device_queue_manager *dqm); 1393a29ec470SShaoyun Liu 1394851a645eSFelix Kuehling #else 1395851a645eSFelix Kuehling 1396851a645eSFelix Kuehling static inline void kfd_debugfs_init(void) {} 1397851a645eSFelix Kuehling static inline void kfd_debugfs_fini(void) {} 1398851a645eSFelix Kuehling 1399851a645eSFelix Kuehling #endif 1400851a645eSFelix Kuehling 14014a488a7aSOded Gabbay #endif 1402