14a488a7aSOded Gabbay /* 24a488a7aSOded Gabbay * Copyright 2014 Advanced Micro Devices, Inc. 34a488a7aSOded Gabbay * 44a488a7aSOded Gabbay * Permission is hereby granted, free of charge, to any person obtaining a 54a488a7aSOded Gabbay * copy of this software and associated documentation files (the "Software"), 64a488a7aSOded Gabbay * to deal in the Software without restriction, including without limitation 74a488a7aSOded Gabbay * the rights to use, copy, modify, merge, publish, distribute, sublicense, 84a488a7aSOded Gabbay * and/or sell copies of the Software, and to permit persons to whom the 94a488a7aSOded Gabbay * Software is furnished to do so, subject to the following conditions: 104a488a7aSOded Gabbay * 114a488a7aSOded Gabbay * The above copyright notice and this permission notice shall be included in 124a488a7aSOded Gabbay * all copies or substantial portions of the Software. 134a488a7aSOded Gabbay * 144a488a7aSOded Gabbay * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 154a488a7aSOded Gabbay * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 164a488a7aSOded Gabbay * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 174a488a7aSOded Gabbay * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 184a488a7aSOded Gabbay * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 194a488a7aSOded Gabbay * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 204a488a7aSOded Gabbay * OTHER DEALINGS IN THE SOFTWARE. 214a488a7aSOded Gabbay */ 224a488a7aSOded Gabbay 234a488a7aSOded Gabbay #ifndef KFD_PRIV_H_INCLUDED 244a488a7aSOded Gabbay #define KFD_PRIV_H_INCLUDED 254a488a7aSOded Gabbay 264a488a7aSOded Gabbay #include <linux/hashtable.h> 274a488a7aSOded Gabbay #include <linux/mmu_notifier.h> 284a488a7aSOded Gabbay #include <linux/mutex.h> 294a488a7aSOded Gabbay #include <linux/types.h> 304a488a7aSOded Gabbay #include <linux/atomic.h> 314a488a7aSOded Gabbay #include <linux/workqueue.h> 324a488a7aSOded Gabbay #include <linux/spinlock.h> 3319f6d2a6SOded Gabbay #include <linux/kfd_ioctl.h> 34482f0777SFelix Kuehling #include <linux/idr.h> 3504ad47bdSAndres Rodriguez #include <linux/kfifo.h> 36851a645eSFelix Kuehling #include <linux/seq_file.h> 375ce10687SFelix Kuehling #include <linux/kref.h> 38de9f26bbSKent Russell #include <linux/sysfs.h> 396b855f7bSHarish Kasiviswanathan #include <linux/device_cgroup.h> 401cd4d9eeSStephen Rothwell #include <drm/drm_file.h> 411cd4d9eeSStephen Rothwell #include <drm/drm_drv.h> 421cd4d9eeSStephen Rothwell #include <drm/drm_device.h> 4399c7b309SLorenz Brun #include <drm/drm_ioctl.h> 444a488a7aSOded Gabbay #include <kgd_kfd_interface.h> 456d220a7eSAmber Lin #include <linux/swap.h> 464a488a7aSOded Gabbay 47e596b903SYong Zhao #include "amd_shared.h" 486ae27841SAlex Sierra #include "amdgpu.h" 49e596b903SYong Zhao 50af47b390SLaura Abbott #define KFD_MAX_RING_ENTRY_SIZE 8 51af47b390SLaura Abbott 525b5c4e40SEvgeny Pinchuk #define KFD_SYSFS_FILE_MODE 0444 535b5c4e40SEvgeny Pinchuk 54df03ef93SHarish Kasiviswanathan /* GPU ID hash width in bits */ 55df03ef93SHarish Kasiviswanathan #define KFD_GPU_ID_HASH_WIDTH 16 56df03ef93SHarish Kasiviswanathan 57df03ef93SHarish Kasiviswanathan /* Use upper bits of mmap offset to store KFD driver specific information. 58df03ef93SHarish Kasiviswanathan * BITS[63:62] - Encode MMAP type 59df03ef93SHarish Kasiviswanathan * BITS[61:46] - Encode gpu_id. To identify to which GPU the offset belongs to 60df03ef93SHarish Kasiviswanathan * BITS[45:0] - MMAP offset value 61df03ef93SHarish Kasiviswanathan * 62df03ef93SHarish Kasiviswanathan * NOTE: struct vm_area_struct.vm_pgoff uses offset in pages. Hence, these 63df03ef93SHarish Kasiviswanathan * defines are w.r.t to PAGE_SIZE 64df03ef93SHarish Kasiviswanathan */ 6529453755SYong Zhao #define KFD_MMAP_TYPE_SHIFT 62 66df03ef93SHarish Kasiviswanathan #define KFD_MMAP_TYPE_MASK (0x3ULL << KFD_MMAP_TYPE_SHIFT) 67df03ef93SHarish Kasiviswanathan #define KFD_MMAP_TYPE_DOORBELL (0x3ULL << KFD_MMAP_TYPE_SHIFT) 68df03ef93SHarish Kasiviswanathan #define KFD_MMAP_TYPE_EVENTS (0x2ULL << KFD_MMAP_TYPE_SHIFT) 69df03ef93SHarish Kasiviswanathan #define KFD_MMAP_TYPE_RESERVED_MEM (0x1ULL << KFD_MMAP_TYPE_SHIFT) 70d33ea570SOak Zeng #define KFD_MMAP_TYPE_MMIO (0x0ULL << KFD_MMAP_TYPE_SHIFT) 71df03ef93SHarish Kasiviswanathan 7229453755SYong Zhao #define KFD_MMAP_GPU_ID_SHIFT 46 73df03ef93SHarish Kasiviswanathan #define KFD_MMAP_GPU_ID_MASK (((1ULL << KFD_GPU_ID_HASH_WIDTH) - 1) \ 74df03ef93SHarish Kasiviswanathan << KFD_MMAP_GPU_ID_SHIFT) 75df03ef93SHarish Kasiviswanathan #define KFD_MMAP_GPU_ID(gpu_id) ((((uint64_t)gpu_id) << KFD_MMAP_GPU_ID_SHIFT)\ 76df03ef93SHarish Kasiviswanathan & KFD_MMAP_GPU_ID_MASK) 7729453755SYong Zhao #define KFD_MMAP_GET_GPU_ID(offset) ((offset & KFD_MMAP_GPU_ID_MASK) \ 78df03ef93SHarish Kasiviswanathan >> KFD_MMAP_GPU_ID_SHIFT) 79df03ef93SHarish Kasiviswanathan 80ed6e6a34SBen Goz /* 81ed6e6a34SBen Goz * When working with cp scheduler we should assign the HIQ manually or via 82e7016d8eSYong Zhao * the amdgpu driver to a fixed hqd slot, here are the fixed HIQ hqd slot 83ed6e6a34SBen Goz * definitions for Kaveri. In Kaveri only the first ME queues participates 84ed6e6a34SBen Goz * in the cp scheduling taking that in mind we set the HIQ slot in the 85ed6e6a34SBen Goz * second ME. 86ed6e6a34SBen Goz */ 87ed6e6a34SBen Goz #define KFD_CIK_HIQ_PIPE 4 88ed6e6a34SBen Goz #define KFD_CIK_HIQ_QUEUE 0 89ed6e6a34SBen Goz 905b5c4e40SEvgeny Pinchuk /* Macro for allocating structures */ 915b5c4e40SEvgeny Pinchuk #define kfd_alloc_struct(ptr_to_struct) \ 925b5c4e40SEvgeny Pinchuk ((typeof(ptr_to_struct)) kzalloc(sizeof(*ptr_to_struct), GFP_KERNEL)) 935b5c4e40SEvgeny Pinchuk 9419f6d2a6SOded Gabbay #define KFD_MAX_NUM_OF_PROCESSES 512 95b8cbab04SOded Gabbay #define KFD_MAX_NUM_OF_QUEUES_PER_PROCESS 1024 9619f6d2a6SOded Gabbay 9719f6d2a6SOded Gabbay /* 98373d7080SFelix Kuehling * Size of the per-process TBA+TMA buffer: 2 pages 99373d7080SFelix Kuehling * 100373d7080SFelix Kuehling * The first page is the TBA used for the CWSR ISA code. The second 101a4497974SRajneesh Bhardwaj * page is used as TMA for user-mode trap handler setup in daisy-chain mode. 102373d7080SFelix Kuehling */ 103373d7080SFelix Kuehling #define KFD_CWSR_TBA_TMA_SIZE (PAGE_SIZE * 2) 104373d7080SFelix Kuehling #define KFD_CWSR_TMA_OFFSET PAGE_SIZE 105373d7080SFelix Kuehling 10674523943SYong Zhao #define KFD_MAX_NUM_OF_QUEUES_PER_DEVICE \ 10774523943SYong Zhao (KFD_MAX_NUM_OF_PROCESSES * \ 10874523943SYong Zhao KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) 10974523943SYong Zhao 11074523943SYong Zhao #define KFD_KERNEL_QUEUE_SIZE 2048 11174523943SYong Zhao 11214328aa5SPhilip Cox #define KFD_UNMAP_LATENCY_MS (4000) 11314328aa5SPhilip Cox 114373d7080SFelix Kuehling /* 1151f86805aSYong Zhao * 512 = 0x200 1161f86805aSYong Zhao * The doorbell index distance between SDMA RLC (2*i) and (2*i+1) in the 1171f86805aSYong Zhao * same SDMA engine on SOC15, which has 8-byte doorbells for SDMA. 1181f86805aSYong Zhao * 512 8-byte doorbell distance (i.e. one page away) ensures that SDMA RLC 1191f86805aSYong Zhao * (2*i+1) doorbells (in terms of the lower 12 bit address) lie exactly in 1201f86805aSYong Zhao * the OFFSET and SIZE set in registers like BIF_SDMA0_DOORBELL_RANGE. 1211f86805aSYong Zhao */ 1221f86805aSYong Zhao #define KFD_QUEUE_DOORBELL_MIRROR_OFFSET 512 1231f86805aSYong Zhao 1241f86805aSYong Zhao 1251f86805aSYong Zhao /* 126b8cbab04SOded Gabbay * Kernel module parameter to specify maximum number of supported queues per 127b8cbab04SOded Gabbay * device 12819f6d2a6SOded Gabbay */ 129b8cbab04SOded Gabbay extern int max_num_of_queues_per_device; 13019f6d2a6SOded Gabbay 131ed6e6a34SBen Goz 13231c21fecSBen Goz /* Kernel module parameter to specify the scheduling policy */ 13331c21fecSBen Goz extern int sched_policy; 13431c21fecSBen Goz 135a99c6d4fSFelix Kuehling /* 136a99c6d4fSFelix Kuehling * Kernel module parameter to specify the maximum process 137a99c6d4fSFelix Kuehling * number per HW scheduler 138a99c6d4fSFelix Kuehling */ 139a99c6d4fSFelix Kuehling extern int hws_max_conc_proc; 140a99c6d4fSFelix Kuehling 141373d7080SFelix Kuehling extern int cwsr_enable; 142373d7080SFelix Kuehling 14381663016SOded Gabbay /* 14481663016SOded Gabbay * Kernel module parameter to specify whether to send sigterm to HSA process on 14581663016SOded Gabbay * unhandled exception 14681663016SOded Gabbay */ 14781663016SOded Gabbay extern int send_sigterm; 14881663016SOded Gabbay 149ebcfd1e2SFelix Kuehling /* 150374200b1SFelix Kuehling * This kernel module is used to simulate large bar machine on non-large bar 151374200b1SFelix Kuehling * enabled machines. 152374200b1SFelix Kuehling */ 153374200b1SFelix Kuehling extern int debug_largebar; 154374200b1SFelix Kuehling 155374200b1SFelix Kuehling /* 156ebcfd1e2SFelix Kuehling * Ignore CRAT table during KFD initialization, can be used to work around 157ebcfd1e2SFelix Kuehling * broken CRAT tables on some AMD systems 158ebcfd1e2SFelix Kuehling */ 159ebcfd1e2SFelix Kuehling extern int ignore_crat; 160ebcfd1e2SFelix Kuehling 161a4497974SRajneesh Bhardwaj /* Set sh_mem_config.retry_disable on GFX v9 */ 16275ee6487SFelix Kuehling extern int amdgpu_noretry; 163bed4f110SFelix Kuehling 164a4497974SRajneesh Bhardwaj /* Halt if HWS hang is detected */ 1650e9a860cSYong Zhao extern int halt_if_hws_hang; 1660e9a860cSYong Zhao 167a4497974SRajneesh Bhardwaj /* Whether MEC FW support GWS barriers */ 16829e76462SOak Zeng extern bool hws_gws_support; 16929e76462SOak Zeng 170a4497974SRajneesh Bhardwaj /* Queue preemption timeout in ms */ 17114328aa5SPhilip Cox extern int queue_preemption_timeout_ms; 17214328aa5SPhilip Cox 1736d909c5dSOak Zeng /* 1746d909c5dSOak Zeng * Don't evict process queues on vm fault 1756d909c5dSOak Zeng */ 1766d909c5dSOak Zeng extern int amdgpu_no_queue_eviction_on_vm_fault; 1776d909c5dSOak Zeng 178a4497974SRajneesh Bhardwaj /* Enable eviction debug messages */ 179b2057956SFelix Kuehling extern bool debug_evictions; 180b2057956SFelix Kuehling 181ed6e6a34SBen Goz enum cache_policy { 182ed6e6a34SBen Goz cache_policy_coherent, 183ed6e6a34SBen Goz cache_policy_noncoherent 184ed6e6a34SBen Goz }; 185ed6e6a34SBen Goz 186dd0ae064SGraham Sider #define KFD_GC_VERSION(dev) ((dev)->adev->ip_versions[GC_HWIP][0]) 187dd0ae064SGraham Sider #define KFD_IS_SOC15(dev) ((KFD_GC_VERSION(dev)) >= (IP_VERSION(9, 0, 1))) 188ef568db7SFelix Kuehling 189f3a39818SAndrew Lewycky struct kfd_event_interrupt_class { 190f3a39818SAndrew Lewycky bool (*interrupt_isr)(struct kfd_dev *dev, 19158e69886SLan Xiao const uint32_t *ih_ring_entry, uint32_t *patched_ihre, 19258e69886SLan Xiao bool *patched_flag); 193f3a39818SAndrew Lewycky void (*interrupt_wq)(struct kfd_dev *dev, 194f3a39818SAndrew Lewycky const uint32_t *ih_ring_entry); 195f3a39818SAndrew Lewycky }; 196f3a39818SAndrew Lewycky 1974a488a7aSOded Gabbay struct kfd_device_info { 198c181159aSYong Zhao const char *asic_name; 1999d6fa9c7SGraham Sider uint32_t gfx_target_version; 200f3a39818SAndrew Lewycky const struct kfd_event_interrupt_class *event_interrupt_class; 2014a488a7aSOded Gabbay unsigned int max_pasid_bits; 202992839adSYair Shachar unsigned int max_no_of_hqd; 203ada2b29cSFelix Kuehling unsigned int doorbell_size; 2044a488a7aSOded Gabbay size_t ih_ring_entry_size; 205f7c826adSAlexey Skidanov uint8_t num_of_watch_points; 20619f6d2a6SOded Gabbay uint16_t mqd_size_aligned; 207373d7080SFelix Kuehling bool supports_cwsr; 20864d1c3a4SFelix Kuehling bool needs_iommu_device; 2093ee2d00cSFelix Kuehling bool needs_pci_atomics; 210fb932dfeSFelix Kuehling uint32_t no_atomic_fw_version; 211d5094189SShaoyun Liu unsigned int num_sdma_queues_per_engine; 2124a488a7aSOded Gabbay }; 2134a488a7aSOded Gabbay 214ee2f17f4SAmber Lin unsigned int kfd_get_num_sdma_engines(struct kfd_dev *kdev); 215ee2f17f4SAmber Lin unsigned int kfd_get_num_xgmi_sdma_engines(struct kfd_dev *kdev); 216ee2f17f4SAmber Lin 21736b5c08fSOded Gabbay struct kfd_mem_obj { 21836b5c08fSOded Gabbay uint32_t range_start; 21936b5c08fSOded Gabbay uint32_t range_end; 22036b5c08fSOded Gabbay uint64_t gpu_addr; 22136b5c08fSOded Gabbay uint32_t *cpu_ptr; 222b91d43ddSFelix Kuehling void *gtt_mem; 22336b5c08fSOded Gabbay }; 22436b5c08fSOded Gabbay 22544008d7aSYong Zhao struct kfd_vmid_info { 22644008d7aSYong Zhao uint32_t first_vmid_kfd; 22744008d7aSYong Zhao uint32_t last_vmid_kfd; 22844008d7aSYong Zhao uint32_t vmid_num_kfd; 22944008d7aSYong Zhao }; 23044008d7aSYong Zhao 2314a488a7aSOded Gabbay struct kfd_dev { 232c6c57446SGraham Sider struct amdgpu_device *adev; 2334a488a7aSOded Gabbay 2344a488a7aSOded Gabbay const struct kfd_device_info *device_info; 2354a488a7aSOded Gabbay struct pci_dev *pdev; 2363a0c3423SHarish Kasiviswanathan struct drm_device *ddev; 2374a488a7aSOded Gabbay 2384a488a7aSOded Gabbay unsigned int id; /* topology stub index */ 2394a488a7aSOded Gabbay 24019f6d2a6SOded Gabbay phys_addr_t doorbell_base; /* Start of actual doorbells used by 24119f6d2a6SOded Gabbay * KFD. It is aligned for mapping 24219f6d2a6SOded Gabbay * into user mode 24319f6d2a6SOded Gabbay */ 244339903faSYong Zhao size_t doorbell_base_dw_offset; /* Offset from the start of the PCI 245339903faSYong Zhao * doorbell BAR to the first KFD 246339903faSYong Zhao * doorbell in dwords. GFX reserves 247339903faSYong Zhao * the segment before this offset. 24819f6d2a6SOded Gabbay */ 24919f6d2a6SOded Gabbay u32 __iomem *doorbell_kernel_ptr; /* This is a pointer for a doorbells 25019f6d2a6SOded Gabbay * page used by kernel queue 25119f6d2a6SOded Gabbay */ 25219f6d2a6SOded Gabbay 2534a488a7aSOded Gabbay struct kgd2kfd_shared_resources shared_resources; 25444008d7aSYong Zhao struct kfd_vmid_info vm_info; 2554a488a7aSOded Gabbay 256cea405b1SXihan Zhang const struct kfd2kgd_calls *kfd2kgd; 257cea405b1SXihan Zhang struct mutex doorbell_mutex; 258f761d8bdSJoe Perches DECLARE_BITMAP(doorbell_available_index, 259f761d8bdSJoe Perches KFD_MAX_NUM_OF_QUEUES_PER_PROCESS); 260cea405b1SXihan Zhang 26136b5c08fSOded Gabbay void *gtt_mem; 26236b5c08fSOded Gabbay uint64_t gtt_start_gpu_addr; 26336b5c08fSOded Gabbay void *gtt_start_cpu_ptr; 26436b5c08fSOded Gabbay void *gtt_sa_bitmap; 26536b5c08fSOded Gabbay struct mutex gtt_sa_lock; 26636b5c08fSOded Gabbay unsigned int gtt_sa_chunk_size; 26736b5c08fSOded Gabbay unsigned int gtt_sa_num_of_chunks; 26836b5c08fSOded Gabbay 2692249d558SAndrew Lewycky /* Interrupts */ 27004ad47bdSAndres Rodriguez struct kfifo ih_fifo; 27148e876a2SAndres Rodriguez struct workqueue_struct *ih_wq; 2722249d558SAndrew Lewycky struct work_struct interrupt_work; 2732249d558SAndrew Lewycky spinlock_t interrupt_lock; 2742249d558SAndrew Lewycky 275ed6e6a34SBen Goz /* QCM Device instance */ 276ed6e6a34SBen Goz struct device_queue_manager *dqm; 2774a488a7aSOded Gabbay 278ed6e6a34SBen Goz bool init_complete; 2792249d558SAndrew Lewycky /* 2802249d558SAndrew Lewycky * Interrupts of interest to KFD are copied 2812249d558SAndrew Lewycky * from the HW ring into a SW ring. 2822249d558SAndrew Lewycky */ 2832249d558SAndrew Lewycky bool interrupts_active; 284fbeb661bSYair Shachar 285fbeb661bSYair Shachar /* Debug manager */ 286fbeb661bSYair Shachar struct kfd_dbgmgr *dbgmgr; 287373d7080SFelix Kuehling 2885ade6c9cSFelix Kuehling /* Firmware versions */ 2895ade6c9cSFelix Kuehling uint16_t mec_fw_version; 29029633d0eSJoseph Greathouse uint16_t mec2_fw_version; 2915ade6c9cSFelix Kuehling uint16_t sdma_fw_version; 2925ade6c9cSFelix Kuehling 293a99c6d4fSFelix Kuehling /* Maximum process number mapped to HW scheduler */ 294a99c6d4fSFelix Kuehling unsigned int max_proc_per_quantum; 295a99c6d4fSFelix Kuehling 296373d7080SFelix Kuehling /* CWSR */ 297373d7080SFelix Kuehling bool cwsr_enabled; 298373d7080SFelix Kuehling const void *cwsr_isa; 299373d7080SFelix Kuehling unsigned int cwsr_isa_size; 3000c1690e3SShaoyun Liu 3010c1690e3SShaoyun Liu /* xGMI */ 3020c1690e3SShaoyun Liu uint64_t hive_id; 3030c663695SDivya Shikre 304d35f00d8SEric Huang bool pci_atomic_requested; 3059b54d201SEric Huang 3066127896fSHuang Rui /* Use IOMMU v2 flag */ 3076127896fSHuang Rui bool use_iommu_v2; 3086127896fSHuang Rui 3099b54d201SEric Huang /* SRAM ECC flag */ 3109b54d201SEric Huang atomic_t sram_ecc_flag; 311f756e631SHarish Kasiviswanathan 312f756e631SHarish Kasiviswanathan /* Compute Profile ref. count */ 313f756e631SHarish Kasiviswanathan atomic_t compute_profile; 314e09d4fc8SOak Zeng 315a4497974SRajneesh Bhardwaj /* Global GWS resource shared between processes */ 316e09d4fc8SOak Zeng void *gws; 317938a0650SAmber Lin 318938a0650SAmber Lin /* Clients watching SMI events */ 319938a0650SAmber Lin struct list_head smi_clients; 320938a0650SAmber Lin spinlock_t smi_lock; 32155977744SMukul Joshi 32255977744SMukul Joshi uint32_t reset_seq_num; 32359d7115dSMukul Joshi 32459d7115dSMukul Joshi struct ida doorbell_ida; 32559d7115dSMukul Joshi unsigned int max_doorbell_slices; 3269b498efaSAlex Deucher 3279b498efaSAlex Deucher int noretry; 328814ab993SPhilip Yang 329814ab993SPhilip Yang /* HMM page migration MEMORY_DEVICE_PRIVATE mapping */ 330814ab993SPhilip Yang struct dev_pagemap pgmap; 3314a488a7aSOded Gabbay }; 3324a488a7aSOded Gabbay 33319f6d2a6SOded Gabbay enum kfd_mempool { 33419f6d2a6SOded Gabbay KFD_MEMPOOL_SYSTEM_CACHEABLE = 1, 33519f6d2a6SOded Gabbay KFD_MEMPOOL_SYSTEM_WRITECOMBINE = 2, 33619f6d2a6SOded Gabbay KFD_MEMPOOL_FRAMEBUFFER = 3, 33719f6d2a6SOded Gabbay }; 33819f6d2a6SOded Gabbay 3394a488a7aSOded Gabbay /* Character device interface */ 3404a488a7aSOded Gabbay int kfd_chardev_init(void); 3414a488a7aSOded Gabbay void kfd_chardev_exit(void); 3424a488a7aSOded Gabbay struct device *kfd_chardev(void); 3434a488a7aSOded Gabbay 344241f24f8SBen Goz /** 345a4497974SRajneesh Bhardwaj * enum kfd_unmap_queues_filter - Enum for queue filters. 346241f24f8SBen Goz * 3477da2bcf8SYong Zhao * @KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE: Preempts single queue. 348241f24f8SBen Goz * 3497da2bcf8SYong Zhao * @KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES: Preempts all queues in the 350241f24f8SBen Goz * running queues list. 351241f24f8SBen Goz * 3527da2bcf8SYong Zhao * @KFD_UNMAP_QUEUES_FILTER_BY_PASID: Preempts queues that belongs to 353241f24f8SBen Goz * specific process. 354241f24f8SBen Goz * 355241f24f8SBen Goz */ 3567da2bcf8SYong Zhao enum kfd_unmap_queues_filter { 3577da2bcf8SYong Zhao KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE, 3587da2bcf8SYong Zhao KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 3597da2bcf8SYong Zhao KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 3607da2bcf8SYong Zhao KFD_UNMAP_QUEUES_FILTER_BY_PASID 361241f24f8SBen Goz }; 36219f6d2a6SOded Gabbay 363ed8aab45SBen Goz /** 364a4497974SRajneesh Bhardwaj * enum kfd_queue_type - Enum for various queue types. 365ed8aab45SBen Goz * 366ed8aab45SBen Goz * @KFD_QUEUE_TYPE_COMPUTE: Regular user mode queue type. 367ed8aab45SBen Goz * 368a4497974SRajneesh Bhardwaj * @KFD_QUEUE_TYPE_SDMA: SDMA user mode queue type. 369ed8aab45SBen Goz * 370ed8aab45SBen Goz * @KFD_QUEUE_TYPE_HIQ: HIQ queue type. 371ed8aab45SBen Goz * 372ed8aab45SBen Goz * @KFD_QUEUE_TYPE_DIQ: DIQ queue type. 373a4497974SRajneesh Bhardwaj * 374a4497974SRajneesh Bhardwaj * @KFD_QUEUE_TYPE_SDMA_XGMI: Special SDMA queue for XGMI interface. 375ed8aab45SBen Goz */ 376ed8aab45SBen Goz enum kfd_queue_type { 377ed8aab45SBen Goz KFD_QUEUE_TYPE_COMPUTE, 378ed8aab45SBen Goz KFD_QUEUE_TYPE_SDMA, 379ed8aab45SBen Goz KFD_QUEUE_TYPE_HIQ, 3801b4670f6SOak Zeng KFD_QUEUE_TYPE_DIQ, 3811b4670f6SOak Zeng KFD_QUEUE_TYPE_SDMA_XGMI 382ed8aab45SBen Goz }; 383ed8aab45SBen Goz 3846e99df57SBen Goz enum kfd_queue_format { 3856e99df57SBen Goz KFD_QUEUE_FORMAT_PM4, 3866e99df57SBen Goz KFD_QUEUE_FORMAT_AQL 3876e99df57SBen Goz }; 3886e99df57SBen Goz 3890ccbc7cdSOak Zeng enum KFD_QUEUE_PRIORITY { 3900ccbc7cdSOak Zeng KFD_QUEUE_PRIORITY_MINIMUM = 0, 3910ccbc7cdSOak Zeng KFD_QUEUE_PRIORITY_MAXIMUM = 15 3920ccbc7cdSOak Zeng }; 3930ccbc7cdSOak Zeng 394ed8aab45SBen Goz /** 395ed8aab45SBen Goz * struct queue_properties 396ed8aab45SBen Goz * 397ed8aab45SBen Goz * @type: The queue type. 398ed8aab45SBen Goz * 399ed8aab45SBen Goz * @queue_id: Queue identifier. 400ed8aab45SBen Goz * 401ed8aab45SBen Goz * @queue_address: Queue ring buffer address. 402ed8aab45SBen Goz * 403ed8aab45SBen Goz * @queue_size: Queue ring buffer size. 404ed8aab45SBen Goz * 405ed8aab45SBen Goz * @priority: Defines the queue priority relative to other queues in the 406ed8aab45SBen Goz * process. 407ed8aab45SBen Goz * This is just an indication and HW scheduling may override the priority as 408ed8aab45SBen Goz * necessary while keeping the relative prioritization. 409ed8aab45SBen Goz * the priority granularity is from 0 to f which f is the highest priority. 410ed8aab45SBen Goz * currently all queues are initialized with the highest priority. 411ed8aab45SBen Goz * 412ed8aab45SBen Goz * @queue_percent: This field is partially implemented and currently a zero in 413ed8aab45SBen Goz * this field defines that the queue is non active. 414ed8aab45SBen Goz * 415ed8aab45SBen Goz * @read_ptr: User space address which points to the number of dwords the 416ed8aab45SBen Goz * cp read from the ring buffer. This field updates automatically by the H/W. 417ed8aab45SBen Goz * 418ed8aab45SBen Goz * @write_ptr: Defines the number of dwords written to the ring buffer. 419ed8aab45SBen Goz * 420a4497974SRajneesh Bhardwaj * @doorbell_ptr: Notifies the H/W of new packet written to the queue ring 421a4497974SRajneesh Bhardwaj * buffer. This field should be similar to write_ptr and the user should 422a4497974SRajneesh Bhardwaj * update this field after updating the write_ptr. 423ed8aab45SBen Goz * 424ed8aab45SBen Goz * @doorbell_off: The doorbell offset in the doorbell pci-bar. 425ed8aab45SBen Goz * 4268eabaf54SKent Russell * @is_interop: Defines if this is a interop queue. Interop queue means that 4278eabaf54SKent Russell * the queue can access both graphics and compute resources. 428ed8aab45SBen Goz * 42926103436SFelix Kuehling * @is_evicted: Defines if the queue is evicted. Only active queues 43026103436SFelix Kuehling * are evicted, rendering them inactive. 43126103436SFelix Kuehling * 43226103436SFelix Kuehling * @is_active: Defines if the queue is active or not. @is_active and 43326103436SFelix Kuehling * @is_evicted are protected by the DQM lock. 434ed8aab45SBen Goz * 435b8020b03SJoseph Greathouse * @is_gws: Defines if the queue has been updated to be GWS-capable or not. 436b8020b03SJoseph Greathouse * @is_gws should be protected by the DQM lock, since changing it can yield the 437b8020b03SJoseph Greathouse * possibility of updating DQM state on number of GWS queues. 438b8020b03SJoseph Greathouse * 439ed8aab45SBen Goz * @vmid: If the scheduling mode is no cp scheduling the field defines the vmid 440ed8aab45SBen Goz * of the queue. 441ed8aab45SBen Goz * 442ed8aab45SBen Goz * This structure represents the queue properties for each queue no matter if 443ed8aab45SBen Goz * it's user mode or kernel mode queue. 444ed8aab45SBen Goz * 445ed8aab45SBen Goz */ 446ed8aab45SBen Goz struct queue_properties { 447ed8aab45SBen Goz enum kfd_queue_type type; 4486e99df57SBen Goz enum kfd_queue_format format; 449ed8aab45SBen Goz unsigned int queue_id; 450ed8aab45SBen Goz uint64_t queue_address; 451ed8aab45SBen Goz uint64_t queue_size; 452ed8aab45SBen Goz uint32_t priority; 453ed8aab45SBen Goz uint32_t queue_percent; 454ed8aab45SBen Goz uint32_t *read_ptr; 455ed8aab45SBen Goz uint32_t *write_ptr; 456ada2b29cSFelix Kuehling void __iomem *doorbell_ptr; 457ed8aab45SBen Goz uint32_t doorbell_off; 458ed8aab45SBen Goz bool is_interop; 45926103436SFelix Kuehling bool is_evicted; 460ed8aab45SBen Goz bool is_active; 461b8020b03SJoseph Greathouse bool is_gws; 462ed8aab45SBen Goz /* Not relevant for user mode queues in cp scheduling */ 463ed8aab45SBen Goz unsigned int vmid; 46477669eb8SBen Goz /* Relevant only for sdma queues*/ 46577669eb8SBen Goz uint32_t sdma_engine_id; 46677669eb8SBen Goz uint32_t sdma_queue_id; 46777669eb8SBen Goz uint32_t sdma_vm_addr; 468ff3d04a1SBen Goz /* Relevant only for VI */ 469ff3d04a1SBen Goz uint64_t eop_ring_buffer_address; 470ff3d04a1SBen Goz uint32_t eop_ring_buffer_size; 471ff3d04a1SBen Goz uint64_t ctx_save_restore_area_address; 472ff3d04a1SBen Goz uint32_t ctx_save_restore_area_size; 473373d7080SFelix Kuehling uint32_t ctl_stack_size; 474373d7080SFelix Kuehling uint64_t tba_addr; 475373d7080SFelix Kuehling uint64_t tma_addr; 476ed8aab45SBen Goz }; 477ed8aab45SBen Goz 478bb2d2128SFelix Kuehling #define QUEUE_IS_ACTIVE(q) ((q).queue_size > 0 && \ 479bb2d2128SFelix Kuehling (q).queue_address != 0 && \ 480bb2d2128SFelix Kuehling (q).queue_percent > 0 && \ 481bb2d2128SFelix Kuehling !(q).is_evicted) 482bb2d2128SFelix Kuehling 4837c695a2cSLang Yu enum mqd_update_flag { 4847c695a2cSLang Yu UPDATE_FLAG_CU_MASK = 0, 4857c695a2cSLang Yu }; 4867c695a2cSLang Yu 4877c695a2cSLang Yu struct mqd_update_info { 4887c695a2cSLang Yu union { 4897c695a2cSLang Yu struct { 4907c695a2cSLang Yu uint32_t count; /* Must be a multiple of 32 */ 4917c695a2cSLang Yu uint32_t *ptr; 4927c695a2cSLang Yu } cu_mask; 4937c695a2cSLang Yu }; 4947c695a2cSLang Yu enum mqd_update_flag update_flag; 4957c695a2cSLang Yu }; 496c6e559ebSLang Yu 497ed8aab45SBen Goz /** 498ed8aab45SBen Goz * struct queue 499ed8aab45SBen Goz * 500ed8aab45SBen Goz * @list: Queue linked list. 501ed8aab45SBen Goz * 502a4497974SRajneesh Bhardwaj * @mqd: The queue MQD (memory queue descriptor). 503ed8aab45SBen Goz * 504ed8aab45SBen Goz * @mqd_mem_obj: The MQD local gpu memory object. 505ed8aab45SBen Goz * 506ed8aab45SBen Goz * @gart_mqd_addr: The MQD gart mc address. 507ed8aab45SBen Goz * 508ed8aab45SBen Goz * @properties: The queue properties. 509ed8aab45SBen Goz * 510ed8aab45SBen Goz * @mec: Used only in no cp scheduling mode and identifies to micro engine id 511a4497974SRajneesh Bhardwaj * that the queue should be executed on. 512ed8aab45SBen Goz * 5138eabaf54SKent Russell * @pipe: Used only in no cp scheduling mode and identifies the queue's pipe 5148eabaf54SKent Russell * id. 515ed8aab45SBen Goz * 516ed8aab45SBen Goz * @queue: Used only in no cp scheduliong mode and identifies the queue's slot. 517ed8aab45SBen Goz * 518ed8aab45SBen Goz * @process: The kfd process that created this queue. 519ed8aab45SBen Goz * 520ed8aab45SBen Goz * @device: The kfd device that created this queue. 521ed8aab45SBen Goz * 522eb82da1dSOak Zeng * @gws: Pointing to gws kgd_mem if this is a gws control queue; NULL 523eb82da1dSOak Zeng * otherwise. 524eb82da1dSOak Zeng * 525ed8aab45SBen Goz * This structure represents user mode compute queues. 526ed8aab45SBen Goz * It contains all the necessary data to handle such queues. 527ed8aab45SBen Goz * 528ed8aab45SBen Goz */ 529ed8aab45SBen Goz 530ed8aab45SBen Goz struct queue { 531ed8aab45SBen Goz struct list_head list; 532ed8aab45SBen Goz void *mqd; 533ed8aab45SBen Goz struct kfd_mem_obj *mqd_mem_obj; 534ed8aab45SBen Goz uint64_t gart_mqd_addr; 535ed8aab45SBen Goz struct queue_properties properties; 536ed8aab45SBen Goz 537ed8aab45SBen Goz uint32_t mec; 538ed8aab45SBen Goz uint32_t pipe; 539ed8aab45SBen Goz uint32_t queue; 540ed8aab45SBen Goz 54177669eb8SBen Goz unsigned int sdma_id; 542ef568db7SFelix Kuehling unsigned int doorbell_id; 54377669eb8SBen Goz 544ed8aab45SBen Goz struct kfd_process *process; 545ed8aab45SBen Goz struct kfd_dev *device; 546eb82da1dSOak Zeng void *gws; 5476d220a7eSAmber Lin 5486d220a7eSAmber Lin /* procfs */ 5496d220a7eSAmber Lin struct kobject kobj; 550ed8aab45SBen Goz }; 551ed8aab45SBen Goz 5526e99df57SBen Goz enum KFD_MQD_TYPE { 553d7c0b047SYong Zhao KFD_MQD_TYPE_HIQ = 0, /* for hiq */ 55485d258f9SBen Goz KFD_MQD_TYPE_CP, /* for cp queues and diq */ 55585d258f9SBen Goz KFD_MQD_TYPE_SDMA, /* for sdma queues */ 55659f650a0SOak Zeng KFD_MQD_TYPE_DIQ, /* for diq */ 5576e99df57SBen Goz KFD_MQD_TYPE_MAX 5586e99df57SBen Goz }; 5596e99df57SBen Goz 5600ccbc7cdSOak Zeng enum KFD_PIPE_PRIORITY { 5610ccbc7cdSOak Zeng KFD_PIPE_PRIORITY_CS_LOW = 0, 5620ccbc7cdSOak Zeng KFD_PIPE_PRIORITY_CS_MEDIUM, 5630ccbc7cdSOak Zeng KFD_PIPE_PRIORITY_CS_HIGH 5640ccbc7cdSOak Zeng }; 5650ccbc7cdSOak Zeng 566241f24f8SBen Goz struct scheduling_resources { 567241f24f8SBen Goz unsigned int vmid_mask; 568241f24f8SBen Goz enum kfd_queue_type type; 569241f24f8SBen Goz uint64_t queue_mask; 570241f24f8SBen Goz uint64_t gws_mask; 571241f24f8SBen Goz uint32_t oac_mask; 572241f24f8SBen Goz uint32_t gds_heap_base; 573241f24f8SBen Goz uint32_t gds_heap_size; 574241f24f8SBen Goz }; 575241f24f8SBen Goz 576241f24f8SBen Goz struct process_queue_manager { 577241f24f8SBen Goz /* data */ 578241f24f8SBen Goz struct kfd_process *process; 579241f24f8SBen Goz struct list_head queues; 580241f24f8SBen Goz unsigned long *queue_slot_bitmap; 581241f24f8SBen Goz }; 582241f24f8SBen Goz 583241f24f8SBen Goz struct qcm_process_device { 584241f24f8SBen Goz /* The Device Queue Manager that owns this data */ 585241f24f8SBen Goz struct device_queue_manager *dqm; 586241f24f8SBen Goz struct process_queue_manager *pqm; 587241f24f8SBen Goz /* Queues list */ 588241f24f8SBen Goz struct list_head queues_list; 589241f24f8SBen Goz struct list_head priv_queue_list; 590241f24f8SBen Goz 591241f24f8SBen Goz unsigned int queue_count; 592241f24f8SBen Goz unsigned int vmid; 593241f24f8SBen Goz bool is_debug; 59426103436SFelix Kuehling unsigned int evicted; /* eviction counter, 0=active */ 5959fd3f1bfSFelix Kuehling 5969fd3f1bfSFelix Kuehling /* This flag tells if we should reset all wavefronts on 5979fd3f1bfSFelix Kuehling * process termination 5989fd3f1bfSFelix Kuehling */ 5999fd3f1bfSFelix Kuehling bool reset_wavefronts; 6009fd3f1bfSFelix Kuehling 601b8020b03SJoseph Greathouse /* This flag tells us if this process has a GWS-capable 602b8020b03SJoseph Greathouse * queue that will be mapped into the runlist. It's 603b8020b03SJoseph Greathouse * possible to request a GWS BO, but not have the queue 604b8020b03SJoseph Greathouse * currently mapped, and this changes how the MAP_PROCESS 605b8020b03SJoseph Greathouse * PM4 packet is configured. 606b8020b03SJoseph Greathouse */ 607b8020b03SJoseph Greathouse bool mapped_gws_queue; 608b8020b03SJoseph Greathouse 609a4497974SRajneesh Bhardwaj /* All the memory management data should be here too */ 610241f24f8SBen Goz uint64_t gds_context_area; 611435e2f97SYong Zhao /* Contains page table flags such as AMDGPU_PTE_VALID since gfx9 */ 612e715c6d0SShaoyun Liu uint64_t page_table_base; 613241f24f8SBen Goz uint32_t sh_mem_config; 614241f24f8SBen Goz uint32_t sh_mem_bases; 615241f24f8SBen Goz uint32_t sh_mem_ape1_base; 616241f24f8SBen Goz uint32_t sh_mem_ape1_limit; 617241f24f8SBen Goz uint32_t gds_size; 618241f24f8SBen Goz uint32_t num_gws; 619241f24f8SBen Goz uint32_t num_oac; 6206a1c9510SMoses Reuben uint32_t sh_hidden_private_base; 621373d7080SFelix Kuehling 622373d7080SFelix Kuehling /* CWSR memory */ 62368df0f19SLang Yu struct kgd_mem *cwsr_mem; 624373d7080SFelix Kuehling void *cwsr_kaddr; 625d01994c2SFelix Kuehling uint64_t cwsr_base; 626373d7080SFelix Kuehling uint64_t tba_addr; 627373d7080SFelix Kuehling uint64_t tma_addr; 628d01994c2SFelix Kuehling 629d01994c2SFelix Kuehling /* IB memory */ 63068df0f19SLang Yu struct kgd_mem *ib_mem; 631d01994c2SFelix Kuehling uint64_t ib_base; 632552764b6SFelix Kuehling void *ib_kaddr; 633ef568db7SFelix Kuehling 634ef568db7SFelix Kuehling /* doorbell resources per process per device */ 635ef568db7SFelix Kuehling unsigned long *doorbell_bitmap; 636241f24f8SBen Goz }; 637241f24f8SBen Goz 63826103436SFelix Kuehling /* KFD Memory Eviction */ 63926103436SFelix Kuehling 64026103436SFelix Kuehling /* Approx. wait time before attempting to restore evicted BOs */ 64126103436SFelix Kuehling #define PROCESS_RESTORE_TIME_MS 100 64226103436SFelix Kuehling /* Approx. back off time if restore fails due to lack of memory */ 64326103436SFelix Kuehling #define PROCESS_BACK_OFF_TIME_MS 100 64426103436SFelix Kuehling /* Approx. time before evicting the process again */ 64526103436SFelix Kuehling #define PROCESS_ACTIVE_TIME_MS 10 64626103436SFelix Kuehling 6475ec7e028SFelix Kuehling /* 8 byte handle containing GPU ID in the most significant 4 bytes and 6485ec7e028SFelix Kuehling * idr_handle in the least significant 4 bytes 6495ec7e028SFelix Kuehling */ 6505ec7e028SFelix Kuehling #define MAKE_HANDLE(gpu_id, idr_handle) \ 6515ec7e028SFelix Kuehling (((uint64_t)(gpu_id) << 32) + idr_handle) 6525ec7e028SFelix Kuehling #define GET_GPU_ID(handle) (handle >> 32) 6535ec7e028SFelix Kuehling #define GET_IDR_HANDLE(handle) (handle & 0xFFFFFFFF) 6545ec7e028SFelix Kuehling 655733fa1f7SYong Zhao enum kfd_pdd_bound { 656733fa1f7SYong Zhao PDD_UNBOUND = 0, 657733fa1f7SYong Zhao PDD_BOUND, 658733fa1f7SYong Zhao PDD_BOUND_SUSPENDED, 659733fa1f7SYong Zhao }; 660733fa1f7SYong Zhao 6614327bed2SPhilip Cox #define MAX_SYSFS_FILENAME_LEN 15 66232cb59f3SMukul Joshi 66332cb59f3SMukul Joshi /* 66432cb59f3SMukul Joshi * SDMA counter runs at 100MHz frequency. 66532cb59f3SMukul Joshi * We display SDMA activity in microsecond granularity in sysfs. 66632cb59f3SMukul Joshi * As a result, the divisor is 100. 66732cb59f3SMukul Joshi */ 66832cb59f3SMukul Joshi #define SDMA_ACTIVITY_DIVISOR 100 669d4566deeSMukul Joshi 67019f6d2a6SOded Gabbay /* Data that is per-process-per device. */ 67119f6d2a6SOded Gabbay struct kfd_process_device { 67219f6d2a6SOded Gabbay /* The device that owns this data. */ 67319f6d2a6SOded Gabbay struct kfd_dev *dev; 67419f6d2a6SOded Gabbay 6759fd3f1bfSFelix Kuehling /* The process that owns this kfd_process_device. */ 6769fd3f1bfSFelix Kuehling struct kfd_process *process; 67719f6d2a6SOded Gabbay 67845102048SBen Goz /* per-process-per device QCM data structure */ 67945102048SBen Goz struct qcm_process_device qpd; 68045102048SBen Goz 68119f6d2a6SOded Gabbay /*Apertures*/ 68219f6d2a6SOded Gabbay uint64_t lds_base; 68319f6d2a6SOded Gabbay uint64_t lds_limit; 68419f6d2a6SOded Gabbay uint64_t gpuvm_base; 68519f6d2a6SOded Gabbay uint64_t gpuvm_limit; 68619f6d2a6SOded Gabbay uint64_t scratch_base; 68719f6d2a6SOded Gabbay uint64_t scratch_limit; 68819f6d2a6SOded Gabbay 689403575c4SFelix Kuehling /* VM context for GPUVM allocations */ 690b84394e2SFelix Kuehling struct file *drm_file; 691b40a6ab2SFelix Kuehling void *drm_priv; 692403575c4SFelix Kuehling 69352b29d73SFelix Kuehling /* GPUVM allocations storage */ 69452b29d73SFelix Kuehling struct idr alloc_idr; 69552b29d73SFelix Kuehling 6969fd3f1bfSFelix Kuehling /* Flag used to tell the pdd has dequeued from the dqm. 6979fd3f1bfSFelix Kuehling * This is used to prevent dev->dqm->ops.process_termination() from 6989fd3f1bfSFelix Kuehling * being called twice when it is already called in IOMMU callback 6999fd3f1bfSFelix Kuehling * function. 700a82918f1SBen Goz */ 7019fd3f1bfSFelix Kuehling bool already_dequeued; 7029593f4d6SRajneesh Bhardwaj bool runtime_inuse; 70364d1c3a4SFelix Kuehling 70464d1c3a4SFelix Kuehling /* Is this process/pasid bound to this device? (amd_iommu_bind_pasid) */ 70564d1c3a4SFelix Kuehling enum kfd_pdd_bound bound; 706d4566deeSMukul Joshi 707d4566deeSMukul Joshi /* VRAM usage */ 708d4566deeSMukul Joshi uint64_t vram_usage; 709d4566deeSMukul Joshi struct attribute attr_vram; 71032cb59f3SMukul Joshi char vram_filename[MAX_SYSFS_FILENAME_LEN]; 71132cb59f3SMukul Joshi 71232cb59f3SMukul Joshi /* SDMA activity tracking */ 71332cb59f3SMukul Joshi uint64_t sdma_past_activity_counter; 71432cb59f3SMukul Joshi struct attribute attr_sdma; 71532cb59f3SMukul Joshi char sdma_filename[MAX_SYSFS_FILENAME_LEN]; 7164327bed2SPhilip Cox 7174327bed2SPhilip Cox /* Eviction activity tracking */ 7184327bed2SPhilip Cox uint64_t last_evict_timestamp; 7194327bed2SPhilip Cox atomic64_t evict_duration_counter; 7204327bed2SPhilip Cox struct attribute attr_evict; 7214327bed2SPhilip Cox 7224327bed2SPhilip Cox struct kobject *kobj_stats; 72359d7115dSMukul Joshi unsigned int doorbell_index; 724f2fa07b3SRamesh Errabolu 725f2fa07b3SRamesh Errabolu /* 726f2fa07b3SRamesh Errabolu * @cu_occupancy: Reports occupancy of Compute Units (CU) of a process 727f2fa07b3SRamesh Errabolu * that is associated with device encoded by "this" struct instance. The 728f2fa07b3SRamesh Errabolu * value reflects CU usage by all of the waves launched by this process 729f2fa07b3SRamesh Errabolu * on this device. A very important property of occupancy parameter is 730f2fa07b3SRamesh Errabolu * that its value is a snapshot of current use. 731f2fa07b3SRamesh Errabolu * 732f2fa07b3SRamesh Errabolu * Following is to be noted regarding how this parameter is reported: 733f2fa07b3SRamesh Errabolu * 734f2fa07b3SRamesh Errabolu * The number of waves that a CU can launch is limited by couple of 735f2fa07b3SRamesh Errabolu * parameters. These are encoded by struct amdgpu_cu_info instance 736f2fa07b3SRamesh Errabolu * that is part of every device definition. For GFX9 devices this 737f2fa07b3SRamesh Errabolu * translates to 40 waves (simd_per_cu * max_waves_per_simd) when waves 738f2fa07b3SRamesh Errabolu * do not use scratch memory and 32 waves (max_scratch_slots_per_cu) 739f2fa07b3SRamesh Errabolu * when they do use scratch memory. This could change for future 740f2fa07b3SRamesh Errabolu * devices and therefore this example should be considered as a guide. 741f2fa07b3SRamesh Errabolu * 742f2fa07b3SRamesh Errabolu * All CU's of a device are available for the process. This may not be true 743f2fa07b3SRamesh Errabolu * under certain conditions - e.g. CU masking. 744f2fa07b3SRamesh Errabolu * 745f2fa07b3SRamesh Errabolu * Finally number of CU's that are occupied by a process is affected by both 746f2fa07b3SRamesh Errabolu * number of CU's a device has along with number of other competing processes 747f2fa07b3SRamesh Errabolu */ 748f2fa07b3SRamesh Errabolu struct attribute attr_cu_occupancy; 749751580b3SPhilip Yang 750751580b3SPhilip Yang /* sysfs counters for GPU retry fault and page migration tracking */ 751751580b3SPhilip Yang struct kobject *kobj_counters; 752751580b3SPhilip Yang struct attribute attr_faults; 753751580b3SPhilip Yang struct attribute attr_page_in; 754751580b3SPhilip Yang struct attribute attr_page_out; 755751580b3SPhilip Yang uint64_t faults; 756751580b3SPhilip Yang uint64_t page_in; 757751580b3SPhilip Yang uint64_t page_out; 75819f6d2a6SOded Gabbay }; 75919f6d2a6SOded Gabbay 76052a5fdceSAlexey Skidanov #define qpd_to_pdd(x) container_of(x, struct kfd_process_device, qpd) 76152a5fdceSAlexey Skidanov 76242de677fSPhilip Yang struct svm_range_list { 76342de677fSPhilip Yang struct mutex lock; 76442de677fSPhilip Yang struct rb_root_cached objects; 76542de677fSPhilip Yang struct list_head list; 7664683cfecSPhilip Yang struct work_struct deferred_list_work; 7674683cfecSPhilip Yang struct list_head deferred_range_list; 7684683cfecSPhilip Yang spinlock_t deferred_list_lock; 7698a7c184aSFelix Kuehling atomic_t evicted_ranges; 770*2e447728SPhilip Yang atomic_t drain_pagefaults; 7718a7c184aSFelix Kuehling struct delayed_work restore_work; 7725a75ea56SFelix Kuehling DECLARE_BITMAP(bitmap_supported, MAX_GPU_INSTANCE); 773a6283010SAlex Sierra struct task_struct *faulting_task; 77442de677fSPhilip Yang }; 77542de677fSPhilip Yang 7764a488a7aSOded Gabbay /* Process data */ 7774a488a7aSOded Gabbay struct kfd_process { 77819f6d2a6SOded Gabbay /* 77919f6d2a6SOded Gabbay * kfd_process are stored in an mm_struct*->kfd_process* 78019f6d2a6SOded Gabbay * hash table (kfd_processes in kfd_process.c) 78119f6d2a6SOded Gabbay */ 78219f6d2a6SOded Gabbay struct hlist_node kfd_processes; 78319f6d2a6SOded Gabbay 7849b56bb11SFelix Kuehling /* 7859b56bb11SFelix Kuehling * Opaque pointer to mm_struct. We don't hold a reference to 7869b56bb11SFelix Kuehling * it so it should never be dereferenced from here. This is 7879b56bb11SFelix Kuehling * only used for looking up processes by their mm. 7889b56bb11SFelix Kuehling */ 7899b56bb11SFelix Kuehling void *mm; 79019f6d2a6SOded Gabbay 7915ce10687SFelix Kuehling struct kref ref; 7925ce10687SFelix Kuehling struct work_struct release_work; 7935ce10687SFelix Kuehling 79419f6d2a6SOded Gabbay struct mutex mutex; 79519f6d2a6SOded Gabbay 79619f6d2a6SOded Gabbay /* 79719f6d2a6SOded Gabbay * In any process, the thread that started main() is the lead 79819f6d2a6SOded Gabbay * thread and outlives the rest. 79919f6d2a6SOded Gabbay * It is here because amd_iommu_bind_pasid wants a task_struct. 800894a8293SFelix Kuehling * It can also be used for safely getting a reference to the 801894a8293SFelix Kuehling * mm_struct of the process. 80219f6d2a6SOded Gabbay */ 80319f6d2a6SOded Gabbay struct task_struct *lead_thread; 80419f6d2a6SOded Gabbay 80519f6d2a6SOded Gabbay /* We want to receive a notification when the mm_struct is destroyed */ 80619f6d2a6SOded Gabbay struct mmu_notifier mmu_notifier; 80719f6d2a6SOded Gabbay 808c7b6bac9SFenghua Yu u32 pasid; 80919f6d2a6SOded Gabbay 81019f6d2a6SOded Gabbay /* 8116ae27841SAlex Sierra * Array of kfd_process_device pointers, 81219f6d2a6SOded Gabbay * one for each device the process is using. 81319f6d2a6SOded Gabbay */ 8146ae27841SAlex Sierra struct kfd_process_device *pdds[MAX_GPU_INSTANCE]; 8156ae27841SAlex Sierra uint32_t n_pdds; 81619f6d2a6SOded Gabbay 81745102048SBen Goz struct process_queue_manager pqm; 81845102048SBen Goz 81919f6d2a6SOded Gabbay /*Is the user space process 32 bit?*/ 82019f6d2a6SOded Gabbay bool is_32bit_user_mode; 821f3a39818SAndrew Lewycky 822f3a39818SAndrew Lewycky /* Event-related data */ 823f3a39818SAndrew Lewycky struct mutex event_mutex; 824482f0777SFelix Kuehling /* Event ID allocator and lookup */ 825482f0777SFelix Kuehling struct idr event_idr; 82650cb7dd9SFelix Kuehling /* Event page */ 82768df0f19SLang Yu u64 signal_handle; 82850cb7dd9SFelix Kuehling struct kfd_signal_page *signal_page; 829b9a5d0a5SFelix Kuehling size_t signal_mapped_size; 830f3a39818SAndrew Lewycky size_t signal_event_count; 831c986169fSFelix Kuehling bool signal_event_limit_reached; 832403575c4SFelix Kuehling 833403575c4SFelix Kuehling /* Information used for memory eviction */ 834403575c4SFelix Kuehling void *kgd_process_info; 835403575c4SFelix Kuehling /* Eviction fence that is attached to all the BOs of this process. The 836403575c4SFelix Kuehling * fence will be triggered during eviction and new one will be created 837403575c4SFelix Kuehling * during restore 838403575c4SFelix Kuehling */ 839403575c4SFelix Kuehling struct dma_fence *ef; 84026103436SFelix Kuehling 84126103436SFelix Kuehling /* Work items for evicting and restoring BOs */ 84226103436SFelix Kuehling struct delayed_work eviction_work; 84326103436SFelix Kuehling struct delayed_work restore_work; 84426103436SFelix Kuehling /* seqno of the last scheduled eviction */ 84526103436SFelix Kuehling unsigned int last_eviction_seqno; 84626103436SFelix Kuehling /* Approx. the last timestamp (in jiffies) when the process was 84726103436SFelix Kuehling * restored after an eviction 84826103436SFelix Kuehling */ 84926103436SFelix Kuehling unsigned long last_restore_timestamp; 850de9f26bbSKent Russell 851de9f26bbSKent Russell /* Kobj for our procfs */ 852de9f26bbSKent Russell struct kobject *kobj; 8536d220a7eSAmber Lin struct kobject *kobj_queues; 854de9f26bbSKent Russell struct attribute attr_pasid; 85540ce74d1SPhilip Yang 85642de677fSPhilip Yang /* shared virtual memory registered by this process */ 85742de677fSPhilip Yang struct svm_range_list svms; 858063e33c5SAlex Sierra 859063e33c5SAlex Sierra bool xnack_enabled; 8604a488a7aSOded Gabbay }; 8614a488a7aSOded Gabbay 86264d1c3a4SFelix Kuehling #define KFD_PROCESS_TABLE_SIZE 5 /* bits: 32 entries */ 86364d1c3a4SFelix Kuehling extern DECLARE_HASHTABLE(kfd_processes_table, KFD_PROCESS_TABLE_SIZE); 86464d1c3a4SFelix Kuehling extern struct srcu_struct kfd_processes_srcu; 86564d1c3a4SFelix Kuehling 86676baee6cSOded Gabbay /** 867a4497974SRajneesh Bhardwaj * typedef amdkfd_ioctl_t - typedef for ioctl function pointer. 86876baee6cSOded Gabbay * 869a4497974SRajneesh Bhardwaj * @filep: pointer to file structure. 870a4497974SRajneesh Bhardwaj * @p: amdkfd process pointer. 871a4497974SRajneesh Bhardwaj * @data: pointer to arg that was copied from user. 872a4497974SRajneesh Bhardwaj * 873a4497974SRajneesh Bhardwaj * Return: returns ioctl completion code. 87476baee6cSOded Gabbay */ 87576baee6cSOded Gabbay typedef int amdkfd_ioctl_t(struct file *filep, struct kfd_process *p, 87676baee6cSOded Gabbay void *data); 87776baee6cSOded Gabbay 87876baee6cSOded Gabbay struct amdkfd_ioctl_desc { 87976baee6cSOded Gabbay unsigned int cmd; 88076baee6cSOded Gabbay int flags; 88176baee6cSOded Gabbay amdkfd_ioctl_t *func; 88276baee6cSOded Gabbay unsigned int cmd_drv; 88376baee6cSOded Gabbay const char *name; 88476baee6cSOded Gabbay }; 88567f7cf9fSshaoyunl bool kfd_dev_is_large_bar(struct kfd_dev *dev); 88676baee6cSOded Gabbay 8871679ae8fSFelix Kuehling int kfd_process_create_wq(void); 88819f6d2a6SOded Gabbay void kfd_process_destroy_wq(void); 889373d7080SFelix Kuehling struct kfd_process *kfd_create_process(struct file *filep); 89019f6d2a6SOded Gabbay struct kfd_process *kfd_get_process(const struct task_struct *); 891c7b6bac9SFenghua Yu struct kfd_process *kfd_lookup_process_by_pasid(u32 pasid); 89226103436SFelix Kuehling struct kfd_process *kfd_lookup_process_by_mm(const struct mm_struct *mm); 8932aeb742bSAlex Sierra 8942aeb742bSAlex Sierra int kfd_process_gpuidx_from_gpuid(struct kfd_process *p, uint32_t gpu_id); 89556c5977eSGraham Sider int kfd_process_gpuid_from_adev(struct kfd_process *p, 896cda0f85bSFelix Kuehling struct amdgpu_device *adev, uint32_t *gpuid, 897cda0f85bSFelix Kuehling uint32_t *gpuidx); 8982aeb742bSAlex Sierra static inline int kfd_process_gpuid_from_gpuidx(struct kfd_process *p, 8992aeb742bSAlex Sierra uint32_t gpuidx, uint32_t *gpuid) { 9002aeb742bSAlex Sierra return gpuidx < p->n_pdds ? p->pdds[gpuidx]->dev->id : -EINVAL; 9012aeb742bSAlex Sierra } 9022aeb742bSAlex Sierra static inline struct kfd_process_device *kfd_process_device_from_gpuidx( 9032aeb742bSAlex Sierra struct kfd_process *p, uint32_t gpuidx) { 9042aeb742bSAlex Sierra return gpuidx < p->n_pdds ? p->pdds[gpuidx] : NULL; 9052aeb742bSAlex Sierra } 9062aeb742bSAlex Sierra 907abb208a8SFelix Kuehling void kfd_unref_process(struct kfd_process *p); 9086b95e797SFelix Kuehling int kfd_process_evict_queues(struct kfd_process *p); 9096b95e797SFelix Kuehling int kfd_process_restore_queues(struct kfd_process *p); 91026103436SFelix Kuehling void kfd_suspend_all_processes(void); 91126103436SFelix Kuehling int kfd_resume_all_processes(void); 91219f6d2a6SOded Gabbay 913b84394e2SFelix Kuehling int kfd_process_device_init_vm(struct kfd_process_device *pdd, 914b84394e2SFelix Kuehling struct file *drm_file); 91564c7f8cfSBen Goz struct kfd_process_device *kfd_bind_process_to_device(struct kfd_dev *dev, 91664c7f8cfSBen Goz struct kfd_process *p); 91719f6d2a6SOded Gabbay struct kfd_process_device *kfd_get_process_device_data(struct kfd_dev *dev, 918093c7d8cSAlexey Skidanov struct kfd_process *p); 919093c7d8cSAlexey Skidanov struct kfd_process_device *kfd_create_process_device_data(struct kfd_dev *dev, 920093c7d8cSAlexey Skidanov struct kfd_process *p); 92119f6d2a6SOded Gabbay 922063e33c5SAlex Sierra bool kfd_process_xnack_mode(struct kfd_process *p, bool supported); 923063e33c5SAlex Sierra 924df03ef93SHarish Kasiviswanathan int kfd_reserved_mem_mmap(struct kfd_dev *dev, struct kfd_process *process, 925373d7080SFelix Kuehling struct vm_area_struct *vma); 926373d7080SFelix Kuehling 92752b29d73SFelix Kuehling /* KFD process API for creating and translating handles */ 92852b29d73SFelix Kuehling int kfd_process_device_create_obj_handle(struct kfd_process_device *pdd, 92952b29d73SFelix Kuehling void *mem); 93052b29d73SFelix Kuehling void *kfd_process_device_translate_handle(struct kfd_process_device *p, 93152b29d73SFelix Kuehling int handle); 93252b29d73SFelix Kuehling void kfd_process_device_remove_obj_handle(struct kfd_process_device *pdd, 93352b29d73SFelix Kuehling int handle); 93452b29d73SFelix Kuehling 93519f6d2a6SOded Gabbay /* PASIDs */ 93619f6d2a6SOded Gabbay int kfd_pasid_init(void); 93719f6d2a6SOded Gabbay void kfd_pasid_exit(void); 93819f6d2a6SOded Gabbay bool kfd_set_pasid_limit(unsigned int new_limit); 93919f6d2a6SOded Gabbay unsigned int kfd_get_pasid_limit(void); 940c7b6bac9SFenghua Yu u32 kfd_pasid_alloc(void); 941c7b6bac9SFenghua Yu void kfd_pasid_free(u32 pasid); 94219f6d2a6SOded Gabbay 94319f6d2a6SOded Gabbay /* Doorbells */ 944ef568db7SFelix Kuehling size_t kfd_doorbell_process_slice(struct kfd_dev *kfd); 945735df2baSFelix Kuehling int kfd_doorbell_init(struct kfd_dev *kfd); 946735df2baSFelix Kuehling void kfd_doorbell_fini(struct kfd_dev *kfd); 947df03ef93SHarish Kasiviswanathan int kfd_doorbell_mmap(struct kfd_dev *dev, struct kfd_process *process, 948df03ef93SHarish Kasiviswanathan struct vm_area_struct *vma); 949ada2b29cSFelix Kuehling void __iomem *kfd_get_kernel_doorbell(struct kfd_dev *kfd, 95019f6d2a6SOded Gabbay unsigned int *doorbell_off); 95119f6d2a6SOded Gabbay void kfd_release_kernel_doorbell(struct kfd_dev *kfd, u32 __iomem *db_addr); 95219f6d2a6SOded Gabbay u32 read_kernel_doorbell(u32 __iomem *db); 953ada2b29cSFelix Kuehling void write_kernel_doorbell(void __iomem *db, u32 value); 9549d7d0248SFelix Kuehling void write_kernel_doorbell64(void __iomem *db, u64 value); 955339903faSYong Zhao unsigned int kfd_get_doorbell_dw_offset_in_bar(struct kfd_dev *kfd, 95659d7115dSMukul Joshi struct kfd_process_device *pdd, 957ef568db7SFelix Kuehling unsigned int doorbell_id); 95859d7115dSMukul Joshi phys_addr_t kfd_get_process_doorbells(struct kfd_process_device *pdd); 95959d7115dSMukul Joshi int kfd_alloc_process_doorbells(struct kfd_dev *kfd, 96059d7115dSMukul Joshi unsigned int *doorbell_index); 96159d7115dSMukul Joshi void kfd_free_process_doorbells(struct kfd_dev *kfd, 96259d7115dSMukul Joshi unsigned int doorbell_index); 9636e81090bSOded Gabbay /* GTT Sub-Allocator */ 9646e81090bSOded Gabbay 9656e81090bSOded Gabbay int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size, 9666e81090bSOded Gabbay struct kfd_mem_obj **mem_obj); 9676e81090bSOded Gabbay 9686e81090bSOded Gabbay int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj); 9696e81090bSOded Gabbay 9704a488a7aSOded Gabbay extern struct device *kfd_device; 9714a488a7aSOded Gabbay 972de9f26bbSKent Russell /* KFD's procfs */ 973de9f26bbSKent Russell void kfd_procfs_init(void); 974de9f26bbSKent Russell void kfd_procfs_shutdown(void); 9756d220a7eSAmber Lin int kfd_procfs_add_queue(struct queue *q); 9766d220a7eSAmber Lin void kfd_procfs_del_queue(struct queue *q); 977de9f26bbSKent Russell 9785b5c4e40SEvgeny Pinchuk /* Topology */ 9795b5c4e40SEvgeny Pinchuk int kfd_topology_init(void); 9805b5c4e40SEvgeny Pinchuk void kfd_topology_shutdown(void); 9815b5c4e40SEvgeny Pinchuk int kfd_topology_add_device(struct kfd_dev *gpu); 9825b5c4e40SEvgeny Pinchuk int kfd_topology_remove_device(struct kfd_dev *gpu); 9833a87177eSHarish Kasiviswanathan struct kfd_topology_device *kfd_topology_device_by_proximity_domain( 9843a87177eSHarish Kasiviswanathan uint32_t proximity_domain); 98544d8cc6fSYong Zhao struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id); 9865b5c4e40SEvgeny Pinchuk struct kfd_dev *kfd_device_by_id(uint32_t gpu_id); 9875b5c4e40SEvgeny Pinchuk struct kfd_dev *kfd_device_by_pci_dev(const struct pci_dev *pdev); 988574c4183SGraham Sider struct kfd_dev *kfd_device_by_adev(const struct amdgpu_device *adev); 9896d82eb0eSHarish Kasiviswanathan int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_dev **kdev); 990520b8fb7SFelix Kuehling int kfd_numa_node_to_apic_id(int numa_node_id); 9916127896fSHuang Rui void kfd_double_confirm_iommu_support(struct kfd_dev *gpu); 9925b5c4e40SEvgeny Pinchuk 9934a488a7aSOded Gabbay /* Interrupts */ 9942249d558SAndrew Lewycky int kfd_interrupt_init(struct kfd_dev *dev); 9952249d558SAndrew Lewycky void kfd_interrupt_exit(struct kfd_dev *dev); 9962249d558SAndrew Lewycky bool enqueue_ih_ring_entry(struct kfd_dev *kfd, const void *ih_ring_entry); 99758e69886SLan Xiao bool interrupt_is_wanted(struct kfd_dev *dev, 99858e69886SLan Xiao const uint32_t *ih_ring_entry, 99958e69886SLan Xiao uint32_t *patched_ihre, bool *flag); 10004a488a7aSOded Gabbay 100119f6d2a6SOded Gabbay /* amdkfd Apertures */ 100219f6d2a6SOded Gabbay int kfd_init_apertures(struct kfd_process *process); 100319f6d2a6SOded Gabbay 10047c9631afSJay Cornwall void kfd_process_set_trap_handler(struct qcm_process_device *qpd, 10057c9631afSJay Cornwall uint64_t tba_addr, 10067c9631afSJay Cornwall uint64_t tma_addr); 10077c9631afSJay Cornwall 1008ed6e6a34SBen Goz /* Queue Context Management */ 1009e88a614cSEdward O'Callaghan int init_queue(struct queue **q, const struct queue_properties *properties); 1010ed6e6a34SBen Goz void uninit_queue(struct queue *q); 101145102048SBen Goz void print_queue_properties(struct queue_properties *q); 1012ed6e6a34SBen Goz void print_queue(struct queue *q); 1013ed6e6a34SBen Goz 10144b8f589bSBen Goz struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type, 10154b8f589bSBen Goz struct kfd_dev *dev); 1016ee04955aSFelix Kuehling struct mqd_manager *mqd_manager_init_cik_hawaii(enum KFD_MQD_TYPE type, 1017ee04955aSFelix Kuehling struct kfd_dev *dev); 10184b8f589bSBen Goz struct mqd_manager *mqd_manager_init_vi(enum KFD_MQD_TYPE type, 10194b8f589bSBen Goz struct kfd_dev *dev); 1020ee04955aSFelix Kuehling struct mqd_manager *mqd_manager_init_vi_tonga(enum KFD_MQD_TYPE type, 1021ee04955aSFelix Kuehling struct kfd_dev *dev); 1022b91d43ddSFelix Kuehling struct mqd_manager *mqd_manager_init_v9(enum KFD_MQD_TYPE type, 1023b91d43ddSFelix Kuehling struct kfd_dev *dev); 102414328aa5SPhilip Cox struct mqd_manager *mqd_manager_init_v10(enum KFD_MQD_TYPE type, 102514328aa5SPhilip Cox struct kfd_dev *dev); 102664c7f8cfSBen Goz struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev); 102764c7f8cfSBen Goz void device_queue_manager_uninit(struct device_queue_manager *dqm); 1028241f24f8SBen Goz struct kernel_queue *kernel_queue_init(struct kfd_dev *dev, 1029241f24f8SBen Goz enum kfd_queue_type type); 1030c2a77fdeSFelix Kuehling void kernel_queue_uninit(struct kernel_queue *kq, bool hanging); 1031c7b6bac9SFenghua Yu int kfd_process_vm_fault(struct device_queue_manager *dqm, u32 pasid); 1032241f24f8SBen Goz 103345102048SBen Goz /* Process Queue Manager */ 103445102048SBen Goz struct process_queue_node { 103545102048SBen Goz struct queue *q; 103645102048SBen Goz struct kernel_queue *kq; 103745102048SBen Goz struct list_head process_queue_list; 103845102048SBen Goz }; 103945102048SBen Goz 10409fd3f1bfSFelix Kuehling void kfd_process_dequeue_from_device(struct kfd_process_device *pdd); 10419fd3f1bfSFelix Kuehling void kfd_process_dequeue_from_all_devices(struct kfd_process *p); 104245102048SBen Goz int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p); 104345102048SBen Goz void pqm_uninit(struct process_queue_manager *pqm); 104445102048SBen Goz int pqm_create_queue(struct process_queue_manager *pqm, 104545102048SBen Goz struct kfd_dev *dev, 104645102048SBen Goz struct file *f, 104745102048SBen Goz struct queue_properties *properties, 1048e47a8b52SYong Zhao unsigned int *qid, 1049e47a8b52SYong Zhao uint32_t *p_doorbell_offset_in_process); 105045102048SBen Goz int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid); 10517c695a2cSLang Yu int pqm_update_queue_properties(struct process_queue_manager *pqm, unsigned int qid, 105245102048SBen Goz struct queue_properties *p); 10537c695a2cSLang Yu int pqm_update_mqd(struct process_queue_manager *pqm, unsigned int qid, 10547c695a2cSLang Yu struct mqd_update_info *minfo); 1055eb82da1dSOak Zeng int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid, 1056eb82da1dSOak Zeng void *gws); 1057fbeb661bSYair Shachar struct kernel_queue *pqm_get_kernel_queue(struct process_queue_manager *pqm, 1058fbeb661bSYair Shachar unsigned int qid); 10595bb4b78bSOak Zeng struct queue *pqm_get_user_queue(struct process_queue_manager *pqm, 10605bb4b78bSOak Zeng unsigned int qid); 10615df099e8SJay Cornwall int pqm_get_wave_state(struct process_queue_manager *pqm, 10625df099e8SJay Cornwall unsigned int qid, 10635df099e8SJay Cornwall void __user *ctl_stack, 10645df099e8SJay Cornwall u32 *ctl_stack_used_size, 10655df099e8SJay Cornwall u32 *save_area_used_size); 106645102048SBen Goz 1067b010affeSQu Huang int amdkfd_fence_wait_timeout(uint64_t *fence_addr, 1068b010affeSQu Huang uint64_t fence_value, 10698c72c3d7SYong Zhao unsigned int timeout_ms); 1070788bf83dSYair Shachar 1071ed6e6a34SBen Goz /* Packet Manager */ 1072ed6e6a34SBen Goz 107364c7f8cfSBen Goz #define KFD_FENCE_COMPLETED (100) 107464c7f8cfSBen Goz #define KFD_FENCE_INIT (10) 1075241f24f8SBen Goz 1076ed6e6a34SBen Goz struct packet_manager { 1077ed6e6a34SBen Goz struct device_queue_manager *dqm; 1078ed6e6a34SBen Goz struct kernel_queue *priv_queue; 1079ed6e6a34SBen Goz struct mutex lock; 1080ed6e6a34SBen Goz bool allocated; 1081ed6e6a34SBen Goz struct kfd_mem_obj *ib_buffer_obj; 1082851a645eSFelix Kuehling unsigned int ib_size_bytes; 1083819ec5acSFelix Kuehling bool is_over_subscription; 1084f6e27ff1SFelix Kuehling 1085f6e27ff1SFelix Kuehling const struct packet_manager_funcs *pmf; 1086ed6e6a34SBen Goz }; 1087ed6e6a34SBen Goz 1088f6e27ff1SFelix Kuehling struct packet_manager_funcs { 1089f6e27ff1SFelix Kuehling /* Support ASIC-specific packet formats for PM4 packets */ 1090f6e27ff1SFelix Kuehling int (*map_process)(struct packet_manager *pm, uint32_t *buffer, 1091f6e27ff1SFelix Kuehling struct qcm_process_device *qpd); 1092f6e27ff1SFelix Kuehling int (*runlist)(struct packet_manager *pm, uint32_t *buffer, 1093f6e27ff1SFelix Kuehling uint64_t ib, size_t ib_size_in_dwords, bool chain); 1094f6e27ff1SFelix Kuehling int (*set_resources)(struct packet_manager *pm, uint32_t *buffer, 1095f6e27ff1SFelix Kuehling struct scheduling_resources *res); 1096f6e27ff1SFelix Kuehling int (*map_queues)(struct packet_manager *pm, uint32_t *buffer, 1097f6e27ff1SFelix Kuehling struct queue *q, bool is_static); 1098f6e27ff1SFelix Kuehling int (*unmap_queues)(struct packet_manager *pm, uint32_t *buffer, 1099f6e27ff1SFelix Kuehling enum kfd_queue_type type, 1100f6e27ff1SFelix Kuehling enum kfd_unmap_queues_filter mode, 1101f6e27ff1SFelix Kuehling uint32_t filter_param, bool reset, 1102f6e27ff1SFelix Kuehling unsigned int sdma_engine); 1103f6e27ff1SFelix Kuehling int (*query_status)(struct packet_manager *pm, uint32_t *buffer, 1104b010affeSQu Huang uint64_t fence_address, uint64_t fence_value); 1105f6e27ff1SFelix Kuehling int (*release_mem)(uint64_t gpu_addr, uint32_t *buffer); 1106f6e27ff1SFelix Kuehling 1107f6e27ff1SFelix Kuehling /* Packet sizes */ 1108f6e27ff1SFelix Kuehling int map_process_size; 1109f6e27ff1SFelix Kuehling int runlist_size; 1110f6e27ff1SFelix Kuehling int set_resources_size; 1111f6e27ff1SFelix Kuehling int map_queues_size; 1112f6e27ff1SFelix Kuehling int unmap_queues_size; 1113f6e27ff1SFelix Kuehling int query_status_size; 1114f6e27ff1SFelix Kuehling int release_mem_size; 1115f6e27ff1SFelix Kuehling }; 1116f6e27ff1SFelix Kuehling 1117f6e27ff1SFelix Kuehling extern const struct packet_manager_funcs kfd_vi_pm_funcs; 1118454150b1SFelix Kuehling extern const struct packet_manager_funcs kfd_v9_pm_funcs; 1119fd6a440eSJonathan Kim extern const struct packet_manager_funcs kfd_aldebaran_pm_funcs; 1120f6e27ff1SFelix Kuehling 112164c7f8cfSBen Goz int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm); 1122c2a77fdeSFelix Kuehling void pm_uninit(struct packet_manager *pm, bool hanging); 112364c7f8cfSBen Goz int pm_send_set_resources(struct packet_manager *pm, 112464c7f8cfSBen Goz struct scheduling_resources *res); 112564c7f8cfSBen Goz int pm_send_runlist(struct packet_manager *pm, struct list_head *dqm_queues); 112664c7f8cfSBen Goz int pm_send_query_status(struct packet_manager *pm, uint64_t fence_address, 1127b010affeSQu Huang uint64_t fence_value); 112864c7f8cfSBen Goz 112964c7f8cfSBen Goz int pm_send_unmap_queue(struct packet_manager *pm, enum kfd_queue_type type, 11307da2bcf8SYong Zhao enum kfd_unmap_queues_filter mode, 113164c7f8cfSBen Goz uint32_t filter_param, bool reset, 113264c7f8cfSBen Goz unsigned int sdma_engine); 113364c7f8cfSBen Goz 1134241f24f8SBen Goz void pm_release_ib(struct packet_manager *pm); 1135241f24f8SBen Goz 1136454150b1SFelix Kuehling /* Following PM funcs can be shared among VI and AI */ 1137454150b1SFelix Kuehling unsigned int pm_build_pm4_header(unsigned int opcode, size_t packet_size); 113814328aa5SPhilip Cox 113919f6d2a6SOded Gabbay uint64_t kfd_get_number_elems(struct kfd_dev *kfd); 114019f6d2a6SOded Gabbay 1141f3a39818SAndrew Lewycky /* Events */ 1142f3a39818SAndrew Lewycky extern const struct kfd_event_interrupt_class event_interrupt_class_cik; 1143ca750681SFelix Kuehling extern const struct kfd_event_interrupt_class event_interrupt_class_v9; 1144ca750681SFelix Kuehling 1145930c5ff4SAlexey Skidanov extern const struct kfd_device_global_init_class device_global_init_class_cik; 1146f3a39818SAndrew Lewycky 1147f3a39818SAndrew Lewycky void kfd_event_init_process(struct kfd_process *p); 1148f3a39818SAndrew Lewycky void kfd_event_free_process(struct kfd_process *p); 1149f3a39818SAndrew Lewycky int kfd_event_mmap(struct kfd_process *process, struct vm_area_struct *vma); 1150f3a39818SAndrew Lewycky int kfd_wait_on_events(struct kfd_process *p, 115159d3e8beSAlexey Skidanov uint32_t num_events, void __user *data, 1152f3a39818SAndrew Lewycky bool all, uint32_t user_timeout_ms, 1153fdf0c833SFelix Kuehling uint32_t *wait_result); 1154c7b6bac9SFenghua Yu void kfd_signal_event_interrupt(u32 pasid, uint32_t partial_id, 1155f3a39818SAndrew Lewycky uint32_t valid_id_bits); 115659d3e8beSAlexey Skidanov void kfd_signal_iommu_event(struct kfd_dev *dev, 1157c7b6bac9SFenghua Yu u32 pasid, unsigned long address, 115859d3e8beSAlexey Skidanov bool is_write_requested, bool is_execute_requested); 1159c7b6bac9SFenghua Yu void kfd_signal_hw_exception_event(u32 pasid); 1160f3a39818SAndrew Lewycky int kfd_set_event(struct kfd_process *p, uint32_t event_id); 1161f3a39818SAndrew Lewycky int kfd_reset_event(struct kfd_process *p, uint32_t event_id); 11620fc8011fSFelix Kuehling int kfd_event_page_set(struct kfd_process *p, void *kernel_address, 11630fc8011fSFelix Kuehling uint64_t size); 1164f3a39818SAndrew Lewycky int kfd_event_create(struct file *devkfd, struct kfd_process *p, 1165f3a39818SAndrew Lewycky uint32_t event_type, bool auto_reset, uint32_t node_id, 1166f3a39818SAndrew Lewycky uint32_t *event_id, uint32_t *event_trigger_data, 1167f3a39818SAndrew Lewycky uint64_t *event_page_offset, uint32_t *event_slot_index); 1168f3a39818SAndrew Lewycky int kfd_event_destroy(struct kfd_process *p, uint32_t event_id); 1169f3a39818SAndrew Lewycky 1170c7b6bac9SFenghua Yu void kfd_signal_vm_fault_event(struct kfd_dev *dev, u32 pasid, 11712640c3faSshaoyunl struct kfd_vm_fault_info *info); 11722640c3faSshaoyunl 1173e42051d2SShaoyun Liu void kfd_signal_reset_event(struct kfd_dev *dev); 1174e42051d2SShaoyun Liu 1175e2b1f9f5SDennis Li void kfd_signal_poison_consumed_event(struct kfd_dev *dev, u32 pasid); 1176e2b1f9f5SDennis Li 11773543b055SEric Huang void kfd_flush_tlb(struct kfd_process_device *pdd, enum TLB_FLUSH_TYPE type); 1178403575c4SFelix Kuehling 1179c3447e81SBen Goz int dbgdev_wave_reset_wavefronts(struct kfd_dev *dev, struct kfd_process *p); 1180c3447e81SBen Goz 1181e42051d2SShaoyun Liu bool kfd_is_locked(void); 1182e42051d2SShaoyun Liu 1183f756e631SHarish Kasiviswanathan /* Compute profile */ 1184f756e631SHarish Kasiviswanathan void kfd_inc_compute_active(struct kfd_dev *dev); 1185f756e631SHarish Kasiviswanathan void kfd_dec_compute_active(struct kfd_dev *dev); 1186f756e631SHarish Kasiviswanathan 11876b855f7bSHarish Kasiviswanathan /* Cgroup Support */ 11886b855f7bSHarish Kasiviswanathan /* Check with device cgroup if @kfd device is accessible */ 11896b855f7bSHarish Kasiviswanathan static inline int kfd_devcgroup_check_permission(struct kfd_dev *kfd) 11906b855f7bSHarish Kasiviswanathan { 1191eec8fd02SOdin Ugedal #if defined(CONFIG_CGROUP_DEVICE) || defined(CONFIG_CGROUP_BPF) 11926b855f7bSHarish Kasiviswanathan struct drm_device *ddev = kfd->ddev; 11936b855f7bSHarish Kasiviswanathan 119499c7b309SLorenz Brun return devcgroup_check_permission(DEVCG_DEV_CHAR, DRM_MAJOR, 11956b855f7bSHarish Kasiviswanathan ddev->render->index, 11966b855f7bSHarish Kasiviswanathan DEVCG_ACC_WRITE | DEVCG_ACC_READ); 11976b855f7bSHarish Kasiviswanathan #else 11986b855f7bSHarish Kasiviswanathan return 0; 11996b855f7bSHarish Kasiviswanathan #endif 12006b855f7bSHarish Kasiviswanathan } 12016b855f7bSHarish Kasiviswanathan 1202851a645eSFelix Kuehling /* Debugfs */ 1203851a645eSFelix Kuehling #if defined(CONFIG_DEBUG_FS) 1204851a645eSFelix Kuehling 1205851a645eSFelix Kuehling void kfd_debugfs_init(void); 1206851a645eSFelix Kuehling void kfd_debugfs_fini(void); 1207851a645eSFelix Kuehling int kfd_debugfs_mqds_by_process(struct seq_file *m, void *data); 1208851a645eSFelix Kuehling int pqm_debugfs_mqds(struct seq_file *m, void *data); 1209851a645eSFelix Kuehling int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data); 1210851a645eSFelix Kuehling int dqm_debugfs_hqds(struct seq_file *m, void *data); 1211851a645eSFelix Kuehling int kfd_debugfs_rls_by_device(struct seq_file *m, void *data); 1212851a645eSFelix Kuehling int pm_debugfs_runlist(struct seq_file *m, void *data); 1213851a645eSFelix Kuehling 1214a29ec470SShaoyun Liu int kfd_debugfs_hang_hws(struct kfd_dev *dev); 1215a29ec470SShaoyun Liu int pm_debugfs_hang_hws(struct packet_manager *pm); 12164f942aaeSOak Zeng int dqm_debugfs_hang_hws(struct device_queue_manager *dqm); 1217a29ec470SShaoyun Liu 1218851a645eSFelix Kuehling #else 1219851a645eSFelix Kuehling 1220851a645eSFelix Kuehling static inline void kfd_debugfs_init(void) {} 1221851a645eSFelix Kuehling static inline void kfd_debugfs_fini(void) {} 1222851a645eSFelix Kuehling 1223851a645eSFelix Kuehling #endif 1224851a645eSFelix Kuehling 12254a488a7aSOded Gabbay #endif 1226