1*d87f36a0SRajneesh Bhardwaj /* SPDX-License-Identifier: GPL-2.0 OR MIT */ 2ed6e6a34SBen Goz /* 3*d87f36a0SRajneesh Bhardwaj * Copyright 2014-2022 Advanced Micro Devices, Inc. 4ed6e6a34SBen Goz * 5ed6e6a34SBen Goz * Permission is hereby granted, free of charge, to any person obtaining a 6ed6e6a34SBen Goz * copy of this software and associated documentation files (the "Software"), 7ed6e6a34SBen Goz * to deal in the Software without restriction, including without limitation 8ed6e6a34SBen Goz * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9ed6e6a34SBen Goz * and/or sell copies of the Software, and to permit persons to whom the 10ed6e6a34SBen Goz * Software is furnished to do so, subject to the following conditions: 11ed6e6a34SBen Goz * 12ed6e6a34SBen Goz * The above copyright notice and this permission notice shall be included in 13ed6e6a34SBen Goz * all copies or substantial portions of the Software. 14ed6e6a34SBen Goz * 15ed6e6a34SBen Goz * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16ed6e6a34SBen Goz * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17ed6e6a34SBen Goz * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18ed6e6a34SBen Goz * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19ed6e6a34SBen Goz * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20ed6e6a34SBen Goz * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21ed6e6a34SBen Goz * OTHER DEALINGS IN THE SOFTWARE. 22ed6e6a34SBen Goz * 23ed6e6a34SBen Goz */ 24ed6e6a34SBen Goz 25ed6e6a34SBen Goz #ifndef KFD_PM4_HEADERS_H_ 26ed6e6a34SBen Goz #define KFD_PM4_HEADERS_H_ 27ed6e6a34SBen Goz 28ed6e6a34SBen Goz #ifndef PM4_MES_HEADER_DEFINED 29ed6e6a34SBen Goz #define PM4_MES_HEADER_DEFINED 30ed6e6a34SBen Goz union PM4_MES_TYPE_3_HEADER { 31ed6e6a34SBen Goz struct { 328eabaf54SKent Russell /* reserved */ 338eabaf54SKent Russell uint32_t reserved1:8; 348eabaf54SKent Russell /* IT opcode */ 358eabaf54SKent Russell uint32_t opcode:8; 368eabaf54SKent Russell /* number of DWORDs - 1 in the information body */ 378eabaf54SKent Russell uint32_t count:14; 388eabaf54SKent Russell /* packet identifier. It should be 3 for type 3 packets */ 398eabaf54SKent Russell uint32_t type:2; 40ed6e6a34SBen Goz }; 41ed6e6a34SBen Goz uint32_t u32all; 42ed6e6a34SBen Goz }; 43ed6e6a34SBen Goz #endif /* PM4_MES_HEADER_DEFINED */ 44ed6e6a34SBen Goz 45ed6e6a34SBen Goz 46ed6e6a34SBen Goz /*--------------------MES_MAP_PROCESS-------------------- */ 47ed6e6a34SBen Goz 48ed6e6a34SBen Goz #ifndef PM4_MES_MAP_PROCESS_DEFINED 49ed6e6a34SBen Goz #define PM4_MES_MAP_PROCESS_DEFINED 50ed6e6a34SBen Goz 51ed6e6a34SBen Goz struct pm4_map_process { 52ed6e6a34SBen Goz union { 53ed6e6a34SBen Goz union PM4_MES_TYPE_3_HEADER header; /* header */ 54ed6e6a34SBen Goz uint32_t ordinal1; 55ed6e6a34SBen Goz }; 56ed6e6a34SBen Goz 57ed6e6a34SBen Goz union { 58ed6e6a34SBen Goz struct { 59ed6e6a34SBen Goz uint32_t pasid:16; 60ed6e6a34SBen Goz uint32_t reserved1:8; 61ed6e6a34SBen Goz uint32_t diq_enable:1; 62ed6e6a34SBen Goz uint32_t process_quantum:7; 63ed6e6a34SBen Goz } bitfields2; 64ed6e6a34SBen Goz uint32_t ordinal2; 65ed6e6a34SBen Goz }; 66ed6e6a34SBen Goz 67ed6e6a34SBen Goz union { 68ed6e6a34SBen Goz struct { 69ed6e6a34SBen Goz uint32_t page_table_base:28; 70ed6e6a34SBen Goz uint32_t reserved3:4; 71ed6e6a34SBen Goz } bitfields3; 72ed6e6a34SBen Goz uint32_t ordinal3; 73ed6e6a34SBen Goz }; 74ed6e6a34SBen Goz 75ed6e6a34SBen Goz uint32_t sh_mem_bases; 76ed6e6a34SBen Goz uint32_t sh_mem_ape1_base; 77ed6e6a34SBen Goz uint32_t sh_mem_ape1_limit; 78ed6e6a34SBen Goz uint32_t sh_mem_config; 79ed6e6a34SBen Goz uint32_t gds_addr_lo; 80ed6e6a34SBen Goz uint32_t gds_addr_hi; 81ed6e6a34SBen Goz 82ed6e6a34SBen Goz union { 83ed6e6a34SBen Goz struct { 84ed6e6a34SBen Goz uint32_t num_gws:6; 85ed6e6a34SBen Goz uint32_t reserved4:2; 86ed6e6a34SBen Goz uint32_t num_oac:4; 87ed6e6a34SBen Goz uint32_t reserved5:4; 88ed6e6a34SBen Goz uint32_t gds_size:6; 89ed6e6a34SBen Goz uint32_t num_queues:10; 90ed6e6a34SBen Goz } bitfields10; 91ed6e6a34SBen Goz uint32_t ordinal10; 92ed6e6a34SBen Goz }; 93ed6e6a34SBen Goz 94ed6e6a34SBen Goz }; 95ed6e6a34SBen Goz #endif 96ed6e6a34SBen Goz 97507968ddSFelix Kuehling #ifndef PM4_MES_MAP_PROCESS_DEFINED_KV_SCRATCH 98507968ddSFelix Kuehling #define PM4_MES_MAP_PROCESS_DEFINED_KV_SCRATCH 99ed6e6a34SBen Goz 100507968ddSFelix Kuehling struct pm4_map_process_scratch_kv { 101ed6e6a34SBen Goz union { 102ed6e6a34SBen Goz union PM4_MES_TYPE_3_HEADER header; /* header */ 103ed6e6a34SBen Goz uint32_t ordinal1; 104ed6e6a34SBen Goz }; 105ed6e6a34SBen Goz 106ed6e6a34SBen Goz union { 107ed6e6a34SBen Goz struct { 108507968ddSFelix Kuehling uint32_t pasid:16; 109507968ddSFelix Kuehling uint32_t reserved1:8; 110507968ddSFelix Kuehling uint32_t diq_enable:1; 111507968ddSFelix Kuehling uint32_t process_quantum:7; 112ed6e6a34SBen Goz } bitfields2; 113ed6e6a34SBen Goz uint32_t ordinal2; 114ed6e6a34SBen Goz }; 115ed6e6a34SBen Goz 116ed6e6a34SBen Goz union { 117ed6e6a34SBen Goz struct { 118507968ddSFelix Kuehling uint32_t page_table_base:28; 119507968ddSFelix Kuehling uint32_t reserved2:4; 120ed6e6a34SBen Goz } bitfields3; 121ed6e6a34SBen Goz uint32_t ordinal3; 122ed6e6a34SBen Goz }; 123ed6e6a34SBen Goz 124507968ddSFelix Kuehling uint32_t reserved3; 125507968ddSFelix Kuehling uint32_t sh_mem_bases; 126507968ddSFelix Kuehling uint32_t sh_mem_config; 127507968ddSFelix Kuehling uint32_t sh_mem_ape1_base; 128507968ddSFelix Kuehling uint32_t sh_mem_ape1_limit; 129507968ddSFelix Kuehling uint32_t sh_hidden_private_base_vmid; 130507968ddSFelix Kuehling uint32_t reserved4; 131507968ddSFelix Kuehling uint32_t reserved5; 132507968ddSFelix Kuehling uint32_t gds_addr_lo; 133507968ddSFelix Kuehling uint32_t gds_addr_hi; 134ed6e6a34SBen Goz 135ed6e6a34SBen Goz union { 136ed6e6a34SBen Goz struct { 137507968ddSFelix Kuehling uint32_t num_gws:6; 138ed6e6a34SBen Goz uint32_t reserved6:2; 139507968ddSFelix Kuehling uint32_t num_oac:4; 140507968ddSFelix Kuehling uint32_t reserved7:4; 141507968ddSFelix Kuehling uint32_t gds_size:6; 142507968ddSFelix Kuehling uint32_t num_queues:10; 143507968ddSFelix Kuehling } bitfields14; 144507968ddSFelix Kuehling uint32_t ordinal14; 145ed6e6a34SBen Goz }; 146ed6e6a34SBen Goz 147507968ddSFelix Kuehling uint32_t completion_signal_lo32; 148507968ddSFelix Kuehling uint32_t completion_signal_hi32; 149ed6e6a34SBen Goz }; 150ed6e6a34SBen Goz #endif 151ed6e6a34SBen Goz 152ed6e6a34SBen Goz enum { 153ed6e6a34SBen Goz CACHE_FLUSH_AND_INV_TS_EVENT = 0x00000014 154ed6e6a34SBen Goz }; 155ed6e6a34SBen Goz 156ed6e6a34SBen Goz #endif /* KFD_PM4_HEADERS_H_ */ 157