1594d0c90SYong Zhao /* 2594d0c90SYong Zhao * Copyright 2016-2018 Advanced Micro Devices, Inc. 3594d0c90SYong Zhao * 4594d0c90SYong Zhao * Permission is hereby granted, free of charge, to any person obtaining a 5594d0c90SYong Zhao * copy of this software and associated documentation files (the "Software"), 6594d0c90SYong Zhao * to deal in the Software without restriction, including without limitation 7594d0c90SYong Zhao * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8594d0c90SYong Zhao * and/or sell copies of the Software, and to permit persons to whom the 9594d0c90SYong Zhao * Software is furnished to do so, subject to the following conditions: 10594d0c90SYong Zhao * 11594d0c90SYong Zhao * The above copyright notice and this permission notice shall be included in 12594d0c90SYong Zhao * all copies or substantial portions of the Software. 13594d0c90SYong Zhao * 14594d0c90SYong Zhao * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15594d0c90SYong Zhao * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16594d0c90SYong Zhao * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17594d0c90SYong Zhao * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18594d0c90SYong Zhao * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19594d0c90SYong Zhao * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20594d0c90SYong Zhao * OTHER DEALINGS IN THE SOFTWARE. 21594d0c90SYong Zhao * 22594d0c90SYong Zhao */ 23594d0c90SYong Zhao 24594d0c90SYong Zhao #include "kfd_kernel_queue.h" 25594d0c90SYong Zhao #include "kfd_device_queue_manager.h" 26594d0c90SYong Zhao #include "kfd_pm4_headers_ai.h" 27*fd6a440eSJonathan Kim #include "kfd_pm4_headers_aldebaran.h" 28594d0c90SYong Zhao #include "kfd_pm4_opcodes.h" 29594d0c90SYong Zhao #include "gc/gc_10_1_0_sh_mask.h" 30594d0c90SYong Zhao 31594d0c90SYong Zhao static int pm_map_process_v9(struct packet_manager *pm, 32594d0c90SYong Zhao uint32_t *buffer, struct qcm_process_device *qpd) 33594d0c90SYong Zhao { 34594d0c90SYong Zhao struct pm4_mes_map_process *packet; 35594d0c90SYong Zhao uint64_t vm_page_table_base_addr = qpd->page_table_base; 36594d0c90SYong Zhao 37594d0c90SYong Zhao packet = (struct pm4_mes_map_process *)buffer; 38594d0c90SYong Zhao memset(buffer, 0, sizeof(struct pm4_mes_map_process)); 39594d0c90SYong Zhao packet->header.u32All = pm_build_pm4_header(IT_MAP_PROCESS, 40594d0c90SYong Zhao sizeof(struct pm4_mes_map_process)); 41594d0c90SYong Zhao packet->bitfields2.diq_enable = (qpd->is_debug) ? 1 : 0; 425d7c6f18SJoseph Greathouse packet->bitfields2.process_quantum = 10; 43594d0c90SYong Zhao packet->bitfields2.pasid = qpd->pqm->process->pasid; 44594d0c90SYong Zhao packet->bitfields14.gds_size = qpd->gds_size & 0x3F; 45594d0c90SYong Zhao packet->bitfields14.gds_size_hi = (qpd->gds_size >> 6) & 0xF; 46b8020b03SJoseph Greathouse packet->bitfields14.num_gws = (qpd->mapped_gws_queue) ? qpd->num_gws : 0; 47594d0c90SYong Zhao packet->bitfields14.num_oac = qpd->num_oac; 48594d0c90SYong Zhao packet->bitfields14.sdma_enable = 1; 49594d0c90SYong Zhao packet->bitfields14.num_queues = (qpd->is_debug) ? 0 : qpd->queue_count; 50594d0c90SYong Zhao 51594d0c90SYong Zhao packet->sh_mem_config = qpd->sh_mem_config; 52594d0c90SYong Zhao packet->sh_mem_bases = qpd->sh_mem_bases; 53594d0c90SYong Zhao if (qpd->tba_addr) { 54594d0c90SYong Zhao packet->sq_shader_tba_lo = lower_32_bits(qpd->tba_addr >> 8); 55594d0c90SYong Zhao /* On GFX9, unlike GFX10, bit TRAP_EN of SQ_SHADER_TBA_HI is 56594d0c90SYong Zhao * not defined, so setting it won't do any harm. 57594d0c90SYong Zhao */ 58594d0c90SYong Zhao packet->sq_shader_tba_hi = upper_32_bits(qpd->tba_addr >> 8) 59594d0c90SYong Zhao | 1 << SQ_SHADER_TBA_HI__TRAP_EN__SHIFT; 60594d0c90SYong Zhao 61594d0c90SYong Zhao packet->sq_shader_tma_lo = lower_32_bits(qpd->tma_addr >> 8); 62594d0c90SYong Zhao packet->sq_shader_tma_hi = upper_32_bits(qpd->tma_addr >> 8); 63594d0c90SYong Zhao } 64594d0c90SYong Zhao 65594d0c90SYong Zhao packet->gds_addr_lo = lower_32_bits(qpd->gds_context_area); 66594d0c90SYong Zhao packet->gds_addr_hi = upper_32_bits(qpd->gds_context_area); 67594d0c90SYong Zhao 68594d0c90SYong Zhao packet->vm_context_page_table_base_addr_lo32 = 69594d0c90SYong Zhao lower_32_bits(vm_page_table_base_addr); 70594d0c90SYong Zhao packet->vm_context_page_table_base_addr_hi32 = 71594d0c90SYong Zhao upper_32_bits(vm_page_table_base_addr); 72594d0c90SYong Zhao 73594d0c90SYong Zhao return 0; 74594d0c90SYong Zhao } 75594d0c90SYong Zhao 76*fd6a440eSJonathan Kim static int pm_map_process_aldebaran(struct packet_manager *pm, 77*fd6a440eSJonathan Kim uint32_t *buffer, struct qcm_process_device *qpd) 78*fd6a440eSJonathan Kim { 79*fd6a440eSJonathan Kim struct pm4_mes_map_process_aldebaran *packet; 80*fd6a440eSJonathan Kim uint64_t vm_page_table_base_addr = qpd->page_table_base; 81*fd6a440eSJonathan Kim 82*fd6a440eSJonathan Kim packet = (struct pm4_mes_map_process_aldebaran *)buffer; 83*fd6a440eSJonathan Kim memset(buffer, 0, sizeof(struct pm4_mes_map_process_aldebaran)); 84*fd6a440eSJonathan Kim packet->header.u32All = pm_build_pm4_header(IT_MAP_PROCESS, 85*fd6a440eSJonathan Kim sizeof(struct pm4_mes_map_process_aldebaran)); 86*fd6a440eSJonathan Kim packet->bitfields2.diq_enable = (qpd->is_debug) ? 1 : 0; 87*fd6a440eSJonathan Kim packet->bitfields2.process_quantum = 10; 88*fd6a440eSJonathan Kim packet->bitfields2.pasid = qpd->pqm->process->pasid; 89*fd6a440eSJonathan Kim packet->bitfields14.gds_size = qpd->gds_size & 0x3F; 90*fd6a440eSJonathan Kim packet->bitfields14.gds_size_hi = (qpd->gds_size >> 6) & 0xF; 91*fd6a440eSJonathan Kim packet->bitfields14.num_gws = (qpd->mapped_gws_queue) ? qpd->num_gws : 0; 92*fd6a440eSJonathan Kim packet->bitfields14.num_oac = qpd->num_oac; 93*fd6a440eSJonathan Kim packet->bitfields14.sdma_enable = 1; 94*fd6a440eSJonathan Kim packet->bitfields14.num_queues = (qpd->is_debug) ? 0 : qpd->queue_count; 95*fd6a440eSJonathan Kim 96*fd6a440eSJonathan Kim packet->sh_mem_config = qpd->sh_mem_config; 97*fd6a440eSJonathan Kim packet->sh_mem_bases = qpd->sh_mem_bases; 98*fd6a440eSJonathan Kim if (qpd->tba_addr) { 99*fd6a440eSJonathan Kim packet->sq_shader_tba_lo = lower_32_bits(qpd->tba_addr >> 8); 100*fd6a440eSJonathan Kim packet->sq_shader_tma_lo = lower_32_bits(qpd->tma_addr >> 8); 101*fd6a440eSJonathan Kim packet->sq_shader_tma_hi = upper_32_bits(qpd->tma_addr >> 8); 102*fd6a440eSJonathan Kim } 103*fd6a440eSJonathan Kim 104*fd6a440eSJonathan Kim packet->gds_addr_lo = lower_32_bits(qpd->gds_context_area); 105*fd6a440eSJonathan Kim packet->gds_addr_hi = upper_32_bits(qpd->gds_context_area); 106*fd6a440eSJonathan Kim 107*fd6a440eSJonathan Kim packet->vm_context_page_table_base_addr_lo32 = 108*fd6a440eSJonathan Kim lower_32_bits(vm_page_table_base_addr); 109*fd6a440eSJonathan Kim packet->vm_context_page_table_base_addr_hi32 = 110*fd6a440eSJonathan Kim upper_32_bits(vm_page_table_base_addr); 111*fd6a440eSJonathan Kim 112*fd6a440eSJonathan Kim return 0; 113*fd6a440eSJonathan Kim } 114*fd6a440eSJonathan Kim 115594d0c90SYong Zhao static int pm_runlist_v9(struct packet_manager *pm, uint32_t *buffer, 116594d0c90SYong Zhao uint64_t ib, size_t ib_size_in_dwords, bool chain) 117594d0c90SYong Zhao { 118594d0c90SYong Zhao struct pm4_mes_runlist *packet; 119594d0c90SYong Zhao 120594d0c90SYong Zhao int concurrent_proc_cnt = 0; 121594d0c90SYong Zhao struct kfd_dev *kfd = pm->dqm->dev; 122594d0c90SYong Zhao 123594d0c90SYong Zhao /* Determine the number of processes to map together to HW: 124594d0c90SYong Zhao * it can not exceed the number of VMIDs available to the 125594d0c90SYong Zhao * scheduler, and it is determined by the smaller of the number 126594d0c90SYong Zhao * of processes in the runlist and kfd module parameter 127594d0c90SYong Zhao * hws_max_conc_proc. 128594d0c90SYong Zhao * Note: the arbitration between the number of VMIDs and 129594d0c90SYong Zhao * hws_max_conc_proc has been done in 130594d0c90SYong Zhao * kgd2kfd_device_init(). 131594d0c90SYong Zhao */ 132594d0c90SYong Zhao concurrent_proc_cnt = min(pm->dqm->processes_count, 133594d0c90SYong Zhao kfd->max_proc_per_quantum); 134594d0c90SYong Zhao 135594d0c90SYong Zhao packet = (struct pm4_mes_runlist *)buffer; 136594d0c90SYong Zhao 137594d0c90SYong Zhao memset(buffer, 0, sizeof(struct pm4_mes_runlist)); 138594d0c90SYong Zhao packet->header.u32All = pm_build_pm4_header(IT_RUN_LIST, 139594d0c90SYong Zhao sizeof(struct pm4_mes_runlist)); 140594d0c90SYong Zhao 141594d0c90SYong Zhao packet->bitfields4.ib_size = ib_size_in_dwords; 142594d0c90SYong Zhao packet->bitfields4.chain = chain ? 1 : 0; 143594d0c90SYong Zhao packet->bitfields4.offload_polling = 0; 144594d0c90SYong Zhao packet->bitfields4.chained_runlist_idle_disable = chain ? 1 : 0; 145594d0c90SYong Zhao packet->bitfields4.valid = 1; 146594d0c90SYong Zhao packet->bitfields4.process_cnt = concurrent_proc_cnt; 147594d0c90SYong Zhao packet->ordinal2 = lower_32_bits(ib); 148594d0c90SYong Zhao packet->ib_base_hi = upper_32_bits(ib); 149594d0c90SYong Zhao 150594d0c90SYong Zhao return 0; 151594d0c90SYong Zhao } 152594d0c90SYong Zhao 153594d0c90SYong Zhao static int pm_set_resources_v9(struct packet_manager *pm, uint32_t *buffer, 154594d0c90SYong Zhao struct scheduling_resources *res) 155594d0c90SYong Zhao { 156594d0c90SYong Zhao struct pm4_mes_set_resources *packet; 157594d0c90SYong Zhao 158594d0c90SYong Zhao packet = (struct pm4_mes_set_resources *)buffer; 159594d0c90SYong Zhao memset(buffer, 0, sizeof(struct pm4_mes_set_resources)); 160594d0c90SYong Zhao 161594d0c90SYong Zhao packet->header.u32All = pm_build_pm4_header(IT_SET_RESOURCES, 162594d0c90SYong Zhao sizeof(struct pm4_mes_set_resources)); 163594d0c90SYong Zhao 164594d0c90SYong Zhao packet->bitfields2.queue_type = 165594d0c90SYong Zhao queue_type__mes_set_resources__hsa_interface_queue_hiq; 166594d0c90SYong Zhao packet->bitfields2.vmid_mask = res->vmid_mask; 167594d0c90SYong Zhao packet->bitfields2.unmap_latency = KFD_UNMAP_LATENCY_MS / 100; 168594d0c90SYong Zhao packet->bitfields7.oac_mask = res->oac_mask; 169594d0c90SYong Zhao packet->bitfields8.gds_heap_base = res->gds_heap_base; 170594d0c90SYong Zhao packet->bitfields8.gds_heap_size = res->gds_heap_size; 171594d0c90SYong Zhao 172594d0c90SYong Zhao packet->gws_mask_lo = lower_32_bits(res->gws_mask); 173594d0c90SYong Zhao packet->gws_mask_hi = upper_32_bits(res->gws_mask); 174594d0c90SYong Zhao 175594d0c90SYong Zhao packet->queue_mask_lo = lower_32_bits(res->queue_mask); 176594d0c90SYong Zhao packet->queue_mask_hi = upper_32_bits(res->queue_mask); 177594d0c90SYong Zhao 178594d0c90SYong Zhao return 0; 179594d0c90SYong Zhao } 180594d0c90SYong Zhao 181594d0c90SYong Zhao static int pm_map_queues_v9(struct packet_manager *pm, uint32_t *buffer, 182594d0c90SYong Zhao struct queue *q, bool is_static) 183594d0c90SYong Zhao { 184594d0c90SYong Zhao struct pm4_mes_map_queues *packet; 185594d0c90SYong Zhao bool use_static = is_static; 186594d0c90SYong Zhao 187594d0c90SYong Zhao packet = (struct pm4_mes_map_queues *)buffer; 188594d0c90SYong Zhao memset(buffer, 0, sizeof(struct pm4_mes_map_queues)); 189594d0c90SYong Zhao 190594d0c90SYong Zhao packet->header.u32All = pm_build_pm4_header(IT_MAP_QUEUES, 191594d0c90SYong Zhao sizeof(struct pm4_mes_map_queues)); 192594d0c90SYong Zhao packet->bitfields2.num_queues = 1; 193594d0c90SYong Zhao packet->bitfields2.queue_sel = 194594d0c90SYong Zhao queue_sel__mes_map_queues__map_to_hws_determined_queue_slots_vi; 195594d0c90SYong Zhao 196594d0c90SYong Zhao packet->bitfields2.engine_sel = 197594d0c90SYong Zhao engine_sel__mes_map_queues__compute_vi; 198594d0c90SYong Zhao packet->bitfields2.gws_control_queue = q->gws ? 1 : 0; 199594d0c90SYong Zhao packet->bitfields2.extended_engine_sel = 200594d0c90SYong Zhao extended_engine_sel__mes_map_queues__legacy_engine_sel; 201594d0c90SYong Zhao packet->bitfields2.queue_type = 202594d0c90SYong Zhao queue_type__mes_map_queues__normal_compute_vi; 203594d0c90SYong Zhao 204594d0c90SYong Zhao switch (q->properties.type) { 205594d0c90SYong Zhao case KFD_QUEUE_TYPE_COMPUTE: 206594d0c90SYong Zhao if (use_static) 207594d0c90SYong Zhao packet->bitfields2.queue_type = 208594d0c90SYong Zhao queue_type__mes_map_queues__normal_latency_static_queue_vi; 209594d0c90SYong Zhao break; 210594d0c90SYong Zhao case KFD_QUEUE_TYPE_DIQ: 211594d0c90SYong Zhao packet->bitfields2.queue_type = 212594d0c90SYong Zhao queue_type__mes_map_queues__debug_interface_queue_vi; 213594d0c90SYong Zhao break; 214594d0c90SYong Zhao case KFD_QUEUE_TYPE_SDMA: 215594d0c90SYong Zhao case KFD_QUEUE_TYPE_SDMA_XGMI: 216594d0c90SYong Zhao use_static = false; /* no static queues under SDMA */ 217594d0c90SYong Zhao if (q->properties.sdma_engine_id < 2) 218594d0c90SYong Zhao packet->bitfields2.engine_sel = q->properties.sdma_engine_id + 219594d0c90SYong Zhao engine_sel__mes_map_queues__sdma0_vi; 220594d0c90SYong Zhao else { 221594d0c90SYong Zhao packet->bitfields2.extended_engine_sel = 222594d0c90SYong Zhao extended_engine_sel__mes_map_queues__sdma0_to_7_sel; 223594d0c90SYong Zhao packet->bitfields2.engine_sel = q->properties.sdma_engine_id; 224594d0c90SYong Zhao } 225594d0c90SYong Zhao break; 226594d0c90SYong Zhao default: 227594d0c90SYong Zhao WARN(1, "queue type %d", q->properties.type); 228594d0c90SYong Zhao return -EINVAL; 229594d0c90SYong Zhao } 230594d0c90SYong Zhao packet->bitfields3.doorbell_offset = 231594d0c90SYong Zhao q->properties.doorbell_off; 232594d0c90SYong Zhao 233594d0c90SYong Zhao packet->mqd_addr_lo = 234594d0c90SYong Zhao lower_32_bits(q->gart_mqd_addr); 235594d0c90SYong Zhao 236594d0c90SYong Zhao packet->mqd_addr_hi = 237594d0c90SYong Zhao upper_32_bits(q->gart_mqd_addr); 238594d0c90SYong Zhao 239594d0c90SYong Zhao packet->wptr_addr_lo = 240594d0c90SYong Zhao lower_32_bits((uint64_t)q->properties.write_ptr); 241594d0c90SYong Zhao 242594d0c90SYong Zhao packet->wptr_addr_hi = 243594d0c90SYong Zhao upper_32_bits((uint64_t)q->properties.write_ptr); 244594d0c90SYong Zhao 245594d0c90SYong Zhao return 0; 246594d0c90SYong Zhao } 247594d0c90SYong Zhao 248594d0c90SYong Zhao static int pm_unmap_queues_v9(struct packet_manager *pm, uint32_t *buffer, 249594d0c90SYong Zhao enum kfd_queue_type type, 250594d0c90SYong Zhao enum kfd_unmap_queues_filter filter, 251594d0c90SYong Zhao uint32_t filter_param, bool reset, 252594d0c90SYong Zhao unsigned int sdma_engine) 253594d0c90SYong Zhao { 254594d0c90SYong Zhao struct pm4_mes_unmap_queues *packet; 255594d0c90SYong Zhao 256594d0c90SYong Zhao packet = (struct pm4_mes_unmap_queues *)buffer; 257594d0c90SYong Zhao memset(buffer, 0, sizeof(struct pm4_mes_unmap_queues)); 258594d0c90SYong Zhao 259594d0c90SYong Zhao packet->header.u32All = pm_build_pm4_header(IT_UNMAP_QUEUES, 260594d0c90SYong Zhao sizeof(struct pm4_mes_unmap_queues)); 261594d0c90SYong Zhao switch (type) { 262594d0c90SYong Zhao case KFD_QUEUE_TYPE_COMPUTE: 263594d0c90SYong Zhao case KFD_QUEUE_TYPE_DIQ: 264594d0c90SYong Zhao packet->bitfields2.extended_engine_sel = 265594d0c90SYong Zhao extended_engine_sel__mes_unmap_queues__legacy_engine_sel; 266594d0c90SYong Zhao packet->bitfields2.engine_sel = 267594d0c90SYong Zhao engine_sel__mes_unmap_queues__compute; 268594d0c90SYong Zhao break; 269594d0c90SYong Zhao case KFD_QUEUE_TYPE_SDMA: 270594d0c90SYong Zhao case KFD_QUEUE_TYPE_SDMA_XGMI: 271594d0c90SYong Zhao if (sdma_engine < 2) { 272594d0c90SYong Zhao packet->bitfields2.extended_engine_sel = 273594d0c90SYong Zhao extended_engine_sel__mes_unmap_queues__legacy_engine_sel; 274594d0c90SYong Zhao packet->bitfields2.engine_sel = 275594d0c90SYong Zhao engine_sel__mes_unmap_queues__sdma0 + sdma_engine; 276594d0c90SYong Zhao } else { 277594d0c90SYong Zhao packet->bitfields2.extended_engine_sel = 278594d0c90SYong Zhao extended_engine_sel__mes_unmap_queues__sdma0_to_7_sel; 279594d0c90SYong Zhao packet->bitfields2.engine_sel = sdma_engine; 280594d0c90SYong Zhao } 281594d0c90SYong Zhao break; 282594d0c90SYong Zhao default: 283594d0c90SYong Zhao WARN(1, "queue type %d", type); 284594d0c90SYong Zhao return -EINVAL; 285594d0c90SYong Zhao } 286594d0c90SYong Zhao 287594d0c90SYong Zhao if (reset) 288594d0c90SYong Zhao packet->bitfields2.action = 289594d0c90SYong Zhao action__mes_unmap_queues__reset_queues; 290594d0c90SYong Zhao else 291594d0c90SYong Zhao packet->bitfields2.action = 292594d0c90SYong Zhao action__mes_unmap_queues__preempt_queues; 293594d0c90SYong Zhao 294594d0c90SYong Zhao switch (filter) { 295594d0c90SYong Zhao case KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE: 296594d0c90SYong Zhao packet->bitfields2.queue_sel = 297594d0c90SYong Zhao queue_sel__mes_unmap_queues__perform_request_on_specified_queues; 298594d0c90SYong Zhao packet->bitfields2.num_queues = 1; 299594d0c90SYong Zhao packet->bitfields3b.doorbell_offset0 = filter_param; 300594d0c90SYong Zhao break; 301594d0c90SYong Zhao case KFD_UNMAP_QUEUES_FILTER_BY_PASID: 302594d0c90SYong Zhao packet->bitfields2.queue_sel = 303594d0c90SYong Zhao queue_sel__mes_unmap_queues__perform_request_on_pasid_queues; 304594d0c90SYong Zhao packet->bitfields3a.pasid = filter_param; 305594d0c90SYong Zhao break; 306594d0c90SYong Zhao case KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES: 307594d0c90SYong Zhao packet->bitfields2.queue_sel = 308594d0c90SYong Zhao queue_sel__mes_unmap_queues__unmap_all_queues; 309594d0c90SYong Zhao break; 310594d0c90SYong Zhao case KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES: 311594d0c90SYong Zhao /* in this case, we do not preempt static queues */ 312594d0c90SYong Zhao packet->bitfields2.queue_sel = 313594d0c90SYong Zhao queue_sel__mes_unmap_queues__unmap_all_non_static_queues; 314594d0c90SYong Zhao break; 315594d0c90SYong Zhao default: 316594d0c90SYong Zhao WARN(1, "filter %d", filter); 317594d0c90SYong Zhao return -EINVAL; 318594d0c90SYong Zhao } 319594d0c90SYong Zhao 320594d0c90SYong Zhao return 0; 321594d0c90SYong Zhao 322594d0c90SYong Zhao } 323594d0c90SYong Zhao 324594d0c90SYong Zhao static int pm_query_status_v9(struct packet_manager *pm, uint32_t *buffer, 325b010affeSQu Huang uint64_t fence_address, uint64_t fence_value) 326594d0c90SYong Zhao { 327594d0c90SYong Zhao struct pm4_mes_query_status *packet; 328594d0c90SYong Zhao 329594d0c90SYong Zhao packet = (struct pm4_mes_query_status *)buffer; 330594d0c90SYong Zhao memset(buffer, 0, sizeof(struct pm4_mes_query_status)); 331594d0c90SYong Zhao 332594d0c90SYong Zhao 333594d0c90SYong Zhao packet->header.u32All = pm_build_pm4_header(IT_QUERY_STATUS, 334594d0c90SYong Zhao sizeof(struct pm4_mes_query_status)); 335594d0c90SYong Zhao 336594d0c90SYong Zhao packet->bitfields2.context_id = 0; 337594d0c90SYong Zhao packet->bitfields2.interrupt_sel = 338594d0c90SYong Zhao interrupt_sel__mes_query_status__completion_status; 339594d0c90SYong Zhao packet->bitfields2.command = 340594d0c90SYong Zhao command__mes_query_status__fence_only_after_write_ack; 341594d0c90SYong Zhao 342594d0c90SYong Zhao packet->addr_hi = upper_32_bits((uint64_t)fence_address); 343594d0c90SYong Zhao packet->addr_lo = lower_32_bits((uint64_t)fence_address); 344594d0c90SYong Zhao packet->data_hi = upper_32_bits((uint64_t)fence_value); 345594d0c90SYong Zhao packet->data_lo = lower_32_bits((uint64_t)fence_value); 346594d0c90SYong Zhao 347594d0c90SYong Zhao return 0; 348594d0c90SYong Zhao } 349594d0c90SYong Zhao 350594d0c90SYong Zhao const struct packet_manager_funcs kfd_v9_pm_funcs = { 351594d0c90SYong Zhao .map_process = pm_map_process_v9, 352594d0c90SYong Zhao .runlist = pm_runlist_v9, 353594d0c90SYong Zhao .set_resources = pm_set_resources_v9, 354594d0c90SYong Zhao .map_queues = pm_map_queues_v9, 355594d0c90SYong Zhao .unmap_queues = pm_unmap_queues_v9, 356594d0c90SYong Zhao .query_status = pm_query_status_v9, 357594d0c90SYong Zhao .release_mem = NULL, 358594d0c90SYong Zhao .map_process_size = sizeof(struct pm4_mes_map_process), 359594d0c90SYong Zhao .runlist_size = sizeof(struct pm4_mes_runlist), 360594d0c90SYong Zhao .set_resources_size = sizeof(struct pm4_mes_set_resources), 361594d0c90SYong Zhao .map_queues_size = sizeof(struct pm4_mes_map_queues), 362594d0c90SYong Zhao .unmap_queues_size = sizeof(struct pm4_mes_unmap_queues), 363594d0c90SYong Zhao .query_status_size = sizeof(struct pm4_mes_query_status), 364594d0c90SYong Zhao .release_mem_size = 0, 365594d0c90SYong Zhao }; 366*fd6a440eSJonathan Kim 367*fd6a440eSJonathan Kim const struct packet_manager_funcs kfd_aldebaran_pm_funcs = { 368*fd6a440eSJonathan Kim .map_process = pm_map_process_aldebaran, 369*fd6a440eSJonathan Kim .runlist = pm_runlist_v9, 370*fd6a440eSJonathan Kim .set_resources = pm_set_resources_v9, 371*fd6a440eSJonathan Kim .map_queues = pm_map_queues_v9, 372*fd6a440eSJonathan Kim .unmap_queues = pm_unmap_queues_v9, 373*fd6a440eSJonathan Kim .query_status = pm_query_status_v9, 374*fd6a440eSJonathan Kim .release_mem = NULL, 375*fd6a440eSJonathan Kim .map_process_size = sizeof(struct pm4_mes_map_process_aldebaran), 376*fd6a440eSJonathan Kim .runlist_size = sizeof(struct pm4_mes_runlist), 377*fd6a440eSJonathan Kim .set_resources_size = sizeof(struct pm4_mes_set_resources), 378*fd6a440eSJonathan Kim .map_queues_size = sizeof(struct pm4_mes_map_queues), 379*fd6a440eSJonathan Kim .unmap_queues_size = sizeof(struct pm4_mes_unmap_queues), 380*fd6a440eSJonathan Kim .query_status_size = sizeof(struct pm4_mes_query_status), 381*fd6a440eSJonathan Kim .release_mem_size = 0, 382*fd6a440eSJonathan Kim }; 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