1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #include <linux/printk.h> 25 #include <linux/slab.h> 26 #include <linux/mm_types.h> 27 28 #include "kfd_priv.h" 29 #include "kfd_mqd_manager.h" 30 #include "vi_structs.h" 31 #include "gca/gfx_8_0_sh_mask.h" 32 #include "gca/gfx_8_0_enum.h" 33 34 #define CP_MQD_CONTROL__PRIV_STATE__SHIFT 0x8 35 36 static inline struct vi_mqd *get_mqd(void *mqd) 37 { 38 return (struct vi_mqd *)mqd; 39 } 40 41 static int init_mqd(struct mqd_manager *mm, void **mqd, 42 struct kfd_mem_obj **mqd_mem_obj, uint64_t *gart_addr, 43 struct queue_properties *q) 44 { 45 int retval; 46 uint64_t addr; 47 struct vi_mqd *m; 48 49 retval = kfd_gtt_sa_allocate(mm->dev, sizeof(struct vi_mqd), 50 mqd_mem_obj); 51 if (retval != 0) 52 return -ENOMEM; 53 54 m = (struct vi_mqd *) (*mqd_mem_obj)->cpu_ptr; 55 addr = (*mqd_mem_obj)->gpu_addr; 56 57 memset(m, 0, sizeof(struct vi_mqd)); 58 59 m->header = 0xC0310800; 60 m->compute_pipelinestat_enable = 1; 61 m->compute_static_thread_mgmt_se0 = 0xFFFFFFFF; 62 m->compute_static_thread_mgmt_se1 = 0xFFFFFFFF; 63 m->compute_static_thread_mgmt_se2 = 0xFFFFFFFF; 64 m->compute_static_thread_mgmt_se3 = 0xFFFFFFFF; 65 66 m->cp_hqd_persistent_state = CP_HQD_PERSISTENT_STATE__PRELOAD_REQ_MASK | 67 0x53 << CP_HQD_PERSISTENT_STATE__PRELOAD_SIZE__SHIFT; 68 69 m->cp_mqd_control = 1 << CP_MQD_CONTROL__PRIV_STATE__SHIFT | 70 MTYPE_UC << CP_MQD_CONTROL__MTYPE__SHIFT; 71 72 m->cp_mqd_base_addr_lo = lower_32_bits(addr); 73 m->cp_mqd_base_addr_hi = upper_32_bits(addr); 74 75 m->cp_hqd_quantum = 1 << CP_HQD_QUANTUM__QUANTUM_EN__SHIFT | 76 1 << CP_HQD_QUANTUM__QUANTUM_SCALE__SHIFT | 77 10 << CP_HQD_QUANTUM__QUANTUM_DURATION__SHIFT; 78 79 m->cp_hqd_pipe_priority = 1; 80 m->cp_hqd_queue_priority = 15; 81 82 m->cp_hqd_eop_rptr = 1 << CP_HQD_EOP_RPTR__INIT_FETCHER__SHIFT; 83 84 if (q->format == KFD_QUEUE_FORMAT_AQL) 85 m->cp_hqd_iq_rptr = 1; 86 87 *mqd = m; 88 if (gart_addr) 89 *gart_addr = addr; 90 retval = mm->update_mqd(mm, m, q); 91 92 return retval; 93 } 94 95 static int load_mqd(struct mqd_manager *mm, void *mqd, 96 uint32_t pipe_id, uint32_t queue_id, 97 struct queue_properties *p, struct mm_struct *mms) 98 { 99 /* AQL write pointer counts in 64B packets, PM4/CP counts in dwords. */ 100 uint32_t wptr_shift = (p->format == KFD_QUEUE_FORMAT_AQL ? 4 : 0); 101 uint32_t wptr_mask = (uint32_t)((p->queue_size / sizeof(uint32_t)) - 1); 102 103 return mm->dev->kfd2kgd->hqd_load(mm->dev->kgd, mqd, pipe_id, queue_id, 104 (uint32_t __user *)p->write_ptr, 105 wptr_shift, wptr_mask, mms); 106 } 107 108 static int __update_mqd(struct mqd_manager *mm, void *mqd, 109 struct queue_properties *q, unsigned int mtype, 110 unsigned int atc_bit) 111 { 112 struct vi_mqd *m; 113 114 m = get_mqd(mqd); 115 116 m->cp_hqd_pq_control = 5 << CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE__SHIFT | 117 atc_bit << CP_HQD_PQ_CONTROL__PQ_ATC__SHIFT | 118 mtype << CP_HQD_PQ_CONTROL__MTYPE__SHIFT; 119 m->cp_hqd_pq_control |= 120 ffs(q->queue_size / sizeof(unsigned int)) - 1 - 1; 121 pr_debug("cp_hqd_pq_control 0x%x\n", m->cp_hqd_pq_control); 122 123 m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8); 124 m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); 125 126 m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr); 127 m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr); 128 129 m->cp_hqd_pq_doorbell_control = 130 q->doorbell_off << 131 CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_OFFSET__SHIFT; 132 pr_debug("cp_hqd_pq_doorbell_control 0x%x\n", 133 m->cp_hqd_pq_doorbell_control); 134 135 m->cp_hqd_eop_control = atc_bit << CP_HQD_EOP_CONTROL__EOP_ATC__SHIFT | 136 mtype << CP_HQD_EOP_CONTROL__MTYPE__SHIFT; 137 138 m->cp_hqd_ib_control = atc_bit << CP_HQD_IB_CONTROL__IB_ATC__SHIFT | 139 3 << CP_HQD_IB_CONTROL__MIN_IB_AVAIL_SIZE__SHIFT | 140 mtype << CP_HQD_IB_CONTROL__MTYPE__SHIFT; 141 142 /* 143 * HW does not clamp this field correctly. Maximum EOP queue size 144 * is constrained by per-SE EOP done signal count, which is 8-bit. 145 * Limit is 0xFF EOP entries (= 0x7F8 dwords). CP will not submit 146 * more than (EOP entry count - 1) so a queue size of 0x800 dwords 147 * is safe, giving a maximum field value of 0xA. 148 */ 149 m->cp_hqd_eop_control |= min(0xA, 150 ffs(q->eop_ring_buffer_size / sizeof(unsigned int)) - 1 - 1); 151 m->cp_hqd_eop_base_addr_lo = 152 lower_32_bits(q->eop_ring_buffer_address >> 8); 153 m->cp_hqd_eop_base_addr_hi = 154 upper_32_bits(q->eop_ring_buffer_address >> 8); 155 156 m->cp_hqd_iq_timer = atc_bit << CP_HQD_IQ_TIMER__IQ_ATC__SHIFT | 157 mtype << CP_HQD_IQ_TIMER__MTYPE__SHIFT; 158 159 m->cp_hqd_vmid = q->vmid; 160 161 if (q->format == KFD_QUEUE_FORMAT_AQL) { 162 m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK | 163 2 << CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT; 164 } 165 166 q->is_active = (q->queue_size > 0 && 167 q->queue_address != 0 && 168 q->queue_percent > 0); 169 170 return 0; 171 } 172 173 174 static int update_mqd(struct mqd_manager *mm, void *mqd, 175 struct queue_properties *q) 176 { 177 return __update_mqd(mm, mqd, q, MTYPE_CC, 1); 178 } 179 180 static int destroy_mqd(struct mqd_manager *mm, void *mqd, 181 enum kfd_preempt_type type, 182 unsigned int timeout, uint32_t pipe_id, 183 uint32_t queue_id) 184 { 185 return mm->dev->kfd2kgd->hqd_destroy 186 (mm->dev->kgd, mqd, type, timeout, 187 pipe_id, queue_id); 188 } 189 190 static void uninit_mqd(struct mqd_manager *mm, void *mqd, 191 struct kfd_mem_obj *mqd_mem_obj) 192 { 193 kfd_gtt_sa_free(mm->dev, mqd_mem_obj); 194 } 195 196 static bool is_occupied(struct mqd_manager *mm, void *mqd, 197 uint64_t queue_address, uint32_t pipe_id, 198 uint32_t queue_id) 199 { 200 return mm->dev->kfd2kgd->hqd_is_occupied( 201 mm->dev->kgd, queue_address, 202 pipe_id, queue_id); 203 } 204 205 static int init_mqd_hiq(struct mqd_manager *mm, void **mqd, 206 struct kfd_mem_obj **mqd_mem_obj, uint64_t *gart_addr, 207 struct queue_properties *q) 208 { 209 struct vi_mqd *m; 210 int retval = init_mqd(mm, mqd, mqd_mem_obj, gart_addr, q); 211 212 if (retval != 0) 213 return retval; 214 215 m = get_mqd(*mqd); 216 217 m->cp_hqd_pq_control |= 1 << CP_HQD_PQ_CONTROL__PRIV_STATE__SHIFT | 218 1 << CP_HQD_PQ_CONTROL__KMD_QUEUE__SHIFT; 219 220 return retval; 221 } 222 223 static int update_mqd_hiq(struct mqd_manager *mm, void *mqd, 224 struct queue_properties *q) 225 { 226 struct vi_mqd *m; 227 int retval = __update_mqd(mm, mqd, q, MTYPE_UC, 0); 228 229 if (retval != 0) 230 return retval; 231 232 m = get_mqd(mqd); 233 m->cp_hqd_vmid = q->vmid; 234 return retval; 235 } 236 237 struct mqd_manager *mqd_manager_init_vi(enum KFD_MQD_TYPE type, 238 struct kfd_dev *dev) 239 { 240 struct mqd_manager *mqd; 241 242 if (WARN_ON(type >= KFD_MQD_TYPE_MAX)) 243 return NULL; 244 245 mqd = kzalloc(sizeof(*mqd), GFP_KERNEL); 246 if (!mqd) 247 return NULL; 248 249 mqd->dev = dev; 250 251 switch (type) { 252 case KFD_MQD_TYPE_CP: 253 case KFD_MQD_TYPE_COMPUTE: 254 mqd->init_mqd = init_mqd; 255 mqd->uninit_mqd = uninit_mqd; 256 mqd->load_mqd = load_mqd; 257 mqd->update_mqd = update_mqd; 258 mqd->destroy_mqd = destroy_mqd; 259 mqd->is_occupied = is_occupied; 260 break; 261 case KFD_MQD_TYPE_HIQ: 262 mqd->init_mqd = init_mqd_hiq; 263 mqd->uninit_mqd = uninit_mqd; 264 mqd->load_mqd = load_mqd; 265 mqd->update_mqd = update_mqd_hiq; 266 mqd->destroy_mqd = destroy_mqd; 267 mqd->is_occupied = is_occupied; 268 break; 269 case KFD_MQD_TYPE_SDMA: 270 break; 271 default: 272 kfree(mqd); 273 return NULL; 274 } 275 276 return mqd; 277 } 278