1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #include <linux/printk.h> 25 #include <linux/slab.h> 26 #include <linux/mm_types.h> 27 28 #include "kfd_priv.h" 29 #include "kfd_mqd_manager.h" 30 #include "cik_regs.h" 31 #include "cik_structs.h" 32 #include "oss/oss_2_4_sh_mask.h" 33 34 static inline struct cik_mqd *get_mqd(void *mqd) 35 { 36 return (struct cik_mqd *)mqd; 37 } 38 39 static inline struct cik_sdma_rlc_registers *get_sdma_mqd(void *mqd) 40 { 41 return (struct cik_sdma_rlc_registers *)mqd; 42 } 43 44 static void update_cu_mask(struct mqd_manager *mm, void *mqd, 45 struct mqd_update_info *minfo) 46 { 47 struct cik_mqd *m; 48 uint32_t se_mask[4] = {0}; /* 4 is the max # of SEs */ 49 50 if (!minfo || (minfo->update_flag != UPDATE_FLAG_CU_MASK) || 51 !minfo->cu_mask.ptr) 52 return; 53 54 mqd_symmetrically_map_cu_mask(mm, 55 minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask); 56 57 m = get_mqd(mqd); 58 m->compute_static_thread_mgmt_se0 = se_mask[0]; 59 m->compute_static_thread_mgmt_se1 = se_mask[1]; 60 m->compute_static_thread_mgmt_se2 = se_mask[2]; 61 m->compute_static_thread_mgmt_se3 = se_mask[3]; 62 63 pr_debug("Update cu mask to %#x %#x %#x %#x\n", 64 m->compute_static_thread_mgmt_se0, 65 m->compute_static_thread_mgmt_se1, 66 m->compute_static_thread_mgmt_se2, 67 m->compute_static_thread_mgmt_se3); 68 } 69 70 static void set_priority(struct cik_mqd *m, struct queue_properties *q) 71 { 72 m->cp_hqd_pipe_priority = pipe_priority_map[q->priority]; 73 m->cp_hqd_queue_priority = q->priority; 74 } 75 76 static struct kfd_mem_obj *allocate_mqd(struct kfd_dev *kfd, 77 struct queue_properties *q) 78 { 79 struct kfd_mem_obj *mqd_mem_obj; 80 81 if (kfd_gtt_sa_allocate(kfd, sizeof(struct cik_mqd), 82 &mqd_mem_obj)) 83 return NULL; 84 85 return mqd_mem_obj; 86 } 87 88 static void init_mqd(struct mqd_manager *mm, void **mqd, 89 struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr, 90 struct queue_properties *q) 91 { 92 uint64_t addr; 93 struct cik_mqd *m; 94 95 m = (struct cik_mqd *) mqd_mem_obj->cpu_ptr; 96 addr = mqd_mem_obj->gpu_addr; 97 98 memset(m, 0, ALIGN(sizeof(struct cik_mqd), 256)); 99 100 m->header = 0xC0310800; 101 m->compute_pipelinestat_enable = 1; 102 m->compute_static_thread_mgmt_se0 = 0xFFFFFFFF; 103 m->compute_static_thread_mgmt_se1 = 0xFFFFFFFF; 104 m->compute_static_thread_mgmt_se2 = 0xFFFFFFFF; 105 m->compute_static_thread_mgmt_se3 = 0xFFFFFFFF; 106 107 /* 108 * Make sure to use the last queue state saved on mqd when the cp 109 * reassigns the queue, so when queue is switched on/off (e.g over 110 * subscription or quantum timeout) the context will be consistent 111 */ 112 m->cp_hqd_persistent_state = 113 DEFAULT_CP_HQD_PERSISTENT_STATE | PRELOAD_REQ; 114 115 m->cp_mqd_control = MQD_CONTROL_PRIV_STATE_EN; 116 m->cp_mqd_base_addr_lo = lower_32_bits(addr); 117 m->cp_mqd_base_addr_hi = upper_32_bits(addr); 118 119 m->cp_hqd_quantum = QUANTUM_EN | QUANTUM_SCALE_1MS | 120 QUANTUM_DURATION(10); 121 122 /* 123 * Pipe Priority 124 * Identifies the pipe relative priority when this queue is connected 125 * to the pipeline. The pipe priority is against the GFX pipe and HP3D. 126 * In KFD we are using a fixed pipe priority set to CS_MEDIUM. 127 * 0 = CS_LOW (typically below GFX) 128 * 1 = CS_MEDIUM (typically between HP3D and GFX 129 * 2 = CS_HIGH (typically above HP3D) 130 */ 131 set_priority(m, q); 132 133 if (q->format == KFD_QUEUE_FORMAT_AQL) 134 m->cp_hqd_iq_rptr = AQL_ENABLE; 135 136 *mqd = m; 137 if (gart_addr) 138 *gart_addr = addr; 139 mm->update_mqd(mm, m, q, NULL); 140 } 141 142 static void init_mqd_sdma(struct mqd_manager *mm, void **mqd, 143 struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr, 144 struct queue_properties *q) 145 { 146 struct cik_sdma_rlc_registers *m; 147 148 m = (struct cik_sdma_rlc_registers *) mqd_mem_obj->cpu_ptr; 149 150 memset(m, 0, sizeof(struct cik_sdma_rlc_registers)); 151 152 *mqd = m; 153 if (gart_addr) 154 *gart_addr = mqd_mem_obj->gpu_addr; 155 156 mm->update_mqd(mm, m, q, NULL); 157 } 158 159 static void free_mqd(struct mqd_manager *mm, void *mqd, 160 struct kfd_mem_obj *mqd_mem_obj) 161 { 162 kfd_gtt_sa_free(mm->dev, mqd_mem_obj); 163 } 164 165 166 static int load_mqd(struct mqd_manager *mm, void *mqd, uint32_t pipe_id, 167 uint32_t queue_id, struct queue_properties *p, 168 struct mm_struct *mms) 169 { 170 /* AQL write pointer counts in 64B packets, PM4/CP counts in dwords. */ 171 uint32_t wptr_shift = (p->format == KFD_QUEUE_FORMAT_AQL ? 4 : 0); 172 uint32_t wptr_mask = (uint32_t)((p->queue_size / 4) - 1); 173 174 return mm->dev->kfd2kgd->hqd_load(mm->dev->kgd, mqd, pipe_id, queue_id, 175 (uint32_t __user *)p->write_ptr, 176 wptr_shift, wptr_mask, mms); 177 } 178 179 static int load_mqd_sdma(struct mqd_manager *mm, void *mqd, 180 uint32_t pipe_id, uint32_t queue_id, 181 struct queue_properties *p, struct mm_struct *mms) 182 { 183 return mm->dev->kfd2kgd->hqd_sdma_load(mm->dev->kgd, mqd, 184 (uint32_t __user *)p->write_ptr, 185 mms); 186 } 187 188 static void __update_mqd(struct mqd_manager *mm, void *mqd, 189 struct queue_properties *q, struct mqd_update_info *minfo, 190 unsigned int atc_bit) 191 { 192 struct cik_mqd *m; 193 194 m = get_mqd(mqd); 195 m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE | 196 DEFAULT_MIN_AVAIL_SIZE; 197 m->cp_hqd_ib_control = DEFAULT_MIN_IB_AVAIL_SIZE; 198 if (atc_bit) { 199 m->cp_hqd_pq_control |= PQ_ATC_EN; 200 m->cp_hqd_ib_control |= IB_ATC_EN; 201 } 202 203 /* 204 * Calculating queue size which is log base 2 of actual queue size -1 205 * dwords and another -1 for ffs 206 */ 207 m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1; 208 m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8); 209 m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); 210 m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr); 211 m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr); 212 m->cp_hqd_pq_doorbell_control = DOORBELL_OFFSET(q->doorbell_off); 213 214 m->cp_hqd_vmid = q->vmid; 215 216 if (q->format == KFD_QUEUE_FORMAT_AQL) 217 m->cp_hqd_pq_control |= NO_UPDATE_RPTR; 218 219 update_cu_mask(mm, mqd, minfo); 220 set_priority(m, q); 221 222 q->is_active = QUEUE_IS_ACTIVE(*q); 223 } 224 225 static void update_mqd(struct mqd_manager *mm, void *mqd, 226 struct queue_properties *q, 227 struct mqd_update_info *minfo) 228 { 229 __update_mqd(mm, mqd, q, minfo, 1); 230 } 231 232 static uint32_t read_doorbell_id(void *mqd) 233 { 234 struct cik_mqd *m = (struct cik_mqd *)mqd; 235 236 return m->queue_doorbell_id0; 237 } 238 239 static void update_mqd_hawaii(struct mqd_manager *mm, void *mqd, 240 struct queue_properties *q, 241 struct mqd_update_info *minfo) 242 { 243 __update_mqd(mm, mqd, q, minfo, 0); 244 } 245 246 static void update_mqd_sdma(struct mqd_manager *mm, void *mqd, 247 struct queue_properties *q, 248 struct mqd_update_info *minfo) 249 { 250 struct cik_sdma_rlc_registers *m; 251 252 m = get_sdma_mqd(mqd); 253 m->sdma_rlc_rb_cntl = order_base_2(q->queue_size / 4) 254 << SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT | 255 q->vmid << SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT | 256 1 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE__SHIFT | 257 6 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT; 258 259 m->sdma_rlc_rb_base = lower_32_bits(q->queue_address >> 8); 260 m->sdma_rlc_rb_base_hi = upper_32_bits(q->queue_address >> 8); 261 m->sdma_rlc_rb_rptr_addr_lo = lower_32_bits((uint64_t)q->read_ptr); 262 m->sdma_rlc_rb_rptr_addr_hi = upper_32_bits((uint64_t)q->read_ptr); 263 m->sdma_rlc_doorbell = 264 q->doorbell_off << SDMA0_RLC0_DOORBELL__OFFSET__SHIFT; 265 266 m->sdma_rlc_virtual_addr = q->sdma_vm_addr; 267 268 m->sdma_engine_id = q->sdma_engine_id; 269 m->sdma_queue_id = q->sdma_queue_id; 270 271 q->is_active = QUEUE_IS_ACTIVE(*q); 272 } 273 274 static int destroy_mqd(struct mqd_manager *mm, void *mqd, 275 enum kfd_preempt_type type, 276 unsigned int timeout, uint32_t pipe_id, 277 uint32_t queue_id) 278 { 279 return mm->dev->kfd2kgd->hqd_destroy(mm->dev->kgd, mqd, type, timeout, 280 pipe_id, queue_id); 281 } 282 283 /* 284 * preempt type here is ignored because there is only one way 285 * to preempt sdma queue 286 */ 287 static int destroy_mqd_sdma(struct mqd_manager *mm, void *mqd, 288 enum kfd_preempt_type type, 289 unsigned int timeout, uint32_t pipe_id, 290 uint32_t queue_id) 291 { 292 return mm->dev->kfd2kgd->hqd_sdma_destroy(mm->dev->kgd, mqd, timeout); 293 } 294 295 static bool is_occupied(struct mqd_manager *mm, void *mqd, 296 uint64_t queue_address, uint32_t pipe_id, 297 uint32_t queue_id) 298 { 299 300 return mm->dev->kfd2kgd->hqd_is_occupied(mm->dev->kgd, queue_address, 301 pipe_id, queue_id); 302 303 } 304 305 static bool is_occupied_sdma(struct mqd_manager *mm, void *mqd, 306 uint64_t queue_address, uint32_t pipe_id, 307 uint32_t queue_id) 308 { 309 return mm->dev->kfd2kgd->hqd_sdma_is_occupied(mm->dev->kgd, mqd); 310 } 311 312 /* 313 * HIQ MQD Implementation, concrete implementation for HIQ MQD implementation. 314 * The HIQ queue in Kaveri is using the same MQD structure as all the user mode 315 * queues but with different initial values. 316 */ 317 318 static void init_mqd_hiq(struct mqd_manager *mm, void **mqd, 319 struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr, 320 struct queue_properties *q) 321 { 322 init_mqd(mm, mqd, mqd_mem_obj, gart_addr, q); 323 } 324 325 static void update_mqd_hiq(struct mqd_manager *mm, void *mqd, 326 struct queue_properties *q, 327 struct mqd_update_info *minfo) 328 { 329 struct cik_mqd *m; 330 331 m = get_mqd(mqd); 332 m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE | 333 DEFAULT_MIN_AVAIL_SIZE | 334 PRIV_STATE | 335 KMD_QUEUE; 336 337 /* 338 * Calculating queue size which is log base 2 of actual queue 339 * size -1 dwords 340 */ 341 m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1; 342 m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8); 343 m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); 344 m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr); 345 m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr); 346 m->cp_hqd_pq_doorbell_control = DOORBELL_OFFSET(q->doorbell_off); 347 348 m->cp_hqd_vmid = q->vmid; 349 350 q->is_active = QUEUE_IS_ACTIVE(*q); 351 352 set_priority(m, q); 353 } 354 355 #if defined(CONFIG_DEBUG_FS) 356 357 static int debugfs_show_mqd(struct seq_file *m, void *data) 358 { 359 seq_hex_dump(m, " ", DUMP_PREFIX_OFFSET, 32, 4, 360 data, sizeof(struct cik_mqd), false); 361 return 0; 362 } 363 364 static int debugfs_show_mqd_sdma(struct seq_file *m, void *data) 365 { 366 seq_hex_dump(m, " ", DUMP_PREFIX_OFFSET, 32, 4, 367 data, sizeof(struct cik_sdma_rlc_registers), false); 368 return 0; 369 } 370 371 #endif 372 373 374 struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type, 375 struct kfd_dev *dev) 376 { 377 struct mqd_manager *mqd; 378 379 if (WARN_ON(type >= KFD_MQD_TYPE_MAX)) 380 return NULL; 381 382 mqd = kzalloc(sizeof(*mqd), GFP_KERNEL); 383 if (!mqd) 384 return NULL; 385 386 mqd->dev = dev; 387 388 switch (type) { 389 case KFD_MQD_TYPE_CP: 390 mqd->allocate_mqd = allocate_mqd; 391 mqd->init_mqd = init_mqd; 392 mqd->free_mqd = free_mqd; 393 mqd->load_mqd = load_mqd; 394 mqd->update_mqd = update_mqd; 395 mqd->destroy_mqd = destroy_mqd; 396 mqd->is_occupied = is_occupied; 397 mqd->mqd_size = sizeof(struct cik_mqd); 398 #if defined(CONFIG_DEBUG_FS) 399 mqd->debugfs_show_mqd = debugfs_show_mqd; 400 #endif 401 break; 402 case KFD_MQD_TYPE_HIQ: 403 mqd->allocate_mqd = allocate_hiq_mqd; 404 mqd->init_mqd = init_mqd_hiq; 405 mqd->free_mqd = free_mqd_hiq_sdma; 406 mqd->load_mqd = load_mqd; 407 mqd->update_mqd = update_mqd_hiq; 408 mqd->destroy_mqd = destroy_mqd; 409 mqd->is_occupied = is_occupied; 410 mqd->mqd_size = sizeof(struct cik_mqd); 411 #if defined(CONFIG_DEBUG_FS) 412 mqd->debugfs_show_mqd = debugfs_show_mqd; 413 #endif 414 mqd->read_doorbell_id = read_doorbell_id; 415 break; 416 case KFD_MQD_TYPE_DIQ: 417 mqd->allocate_mqd = allocate_mqd; 418 mqd->init_mqd = init_mqd_hiq; 419 mqd->free_mqd = free_mqd; 420 mqd->load_mqd = load_mqd; 421 mqd->update_mqd = update_mqd_hiq; 422 mqd->destroy_mqd = destroy_mqd; 423 mqd->is_occupied = is_occupied; 424 mqd->mqd_size = sizeof(struct cik_mqd); 425 #if defined(CONFIG_DEBUG_FS) 426 mqd->debugfs_show_mqd = debugfs_show_mqd; 427 #endif 428 break; 429 case KFD_MQD_TYPE_SDMA: 430 mqd->allocate_mqd = allocate_sdma_mqd; 431 mqd->init_mqd = init_mqd_sdma; 432 mqd->free_mqd = free_mqd_hiq_sdma; 433 mqd->load_mqd = load_mqd_sdma; 434 mqd->update_mqd = update_mqd_sdma; 435 mqd->destroy_mqd = destroy_mqd_sdma; 436 mqd->is_occupied = is_occupied_sdma; 437 mqd->mqd_size = sizeof(struct cik_sdma_rlc_registers); 438 #if defined(CONFIG_DEBUG_FS) 439 mqd->debugfs_show_mqd = debugfs_show_mqd_sdma; 440 #endif 441 break; 442 default: 443 kfree(mqd); 444 return NULL; 445 } 446 447 return mqd; 448 } 449 450 struct mqd_manager *mqd_manager_init_cik_hawaii(enum KFD_MQD_TYPE type, 451 struct kfd_dev *dev) 452 { 453 struct mqd_manager *mqd; 454 455 mqd = mqd_manager_init_cik(type, dev); 456 if (!mqd) 457 return NULL; 458 if (type == KFD_MQD_TYPE_CP) 459 mqd->update_mqd = update_mqd_hawaii; 460 return mqd; 461 } 462