1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #include <linux/printk.h> 25 #include <linux/slab.h> 26 #include <linux/mm_types.h> 27 28 #include "kfd_priv.h" 29 #include "kfd_mqd_manager.h" 30 #include "cik_regs.h" 31 #include "cik_structs.h" 32 #include "oss/oss_2_4_sh_mask.h" 33 34 static inline struct cik_mqd *get_mqd(void *mqd) 35 { 36 return (struct cik_mqd *)mqd; 37 } 38 39 static inline struct cik_sdma_rlc_registers *get_sdma_mqd(void *mqd) 40 { 41 return (struct cik_sdma_rlc_registers *)mqd; 42 } 43 44 static int init_mqd(struct mqd_manager *mm, void **mqd, 45 struct kfd_mem_obj **mqd_mem_obj, uint64_t *gart_addr, 46 struct queue_properties *q) 47 { 48 uint64_t addr; 49 struct cik_mqd *m; 50 int retval; 51 52 retval = kfd_gtt_sa_allocate(mm->dev, sizeof(struct cik_mqd), 53 mqd_mem_obj); 54 55 if (retval != 0) 56 return -ENOMEM; 57 58 m = (struct cik_mqd *) (*mqd_mem_obj)->cpu_ptr; 59 addr = (*mqd_mem_obj)->gpu_addr; 60 61 memset(m, 0, ALIGN(sizeof(struct cik_mqd), 256)); 62 63 m->header = 0xC0310800; 64 m->compute_pipelinestat_enable = 1; 65 m->compute_static_thread_mgmt_se0 = 0xFFFFFFFF; 66 m->compute_static_thread_mgmt_se1 = 0xFFFFFFFF; 67 m->compute_static_thread_mgmt_se2 = 0xFFFFFFFF; 68 m->compute_static_thread_mgmt_se3 = 0xFFFFFFFF; 69 70 /* 71 * Make sure to use the last queue state saved on mqd when the cp 72 * reassigns the queue, so when queue is switched on/off (e.g over 73 * subscription or quantum timeout) the context will be consistent 74 */ 75 m->cp_hqd_persistent_state = 76 DEFAULT_CP_HQD_PERSISTENT_STATE | PRELOAD_REQ; 77 78 m->cp_mqd_control = MQD_CONTROL_PRIV_STATE_EN; 79 m->cp_mqd_base_addr_lo = lower_32_bits(addr); 80 m->cp_mqd_base_addr_hi = upper_32_bits(addr); 81 82 m->cp_hqd_ib_control = DEFAULT_MIN_IB_AVAIL_SIZE | IB_ATC_EN; 83 /* Although WinKFD writes this, I suspect it should not be necessary */ 84 m->cp_hqd_ib_control = IB_ATC_EN | DEFAULT_MIN_IB_AVAIL_SIZE; 85 86 m->cp_hqd_quantum = QUANTUM_EN | QUANTUM_SCALE_1MS | 87 QUANTUM_DURATION(10); 88 89 /* 90 * Pipe Priority 91 * Identifies the pipe relative priority when this queue is connected 92 * to the pipeline. The pipe priority is against the GFX pipe and HP3D. 93 * In KFD we are using a fixed pipe priority set to CS_MEDIUM. 94 * 0 = CS_LOW (typically below GFX) 95 * 1 = CS_MEDIUM (typically between HP3D and GFX 96 * 2 = CS_HIGH (typically above HP3D) 97 */ 98 m->cp_hqd_pipe_priority = 1; 99 m->cp_hqd_queue_priority = 15; 100 101 if (q->format == KFD_QUEUE_FORMAT_AQL) 102 m->cp_hqd_iq_rptr = AQL_ENABLE; 103 104 *mqd = m; 105 if (gart_addr) 106 *gart_addr = addr; 107 retval = mm->update_mqd(mm, m, q); 108 109 return retval; 110 } 111 112 static int init_mqd_sdma(struct mqd_manager *mm, void **mqd, 113 struct kfd_mem_obj **mqd_mem_obj, uint64_t *gart_addr, 114 struct queue_properties *q) 115 { 116 int retval; 117 struct cik_sdma_rlc_registers *m; 118 119 retval = kfd_gtt_sa_allocate(mm->dev, 120 sizeof(struct cik_sdma_rlc_registers), 121 mqd_mem_obj); 122 123 if (retval != 0) 124 return -ENOMEM; 125 126 m = (struct cik_sdma_rlc_registers *) (*mqd_mem_obj)->cpu_ptr; 127 128 memset(m, 0, sizeof(struct cik_sdma_rlc_registers)); 129 130 *mqd = m; 131 if (gart_addr) 132 *gart_addr = (*mqd_mem_obj)->gpu_addr; 133 134 retval = mm->update_mqd(mm, m, q); 135 136 return retval; 137 } 138 139 static void uninit_mqd(struct mqd_manager *mm, void *mqd, 140 struct kfd_mem_obj *mqd_mem_obj) 141 { 142 kfd_gtt_sa_free(mm->dev, mqd_mem_obj); 143 } 144 145 static void uninit_mqd_sdma(struct mqd_manager *mm, void *mqd, 146 struct kfd_mem_obj *mqd_mem_obj) 147 { 148 kfd_gtt_sa_free(mm->dev, mqd_mem_obj); 149 } 150 151 static int load_mqd(struct mqd_manager *mm, void *mqd, uint32_t pipe_id, 152 uint32_t queue_id, struct queue_properties *p, 153 struct mm_struct *mms) 154 { 155 /* AQL write pointer counts in 64B packets, PM4/CP counts in dwords. */ 156 uint32_t wptr_shift = (p->format == KFD_QUEUE_FORMAT_AQL ? 4 : 0); 157 uint32_t wptr_mask = (uint32_t)((p->queue_size / 4) - 1); 158 159 return mm->dev->kfd2kgd->hqd_load(mm->dev->kgd, mqd, pipe_id, queue_id, 160 (uint32_t __user *)p->write_ptr, 161 wptr_shift, wptr_mask, mms); 162 } 163 164 static int load_mqd_sdma(struct mqd_manager *mm, void *mqd, 165 uint32_t pipe_id, uint32_t queue_id, 166 struct queue_properties *p, struct mm_struct *mms) 167 { 168 return mm->dev->kfd2kgd->hqd_sdma_load(mm->dev->kgd, mqd, 169 (uint32_t __user *)p->write_ptr, 170 mms); 171 } 172 173 static int __update_mqd(struct mqd_manager *mm, void *mqd, 174 struct queue_properties *q, unsigned int atc_bit) 175 { 176 struct cik_mqd *m; 177 178 m = get_mqd(mqd); 179 m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE | 180 DEFAULT_MIN_AVAIL_SIZE; 181 m->cp_hqd_ib_control = DEFAULT_MIN_IB_AVAIL_SIZE; 182 if (atc_bit) { 183 m->cp_hqd_pq_control |= PQ_ATC_EN; 184 m->cp_hqd_ib_control |= IB_ATC_EN; 185 } 186 187 /* 188 * Calculating queue size which is log base 2 of actual queue size -1 189 * dwords and another -1 for ffs 190 */ 191 m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1; 192 m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8); 193 m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); 194 m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr); 195 m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr); 196 m->cp_hqd_pq_doorbell_control = DOORBELL_OFFSET(q->doorbell_off); 197 198 m->cp_hqd_vmid = q->vmid; 199 200 if (q->format == KFD_QUEUE_FORMAT_AQL) 201 m->cp_hqd_pq_control |= NO_UPDATE_RPTR; 202 203 q->is_active = (q->queue_size > 0 && 204 q->queue_address != 0 && 205 q->queue_percent > 0 && 206 !q->is_evicted); 207 208 return 0; 209 } 210 211 static int update_mqd(struct mqd_manager *mm, void *mqd, 212 struct queue_properties *q) 213 { 214 return __update_mqd(mm, mqd, q, 1); 215 } 216 217 static int update_mqd_hawaii(struct mqd_manager *mm, void *mqd, 218 struct queue_properties *q) 219 { 220 return __update_mqd(mm, mqd, q, 0); 221 } 222 223 static int update_mqd_sdma(struct mqd_manager *mm, void *mqd, 224 struct queue_properties *q) 225 { 226 struct cik_sdma_rlc_registers *m; 227 228 m = get_sdma_mqd(mqd); 229 m->sdma_rlc_rb_cntl = order_base_2(q->queue_size / 4) 230 << SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT | 231 q->vmid << SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT | 232 1 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE__SHIFT | 233 6 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT; 234 235 m->sdma_rlc_rb_base = lower_32_bits(q->queue_address >> 8); 236 m->sdma_rlc_rb_base_hi = upper_32_bits(q->queue_address >> 8); 237 m->sdma_rlc_rb_rptr_addr_lo = lower_32_bits((uint64_t)q->read_ptr); 238 m->sdma_rlc_rb_rptr_addr_hi = upper_32_bits((uint64_t)q->read_ptr); 239 m->sdma_rlc_doorbell = 240 q->doorbell_off << SDMA0_RLC0_DOORBELL__OFFSET__SHIFT; 241 242 m->sdma_rlc_virtual_addr = q->sdma_vm_addr; 243 244 m->sdma_engine_id = q->sdma_engine_id; 245 m->sdma_queue_id = q->sdma_queue_id; 246 247 q->is_active = (q->queue_size > 0 && 248 q->queue_address != 0 && 249 q->queue_percent > 0 && 250 !q->is_evicted); 251 252 return 0; 253 } 254 255 static int destroy_mqd(struct mqd_manager *mm, void *mqd, 256 enum kfd_preempt_type type, 257 unsigned int timeout, uint32_t pipe_id, 258 uint32_t queue_id) 259 { 260 return mm->dev->kfd2kgd->hqd_destroy(mm->dev->kgd, mqd, type, timeout, 261 pipe_id, queue_id); 262 } 263 264 /* 265 * preempt type here is ignored because there is only one way 266 * to preempt sdma queue 267 */ 268 static int destroy_mqd_sdma(struct mqd_manager *mm, void *mqd, 269 enum kfd_preempt_type type, 270 unsigned int timeout, uint32_t pipe_id, 271 uint32_t queue_id) 272 { 273 return mm->dev->kfd2kgd->hqd_sdma_destroy(mm->dev->kgd, mqd, timeout); 274 } 275 276 static bool is_occupied(struct mqd_manager *mm, void *mqd, 277 uint64_t queue_address, uint32_t pipe_id, 278 uint32_t queue_id) 279 { 280 281 return mm->dev->kfd2kgd->hqd_is_occupied(mm->dev->kgd, queue_address, 282 pipe_id, queue_id); 283 284 } 285 286 static bool is_occupied_sdma(struct mqd_manager *mm, void *mqd, 287 uint64_t queue_address, uint32_t pipe_id, 288 uint32_t queue_id) 289 { 290 return mm->dev->kfd2kgd->hqd_sdma_is_occupied(mm->dev->kgd, mqd); 291 } 292 293 /* 294 * HIQ MQD Implementation, concrete implementation for HIQ MQD implementation. 295 * The HIQ queue in Kaveri is using the same MQD structure as all the user mode 296 * queues but with different initial values. 297 */ 298 299 static int init_mqd_hiq(struct mqd_manager *mm, void **mqd, 300 struct kfd_mem_obj **mqd_mem_obj, uint64_t *gart_addr, 301 struct queue_properties *q) 302 { 303 uint64_t addr; 304 struct cik_mqd *m; 305 int retval; 306 307 retval = kfd_gtt_sa_allocate(mm->dev, sizeof(struct cik_mqd), 308 mqd_mem_obj); 309 310 if (retval != 0) 311 return -ENOMEM; 312 313 m = (struct cik_mqd *) (*mqd_mem_obj)->cpu_ptr; 314 addr = (*mqd_mem_obj)->gpu_addr; 315 316 memset(m, 0, ALIGN(sizeof(struct cik_mqd), 256)); 317 318 m->header = 0xC0310800; 319 m->compute_pipelinestat_enable = 1; 320 m->compute_static_thread_mgmt_se0 = 0xFFFFFFFF; 321 m->compute_static_thread_mgmt_se1 = 0xFFFFFFFF; 322 m->compute_static_thread_mgmt_se2 = 0xFFFFFFFF; 323 m->compute_static_thread_mgmt_se3 = 0xFFFFFFFF; 324 325 m->cp_hqd_persistent_state = DEFAULT_CP_HQD_PERSISTENT_STATE | 326 PRELOAD_REQ; 327 m->cp_hqd_quantum = QUANTUM_EN | QUANTUM_SCALE_1MS | 328 QUANTUM_DURATION(10); 329 330 m->cp_mqd_control = MQD_CONTROL_PRIV_STATE_EN; 331 m->cp_mqd_base_addr_lo = lower_32_bits(addr); 332 m->cp_mqd_base_addr_hi = upper_32_bits(addr); 333 334 m->cp_hqd_ib_control = DEFAULT_MIN_IB_AVAIL_SIZE; 335 336 /* 337 * Pipe Priority 338 * Identifies the pipe relative priority when this queue is connected 339 * to the pipeline. The pipe priority is against the GFX pipe and HP3D. 340 * In KFD we are using a fixed pipe priority set to CS_MEDIUM. 341 * 0 = CS_LOW (typically below GFX) 342 * 1 = CS_MEDIUM (typically between HP3D and GFX 343 * 2 = CS_HIGH (typically above HP3D) 344 */ 345 m->cp_hqd_pipe_priority = 1; 346 m->cp_hqd_queue_priority = 15; 347 348 *mqd = m; 349 if (gart_addr) 350 *gart_addr = addr; 351 retval = mm->update_mqd(mm, m, q); 352 353 return retval; 354 } 355 356 static int update_mqd_hiq(struct mqd_manager *mm, void *mqd, 357 struct queue_properties *q) 358 { 359 struct cik_mqd *m; 360 361 m = get_mqd(mqd); 362 m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE | 363 DEFAULT_MIN_AVAIL_SIZE | 364 PRIV_STATE | 365 KMD_QUEUE; 366 367 /* 368 * Calculating queue size which is log base 2 of actual queue 369 * size -1 dwords 370 */ 371 m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1; 372 m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8); 373 m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); 374 m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr); 375 m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr); 376 m->cp_hqd_pq_doorbell_control = DOORBELL_OFFSET(q->doorbell_off); 377 378 m->cp_hqd_vmid = q->vmid; 379 380 q->is_active = (q->queue_size > 0 && 381 q->queue_address != 0 && 382 q->queue_percent > 0 && 383 !q->is_evicted); 384 385 return 0; 386 } 387 388 #if defined(CONFIG_DEBUG_FS) 389 390 static int debugfs_show_mqd(struct seq_file *m, void *data) 391 { 392 seq_hex_dump(m, " ", DUMP_PREFIX_OFFSET, 32, 4, 393 data, sizeof(struct cik_mqd), false); 394 return 0; 395 } 396 397 static int debugfs_show_mqd_sdma(struct seq_file *m, void *data) 398 { 399 seq_hex_dump(m, " ", DUMP_PREFIX_OFFSET, 32, 4, 400 data, sizeof(struct cik_sdma_rlc_registers), false); 401 return 0; 402 } 403 404 #endif 405 406 407 struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type, 408 struct kfd_dev *dev) 409 { 410 struct mqd_manager *mqd; 411 412 if (WARN_ON(type >= KFD_MQD_TYPE_MAX)) 413 return NULL; 414 415 mqd = kzalloc(sizeof(*mqd), GFP_KERNEL); 416 if (!mqd) 417 return NULL; 418 419 mqd->dev = dev; 420 421 switch (type) { 422 case KFD_MQD_TYPE_CP: 423 case KFD_MQD_TYPE_COMPUTE: 424 mqd->init_mqd = init_mqd; 425 mqd->uninit_mqd = uninit_mqd; 426 mqd->load_mqd = load_mqd; 427 mqd->update_mqd = update_mqd; 428 mqd->destroy_mqd = destroy_mqd; 429 mqd->is_occupied = is_occupied; 430 #if defined(CONFIG_DEBUG_FS) 431 mqd->debugfs_show_mqd = debugfs_show_mqd; 432 #endif 433 break; 434 case KFD_MQD_TYPE_HIQ: 435 mqd->init_mqd = init_mqd_hiq; 436 mqd->uninit_mqd = uninit_mqd; 437 mqd->load_mqd = load_mqd; 438 mqd->update_mqd = update_mqd_hiq; 439 mqd->destroy_mqd = destroy_mqd; 440 mqd->is_occupied = is_occupied; 441 #if defined(CONFIG_DEBUG_FS) 442 mqd->debugfs_show_mqd = debugfs_show_mqd; 443 #endif 444 break; 445 case KFD_MQD_TYPE_SDMA: 446 mqd->init_mqd = init_mqd_sdma; 447 mqd->uninit_mqd = uninit_mqd_sdma; 448 mqd->load_mqd = load_mqd_sdma; 449 mqd->update_mqd = update_mqd_sdma; 450 mqd->destroy_mqd = destroy_mqd_sdma; 451 mqd->is_occupied = is_occupied_sdma; 452 #if defined(CONFIG_DEBUG_FS) 453 mqd->debugfs_show_mqd = debugfs_show_mqd_sdma; 454 #endif 455 break; 456 default: 457 kfree(mqd); 458 return NULL; 459 } 460 461 return mqd; 462 } 463 464 struct mqd_manager *mqd_manager_init_cik_hawaii(enum KFD_MQD_TYPE type, 465 struct kfd_dev *dev) 466 { 467 struct mqd_manager *mqd; 468 469 mqd = mqd_manager_init_cik(type, dev); 470 if (!mqd) 471 return NULL; 472 if ((type == KFD_MQD_TYPE_CP) || (type == KFD_MQD_TYPE_COMPUTE)) 473 mqd->update_mqd = update_mqd_hawaii; 474 return mqd; 475 } 476