14b8f589bSBen Goz /* 24b8f589bSBen Goz * Copyright 2014 Advanced Micro Devices, Inc. 34b8f589bSBen Goz * 44b8f589bSBen Goz * Permission is hereby granted, free of charge, to any person obtaining a 54b8f589bSBen Goz * copy of this software and associated documentation files (the "Software"), 64b8f589bSBen Goz * to deal in the Software without restriction, including without limitation 74b8f589bSBen Goz * the rights to use, copy, modify, merge, publish, distribute, sublicense, 84b8f589bSBen Goz * and/or sell copies of the Software, and to permit persons to whom the 94b8f589bSBen Goz * Software is furnished to do so, subject to the following conditions: 104b8f589bSBen Goz * 114b8f589bSBen Goz * The above copyright notice and this permission notice shall be included in 124b8f589bSBen Goz * all copies or substantial portions of the Software. 134b8f589bSBen Goz * 144b8f589bSBen Goz * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 154b8f589bSBen Goz * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 164b8f589bSBen Goz * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 174b8f589bSBen Goz * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 184b8f589bSBen Goz * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 194b8f589bSBen Goz * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 204b8f589bSBen Goz * OTHER DEALINGS IN THE SOFTWARE. 214b8f589bSBen Goz * 224b8f589bSBen Goz */ 234b8f589bSBen Goz 244b8f589bSBen Goz #include <linux/printk.h> 254b8f589bSBen Goz #include <linux/slab.h> 26589ee628SIngo Molnar #include <linux/mm_types.h> 27589ee628SIngo Molnar 284b8f589bSBen Goz #include "kfd_priv.h" 294b8f589bSBen Goz #include "kfd_mqd_manager.h" 304b8f589bSBen Goz #include "cik_regs.h" 314b8f589bSBen Goz #include "cik_structs.h" 323d30b28bSOded Gabbay #include "oss/oss_2_4_sh_mask.h" 334b8f589bSBen Goz 344b8f589bSBen Goz static inline struct cik_mqd *get_mqd(void *mqd) 354b8f589bSBen Goz { 364b8f589bSBen Goz return (struct cik_mqd *)mqd; 374b8f589bSBen Goz } 384b8f589bSBen Goz 3997b9ad12SFelix Kuehling static inline struct cik_sdma_rlc_registers *get_sdma_mqd(void *mqd) 4097b9ad12SFelix Kuehling { 4197b9ad12SFelix Kuehling return (struct cik_sdma_rlc_registers *)mqd; 4297b9ad12SFelix Kuehling } 4397b9ad12SFelix Kuehling 4439e7f331SFelix Kuehling static void update_cu_mask(struct mqd_manager *mm, void *mqd, 4539e7f331SFelix Kuehling struct queue_properties *q) 4639e7f331SFelix Kuehling { 4739e7f331SFelix Kuehling struct cik_mqd *m; 4839e7f331SFelix Kuehling uint32_t se_mask[4] = {0}; /* 4 is the max # of SEs */ 4939e7f331SFelix Kuehling 5039e7f331SFelix Kuehling if (q->cu_mask_count == 0) 5139e7f331SFelix Kuehling return; 5239e7f331SFelix Kuehling 5339e7f331SFelix Kuehling mqd_symmetrically_map_cu_mask(mm, 5439e7f331SFelix Kuehling q->cu_mask, q->cu_mask_count, se_mask); 5539e7f331SFelix Kuehling 5639e7f331SFelix Kuehling m = get_mqd(mqd); 5739e7f331SFelix Kuehling m->compute_static_thread_mgmt_se0 = se_mask[0]; 5839e7f331SFelix Kuehling m->compute_static_thread_mgmt_se1 = se_mask[1]; 5939e7f331SFelix Kuehling m->compute_static_thread_mgmt_se2 = se_mask[2]; 6039e7f331SFelix Kuehling m->compute_static_thread_mgmt_se3 = se_mask[3]; 6139e7f331SFelix Kuehling 6239e7f331SFelix Kuehling pr_debug("Update cu mask to %#x %#x %#x %#x\n", 6339e7f331SFelix Kuehling m->compute_static_thread_mgmt_se0, 6439e7f331SFelix Kuehling m->compute_static_thread_mgmt_se1, 6539e7f331SFelix Kuehling m->compute_static_thread_mgmt_se2, 6639e7f331SFelix Kuehling m->compute_static_thread_mgmt_se3); 6739e7f331SFelix Kuehling } 6839e7f331SFelix Kuehling 690ccbc7cdSOak Zeng static void set_priority(struct cik_mqd *m, struct queue_properties *q) 700ccbc7cdSOak Zeng { 710ccbc7cdSOak Zeng m->cp_hqd_pipe_priority = pipe_priority_map[q->priority]; 720ccbc7cdSOak Zeng m->cp_hqd_queue_priority = q->priority; 730ccbc7cdSOak Zeng } 740ccbc7cdSOak Zeng 75d1f8f0d1SOak Zeng static struct kfd_mem_obj *allocate_mqd(struct kfd_dev *kfd, 76d1f8f0d1SOak Zeng struct queue_properties *q) 77d1f8f0d1SOak Zeng { 78d1f8f0d1SOak Zeng struct kfd_mem_obj *mqd_mem_obj; 79d1f8f0d1SOak Zeng 80d1f8f0d1SOak Zeng if (kfd_gtt_sa_allocate(kfd, sizeof(struct cik_mqd), 81d1f8f0d1SOak Zeng &mqd_mem_obj)) 82d1f8f0d1SOak Zeng return NULL; 83d1f8f0d1SOak Zeng 84d1f8f0d1SOak Zeng return mqd_mem_obj; 85d1f8f0d1SOak Zeng } 86d1f8f0d1SOak Zeng 878636e53cSOak Zeng static void init_mqd(struct mqd_manager *mm, void **mqd, 888636e53cSOak Zeng struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr, 894b8f589bSBen Goz struct queue_properties *q) 904b8f589bSBen Goz { 914b8f589bSBen Goz uint64_t addr; 924b8f589bSBen Goz struct cik_mqd *m; 934b8f589bSBen Goz 948636e53cSOak Zeng m = (struct cik_mqd *) mqd_mem_obj->cpu_ptr; 958636e53cSOak Zeng addr = mqd_mem_obj->gpu_addr; 964b8f589bSBen Goz 974b8f589bSBen Goz memset(m, 0, ALIGN(sizeof(struct cik_mqd), 256)); 984b8f589bSBen Goz 994b8f589bSBen Goz m->header = 0xC0310800; 1004b8f589bSBen Goz m->compute_pipelinestat_enable = 1; 1014b8f589bSBen Goz m->compute_static_thread_mgmt_se0 = 0xFFFFFFFF; 1024b8f589bSBen Goz m->compute_static_thread_mgmt_se1 = 0xFFFFFFFF; 1034b8f589bSBen Goz m->compute_static_thread_mgmt_se2 = 0xFFFFFFFF; 1044b8f589bSBen Goz m->compute_static_thread_mgmt_se3 = 0xFFFFFFFF; 1054b8f589bSBen Goz 1064b8f589bSBen Goz /* 1074b8f589bSBen Goz * Make sure to use the last queue state saved on mqd when the cp 1084b8f589bSBen Goz * reassigns the queue, so when queue is switched on/off (e.g over 1094b8f589bSBen Goz * subscription or quantum timeout) the context will be consistent 1104b8f589bSBen Goz */ 1114b8f589bSBen Goz m->cp_hqd_persistent_state = 1124b8f589bSBen Goz DEFAULT_CP_HQD_PERSISTENT_STATE | PRELOAD_REQ; 1134b8f589bSBen Goz 1144b8f589bSBen Goz m->cp_mqd_control = MQD_CONTROL_PRIV_STATE_EN; 1154b8f589bSBen Goz m->cp_mqd_base_addr_lo = lower_32_bits(addr); 1164b8f589bSBen Goz m->cp_mqd_base_addr_hi = upper_32_bits(addr); 1174b8f589bSBen Goz 1184b8f589bSBen Goz m->cp_hqd_quantum = QUANTUM_EN | QUANTUM_SCALE_1MS | 1194b8f589bSBen Goz QUANTUM_DURATION(10); 1204b8f589bSBen Goz 1214b8f589bSBen Goz /* 1224b8f589bSBen Goz * Pipe Priority 1234b8f589bSBen Goz * Identifies the pipe relative priority when this queue is connected 1244b8f589bSBen Goz * to the pipeline. The pipe priority is against the GFX pipe and HP3D. 1254b8f589bSBen Goz * In KFD we are using a fixed pipe priority set to CS_MEDIUM. 1264b8f589bSBen Goz * 0 = CS_LOW (typically below GFX) 1274b8f589bSBen Goz * 1 = CS_MEDIUM (typically between HP3D and GFX 1284b8f589bSBen Goz * 2 = CS_HIGH (typically above HP3D) 1294b8f589bSBen Goz */ 1300ccbc7cdSOak Zeng set_priority(m, q); 1314b8f589bSBen Goz 132d752f95eSJay Cornwall if (q->format == KFD_QUEUE_FORMAT_AQL) 133d752f95eSJay Cornwall m->cp_hqd_iq_rptr = AQL_ENABLE; 134d752f95eSJay Cornwall 1354b8f589bSBen Goz *mqd = m; 1364eacc26bSKent Russell if (gart_addr) 1374b8f589bSBen Goz *gart_addr = addr; 1388636e53cSOak Zeng mm->update_mqd(mm, m, q); 1394b8f589bSBen Goz } 1404b8f589bSBen Goz 1418636e53cSOak Zeng static void init_mqd_sdma(struct mqd_manager *mm, void **mqd, 1428636e53cSOak Zeng struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr, 1434b8f589bSBen Goz struct queue_properties *q) 1444b8f589bSBen Goz { 1454b8f589bSBen Goz struct cik_sdma_rlc_registers *m; 1464b8f589bSBen Goz 1478636e53cSOak Zeng m = (struct cik_sdma_rlc_registers *) mqd_mem_obj->cpu_ptr; 1484b8f589bSBen Goz 1494b8f589bSBen Goz memset(m, 0, sizeof(struct cik_sdma_rlc_registers)); 1504b8f589bSBen Goz 1514b8f589bSBen Goz *mqd = m; 1524eacc26bSKent Russell if (gart_addr) 1538636e53cSOak Zeng *gart_addr = mqd_mem_obj->gpu_addr; 1544b8f589bSBen Goz 1558636e53cSOak Zeng mm->update_mqd(mm, m, q); 1564b8f589bSBen Goz } 1574b8f589bSBen Goz 1588636e53cSOak Zeng static void free_mqd(struct mqd_manager *mm, void *mqd, 1594b8f589bSBen Goz struct kfd_mem_obj *mqd_mem_obj) 1604b8f589bSBen Goz { 1614b8f589bSBen Goz kfd_gtt_sa_free(mm->dev, mqd_mem_obj); 1624b8f589bSBen Goz } 1634b8f589bSBen Goz 1644b8f589bSBen Goz 1654b8f589bSBen Goz static int load_mqd(struct mqd_manager *mm, void *mqd, uint32_t pipe_id, 16670539bd7SFelix Kuehling uint32_t queue_id, struct queue_properties *p, 16770539bd7SFelix Kuehling struct mm_struct *mms) 1684b8f589bSBen Goz { 16970539bd7SFelix Kuehling /* AQL write pointer counts in 64B packets, PM4/CP counts in dwords. */ 17070539bd7SFelix Kuehling uint32_t wptr_shift = (p->format == KFD_QUEUE_FORMAT_AQL ? 4 : 0); 1716d566930SFelix Kuehling uint32_t wptr_mask = (uint32_t)((p->queue_size / 4) - 1); 17270539bd7SFelix Kuehling 17370539bd7SFelix Kuehling return mm->dev->kfd2kgd->hqd_load(mm->dev->kgd, mqd, pipe_id, queue_id, 17470539bd7SFelix Kuehling (uint32_t __user *)p->write_ptr, 17570539bd7SFelix Kuehling wptr_shift, wptr_mask, mms); 1764b8f589bSBen Goz } 1774b8f589bSBen Goz 1784b8f589bSBen Goz static int load_mqd_sdma(struct mqd_manager *mm, void *mqd, 1794b8f589bSBen Goz uint32_t pipe_id, uint32_t queue_id, 18070539bd7SFelix Kuehling struct queue_properties *p, struct mm_struct *mms) 1814b8f589bSBen Goz { 1827ce66118SFelix Kuehling return mm->dev->kfd2kgd->hqd_sdma_load(mm->dev->kgd, mqd, 1837ce66118SFelix Kuehling (uint32_t __user *)p->write_ptr, 1847ce66118SFelix Kuehling mms); 1854b8f589bSBen Goz } 1864b8f589bSBen Goz 1878636e53cSOak Zeng static void __update_mqd(struct mqd_manager *mm, void *mqd, 188ee04955aSFelix Kuehling struct queue_properties *q, unsigned int atc_bit) 1894b8f589bSBen Goz { 1904b8f589bSBen Goz struct cik_mqd *m; 1914b8f589bSBen Goz 1924b8f589bSBen Goz m = get_mqd(mqd); 1934b8f589bSBen Goz m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE | 194ee04955aSFelix Kuehling DEFAULT_MIN_AVAIL_SIZE; 195ee04955aSFelix Kuehling m->cp_hqd_ib_control = DEFAULT_MIN_IB_AVAIL_SIZE; 196ee04955aSFelix Kuehling if (atc_bit) { 197ee04955aSFelix Kuehling m->cp_hqd_pq_control |= PQ_ATC_EN; 198ee04955aSFelix Kuehling m->cp_hqd_ib_control |= IB_ATC_EN; 199ee04955aSFelix Kuehling } 2004b8f589bSBen Goz 2014b8f589bSBen Goz /* 2024b8f589bSBen Goz * Calculating queue size which is log base 2 of actual queue size -1 2034b8f589bSBen Goz * dwords and another -1 for ffs 2044b8f589bSBen Goz */ 205115c8c41SFelix Kuehling m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1; 2064b8f589bSBen Goz m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8); 2074b8f589bSBen Goz m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); 2084b8f589bSBen Goz m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr); 2094b8f589bSBen Goz m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr); 21070539bd7SFelix Kuehling m->cp_hqd_pq_doorbell_control = DOORBELL_OFFSET(q->doorbell_off); 2114b8f589bSBen Goz 2124b8f589bSBen Goz m->cp_hqd_vmid = q->vmid; 2134b8f589bSBen Goz 2148eabaf54SKent Russell if (q->format == KFD_QUEUE_FORMAT_AQL) 2154b8f589bSBen Goz m->cp_hqd_pq_control |= NO_UPDATE_RPTR; 2164b8f589bSBen Goz 21739e7f331SFelix Kuehling update_cu_mask(mm, mqd, q); 2180ccbc7cdSOak Zeng set_priority(m, q); 21939e7f331SFelix Kuehling 220bb2d2128SFelix Kuehling q->is_active = QUEUE_IS_ACTIVE(*q); 2214b8f589bSBen Goz } 2224b8f589bSBen Goz 2238636e53cSOak Zeng static void update_mqd(struct mqd_manager *mm, void *mqd, 224ee04955aSFelix Kuehling struct queue_properties *q) 225ee04955aSFelix Kuehling { 2268636e53cSOak Zeng __update_mqd(mm, mqd, q, 1); 227ee04955aSFelix Kuehling } 228ee04955aSFelix Kuehling 2298636e53cSOak Zeng static void update_mqd_hawaii(struct mqd_manager *mm, void *mqd, 230ee04955aSFelix Kuehling struct queue_properties *q) 231ee04955aSFelix Kuehling { 2328636e53cSOak Zeng __update_mqd(mm, mqd, q, 0); 233ee04955aSFelix Kuehling } 234ee04955aSFelix Kuehling 2358636e53cSOak Zeng static void update_mqd_sdma(struct mqd_manager *mm, void *mqd, 2364b8f589bSBen Goz struct queue_properties *q) 2374b8f589bSBen Goz { 2384b8f589bSBen Goz struct cik_sdma_rlc_registers *m; 2394b8f589bSBen Goz 2404b8f589bSBen Goz m = get_sdma_mqd(mqd); 241115c8c41SFelix Kuehling m->sdma_rlc_rb_cntl = order_base_2(q->queue_size / 4) 242d12fb13fSshaoyunl << SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT | 2433d30b28bSOded Gabbay q->vmid << SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT | 2443d30b28bSOded Gabbay 1 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE__SHIFT | 2453d30b28bSOded Gabbay 6 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT; 2464b8f589bSBen Goz 2474b8f589bSBen Goz m->sdma_rlc_rb_base = lower_32_bits(q->queue_address >> 8); 2484b8f589bSBen Goz m->sdma_rlc_rb_base_hi = upper_32_bits(q->queue_address >> 8); 2494b8f589bSBen Goz m->sdma_rlc_rb_rptr_addr_lo = lower_32_bits((uint64_t)q->read_ptr); 2504b8f589bSBen Goz m->sdma_rlc_rb_rptr_addr_hi = upper_32_bits((uint64_t)q->read_ptr); 251bba9662dSJay Cornwall m->sdma_rlc_doorbell = 252bba9662dSJay Cornwall q->doorbell_off << SDMA0_RLC0_DOORBELL__OFFSET__SHIFT; 2533d30b28bSOded Gabbay 2544b8f589bSBen Goz m->sdma_rlc_virtual_addr = q->sdma_vm_addr; 2554b8f589bSBen Goz 2564b8f589bSBen Goz m->sdma_engine_id = q->sdma_engine_id; 2574b8f589bSBen Goz m->sdma_queue_id = q->sdma_queue_id; 2584b8f589bSBen Goz 259bb2d2128SFelix Kuehling q->is_active = QUEUE_IS_ACTIVE(*q); 2604b8f589bSBen Goz } 2614b8f589bSBen Goz 2624b8f589bSBen Goz static int destroy_mqd(struct mqd_manager *mm, void *mqd, 2634b8f589bSBen Goz enum kfd_preempt_type type, 2644b8f589bSBen Goz unsigned int timeout, uint32_t pipe_id, 2654b8f589bSBen Goz uint32_t queue_id) 2664b8f589bSBen Goz { 26770539bd7SFelix Kuehling return mm->dev->kfd2kgd->hqd_destroy(mm->dev->kgd, mqd, type, timeout, 2684b8f589bSBen Goz pipe_id, queue_id); 2694b8f589bSBen Goz } 2704b8f589bSBen Goz 2714b8f589bSBen Goz /* 2724b8f589bSBen Goz * preempt type here is ignored because there is only one way 2734b8f589bSBen Goz * to preempt sdma queue 2744b8f589bSBen Goz */ 2754b8f589bSBen Goz static int destroy_mqd_sdma(struct mqd_manager *mm, void *mqd, 2764b8f589bSBen Goz enum kfd_preempt_type type, 2774b8f589bSBen Goz unsigned int timeout, uint32_t pipe_id, 2784b8f589bSBen Goz uint32_t queue_id) 2794b8f589bSBen Goz { 280cea405b1SXihan Zhang return mm->dev->kfd2kgd->hqd_sdma_destroy(mm->dev->kgd, mqd, timeout); 2814b8f589bSBen Goz } 2824b8f589bSBen Goz 2834b8f589bSBen Goz static bool is_occupied(struct mqd_manager *mm, void *mqd, 2844b8f589bSBen Goz uint64_t queue_address, uint32_t pipe_id, 2854b8f589bSBen Goz uint32_t queue_id) 2864b8f589bSBen Goz { 2874b8f589bSBen Goz 288cea405b1SXihan Zhang return mm->dev->kfd2kgd->hqd_is_occupied(mm->dev->kgd, queue_address, 2894b8f589bSBen Goz pipe_id, queue_id); 2904b8f589bSBen Goz 2914b8f589bSBen Goz } 2924b8f589bSBen Goz 2934b8f589bSBen Goz static bool is_occupied_sdma(struct mqd_manager *mm, void *mqd, 2944b8f589bSBen Goz uint64_t queue_address, uint32_t pipe_id, 2954b8f589bSBen Goz uint32_t queue_id) 2964b8f589bSBen Goz { 297cea405b1SXihan Zhang return mm->dev->kfd2kgd->hqd_sdma_is_occupied(mm->dev->kgd, mqd); 2984b8f589bSBen Goz } 2994b8f589bSBen Goz 3004b8f589bSBen Goz /* 3014b8f589bSBen Goz * HIQ MQD Implementation, concrete implementation for HIQ MQD implementation. 3024b8f589bSBen Goz * The HIQ queue in Kaveri is using the same MQD structure as all the user mode 3034b8f589bSBen Goz * queues but with different initial values. 3044b8f589bSBen Goz */ 3054b8f589bSBen Goz 3068636e53cSOak Zeng static void init_mqd_hiq(struct mqd_manager *mm, void **mqd, 3078636e53cSOak Zeng struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr, 3084b8f589bSBen Goz struct queue_properties *q) 3094b8f589bSBen Goz { 3108636e53cSOak Zeng init_mqd(mm, mqd, mqd_mem_obj, gart_addr, q); 3114b8f589bSBen Goz } 3124b8f589bSBen Goz 3138636e53cSOak Zeng static void update_mqd_hiq(struct mqd_manager *mm, void *mqd, 3144b8f589bSBen Goz struct queue_properties *q) 3154b8f589bSBen Goz { 3164b8f589bSBen Goz struct cik_mqd *m; 3174b8f589bSBen Goz 3184b8f589bSBen Goz m = get_mqd(mqd); 3194b8f589bSBen Goz m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE | 3204b8f589bSBen Goz DEFAULT_MIN_AVAIL_SIZE | 3214b8f589bSBen Goz PRIV_STATE | 3224b8f589bSBen Goz KMD_QUEUE; 3234b8f589bSBen Goz 3244b8f589bSBen Goz /* 3254b8f589bSBen Goz * Calculating queue size which is log base 2 of actual queue 3264b8f589bSBen Goz * size -1 dwords 3274b8f589bSBen Goz */ 328115c8c41SFelix Kuehling m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1; 3294b8f589bSBen Goz m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8); 3304b8f589bSBen Goz m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); 3314b8f589bSBen Goz m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr); 3324b8f589bSBen Goz m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr); 333bba9662dSJay Cornwall m->cp_hqd_pq_doorbell_control = DOORBELL_OFFSET(q->doorbell_off); 3344b8f589bSBen Goz 3354b8f589bSBen Goz m->cp_hqd_vmid = q->vmid; 3364b8f589bSBen Goz 337bb2d2128SFelix Kuehling q->is_active = QUEUE_IS_ACTIVE(*q); 3384b8f589bSBen Goz 3390ccbc7cdSOak Zeng set_priority(m, q); 3404b8f589bSBen Goz } 3414b8f589bSBen Goz 342851a645eSFelix Kuehling #if defined(CONFIG_DEBUG_FS) 343851a645eSFelix Kuehling 344851a645eSFelix Kuehling static int debugfs_show_mqd(struct seq_file *m, void *data) 345851a645eSFelix Kuehling { 346851a645eSFelix Kuehling seq_hex_dump(m, " ", DUMP_PREFIX_OFFSET, 32, 4, 347851a645eSFelix Kuehling data, sizeof(struct cik_mqd), false); 348851a645eSFelix Kuehling return 0; 349851a645eSFelix Kuehling } 350851a645eSFelix Kuehling 351851a645eSFelix Kuehling static int debugfs_show_mqd_sdma(struct seq_file *m, void *data) 352851a645eSFelix Kuehling { 353851a645eSFelix Kuehling seq_hex_dump(m, " ", DUMP_PREFIX_OFFSET, 32, 4, 354851a645eSFelix Kuehling data, sizeof(struct cik_sdma_rlc_registers), false); 355851a645eSFelix Kuehling return 0; 356851a645eSFelix Kuehling } 357851a645eSFelix Kuehling 358851a645eSFelix Kuehling #endif 359851a645eSFelix Kuehling 3604b8f589bSBen Goz 3614b8f589bSBen Goz struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type, 3624b8f589bSBen Goz struct kfd_dev *dev) 3634b8f589bSBen Goz { 3644b8f589bSBen Goz struct mqd_manager *mqd; 3654b8f589bSBen Goz 36632fa8219SFelix Kuehling if (WARN_ON(type >= KFD_MQD_TYPE_MAX)) 36732fa8219SFelix Kuehling return NULL; 3684b8f589bSBen Goz 3691cd106ecSFelix Kuehling mqd = kzalloc(sizeof(*mqd), GFP_KERNEL); 3704b8f589bSBen Goz if (!mqd) 3714b8f589bSBen Goz return NULL; 3724b8f589bSBen Goz 3734b8f589bSBen Goz mqd->dev = dev; 3744b8f589bSBen Goz 3754b8f589bSBen Goz switch (type) { 3764b8f589bSBen Goz case KFD_MQD_TYPE_CP: 3778636e53cSOak Zeng mqd->allocate_mqd = allocate_mqd; 3784b8f589bSBen Goz mqd->init_mqd = init_mqd; 3798636e53cSOak Zeng mqd->free_mqd = free_mqd; 3804b8f589bSBen Goz mqd->load_mqd = load_mqd; 3814b8f589bSBen Goz mqd->update_mqd = update_mqd; 3824b8f589bSBen Goz mqd->destroy_mqd = destroy_mqd; 3834b8f589bSBen Goz mqd->is_occupied = is_occupied; 3846c6cde55SOak Zeng mqd->mqd_size = sizeof(struct cik_mqd); 385851a645eSFelix Kuehling #if defined(CONFIG_DEBUG_FS) 386851a645eSFelix Kuehling mqd->debugfs_show_mqd = debugfs_show_mqd; 387851a645eSFelix Kuehling #endif 3884b8f589bSBen Goz break; 3894b8f589bSBen Goz case KFD_MQD_TYPE_HIQ: 3908636e53cSOak Zeng mqd->allocate_mqd = allocate_hiq_mqd; 3914b8f589bSBen Goz mqd->init_mqd = init_mqd_hiq; 3928636e53cSOak Zeng mqd->free_mqd = free_mqd_hiq_sdma; 3934b8f589bSBen Goz mqd->load_mqd = load_mqd; 3944b8f589bSBen Goz mqd->update_mqd = update_mqd_hiq; 3954b8f589bSBen Goz mqd->destroy_mqd = destroy_mqd; 3964b8f589bSBen Goz mqd->is_occupied = is_occupied; 3976c6cde55SOak Zeng mqd->mqd_size = sizeof(struct cik_mqd); 398851a645eSFelix Kuehling #if defined(CONFIG_DEBUG_FS) 399851a645eSFelix Kuehling mqd->debugfs_show_mqd = debugfs_show_mqd; 400851a645eSFelix Kuehling #endif 4014b8f589bSBen Goz break; 40259f650a0SOak Zeng case KFD_MQD_TYPE_DIQ: 4038636e53cSOak Zeng mqd->allocate_mqd = allocate_hiq_mqd; 40459f650a0SOak Zeng mqd->init_mqd = init_mqd_hiq; 4058636e53cSOak Zeng mqd->free_mqd = free_mqd; 40659f650a0SOak Zeng mqd->load_mqd = load_mqd; 40759f650a0SOak Zeng mqd->update_mqd = update_mqd_hiq; 40859f650a0SOak Zeng mqd->destroy_mqd = destroy_mqd; 40959f650a0SOak Zeng mqd->is_occupied = is_occupied; 4106c6cde55SOak Zeng mqd->mqd_size = sizeof(struct cik_mqd); 41159f650a0SOak Zeng #if defined(CONFIG_DEBUG_FS) 41259f650a0SOak Zeng mqd->debugfs_show_mqd = debugfs_show_mqd; 41359f650a0SOak Zeng #endif 41459f650a0SOak Zeng break; 4154b8f589bSBen Goz case KFD_MQD_TYPE_SDMA: 4168636e53cSOak Zeng mqd->allocate_mqd = allocate_sdma_mqd; 4174b8f589bSBen Goz mqd->init_mqd = init_mqd_sdma; 4188636e53cSOak Zeng mqd->free_mqd = free_mqd_hiq_sdma; 4194b8f589bSBen Goz mqd->load_mqd = load_mqd_sdma; 4204b8f589bSBen Goz mqd->update_mqd = update_mqd_sdma; 4214b8f589bSBen Goz mqd->destroy_mqd = destroy_mqd_sdma; 4224b8f589bSBen Goz mqd->is_occupied = is_occupied_sdma; 4236c6cde55SOak Zeng mqd->mqd_size = sizeof(struct cik_sdma_rlc_registers); 424851a645eSFelix Kuehling #if defined(CONFIG_DEBUG_FS) 425851a645eSFelix Kuehling mqd->debugfs_show_mqd = debugfs_show_mqd_sdma; 426851a645eSFelix Kuehling #endif 4274b8f589bSBen Goz break; 4284b8f589bSBen Goz default: 4294b8f589bSBen Goz kfree(mqd); 4304b8f589bSBen Goz return NULL; 4314b8f589bSBen Goz } 4324b8f589bSBen Goz 4334b8f589bSBen Goz return mqd; 4344b8f589bSBen Goz } 4354b8f589bSBen Goz 436ee04955aSFelix Kuehling struct mqd_manager *mqd_manager_init_cik_hawaii(enum KFD_MQD_TYPE type, 437ee04955aSFelix Kuehling struct kfd_dev *dev) 438ee04955aSFelix Kuehling { 439ee04955aSFelix Kuehling struct mqd_manager *mqd; 440ee04955aSFelix Kuehling 441ee04955aSFelix Kuehling mqd = mqd_manager_init_cik(type, dev); 442ee04955aSFelix Kuehling if (!mqd) 443ee04955aSFelix Kuehling return NULL; 444d7c0b047SYong Zhao if (type == KFD_MQD_TYPE_CP) 445ee04955aSFelix Kuehling mqd->update_mqd = update_mqd_hawaii; 446ee04955aSFelix Kuehling return mqd; 447ee04955aSFelix Kuehling } 448