14b8f589bSBen Goz /*
24b8f589bSBen Goz  * Copyright 2014 Advanced Micro Devices, Inc.
34b8f589bSBen Goz  *
44b8f589bSBen Goz  * Permission is hereby granted, free of charge, to any person obtaining a
54b8f589bSBen Goz  * copy of this software and associated documentation files (the "Software"),
64b8f589bSBen Goz  * to deal in the Software without restriction, including without limitation
74b8f589bSBen Goz  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
84b8f589bSBen Goz  * and/or sell copies of the Software, and to permit persons to whom the
94b8f589bSBen Goz  * Software is furnished to do so, subject to the following conditions:
104b8f589bSBen Goz  *
114b8f589bSBen Goz  * The above copyright notice and this permission notice shall be included in
124b8f589bSBen Goz  * all copies or substantial portions of the Software.
134b8f589bSBen Goz  *
144b8f589bSBen Goz  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
154b8f589bSBen Goz  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
164b8f589bSBen Goz  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
174b8f589bSBen Goz  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
184b8f589bSBen Goz  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
194b8f589bSBen Goz  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
204b8f589bSBen Goz  * OTHER DEALINGS IN THE SOFTWARE.
214b8f589bSBen Goz  *
224b8f589bSBen Goz  */
234b8f589bSBen Goz 
244b8f589bSBen Goz #include <linux/printk.h>
254b8f589bSBen Goz #include <linux/slab.h>
264b8f589bSBen Goz #include "kfd_priv.h"
274b8f589bSBen Goz #include "kfd_mqd_manager.h"
284b8f589bSBen Goz #include "cik_regs.h"
294b8f589bSBen Goz #include "cik_structs.h"
304b8f589bSBen Goz 
314b8f589bSBen Goz static inline struct cik_mqd *get_mqd(void *mqd)
324b8f589bSBen Goz {
334b8f589bSBen Goz 	return (struct cik_mqd *)mqd;
344b8f589bSBen Goz }
354b8f589bSBen Goz 
364b8f589bSBen Goz static int init_mqd(struct mqd_manager *mm, void **mqd,
374b8f589bSBen Goz 		struct kfd_mem_obj **mqd_mem_obj, uint64_t *gart_addr,
384b8f589bSBen Goz 		struct queue_properties *q)
394b8f589bSBen Goz {
404b8f589bSBen Goz 	uint64_t addr;
414b8f589bSBen Goz 	struct cik_mqd *m;
424b8f589bSBen Goz 	int retval;
434b8f589bSBen Goz 
444b8f589bSBen Goz 	BUG_ON(!mm || !q || !mqd);
454b8f589bSBen Goz 
464b8f589bSBen Goz 	pr_debug("kfd: In func %s\n", __func__);
474b8f589bSBen Goz 
484b8f589bSBen Goz 	retval = kfd_gtt_sa_allocate(mm->dev, sizeof(struct cik_mqd),
494b8f589bSBen Goz 					mqd_mem_obj);
504b8f589bSBen Goz 
514b8f589bSBen Goz 	if (retval != 0)
524b8f589bSBen Goz 		return -ENOMEM;
534b8f589bSBen Goz 
544b8f589bSBen Goz 	m = (struct cik_mqd *) (*mqd_mem_obj)->cpu_ptr;
554b8f589bSBen Goz 	addr = (*mqd_mem_obj)->gpu_addr;
564b8f589bSBen Goz 
574b8f589bSBen Goz 	memset(m, 0, ALIGN(sizeof(struct cik_mqd), 256));
584b8f589bSBen Goz 
594b8f589bSBen Goz 	m->header = 0xC0310800;
604b8f589bSBen Goz 	m->compute_pipelinestat_enable = 1;
614b8f589bSBen Goz 	m->compute_static_thread_mgmt_se0 = 0xFFFFFFFF;
624b8f589bSBen Goz 	m->compute_static_thread_mgmt_se1 = 0xFFFFFFFF;
634b8f589bSBen Goz 	m->compute_static_thread_mgmt_se2 = 0xFFFFFFFF;
644b8f589bSBen Goz 	m->compute_static_thread_mgmt_se3 = 0xFFFFFFFF;
654b8f589bSBen Goz 
664b8f589bSBen Goz 	/*
674b8f589bSBen Goz 	 * Make sure to use the last queue state saved on mqd when the cp
684b8f589bSBen Goz 	 * reassigns the queue, so when queue is switched on/off (e.g over
694b8f589bSBen Goz 	 * subscription or quantum timeout) the context will be consistent
704b8f589bSBen Goz 	 */
714b8f589bSBen Goz 	m->cp_hqd_persistent_state =
724b8f589bSBen Goz 				DEFAULT_CP_HQD_PERSISTENT_STATE | PRELOAD_REQ;
734b8f589bSBen Goz 
744b8f589bSBen Goz 	m->cp_mqd_control             = MQD_CONTROL_PRIV_STATE_EN;
754b8f589bSBen Goz 	m->cp_mqd_base_addr_lo        = lower_32_bits(addr);
764b8f589bSBen Goz 	m->cp_mqd_base_addr_hi        = upper_32_bits(addr);
774b8f589bSBen Goz 
784b8f589bSBen Goz 	m->cp_hqd_ib_control = DEFAULT_MIN_IB_AVAIL_SIZE | IB_ATC_EN;
794b8f589bSBen Goz 	/* Although WinKFD writes this, I suspect it should not be necessary */
804b8f589bSBen Goz 	m->cp_hqd_ib_control = IB_ATC_EN | DEFAULT_MIN_IB_AVAIL_SIZE;
814b8f589bSBen Goz 
824b8f589bSBen Goz 	m->cp_hqd_quantum = QUANTUM_EN | QUANTUM_SCALE_1MS |
834b8f589bSBen Goz 				QUANTUM_DURATION(10);
844b8f589bSBen Goz 
854b8f589bSBen Goz 	/*
864b8f589bSBen Goz 	 * Pipe Priority
874b8f589bSBen Goz 	 * Identifies the pipe relative priority when this queue is connected
884b8f589bSBen Goz 	 * to the pipeline. The pipe priority is against the GFX pipe and HP3D.
894b8f589bSBen Goz 	 * In KFD we are using a fixed pipe priority set to CS_MEDIUM.
904b8f589bSBen Goz 	 * 0 = CS_LOW (typically below GFX)
914b8f589bSBen Goz 	 * 1 = CS_MEDIUM (typically between HP3D and GFX
924b8f589bSBen Goz 	 * 2 = CS_HIGH (typically above HP3D)
934b8f589bSBen Goz 	 */
944b8f589bSBen Goz 	m->cp_hqd_pipe_priority = 1;
954b8f589bSBen Goz 	m->cp_hqd_queue_priority = 15;
964b8f589bSBen Goz 
97d752f95eSJay Cornwall 	if (q->format == KFD_QUEUE_FORMAT_AQL)
98d752f95eSJay Cornwall 		m->cp_hqd_iq_rptr = AQL_ENABLE;
99d752f95eSJay Cornwall 
1004b8f589bSBen Goz 	*mqd = m;
1014b8f589bSBen Goz 	if (gart_addr != NULL)
1024b8f589bSBen Goz 		*gart_addr = addr;
1034b8f589bSBen Goz 	retval = mm->update_mqd(mm, m, q);
1044b8f589bSBen Goz 
1054b8f589bSBen Goz 	return retval;
1064b8f589bSBen Goz }
1074b8f589bSBen Goz 
1084b8f589bSBen Goz static int init_mqd_sdma(struct mqd_manager *mm, void **mqd,
1094b8f589bSBen Goz 			struct kfd_mem_obj **mqd_mem_obj, uint64_t *gart_addr,
1104b8f589bSBen Goz 			struct queue_properties *q)
1114b8f589bSBen Goz {
1124b8f589bSBen Goz 	int retval;
1134b8f589bSBen Goz 	struct cik_sdma_rlc_registers *m;
1144b8f589bSBen Goz 
1154b8f589bSBen Goz 	BUG_ON(!mm || !mqd || !mqd_mem_obj);
1164b8f589bSBen Goz 
1174b8f589bSBen Goz 	retval = kfd_gtt_sa_allocate(mm->dev,
1184b8f589bSBen Goz 					sizeof(struct cik_sdma_rlc_registers),
1194b8f589bSBen Goz 					mqd_mem_obj);
1204b8f589bSBen Goz 
1214b8f589bSBen Goz 	if (retval != 0)
1224b8f589bSBen Goz 		return -ENOMEM;
1234b8f589bSBen Goz 
1244b8f589bSBen Goz 	m = (struct cik_sdma_rlc_registers *) (*mqd_mem_obj)->cpu_ptr;
1254b8f589bSBen Goz 
1264b8f589bSBen Goz 	memset(m, 0, sizeof(struct cik_sdma_rlc_registers));
1274b8f589bSBen Goz 
1284b8f589bSBen Goz 	*mqd = m;
1294b8f589bSBen Goz 	if (gart_addr != NULL)
1304b8f589bSBen Goz 		*gart_addr = (*mqd_mem_obj)->gpu_addr;
1314b8f589bSBen Goz 
1324b8f589bSBen Goz 	retval = mm->update_mqd(mm, m, q);
1334b8f589bSBen Goz 
1344b8f589bSBen Goz 	return retval;
1354b8f589bSBen Goz }
1364b8f589bSBen Goz 
1374b8f589bSBen Goz static void uninit_mqd(struct mqd_manager *mm, void *mqd,
1384b8f589bSBen Goz 			struct kfd_mem_obj *mqd_mem_obj)
1394b8f589bSBen Goz {
1404b8f589bSBen Goz 	BUG_ON(!mm || !mqd);
1414b8f589bSBen Goz 	kfd_gtt_sa_free(mm->dev, mqd_mem_obj);
1424b8f589bSBen Goz }
1434b8f589bSBen Goz 
1444b8f589bSBen Goz static void uninit_mqd_sdma(struct mqd_manager *mm, void *mqd,
1454b8f589bSBen Goz 				struct kfd_mem_obj *mqd_mem_obj)
1464b8f589bSBen Goz {
1474b8f589bSBen Goz 	BUG_ON(!mm || !mqd);
1484b8f589bSBen Goz 	kfd_gtt_sa_free(mm->dev, mqd_mem_obj);
1494b8f589bSBen Goz }
1504b8f589bSBen Goz 
1514b8f589bSBen Goz static int load_mqd(struct mqd_manager *mm, void *mqd, uint32_t pipe_id,
1524b8f589bSBen Goz 			uint32_t queue_id, uint32_t __user *wptr)
1534b8f589bSBen Goz {
1544b8f589bSBen Goz 	return kfd2kgd->hqd_load(mm->dev->kgd, mqd, pipe_id, queue_id, wptr);
1554b8f589bSBen Goz }
1564b8f589bSBen Goz 
1574b8f589bSBen Goz static int load_mqd_sdma(struct mqd_manager *mm, void *mqd,
1584b8f589bSBen Goz 			uint32_t pipe_id, uint32_t queue_id,
1594b8f589bSBen Goz 			uint32_t __user *wptr)
1604b8f589bSBen Goz {
1614b8f589bSBen Goz 	return kfd2kgd->hqd_sdma_load(mm->dev->kgd, mqd);
1624b8f589bSBen Goz }
1634b8f589bSBen Goz 
1644b8f589bSBen Goz static int update_mqd(struct mqd_manager *mm, void *mqd,
1654b8f589bSBen Goz 			struct queue_properties *q)
1664b8f589bSBen Goz {
1674b8f589bSBen Goz 	struct cik_mqd *m;
1684b8f589bSBen Goz 
1694b8f589bSBen Goz 	BUG_ON(!mm || !q || !mqd);
1704b8f589bSBen Goz 
1714b8f589bSBen Goz 	pr_debug("kfd: In func %s\n", __func__);
1724b8f589bSBen Goz 
1734b8f589bSBen Goz 	m = get_mqd(mqd);
1744b8f589bSBen Goz 	m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE |
1754b8f589bSBen Goz 				DEFAULT_MIN_AVAIL_SIZE | PQ_ATC_EN;
1764b8f589bSBen Goz 
1774b8f589bSBen Goz 	/*
1784b8f589bSBen Goz 	 * Calculating queue size which is log base 2 of actual queue size -1
1794b8f589bSBen Goz 	 * dwords and another -1 for ffs
1804b8f589bSBen Goz 	 */
1814b8f589bSBen Goz 	m->cp_hqd_pq_control |= ffs(q->queue_size / sizeof(unsigned int))
1824b8f589bSBen Goz 								- 1 - 1;
1834b8f589bSBen Goz 	m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8);
1844b8f589bSBen Goz 	m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8);
1854b8f589bSBen Goz 	m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr);
1864b8f589bSBen Goz 	m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr);
1874b8f589bSBen Goz 	m->cp_hqd_pq_doorbell_control = DOORBELL_EN |
1884b8f589bSBen Goz 					DOORBELL_OFFSET(q->doorbell_off);
1894b8f589bSBen Goz 
1904b8f589bSBen Goz 	m->cp_hqd_vmid = q->vmid;
1914b8f589bSBen Goz 
1924b8f589bSBen Goz 	if (q->format == KFD_QUEUE_FORMAT_AQL) {
1934b8f589bSBen Goz 		m->cp_hqd_pq_control |= NO_UPDATE_RPTR;
1944b8f589bSBen Goz 	}
1954b8f589bSBen Goz 
1964b8f589bSBen Goz 	m->cp_hqd_active = 0;
1974b8f589bSBen Goz 	q->is_active = false;
1984b8f589bSBen Goz 	if (q->queue_size > 0 &&
1994b8f589bSBen Goz 			q->queue_address != 0 &&
2004b8f589bSBen Goz 			q->queue_percent > 0) {
2014b8f589bSBen Goz 		m->cp_hqd_active = 1;
2024b8f589bSBen Goz 		q->is_active = true;
2034b8f589bSBen Goz 	}
2044b8f589bSBen Goz 
2054b8f589bSBen Goz 	return 0;
2064b8f589bSBen Goz }
2074b8f589bSBen Goz 
2084b8f589bSBen Goz static int update_mqd_sdma(struct mqd_manager *mm, void *mqd,
2094b8f589bSBen Goz 				struct queue_properties *q)
2104b8f589bSBen Goz {
2114b8f589bSBen Goz 	struct cik_sdma_rlc_registers *m;
2124b8f589bSBen Goz 
2134b8f589bSBen Goz 	BUG_ON(!mm || !mqd || !q);
2144b8f589bSBen Goz 
2154b8f589bSBen Goz 	m = get_sdma_mqd(mqd);
2164b8f589bSBen Goz 	m->sdma_rlc_rb_cntl =
2174b8f589bSBen Goz 		SDMA_RB_SIZE((ffs(q->queue_size / sizeof(unsigned int)))) |
2184b8f589bSBen Goz 		SDMA_RB_VMID(q->vmid) |
2194b8f589bSBen Goz 		SDMA_RPTR_WRITEBACK_ENABLE |
2204b8f589bSBen Goz 		SDMA_RPTR_WRITEBACK_TIMER(6);
2214b8f589bSBen Goz 
2224b8f589bSBen Goz 	m->sdma_rlc_rb_base = lower_32_bits(q->queue_address >> 8);
2234b8f589bSBen Goz 	m->sdma_rlc_rb_base_hi = upper_32_bits(q->queue_address >> 8);
2244b8f589bSBen Goz 	m->sdma_rlc_rb_rptr_addr_lo = lower_32_bits((uint64_t)q->read_ptr);
2254b8f589bSBen Goz 	m->sdma_rlc_rb_rptr_addr_hi = upper_32_bits((uint64_t)q->read_ptr);
2264b8f589bSBen Goz 	m->sdma_rlc_doorbell = SDMA_OFFSET(q->doorbell_off) | SDMA_DB_ENABLE;
2274b8f589bSBen Goz 	m->sdma_rlc_virtual_addr = q->sdma_vm_addr;
2284b8f589bSBen Goz 
2294b8f589bSBen Goz 	m->sdma_engine_id = q->sdma_engine_id;
2304b8f589bSBen Goz 	m->sdma_queue_id = q->sdma_queue_id;
2314b8f589bSBen Goz 
2324b8f589bSBen Goz 	q->is_active = false;
2334b8f589bSBen Goz 	if (q->queue_size > 0 &&
2344b8f589bSBen Goz 			q->queue_address != 0 &&
2354b8f589bSBen Goz 			q->queue_percent > 0) {
2364b8f589bSBen Goz 		m->sdma_rlc_rb_cntl |= SDMA_RB_ENABLE;
2374b8f589bSBen Goz 		q->is_active = true;
2384b8f589bSBen Goz 	}
2394b8f589bSBen Goz 
2404b8f589bSBen Goz 	return 0;
2414b8f589bSBen Goz }
2424b8f589bSBen Goz 
2434b8f589bSBen Goz static int destroy_mqd(struct mqd_manager *mm, void *mqd,
2444b8f589bSBen Goz 			enum kfd_preempt_type type,
2454b8f589bSBen Goz 			unsigned int timeout, uint32_t pipe_id,
2464b8f589bSBen Goz 			uint32_t queue_id)
2474b8f589bSBen Goz {
2484b8f589bSBen Goz 	return kfd2kgd->hqd_destroy(mm->dev->kgd, type, timeout,
2494b8f589bSBen Goz 					pipe_id, queue_id);
2504b8f589bSBen Goz }
2514b8f589bSBen Goz 
2524b8f589bSBen Goz /*
2534b8f589bSBen Goz  * preempt type here is ignored because there is only one way
2544b8f589bSBen Goz  * to preempt sdma queue
2554b8f589bSBen Goz  */
2564b8f589bSBen Goz static int destroy_mqd_sdma(struct mqd_manager *mm, void *mqd,
2574b8f589bSBen Goz 				enum kfd_preempt_type type,
2584b8f589bSBen Goz 				unsigned int timeout, uint32_t pipe_id,
2594b8f589bSBen Goz 				uint32_t queue_id)
2604b8f589bSBen Goz {
2614b8f589bSBen Goz 	return kfd2kgd->hqd_sdma_destroy(mm->dev->kgd, mqd, timeout);
2624b8f589bSBen Goz }
2634b8f589bSBen Goz 
2644b8f589bSBen Goz static bool is_occupied(struct mqd_manager *mm, void *mqd,
2654b8f589bSBen Goz 			uint64_t queue_address,	uint32_t pipe_id,
2664b8f589bSBen Goz 			uint32_t queue_id)
2674b8f589bSBen Goz {
2684b8f589bSBen Goz 
269281d1bbdSDave Airlie 	return kfd2kgd->hqd_is_occupied(mm->dev->kgd, queue_address,
2704b8f589bSBen Goz 					pipe_id, queue_id);
2714b8f589bSBen Goz 
2724b8f589bSBen Goz }
2734b8f589bSBen Goz 
2744b8f589bSBen Goz static bool is_occupied_sdma(struct mqd_manager *mm, void *mqd,
2754b8f589bSBen Goz 			uint64_t queue_address,	uint32_t pipe_id,
2764b8f589bSBen Goz 			uint32_t queue_id)
2774b8f589bSBen Goz {
2784b8f589bSBen Goz 	return kfd2kgd->hqd_sdma_is_occupied(mm->dev->kgd, mqd);
2794b8f589bSBen Goz }
2804b8f589bSBen Goz 
2814b8f589bSBen Goz /*
2824b8f589bSBen Goz  * HIQ MQD Implementation, concrete implementation for HIQ MQD implementation.
2834b8f589bSBen Goz  * The HIQ queue in Kaveri is using the same MQD structure as all the user mode
2844b8f589bSBen Goz  * queues but with different initial values.
2854b8f589bSBen Goz  */
2864b8f589bSBen Goz 
2874b8f589bSBen Goz static int init_mqd_hiq(struct mqd_manager *mm, void **mqd,
2884b8f589bSBen Goz 		struct kfd_mem_obj **mqd_mem_obj, uint64_t *gart_addr,
2894b8f589bSBen Goz 		struct queue_properties *q)
2904b8f589bSBen Goz {
2914b8f589bSBen Goz 	uint64_t addr;
2924b8f589bSBen Goz 	struct cik_mqd *m;
2934b8f589bSBen Goz 	int retval;
2944b8f589bSBen Goz 
2954b8f589bSBen Goz 	BUG_ON(!mm || !q || !mqd || !mqd_mem_obj);
2964b8f589bSBen Goz 
2974b8f589bSBen Goz 	pr_debug("kfd: In func %s\n", __func__);
2984b8f589bSBen Goz 
2994b8f589bSBen Goz 	retval = kfd_gtt_sa_allocate(mm->dev, sizeof(struct cik_mqd),
3004b8f589bSBen Goz 					mqd_mem_obj);
3014b8f589bSBen Goz 
3024b8f589bSBen Goz 	if (retval != 0)
3034b8f589bSBen Goz 		return -ENOMEM;
3044b8f589bSBen Goz 
3054b8f589bSBen Goz 	m = (struct cik_mqd *) (*mqd_mem_obj)->cpu_ptr;
3064b8f589bSBen Goz 	addr = (*mqd_mem_obj)->gpu_addr;
3074b8f589bSBen Goz 
3084b8f589bSBen Goz 	memset(m, 0, ALIGN(sizeof(struct cik_mqd), 256));
3094b8f589bSBen Goz 
3104b8f589bSBen Goz 	m->header = 0xC0310800;
3114b8f589bSBen Goz 	m->compute_pipelinestat_enable = 1;
3124b8f589bSBen Goz 	m->compute_static_thread_mgmt_se0 = 0xFFFFFFFF;
3134b8f589bSBen Goz 	m->compute_static_thread_mgmt_se1 = 0xFFFFFFFF;
3144b8f589bSBen Goz 	m->compute_static_thread_mgmt_se2 = 0xFFFFFFFF;
3154b8f589bSBen Goz 	m->compute_static_thread_mgmt_se3 = 0xFFFFFFFF;
3164b8f589bSBen Goz 
3174b8f589bSBen Goz 	m->cp_hqd_persistent_state = DEFAULT_CP_HQD_PERSISTENT_STATE |
3184b8f589bSBen Goz 					PRELOAD_REQ;
3194b8f589bSBen Goz 	m->cp_hqd_quantum = QUANTUM_EN | QUANTUM_SCALE_1MS |
3204b8f589bSBen Goz 				QUANTUM_DURATION(10);
3214b8f589bSBen Goz 
3224b8f589bSBen Goz 	m->cp_mqd_control             = MQD_CONTROL_PRIV_STATE_EN;
3234b8f589bSBen Goz 	m->cp_mqd_base_addr_lo        = lower_32_bits(addr);
3244b8f589bSBen Goz 	m->cp_mqd_base_addr_hi        = upper_32_bits(addr);
3254b8f589bSBen Goz 
3264b8f589bSBen Goz 	m->cp_hqd_ib_control = DEFAULT_MIN_IB_AVAIL_SIZE;
3274b8f589bSBen Goz 
3284b8f589bSBen Goz 	/*
3294b8f589bSBen Goz 	 * Pipe Priority
3304b8f589bSBen Goz 	 * Identifies the pipe relative priority when this queue is connected
3314b8f589bSBen Goz 	 * to the pipeline. The pipe priority is against the GFX pipe and HP3D.
3324b8f589bSBen Goz 	 * In KFD we are using a fixed pipe priority set to CS_MEDIUM.
3334b8f589bSBen Goz 	 * 0 = CS_LOW (typically below GFX)
3344b8f589bSBen Goz 	 * 1 = CS_MEDIUM (typically between HP3D and GFX
3354b8f589bSBen Goz 	 * 2 = CS_HIGH (typically above HP3D)
3364b8f589bSBen Goz 	 */
3374b8f589bSBen Goz 	m->cp_hqd_pipe_priority = 1;
3384b8f589bSBen Goz 	m->cp_hqd_queue_priority = 15;
3394b8f589bSBen Goz 
3404b8f589bSBen Goz 	*mqd = m;
3414b8f589bSBen Goz 	if (gart_addr)
3424b8f589bSBen Goz 		*gart_addr = addr;
3434b8f589bSBen Goz 	retval = mm->update_mqd(mm, m, q);
3444b8f589bSBen Goz 
3454b8f589bSBen Goz 	return retval;
3464b8f589bSBen Goz }
3474b8f589bSBen Goz 
3484b8f589bSBen Goz static int update_mqd_hiq(struct mqd_manager *mm, void *mqd,
3494b8f589bSBen Goz 				struct queue_properties *q)
3504b8f589bSBen Goz {
3514b8f589bSBen Goz 	struct cik_mqd *m;
3524b8f589bSBen Goz 
3534b8f589bSBen Goz 	BUG_ON(!mm || !q || !mqd);
3544b8f589bSBen Goz 
3554b8f589bSBen Goz 	pr_debug("kfd: In func %s\n", __func__);
3564b8f589bSBen Goz 
3574b8f589bSBen Goz 	m = get_mqd(mqd);
3584b8f589bSBen Goz 	m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE |
3594b8f589bSBen Goz 				DEFAULT_MIN_AVAIL_SIZE |
3604b8f589bSBen Goz 				PRIV_STATE |
3614b8f589bSBen Goz 				KMD_QUEUE;
3624b8f589bSBen Goz 
3634b8f589bSBen Goz 	/*
3644b8f589bSBen Goz 	 * Calculating queue size which is log base 2 of actual queue
3654b8f589bSBen Goz 	 * size -1 dwords
3664b8f589bSBen Goz 	 */
3674b8f589bSBen Goz 	m->cp_hqd_pq_control |= ffs(q->queue_size / sizeof(unsigned int))
3684b8f589bSBen Goz 								- 1 - 1;
3694b8f589bSBen Goz 	m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8);
3704b8f589bSBen Goz 	m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8);
3714b8f589bSBen Goz 	m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr);
3724b8f589bSBen Goz 	m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr);
3734b8f589bSBen Goz 	m->cp_hqd_pq_doorbell_control = DOORBELL_EN |
3744b8f589bSBen Goz 					DOORBELL_OFFSET(q->doorbell_off);
3754b8f589bSBen Goz 
3764b8f589bSBen Goz 	m->cp_hqd_vmid = q->vmid;
3774b8f589bSBen Goz 
3784b8f589bSBen Goz 	m->cp_hqd_active = 0;
3794b8f589bSBen Goz 	q->is_active = false;
3804b8f589bSBen Goz 	if (q->queue_size > 0 &&
3814b8f589bSBen Goz 			q->queue_address != 0 &&
3824b8f589bSBen Goz 			q->queue_percent > 0) {
3834b8f589bSBen Goz 		m->cp_hqd_active = 1;
3844b8f589bSBen Goz 		q->is_active = true;
3854b8f589bSBen Goz 	}
3864b8f589bSBen Goz 
3874b8f589bSBen Goz 	return 0;
3884b8f589bSBen Goz }
3894b8f589bSBen Goz 
3904b8f589bSBen Goz struct cik_sdma_rlc_registers *get_sdma_mqd(void *mqd)
3914b8f589bSBen Goz {
3924b8f589bSBen Goz 	struct cik_sdma_rlc_registers *m;
3934b8f589bSBen Goz 
3944b8f589bSBen Goz 	BUG_ON(!mqd);
3954b8f589bSBen Goz 
3964b8f589bSBen Goz 	m = (struct cik_sdma_rlc_registers *)mqd;
3974b8f589bSBen Goz 
3984b8f589bSBen Goz 	return m;
3994b8f589bSBen Goz }
4004b8f589bSBen Goz 
4014b8f589bSBen Goz struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type,
4024b8f589bSBen Goz 		struct kfd_dev *dev)
4034b8f589bSBen Goz {
4044b8f589bSBen Goz 	struct mqd_manager *mqd;
4054b8f589bSBen Goz 
4064b8f589bSBen Goz 	BUG_ON(!dev);
4074b8f589bSBen Goz 	BUG_ON(type >= KFD_MQD_TYPE_MAX);
4084b8f589bSBen Goz 
4094b8f589bSBen Goz 	pr_debug("kfd: In func %s\n", __func__);
4104b8f589bSBen Goz 
4114b8f589bSBen Goz 	mqd = kzalloc(sizeof(struct mqd_manager), GFP_KERNEL);
4124b8f589bSBen Goz 	if (!mqd)
4134b8f589bSBen Goz 		return NULL;
4144b8f589bSBen Goz 
4154b8f589bSBen Goz 	mqd->dev = dev;
4164b8f589bSBen Goz 
4174b8f589bSBen Goz 	switch (type) {
4184b8f589bSBen Goz 	case KFD_MQD_TYPE_CP:
4194b8f589bSBen Goz 	case KFD_MQD_TYPE_COMPUTE:
4204b8f589bSBen Goz 		mqd->init_mqd = init_mqd;
4214b8f589bSBen Goz 		mqd->uninit_mqd = uninit_mqd;
4224b8f589bSBen Goz 		mqd->load_mqd = load_mqd;
4234b8f589bSBen Goz 		mqd->update_mqd = update_mqd;
4244b8f589bSBen Goz 		mqd->destroy_mqd = destroy_mqd;
4254b8f589bSBen Goz 		mqd->is_occupied = is_occupied;
4264b8f589bSBen Goz 		break;
4274b8f589bSBen Goz 	case KFD_MQD_TYPE_HIQ:
4284b8f589bSBen Goz 		mqd->init_mqd = init_mqd_hiq;
4294b8f589bSBen Goz 		mqd->uninit_mqd = uninit_mqd;
4304b8f589bSBen Goz 		mqd->load_mqd = load_mqd;
4314b8f589bSBen Goz 		mqd->update_mqd = update_mqd_hiq;
4324b8f589bSBen Goz 		mqd->destroy_mqd = destroy_mqd;
4334b8f589bSBen Goz 		mqd->is_occupied = is_occupied;
4344b8f589bSBen Goz 		break;
4354b8f589bSBen Goz 	case KFD_MQD_TYPE_SDMA:
4364b8f589bSBen Goz 		mqd->init_mqd = init_mqd_sdma;
4374b8f589bSBen Goz 		mqd->uninit_mqd = uninit_mqd_sdma;
4384b8f589bSBen Goz 		mqd->load_mqd = load_mqd_sdma;
4394b8f589bSBen Goz 		mqd->update_mqd = update_mqd_sdma;
4404b8f589bSBen Goz 		mqd->destroy_mqd = destroy_mqd_sdma;
4414b8f589bSBen Goz 		mqd->is_occupied = is_occupied_sdma;
4424b8f589bSBen Goz 		break;
4434b8f589bSBen Goz 	default:
4444b8f589bSBen Goz 		kfree(mqd);
4454b8f589bSBen Goz 		return NULL;
4464b8f589bSBen Goz 	}
4474b8f589bSBen Goz 
4484b8f589bSBen Goz 	return mqd;
4494b8f589bSBen Goz }
4504b8f589bSBen Goz 
451