1d87f36a0SRajneesh Bhardwaj // SPDX-License-Identifier: GPL-2.0 OR MIT 24b8f589bSBen Goz /* 3d87f36a0SRajneesh Bhardwaj * Copyright 2014-2022 Advanced Micro Devices, Inc. 44b8f589bSBen Goz * 54b8f589bSBen Goz * Permission is hereby granted, free of charge, to any person obtaining a 64b8f589bSBen Goz * copy of this software and associated documentation files (the "Software"), 74b8f589bSBen Goz * to deal in the Software without restriction, including without limitation 84b8f589bSBen Goz * the rights to use, copy, modify, merge, publish, distribute, sublicense, 94b8f589bSBen Goz * and/or sell copies of the Software, and to permit persons to whom the 104b8f589bSBen Goz * Software is furnished to do so, subject to the following conditions: 114b8f589bSBen Goz * 124b8f589bSBen Goz * The above copyright notice and this permission notice shall be included in 134b8f589bSBen Goz * all copies or substantial portions of the Software. 144b8f589bSBen Goz * 154b8f589bSBen Goz * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 164b8f589bSBen Goz * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 174b8f589bSBen Goz * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 184b8f589bSBen Goz * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 194b8f589bSBen Goz * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 204b8f589bSBen Goz * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 214b8f589bSBen Goz * OTHER DEALINGS IN THE SOFTWARE. 224b8f589bSBen Goz * 234b8f589bSBen Goz */ 244b8f589bSBen Goz 254b8f589bSBen Goz #include <linux/printk.h> 264b8f589bSBen Goz #include <linux/slab.h> 27589ee628SIngo Molnar #include <linux/mm_types.h> 28589ee628SIngo Molnar 294b8f589bSBen Goz #include "kfd_priv.h" 304b8f589bSBen Goz #include "kfd_mqd_manager.h" 314b8f589bSBen Goz #include "cik_regs.h" 324b8f589bSBen Goz #include "cik_structs.h" 333d30b28bSOded Gabbay #include "oss/oss_2_4_sh_mask.h" 344b8f589bSBen Goz 354b8f589bSBen Goz static inline struct cik_mqd *get_mqd(void *mqd) 364b8f589bSBen Goz { 374b8f589bSBen Goz return (struct cik_mqd *)mqd; 384b8f589bSBen Goz } 394b8f589bSBen Goz 4097b9ad12SFelix Kuehling static inline struct cik_sdma_rlc_registers *get_sdma_mqd(void *mqd) 4197b9ad12SFelix Kuehling { 4297b9ad12SFelix Kuehling return (struct cik_sdma_rlc_registers *)mqd; 4397b9ad12SFelix Kuehling } 4497b9ad12SFelix Kuehling 4539e7f331SFelix Kuehling static void update_cu_mask(struct mqd_manager *mm, void *mqd, 467c695a2cSLang Yu struct mqd_update_info *minfo) 4739e7f331SFelix Kuehling { 4839e7f331SFelix Kuehling struct cik_mqd *m; 4939e7f331SFelix Kuehling uint32_t se_mask[4] = {0}; /* 4 is the max # of SEs */ 5039e7f331SFelix Kuehling 517c695a2cSLang Yu if (!minfo || (minfo->update_flag != UPDATE_FLAG_CU_MASK) || 527c695a2cSLang Yu !minfo->cu_mask.ptr) 5339e7f331SFelix Kuehling return; 5439e7f331SFelix Kuehling 5539e7f331SFelix Kuehling mqd_symmetrically_map_cu_mask(mm, 567c695a2cSLang Yu minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask); 5739e7f331SFelix Kuehling 5839e7f331SFelix Kuehling m = get_mqd(mqd); 5939e7f331SFelix Kuehling m->compute_static_thread_mgmt_se0 = se_mask[0]; 6039e7f331SFelix Kuehling m->compute_static_thread_mgmt_se1 = se_mask[1]; 6139e7f331SFelix Kuehling m->compute_static_thread_mgmt_se2 = se_mask[2]; 6239e7f331SFelix Kuehling m->compute_static_thread_mgmt_se3 = se_mask[3]; 6339e7f331SFelix Kuehling 6439e7f331SFelix Kuehling pr_debug("Update cu mask to %#x %#x %#x %#x\n", 6539e7f331SFelix Kuehling m->compute_static_thread_mgmt_se0, 6639e7f331SFelix Kuehling m->compute_static_thread_mgmt_se1, 6739e7f331SFelix Kuehling m->compute_static_thread_mgmt_se2, 6839e7f331SFelix Kuehling m->compute_static_thread_mgmt_se3); 6939e7f331SFelix Kuehling } 7039e7f331SFelix Kuehling 710ccbc7cdSOak Zeng static void set_priority(struct cik_mqd *m, struct queue_properties *q) 720ccbc7cdSOak Zeng { 730ccbc7cdSOak Zeng m->cp_hqd_pipe_priority = pipe_priority_map[q->priority]; 740ccbc7cdSOak Zeng m->cp_hqd_queue_priority = q->priority; 750ccbc7cdSOak Zeng } 760ccbc7cdSOak Zeng 778dc1db31SMukul Joshi static struct kfd_mem_obj *allocate_mqd(struct kfd_node *kfd, 78d1f8f0d1SOak Zeng struct queue_properties *q) 79d1f8f0d1SOak Zeng { 80d1f8f0d1SOak Zeng struct kfd_mem_obj *mqd_mem_obj; 81d1f8f0d1SOak Zeng 82d1f8f0d1SOak Zeng if (kfd_gtt_sa_allocate(kfd, sizeof(struct cik_mqd), 83d1f8f0d1SOak Zeng &mqd_mem_obj)) 84d1f8f0d1SOak Zeng return NULL; 85d1f8f0d1SOak Zeng 86d1f8f0d1SOak Zeng return mqd_mem_obj; 87d1f8f0d1SOak Zeng } 88d1f8f0d1SOak Zeng 898636e53cSOak Zeng static void init_mqd(struct mqd_manager *mm, void **mqd, 908636e53cSOak Zeng struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr, 914b8f589bSBen Goz struct queue_properties *q) 924b8f589bSBen Goz { 934b8f589bSBen Goz uint64_t addr; 944b8f589bSBen Goz struct cik_mqd *m; 954b8f589bSBen Goz 968636e53cSOak Zeng m = (struct cik_mqd *) mqd_mem_obj->cpu_ptr; 978636e53cSOak Zeng addr = mqd_mem_obj->gpu_addr; 984b8f589bSBen Goz 994b8f589bSBen Goz memset(m, 0, ALIGN(sizeof(struct cik_mqd), 256)); 1004b8f589bSBen Goz 1014b8f589bSBen Goz m->header = 0xC0310800; 1024b8f589bSBen Goz m->compute_pipelinestat_enable = 1; 1034b8f589bSBen Goz m->compute_static_thread_mgmt_se0 = 0xFFFFFFFF; 1044b8f589bSBen Goz m->compute_static_thread_mgmt_se1 = 0xFFFFFFFF; 1054b8f589bSBen Goz m->compute_static_thread_mgmt_se2 = 0xFFFFFFFF; 1064b8f589bSBen Goz m->compute_static_thread_mgmt_se3 = 0xFFFFFFFF; 1074b8f589bSBen Goz 1084b8f589bSBen Goz /* 1094b8f589bSBen Goz * Make sure to use the last queue state saved on mqd when the cp 1104b8f589bSBen Goz * reassigns the queue, so when queue is switched on/off (e.g over 1114b8f589bSBen Goz * subscription or quantum timeout) the context will be consistent 1124b8f589bSBen Goz */ 1134b8f589bSBen Goz m->cp_hqd_persistent_state = 1144b8f589bSBen Goz DEFAULT_CP_HQD_PERSISTENT_STATE | PRELOAD_REQ; 1154b8f589bSBen Goz 1164b8f589bSBen Goz m->cp_mqd_control = MQD_CONTROL_PRIV_STATE_EN; 1174b8f589bSBen Goz m->cp_mqd_base_addr_lo = lower_32_bits(addr); 1184b8f589bSBen Goz m->cp_mqd_base_addr_hi = upper_32_bits(addr); 1194b8f589bSBen Goz 1204b8f589bSBen Goz m->cp_hqd_quantum = QUANTUM_EN | QUANTUM_SCALE_1MS | 1214b8f589bSBen Goz QUANTUM_DURATION(10); 1224b8f589bSBen Goz 1234b8f589bSBen Goz /* 1244b8f589bSBen Goz * Pipe Priority 1254b8f589bSBen Goz * Identifies the pipe relative priority when this queue is connected 1264b8f589bSBen Goz * to the pipeline. The pipe priority is against the GFX pipe and HP3D. 1274b8f589bSBen Goz * In KFD we are using a fixed pipe priority set to CS_MEDIUM. 1284b8f589bSBen Goz * 0 = CS_LOW (typically below GFX) 1294b8f589bSBen Goz * 1 = CS_MEDIUM (typically between HP3D and GFX 1304b8f589bSBen Goz * 2 = CS_HIGH (typically above HP3D) 1314b8f589bSBen Goz */ 1320ccbc7cdSOak Zeng set_priority(m, q); 1334b8f589bSBen Goz 134d752f95eSJay Cornwall if (q->format == KFD_QUEUE_FORMAT_AQL) 135d752f95eSJay Cornwall m->cp_hqd_iq_rptr = AQL_ENABLE; 136d752f95eSJay Cornwall 1374b8f589bSBen Goz *mqd = m; 1384eacc26bSKent Russell if (gart_addr) 1394b8f589bSBen Goz *gart_addr = addr; 140c6e559ebSLang Yu mm->update_mqd(mm, m, q, NULL); 1414b8f589bSBen Goz } 1424b8f589bSBen Goz 1438636e53cSOak Zeng static void init_mqd_sdma(struct mqd_manager *mm, void **mqd, 1448636e53cSOak Zeng struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr, 1454b8f589bSBen Goz struct queue_properties *q) 1464b8f589bSBen Goz { 1474b8f589bSBen Goz struct cik_sdma_rlc_registers *m; 1484b8f589bSBen Goz 1498636e53cSOak Zeng m = (struct cik_sdma_rlc_registers *) mqd_mem_obj->cpu_ptr; 1504b8f589bSBen Goz 1514b8f589bSBen Goz memset(m, 0, sizeof(struct cik_sdma_rlc_registers)); 1524b8f589bSBen Goz 1534b8f589bSBen Goz *mqd = m; 1544eacc26bSKent Russell if (gart_addr) 1558636e53cSOak Zeng *gart_addr = mqd_mem_obj->gpu_addr; 1564b8f589bSBen Goz 157c6e559ebSLang Yu mm->update_mqd(mm, m, q, NULL); 1584b8f589bSBen Goz } 1594b8f589bSBen Goz 1604b8f589bSBen Goz static int load_mqd(struct mqd_manager *mm, void *mqd, uint32_t pipe_id, 16170539bd7SFelix Kuehling uint32_t queue_id, struct queue_properties *p, 16270539bd7SFelix Kuehling struct mm_struct *mms) 1634b8f589bSBen Goz { 16470539bd7SFelix Kuehling /* AQL write pointer counts in 64B packets, PM4/CP counts in dwords. */ 16570539bd7SFelix Kuehling uint32_t wptr_shift = (p->format == KFD_QUEUE_FORMAT_AQL ? 4 : 0); 1666d566930SFelix Kuehling uint32_t wptr_mask = (uint32_t)((p->queue_size / 4) - 1); 16770539bd7SFelix Kuehling 168420185fdSGraham Sider return mm->dev->kfd2kgd->hqd_load(mm->dev->adev, mqd, pipe_id, queue_id, 16970539bd7SFelix Kuehling (uint32_t __user *)p->write_ptr, 17070539bd7SFelix Kuehling wptr_shift, wptr_mask, mms); 1714b8f589bSBen Goz } 1724b8f589bSBen Goz 1738636e53cSOak Zeng static void __update_mqd(struct mqd_manager *mm, void *mqd, 174c6e559ebSLang Yu struct queue_properties *q, struct mqd_update_info *minfo, 175c6e559ebSLang Yu unsigned int atc_bit) 1764b8f589bSBen Goz { 1774b8f589bSBen Goz struct cik_mqd *m; 1784b8f589bSBen Goz 1794b8f589bSBen Goz m = get_mqd(mqd); 1804b8f589bSBen Goz m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE | 181ee04955aSFelix Kuehling DEFAULT_MIN_AVAIL_SIZE; 182ee04955aSFelix Kuehling m->cp_hqd_ib_control = DEFAULT_MIN_IB_AVAIL_SIZE; 183ee04955aSFelix Kuehling if (atc_bit) { 184ee04955aSFelix Kuehling m->cp_hqd_pq_control |= PQ_ATC_EN; 185ee04955aSFelix Kuehling m->cp_hqd_ib_control |= IB_ATC_EN; 186ee04955aSFelix Kuehling } 1874b8f589bSBen Goz 1884b8f589bSBen Goz /* 1894b8f589bSBen Goz * Calculating queue size which is log base 2 of actual queue size -1 1904b8f589bSBen Goz * dwords and another -1 for ffs 1914b8f589bSBen Goz */ 192115c8c41SFelix Kuehling m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1; 1934b8f589bSBen Goz m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8); 1944b8f589bSBen Goz m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); 1954b8f589bSBen Goz m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr); 1964b8f589bSBen Goz m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr); 19770539bd7SFelix Kuehling m->cp_hqd_pq_doorbell_control = DOORBELL_OFFSET(q->doorbell_off); 1984b8f589bSBen Goz 1994b8f589bSBen Goz m->cp_hqd_vmid = q->vmid; 2004b8f589bSBen Goz 2018eabaf54SKent Russell if (q->format == KFD_QUEUE_FORMAT_AQL) 2024b8f589bSBen Goz m->cp_hqd_pq_control |= NO_UPDATE_RPTR; 2034b8f589bSBen Goz 2047c695a2cSLang Yu update_cu_mask(mm, mqd, minfo); 2050ccbc7cdSOak Zeng set_priority(m, q); 20639e7f331SFelix Kuehling 207bb2d2128SFelix Kuehling q->is_active = QUEUE_IS_ACTIVE(*q); 2084b8f589bSBen Goz } 2094b8f589bSBen Goz 2108636e53cSOak Zeng static void update_mqd(struct mqd_manager *mm, void *mqd, 211c6e559ebSLang Yu struct queue_properties *q, 212c6e559ebSLang Yu struct mqd_update_info *minfo) 213ee04955aSFelix Kuehling { 214c6e559ebSLang Yu __update_mqd(mm, mqd, q, minfo, 1); 215ee04955aSFelix Kuehling } 216ee04955aSFelix Kuehling 21751a0f459SOak Zeng static uint32_t read_doorbell_id(void *mqd) 21851a0f459SOak Zeng { 21951a0f459SOak Zeng struct cik_mqd *m = (struct cik_mqd *)mqd; 22051a0f459SOak Zeng 22151a0f459SOak Zeng return m->queue_doorbell_id0; 22251a0f459SOak Zeng } 22351a0f459SOak Zeng 2248636e53cSOak Zeng static void update_mqd_hawaii(struct mqd_manager *mm, void *mqd, 225c6e559ebSLang Yu struct queue_properties *q, 226c6e559ebSLang Yu struct mqd_update_info *minfo) 227ee04955aSFelix Kuehling { 228c6e559ebSLang Yu __update_mqd(mm, mqd, q, minfo, 0); 229ee04955aSFelix Kuehling } 230ee04955aSFelix Kuehling 2318636e53cSOak Zeng static void update_mqd_sdma(struct mqd_manager *mm, void *mqd, 232c6e559ebSLang Yu struct queue_properties *q, 233c6e559ebSLang Yu struct mqd_update_info *minfo) 2344b8f589bSBen Goz { 2354b8f589bSBen Goz struct cik_sdma_rlc_registers *m; 2364b8f589bSBen Goz 2374b8f589bSBen Goz m = get_sdma_mqd(mqd); 238115c8c41SFelix Kuehling m->sdma_rlc_rb_cntl = order_base_2(q->queue_size / 4) 239d12fb13fSshaoyunl << SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT | 2403d30b28bSOded Gabbay q->vmid << SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT | 2413d30b28bSOded Gabbay 1 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE__SHIFT | 2423d30b28bSOded Gabbay 6 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT; 2434b8f589bSBen Goz 2444b8f589bSBen Goz m->sdma_rlc_rb_base = lower_32_bits(q->queue_address >> 8); 2454b8f589bSBen Goz m->sdma_rlc_rb_base_hi = upper_32_bits(q->queue_address >> 8); 2464b8f589bSBen Goz m->sdma_rlc_rb_rptr_addr_lo = lower_32_bits((uint64_t)q->read_ptr); 2474b8f589bSBen Goz m->sdma_rlc_rb_rptr_addr_hi = upper_32_bits((uint64_t)q->read_ptr); 248bba9662dSJay Cornwall m->sdma_rlc_doorbell = 249bba9662dSJay Cornwall q->doorbell_off << SDMA0_RLC0_DOORBELL__OFFSET__SHIFT; 2503d30b28bSOded Gabbay 2514b8f589bSBen Goz m->sdma_rlc_virtual_addr = q->sdma_vm_addr; 2524b8f589bSBen Goz 2534b8f589bSBen Goz m->sdma_engine_id = q->sdma_engine_id; 2544b8f589bSBen Goz m->sdma_queue_id = q->sdma_queue_id; 2554b8f589bSBen Goz 256bb2d2128SFelix Kuehling q->is_active = QUEUE_IS_ACTIVE(*q); 2574b8f589bSBen Goz } 2584b8f589bSBen Goz 2593a9822d7SDavid Yat Sin static void checkpoint_mqd(struct mqd_manager *mm, void *mqd, void *mqd_dst, void *ctl_stack_dst) 26042c6c482SDavid Yat Sin { 26142c6c482SDavid Yat Sin struct cik_mqd *m; 26242c6c482SDavid Yat Sin 26342c6c482SDavid Yat Sin m = get_mqd(mqd); 26442c6c482SDavid Yat Sin 26542c6c482SDavid Yat Sin memcpy(mqd_dst, m, sizeof(struct cik_mqd)); 26642c6c482SDavid Yat Sin } 26742c6c482SDavid Yat Sin 26842c6c482SDavid Yat Sin static void restore_mqd(struct mqd_manager *mm, void **mqd, 26942c6c482SDavid Yat Sin struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr, 27042c6c482SDavid Yat Sin struct queue_properties *qp, 2713a9822d7SDavid Yat Sin const void *mqd_src, 2723a9822d7SDavid Yat Sin const void *ctl_stack_src, const u32 ctl_stack_size) 27342c6c482SDavid Yat Sin { 27442c6c482SDavid Yat Sin uint64_t addr; 27542c6c482SDavid Yat Sin struct cik_mqd *m; 27642c6c482SDavid Yat Sin 27742c6c482SDavid Yat Sin m = (struct cik_mqd *) mqd_mem_obj->cpu_ptr; 27842c6c482SDavid Yat Sin addr = mqd_mem_obj->gpu_addr; 27942c6c482SDavid Yat Sin 28042c6c482SDavid Yat Sin memcpy(m, mqd_src, sizeof(*m)); 28142c6c482SDavid Yat Sin 28242c6c482SDavid Yat Sin *mqd = m; 28342c6c482SDavid Yat Sin if (gart_addr) 28442c6c482SDavid Yat Sin *gart_addr = addr; 28542c6c482SDavid Yat Sin 28642c6c482SDavid Yat Sin m->cp_hqd_pq_doorbell_control = DOORBELL_OFFSET(qp->doorbell_off); 28742c6c482SDavid Yat Sin 28842c6c482SDavid Yat Sin pr_debug("cp_hqd_pq_doorbell_control 0x%x\n", 28942c6c482SDavid Yat Sin m->cp_hqd_pq_doorbell_control); 29042c6c482SDavid Yat Sin 29142c6c482SDavid Yat Sin qp->is_active = 0; 29242c6c482SDavid Yat Sin } 29342c6c482SDavid Yat Sin 2943a9822d7SDavid Yat Sin static void checkpoint_mqd_sdma(struct mqd_manager *mm, 2953a9822d7SDavid Yat Sin void *mqd, 2963a9822d7SDavid Yat Sin void *mqd_dst, 2973a9822d7SDavid Yat Sin void *ctl_stack_dst) 29842c6c482SDavid Yat Sin { 29942c6c482SDavid Yat Sin struct cik_sdma_rlc_registers *m; 30042c6c482SDavid Yat Sin 30142c6c482SDavid Yat Sin m = get_sdma_mqd(mqd); 30242c6c482SDavid Yat Sin 30342c6c482SDavid Yat Sin memcpy(mqd_dst, m, sizeof(struct cik_sdma_rlc_registers)); 30442c6c482SDavid Yat Sin } 30542c6c482SDavid Yat Sin 30642c6c482SDavid Yat Sin static void restore_mqd_sdma(struct mqd_manager *mm, void **mqd, 30742c6c482SDavid Yat Sin struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr, 30842c6c482SDavid Yat Sin struct queue_properties *qp, 3093a9822d7SDavid Yat Sin const void *mqd_src, 3103a9822d7SDavid Yat Sin const void *ctl_stack_src, const u32 ctl_stack_size) 31142c6c482SDavid Yat Sin { 31242c6c482SDavid Yat Sin uint64_t addr; 31342c6c482SDavid Yat Sin struct cik_sdma_rlc_registers *m; 31442c6c482SDavid Yat Sin 31542c6c482SDavid Yat Sin m = (struct cik_sdma_rlc_registers *) mqd_mem_obj->cpu_ptr; 31642c6c482SDavid Yat Sin addr = mqd_mem_obj->gpu_addr; 31742c6c482SDavid Yat Sin 31842c6c482SDavid Yat Sin memcpy(m, mqd_src, sizeof(*m)); 31942c6c482SDavid Yat Sin 32042c6c482SDavid Yat Sin m->sdma_rlc_doorbell = 32142c6c482SDavid Yat Sin qp->doorbell_off << SDMA0_RLC0_DOORBELL__OFFSET__SHIFT; 32242c6c482SDavid Yat Sin 32342c6c482SDavid Yat Sin *mqd = m; 32442c6c482SDavid Yat Sin if (gart_addr) 32542c6c482SDavid Yat Sin *gart_addr = addr; 32642c6c482SDavid Yat Sin 32742c6c482SDavid Yat Sin qp->is_active = 0; 32842c6c482SDavid Yat Sin } 32942c6c482SDavid Yat Sin 3304b8f589bSBen Goz /* 3314b8f589bSBen Goz * HIQ MQD Implementation, concrete implementation for HIQ MQD implementation. 3324b8f589bSBen Goz * The HIQ queue in Kaveri is using the same MQD structure as all the user mode 3334b8f589bSBen Goz * queues but with different initial values. 3344b8f589bSBen Goz */ 3354b8f589bSBen Goz 3368636e53cSOak Zeng static void init_mqd_hiq(struct mqd_manager *mm, void **mqd, 3378636e53cSOak Zeng struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr, 3384b8f589bSBen Goz struct queue_properties *q) 3394b8f589bSBen Goz { 3408636e53cSOak Zeng init_mqd(mm, mqd, mqd_mem_obj, gart_addr, q); 3414b8f589bSBen Goz } 3424b8f589bSBen Goz 3438636e53cSOak Zeng static void update_mqd_hiq(struct mqd_manager *mm, void *mqd, 344c6e559ebSLang Yu struct queue_properties *q, 345c6e559ebSLang Yu struct mqd_update_info *minfo) 3464b8f589bSBen Goz { 3474b8f589bSBen Goz struct cik_mqd *m; 3484b8f589bSBen Goz 3494b8f589bSBen Goz m = get_mqd(mqd); 3504b8f589bSBen Goz m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE | 3514b8f589bSBen Goz DEFAULT_MIN_AVAIL_SIZE | 3524b8f589bSBen Goz PRIV_STATE | 3534b8f589bSBen Goz KMD_QUEUE; 3544b8f589bSBen Goz 3554b8f589bSBen Goz /* 3564b8f589bSBen Goz * Calculating queue size which is log base 2 of actual queue 3574b8f589bSBen Goz * size -1 dwords 3584b8f589bSBen Goz */ 359115c8c41SFelix Kuehling m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1; 3604b8f589bSBen Goz m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8); 3614b8f589bSBen Goz m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); 3624b8f589bSBen Goz m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr); 3634b8f589bSBen Goz m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr); 364bba9662dSJay Cornwall m->cp_hqd_pq_doorbell_control = DOORBELL_OFFSET(q->doorbell_off); 3654b8f589bSBen Goz 3664b8f589bSBen Goz m->cp_hqd_vmid = q->vmid; 3674b8f589bSBen Goz 368bb2d2128SFelix Kuehling q->is_active = QUEUE_IS_ACTIVE(*q); 3694b8f589bSBen Goz 3700ccbc7cdSOak Zeng set_priority(m, q); 3714b8f589bSBen Goz } 3724b8f589bSBen Goz 373851a645eSFelix Kuehling #if defined(CONFIG_DEBUG_FS) 374851a645eSFelix Kuehling 375851a645eSFelix Kuehling static int debugfs_show_mqd(struct seq_file *m, void *data) 376851a645eSFelix Kuehling { 377851a645eSFelix Kuehling seq_hex_dump(m, " ", DUMP_PREFIX_OFFSET, 32, 4, 378851a645eSFelix Kuehling data, sizeof(struct cik_mqd), false); 379851a645eSFelix Kuehling return 0; 380851a645eSFelix Kuehling } 381851a645eSFelix Kuehling 382851a645eSFelix Kuehling static int debugfs_show_mqd_sdma(struct seq_file *m, void *data) 383851a645eSFelix Kuehling { 384851a645eSFelix Kuehling seq_hex_dump(m, " ", DUMP_PREFIX_OFFSET, 32, 4, 385851a645eSFelix Kuehling data, sizeof(struct cik_sdma_rlc_registers), false); 386851a645eSFelix Kuehling return 0; 387851a645eSFelix Kuehling } 388851a645eSFelix Kuehling 389851a645eSFelix Kuehling #endif 390851a645eSFelix Kuehling 3914b8f589bSBen Goz 3924b8f589bSBen Goz struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type, 3938dc1db31SMukul Joshi struct kfd_node *dev) 3944b8f589bSBen Goz { 3954b8f589bSBen Goz struct mqd_manager *mqd; 3964b8f589bSBen Goz 39732fa8219SFelix Kuehling if (WARN_ON(type >= KFD_MQD_TYPE_MAX)) 39832fa8219SFelix Kuehling return NULL; 3994b8f589bSBen Goz 4001cd106ecSFelix Kuehling mqd = kzalloc(sizeof(*mqd), GFP_KERNEL); 4014b8f589bSBen Goz if (!mqd) 4024b8f589bSBen Goz return NULL; 4034b8f589bSBen Goz 4044b8f589bSBen Goz mqd->dev = dev; 4054b8f589bSBen Goz 4064b8f589bSBen Goz switch (type) { 4074b8f589bSBen Goz case KFD_MQD_TYPE_CP: 4088636e53cSOak Zeng mqd->allocate_mqd = allocate_mqd; 4094b8f589bSBen Goz mqd->init_mqd = init_mqd; 410a439b890SMukul Joshi mqd->free_mqd = kfd_free_mqd_cp; 4114b8f589bSBen Goz mqd->load_mqd = load_mqd; 4124b8f589bSBen Goz mqd->update_mqd = update_mqd; 413a439b890SMukul Joshi mqd->destroy_mqd = kfd_destroy_mqd_cp; 414a439b890SMukul Joshi mqd->is_occupied = kfd_is_occupied_cp; 41542c6c482SDavid Yat Sin mqd->checkpoint_mqd = checkpoint_mqd; 41642c6c482SDavid Yat Sin mqd->restore_mqd = restore_mqd; 4176c6cde55SOak Zeng mqd->mqd_size = sizeof(struct cik_mqd); 418851a645eSFelix Kuehling #if defined(CONFIG_DEBUG_FS) 419851a645eSFelix Kuehling mqd->debugfs_show_mqd = debugfs_show_mqd; 420851a645eSFelix Kuehling #endif 4214b8f589bSBen Goz break; 4224b8f589bSBen Goz case KFD_MQD_TYPE_HIQ: 4238636e53cSOak Zeng mqd->allocate_mqd = allocate_hiq_mqd; 4244b8f589bSBen Goz mqd->init_mqd = init_mqd_hiq; 4258636e53cSOak Zeng mqd->free_mqd = free_mqd_hiq_sdma; 4264b8f589bSBen Goz mqd->load_mqd = load_mqd; 4274b8f589bSBen Goz mqd->update_mqd = update_mqd_hiq; 428a439b890SMukul Joshi mqd->destroy_mqd = kfd_destroy_mqd_cp; 429a439b890SMukul Joshi mqd->is_occupied = kfd_is_occupied_cp; 4306c6cde55SOak Zeng mqd->mqd_size = sizeof(struct cik_mqd); 431*2f77b9a2SMukul Joshi mqd->mqd_stride = kfd_mqd_stride; 432851a645eSFelix Kuehling #if defined(CONFIG_DEBUG_FS) 433851a645eSFelix Kuehling mqd->debugfs_show_mqd = debugfs_show_mqd; 434851a645eSFelix Kuehling #endif 43551a0f459SOak Zeng mqd->read_doorbell_id = read_doorbell_id; 4364b8f589bSBen Goz break; 43759f650a0SOak Zeng case KFD_MQD_TYPE_DIQ: 4387633c5e0SYong Zhao mqd->allocate_mqd = allocate_mqd; 43959f650a0SOak Zeng mqd->init_mqd = init_mqd_hiq; 440a439b890SMukul Joshi mqd->free_mqd = kfd_free_mqd_cp; 44159f650a0SOak Zeng mqd->load_mqd = load_mqd; 44259f650a0SOak Zeng mqd->update_mqd = update_mqd_hiq; 443a439b890SMukul Joshi mqd->destroy_mqd = kfd_destroy_mqd_cp; 444a439b890SMukul Joshi mqd->is_occupied = kfd_is_occupied_cp; 4456c6cde55SOak Zeng mqd->mqd_size = sizeof(struct cik_mqd); 446*2f77b9a2SMukul Joshi mqd->mqd_stride = kfd_mqd_stride; 44759f650a0SOak Zeng #if defined(CONFIG_DEBUG_FS) 44859f650a0SOak Zeng mqd->debugfs_show_mqd = debugfs_show_mqd; 44959f650a0SOak Zeng #endif 45059f650a0SOak Zeng break; 4514b8f589bSBen Goz case KFD_MQD_TYPE_SDMA: 4528636e53cSOak Zeng mqd->allocate_mqd = allocate_sdma_mqd; 4534b8f589bSBen Goz mqd->init_mqd = init_mqd_sdma; 4548636e53cSOak Zeng mqd->free_mqd = free_mqd_hiq_sdma; 455a439b890SMukul Joshi mqd->load_mqd = kfd_load_mqd_sdma; 4564b8f589bSBen Goz mqd->update_mqd = update_mqd_sdma; 457a439b890SMukul Joshi mqd->destroy_mqd = kfd_destroy_mqd_sdma; 458a439b890SMukul Joshi mqd->is_occupied = kfd_is_occupied_sdma; 45942c6c482SDavid Yat Sin mqd->checkpoint_mqd = checkpoint_mqd_sdma; 46042c6c482SDavid Yat Sin mqd->restore_mqd = restore_mqd_sdma; 4616c6cde55SOak Zeng mqd->mqd_size = sizeof(struct cik_sdma_rlc_registers); 462*2f77b9a2SMukul Joshi mqd->mqd_stride = kfd_mqd_stride; 463851a645eSFelix Kuehling #if defined(CONFIG_DEBUG_FS) 464851a645eSFelix Kuehling mqd->debugfs_show_mqd = debugfs_show_mqd_sdma; 465851a645eSFelix Kuehling #endif 4664b8f589bSBen Goz break; 4674b8f589bSBen Goz default: 4684b8f589bSBen Goz kfree(mqd); 4694b8f589bSBen Goz return NULL; 4704b8f589bSBen Goz } 4714b8f589bSBen Goz 4724b8f589bSBen Goz return mqd; 4734b8f589bSBen Goz } 4744b8f589bSBen Goz 475ee04955aSFelix Kuehling struct mqd_manager *mqd_manager_init_cik_hawaii(enum KFD_MQD_TYPE type, 4768dc1db31SMukul Joshi struct kfd_node *dev) 477ee04955aSFelix Kuehling { 478ee04955aSFelix Kuehling struct mqd_manager *mqd; 479ee04955aSFelix Kuehling 480ee04955aSFelix Kuehling mqd = mqd_manager_init_cik(type, dev); 481ee04955aSFelix Kuehling if (!mqd) 482ee04955aSFelix Kuehling return NULL; 483d7c0b047SYong Zhao if (type == KFD_MQD_TYPE_CP) 484ee04955aSFelix Kuehling mqd->update_mqd = update_mqd_hawaii; 485ee04955aSFelix Kuehling return mqd; 486ee04955aSFelix Kuehling } 487