1 /*
2  * Copyright 2023 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 
23 #include "kfd_events.h"
24 #include "kfd_debug.h"
25 #include "soc15_int.h"
26 #include "kfd_device_queue_manager.h"
27 
28 /*
29  * GFX10 SQ Interrupts
30  *
31  * There are 3 encoding types of interrupts sourced from SQ sent as a 44-bit
32  * packet to the Interrupt Handler:
33  * Auto - Generated by the SQG (various cmd overflows, timestamps etc)
34  * Wave - Generated by S_SENDMSG through a shader program
35  * Error - HW generated errors (Illegal instructions, Memviols, EDC etc)
36  *
37  * The 44-bit packet is mapped as {context_id1[7:0],context_id0[31:0]} plus
38  * 4-bits for VMID (SOC15_VMID_FROM_IH_ENTRY) as such:
39  *
40  * - context_id1[7:6]
41  * Encoding type (0 = Auto, 1 = Wave, 2 = Error)
42  *
43  * - context_id0[24]
44  * PRIV bit indicates that Wave S_SEND or error occurred within trap
45  *
46  * - context_id0[22:0]
47  * 23-bit data with the following layout per encoding type:
48  * Auto - only context_id0[8:0] is used, which reports various interrupts
49  * generated by SQG.  The rest is 0.
50  * Wave - user data sent from m0 via S_SENDMSG
51  * Error - Error type (context_id0[22:19]), Error Details (rest of bits)
52  *
53  * The other context_id bits show coordinates (SE/SH/CU/SIMD/WGP) for wave
54  * S_SENDMSG and Errors.  These are 0 for Auto.
55  */
56 
57 enum SQ_INTERRUPT_WORD_ENCODING {
58 	SQ_INTERRUPT_WORD_ENCODING_AUTO = 0x0,
59 	SQ_INTERRUPT_WORD_ENCODING_INST,
60 	SQ_INTERRUPT_WORD_ENCODING_ERROR,
61 };
62 
63 enum SQ_INTERRUPT_ERROR_TYPE {
64 	SQ_INTERRUPT_ERROR_TYPE_EDC_FUE = 0x0,
65 	SQ_INTERRUPT_ERROR_TYPE_ILLEGAL_INST,
66 	SQ_INTERRUPT_ERROR_TYPE_MEMVIOL,
67 	SQ_INTERRUPT_ERROR_TYPE_EDC_FED,
68 };
69 
70 /* SQ_INTERRUPT_WORD_AUTO_CTXID */
71 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE__SHIFT 0
72 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__WLT__SHIFT 1
73 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_BUF0_FULL__SHIFT 2
74 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_BUF1_FULL__SHIFT 3
75 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_UTC_ERROR__SHIFT 7
76 #define SQ_INTERRUPT_WORD_AUTO_CTXID1__SE_ID__SHIFT 4
77 #define SQ_INTERRUPT_WORD_AUTO_CTXID1__ENCODING__SHIFT 6
78 
79 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_MASK 0x00000001
80 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__WLT_MASK 0x00000002
81 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_BUF0_FULL_MASK 0x00000004
82 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_BUF1_FULL_MASK 0x00000008
83 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_UTC_ERROR_MASK 0x00000080
84 #define SQ_INTERRUPT_WORD_AUTO_CTXID1__SE_ID_MASK 0x030
85 #define SQ_INTERRUPT_WORD_AUTO_CTXID1__ENCODING_MASK 0x0c0
86 
87 /* SQ_INTERRUPT_WORD_WAVE_CTXID */
88 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__DATA__SHIFT 0
89 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__SA_ID__SHIFT 23
90 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__PRIV__SHIFT 24
91 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__WAVE_ID__SHIFT 25
92 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__SIMD_ID__SHIFT 30
93 #define SQ_INTERRUPT_WORD_WAVE_CTXID1__WGP_ID__SHIFT 0
94 #define SQ_INTERRUPT_WORD_WAVE_CTXID1__SE_ID__SHIFT 4
95 #define SQ_INTERRUPT_WORD_WAVE_CTXID1__ENCODING__SHIFT 6
96 
97 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__DATA_MASK 0x000007fffff
98 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__SA_ID_MASK 0x0000800000
99 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__PRIV_MASK 0x00001000000
100 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__WAVE_ID_MASK 0x0003e000000
101 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__SIMD_ID_MASK 0x000c0000000
102 #define SQ_INTERRUPT_WORD_WAVE_CTXID1__WGP_ID_MASK 0x00f
103 #define SQ_INTERRUPT_WORD_WAVE_CTXID1__SE_ID_MASK 0x030
104 #define SQ_INTERRUPT_WORD_WAVE_CTXID1__ENCODING_MASK 0x0c0
105 
106 #define KFD_CTXID0__ERR_TYPE_MASK 0x780000
107 #define KFD_CTXID0__ERR_TYPE__SHIFT 19
108 
109 /* GFX10 SQ interrupt ENC type bit (context_id1[7:6]) for wave s_sendmsg */
110 #define KFD_CONTEXT_ID1_ENC_TYPE_WAVE_MASK	0x40
111 /* GFX10 SQ interrupt PRIV bit (context_id0[24]) for s_sendmsg inside trap */
112 #define KFD_CONTEXT_ID0_PRIV_MASK		0x1000000
113 /*
114  * The debugger will send user data(m0) with PRIV=1 to indicate it requires
115  * notification from the KFD with the following queue id (DOORBELL_ID) and
116  * trap code (TRAP_CODE).
117  */
118 #define KFD_CONTEXT_ID0_DEBUG_DOORBELL_MASK	0x0003ff
119 #define KFD_CONTEXT_ID0_DEBUG_TRAP_CODE_SHIFT	10
120 #define KFD_CONTEXT_ID0_DEBUG_TRAP_CODE_MASK	0x07fc00
121 #define KFD_DEBUG_DOORBELL_ID(ctxid0)	((ctxid0) &	\
122 				KFD_CONTEXT_ID0_DEBUG_DOORBELL_MASK)
123 #define KFD_DEBUG_TRAP_CODE(ctxid0)	(((ctxid0) &	\
124 				KFD_CONTEXT_ID0_DEBUG_TRAP_CODE_MASK)	\
125 				>> KFD_CONTEXT_ID0_DEBUG_TRAP_CODE_SHIFT)
126 #define KFD_DEBUG_CP_BAD_OP_ECODE_MASK		0x3fffc00
127 #define KFD_DEBUG_CP_BAD_OP_ECODE_SHIFT		10
128 #define KFD_DEBUG_CP_BAD_OP_ECODE(ctxid0) (((ctxid0) &			\
129 				KFD_DEBUG_CP_BAD_OP_ECODE_MASK)		\
130 				>> KFD_DEBUG_CP_BAD_OP_ECODE_SHIFT)
131 
132 static void event_interrupt_poison_consumption(struct kfd_node *dev,
133 				uint16_t pasid, uint16_t client_id)
134 {
135 	int old_poison, ret = -EINVAL;
136 	struct kfd_process *p = kfd_lookup_process_by_pasid(pasid);
137 
138 	if (!p)
139 		return;
140 
141 	/* all queues of a process will be unmapped in one time */
142 	old_poison = atomic_cmpxchg(&p->poison, 0, 1);
143 	kfd_unref_process(p);
144 	if (old_poison)
145 		return;
146 
147 	switch (client_id) {
148 	case SOC15_IH_CLIENTID_SE0SH:
149 	case SOC15_IH_CLIENTID_SE1SH:
150 	case SOC15_IH_CLIENTID_SE2SH:
151 	case SOC15_IH_CLIENTID_SE3SH:
152 	case SOC15_IH_CLIENTID_UTCL2:
153 		ret = kfd_dqm_evict_pasid(dev->dqm, pasid);
154 		break;
155 	case SOC15_IH_CLIENTID_SDMA0:
156 	case SOC15_IH_CLIENTID_SDMA1:
157 	case SOC15_IH_CLIENTID_SDMA2:
158 	case SOC15_IH_CLIENTID_SDMA3:
159 	case SOC15_IH_CLIENTID_SDMA4:
160 		break;
161 	default:
162 		break;
163 	}
164 
165 	kfd_signal_poison_consumed_event(dev, pasid);
166 
167 	/* resetting queue passes, do page retirement without gpu reset
168 	 * resetting queue fails, fallback to gpu reset solution
169 	 */
170 	if (!ret) {
171 		dev_warn(dev->adev->dev,
172 			"RAS poison consumption, unmap queue flow succeeded: client id %d\n",
173 			client_id);
174 		amdgpu_amdkfd_ras_poison_consumption_handler(dev->adev, false);
175 	} else {
176 		dev_warn(dev->adev->dev,
177 			"RAS poison consumption, fall back to gpu reset flow: client id %d\n",
178 			client_id);
179 		amdgpu_amdkfd_ras_poison_consumption_handler(dev->adev, true);
180 	}
181 }
182 
183 static bool event_interrupt_isr_v10(struct kfd_node *dev,
184 					const uint32_t *ih_ring_entry,
185 					uint32_t *patched_ihre,
186 					bool *patched_flag)
187 {
188 	uint16_t source_id, client_id, pasid, vmid;
189 	const uint32_t *data = ih_ring_entry;
190 
191 	source_id = SOC15_SOURCE_ID_FROM_IH_ENTRY(ih_ring_entry);
192 	client_id = SOC15_CLIENT_ID_FROM_IH_ENTRY(ih_ring_entry);
193 
194 	/* Only handle interrupts from KFD VMIDs */
195 	vmid = SOC15_VMID_FROM_IH_ENTRY(ih_ring_entry);
196 	if (!KFD_IRQ_IS_FENCE(client_id, source_id) &&
197 	   (vmid < dev->vm_info.first_vmid_kfd ||
198 	    vmid > dev->vm_info.last_vmid_kfd))
199 		return false;
200 
201 	pasid = SOC15_PASID_FROM_IH_ENTRY(ih_ring_entry);
202 
203 	/* Only handle clients we care about */
204 	if (client_id != SOC15_IH_CLIENTID_GRBM_CP &&
205 	    client_id != SOC15_IH_CLIENTID_SDMA0 &&
206 	    client_id != SOC15_IH_CLIENTID_SDMA1 &&
207 	    client_id != SOC15_IH_CLIENTID_SDMA2 &&
208 	    client_id != SOC15_IH_CLIENTID_SDMA3 &&
209 	    client_id != SOC15_IH_CLIENTID_SDMA4 &&
210 	    client_id != SOC15_IH_CLIENTID_SDMA5 &&
211 	    client_id != SOC15_IH_CLIENTID_SDMA6 &&
212 	    client_id != SOC15_IH_CLIENTID_SDMA7 &&
213 	    client_id != SOC15_IH_CLIENTID_VMC &&
214 	    client_id != SOC15_IH_CLIENTID_VMC1 &&
215 	    client_id != SOC15_IH_CLIENTID_UTCL2 &&
216 	    client_id != SOC15_IH_CLIENTID_SE0SH &&
217 	    client_id != SOC15_IH_CLIENTID_SE1SH &&
218 	    client_id != SOC15_IH_CLIENTID_SE2SH &&
219 	    client_id != SOC15_IH_CLIENTID_SE3SH)
220 		return false;
221 
222 	pr_debug("client id 0x%x, source id %d, vmid %d, pasid 0x%x. raw data:\n",
223 		 client_id, source_id, vmid, pasid);
224 	pr_debug("%8X, %8X, %8X, %8X, %8X, %8X, %8X, %8X.\n",
225 		 data[0], data[1], data[2], data[3],
226 		 data[4], data[5], data[6], data[7]);
227 
228 	/* If there is no valid PASID, it's likely a bug */
229 	if (WARN_ONCE(pasid == 0, "Bug: No PASID in KFD interrupt"))
230 		return 0;
231 
232 	/* Interrupt types we care about: various signals and faults.
233 	 * They will be forwarded to a work queue (see below).
234 	 */
235 	return source_id == SOC15_INTSRC_CP_END_OF_PIPE ||
236 		source_id == SOC15_INTSRC_SDMA_TRAP ||
237 		source_id == SOC15_INTSRC_SQ_INTERRUPT_MSG ||
238 		source_id == SOC15_INTSRC_CP_BAD_OPCODE ||
239 		client_id == SOC15_IH_CLIENTID_VMC ||
240 		client_id == SOC15_IH_CLIENTID_VMC1 ||
241 		client_id == SOC15_IH_CLIENTID_UTCL2 ||
242 		KFD_IRQ_IS_FENCE(client_id, source_id);
243 }
244 
245 static void event_interrupt_wq_v10(struct kfd_node *dev,
246 					const uint32_t *ih_ring_entry)
247 {
248 	uint16_t source_id, client_id, pasid, vmid;
249 	uint32_t context_id0, context_id1;
250 	uint32_t encoding, sq_intr_err_type;
251 
252 	source_id = SOC15_SOURCE_ID_FROM_IH_ENTRY(ih_ring_entry);
253 	client_id = SOC15_CLIENT_ID_FROM_IH_ENTRY(ih_ring_entry);
254 	pasid = SOC15_PASID_FROM_IH_ENTRY(ih_ring_entry);
255 	vmid = SOC15_VMID_FROM_IH_ENTRY(ih_ring_entry);
256 	context_id0 = SOC15_CONTEXT_ID0_FROM_IH_ENTRY(ih_ring_entry);
257 	context_id1 = SOC15_CONTEXT_ID1_FROM_IH_ENTRY(ih_ring_entry);
258 
259 	if (client_id == SOC15_IH_CLIENTID_GRBM_CP ||
260 	    client_id == SOC15_IH_CLIENTID_SE0SH ||
261 	    client_id == SOC15_IH_CLIENTID_SE1SH ||
262 	    client_id == SOC15_IH_CLIENTID_SE2SH ||
263 	    client_id == SOC15_IH_CLIENTID_SE3SH) {
264 		if (source_id == SOC15_INTSRC_CP_END_OF_PIPE)
265 			kfd_signal_event_interrupt(pasid, context_id0, 32);
266 		else if (source_id == SOC15_INTSRC_SQ_INTERRUPT_MSG) {
267 			encoding = REG_GET_FIELD(context_id1,
268 						SQ_INTERRUPT_WORD_WAVE_CTXID1, ENCODING);
269 			switch (encoding) {
270 			case SQ_INTERRUPT_WORD_ENCODING_AUTO:
271 				pr_debug_ratelimited(
272 					"sq_intr: auto, se %d, ttrace %d, wlt %d, ttrac_buf0_full %d, ttrac_buf1_full %d, ttrace_utc_err %d\n",
273 					REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_AUTO_CTXID1,
274 							SE_ID),
275 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,
276 							THREAD_TRACE),
277 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,
278 							WLT),
279 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,
280 							THREAD_TRACE_BUF0_FULL),
281 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,
282 							THREAD_TRACE_BUF1_FULL),
283 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,
284 							THREAD_TRACE_UTC_ERROR));
285 				break;
286 			case SQ_INTERRUPT_WORD_ENCODING_INST:
287 				pr_debug_ratelimited("sq_intr: inst, se %d, data 0x%x, sa %d, priv %d, wave_id %d, simd_id %d, wgp_id %d\n",
288 					REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1,
289 							SE_ID),
290 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
291 							DATA),
292 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
293 							SA_ID),
294 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
295 							PRIV),
296 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
297 							WAVE_ID),
298 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
299 							SIMD_ID),
300 					REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1,
301 							WGP_ID));
302 				if (context_id0 & SQ_INTERRUPT_WORD_WAVE_CTXID0__PRIV_MASK) {
303 					if (kfd_set_dbg_ev_from_interrupt(dev, pasid,
304 							KFD_DEBUG_DOORBELL_ID(context_id0),
305 							KFD_DEBUG_TRAP_CODE(context_id0),
306 							NULL, 0))
307 						return;
308 				}
309 				break;
310 			case SQ_INTERRUPT_WORD_ENCODING_ERROR:
311 				sq_intr_err_type = REG_GET_FIELD(context_id0, KFD_CTXID0,
312 								ERR_TYPE);
313 				pr_warn_ratelimited("sq_intr: error, se %d, data 0x%x, sa %d, priv %d, wave_id %d, simd_id %d, wgp_id %d, err_type %d\n",
314 					REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1,
315 							SE_ID),
316 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
317 							DATA),
318 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
319 							SA_ID),
320 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
321 							PRIV),
322 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
323 							WAVE_ID),
324 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
325 							SIMD_ID),
326 					REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1,
327 							WGP_ID),
328 					sq_intr_err_type);
329 				if (sq_intr_err_type != SQ_INTERRUPT_ERROR_TYPE_ILLEGAL_INST &&
330 					sq_intr_err_type != SQ_INTERRUPT_ERROR_TYPE_MEMVIOL) {
331 					event_interrupt_poison_consumption(dev, pasid, source_id);
332 					return;
333 				}
334 				break;
335 			default:
336 				break;
337 			}
338 			kfd_signal_event_interrupt(pasid, context_id0 & 0x7fffff, 23);
339 		} else if (source_id == SOC15_INTSRC_CP_BAD_OPCODE &&
340 			   KFD_DBG_EC_TYPE_IS_PACKET(KFD_DEBUG_CP_BAD_OP_ECODE(context_id0))) {
341 			kfd_set_dbg_ev_from_interrupt(dev, pasid,
342 				KFD_DEBUG_DOORBELL_ID(context_id0),
343 				KFD_EC_MASK(KFD_DEBUG_CP_BAD_OP_ECODE(context_id0)),
344 				NULL,
345 				0);
346 		}
347 	} else if (client_id == SOC15_IH_CLIENTID_SDMA0 ||
348 		   client_id == SOC15_IH_CLIENTID_SDMA1 ||
349 		   client_id == SOC15_IH_CLIENTID_SDMA2 ||
350 		   client_id == SOC15_IH_CLIENTID_SDMA3 ||
351 		   (client_id == SOC15_IH_CLIENTID_SDMA3_Sienna_Cichlid &&
352 		    KFD_GC_VERSION(dev) == IP_VERSION(10, 3, 0)) ||
353 		   client_id == SOC15_IH_CLIENTID_SDMA4 ||
354 		   client_id == SOC15_IH_CLIENTID_SDMA5 ||
355 		   client_id == SOC15_IH_CLIENTID_SDMA6 ||
356 		   client_id == SOC15_IH_CLIENTID_SDMA7) {
357 		if (source_id == SOC15_INTSRC_SDMA_TRAP) {
358 			kfd_signal_event_interrupt(pasid, context_id0 & 0xfffffff, 28);
359 		} else if (source_id == SOC15_INTSRC_SDMA_ECC) {
360 			event_interrupt_poison_consumption(dev, pasid, source_id);
361 			return;
362 		}
363 	} else if (client_id == SOC15_IH_CLIENTID_VMC ||
364 		   client_id == SOC15_IH_CLIENTID_VMC1 ||
365 		   client_id == SOC15_IH_CLIENTID_UTCL2) {
366 		struct kfd_vm_fault_info info = {0};
367 		uint16_t ring_id = SOC15_RING_ID_FROM_IH_ENTRY(ih_ring_entry);
368 		struct kfd_hsa_memory_exception_data exception_data;
369 
370 		if (client_id == SOC15_IH_CLIENTID_UTCL2 &&
371 				amdgpu_amdkfd_ras_query_utcl2_poison_status(dev->adev)) {
372 			event_interrupt_poison_consumption(dev, pasid, client_id);
373 			return;
374 		}
375 
376 		info.vmid = vmid;
377 		info.mc_id = client_id;
378 		info.page_addr = ih_ring_entry[4] |
379 			(uint64_t)(ih_ring_entry[5] & 0xf) << 32;
380 		info.prot_valid = ring_id & 0x08;
381 		info.prot_read  = ring_id & 0x10;
382 		info.prot_write = ring_id & 0x20;
383 
384 		memset(&exception_data, 0, sizeof(exception_data));
385 		exception_data.gpu_id = dev->id;
386 		exception_data.va = (info.page_addr) << PAGE_SHIFT;
387 		exception_data.failure.NotPresent = info.prot_valid ? 1 : 0;
388 		exception_data.failure.NoExecute = info.prot_exec ? 1 : 0;
389 		exception_data.failure.ReadOnly = info.prot_write ? 1 : 0;
390 		exception_data.failure.imprecise = 0;
391 
392 		kfd_set_dbg_ev_from_interrupt(dev,
393 						pasid,
394 						-1,
395 						KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION),
396 						&exception_data,
397 						sizeof(exception_data));
398 	} else if (KFD_IRQ_IS_FENCE(client_id, source_id)) {
399 		kfd_process_close_interrupt_drain(pasid);
400 	}
401 }
402 
403 const struct kfd_event_interrupt_class event_interrupt_class_v10 = {
404 	.interrupt_isr = event_interrupt_isr_v10,
405 	.interrupt_wq = event_interrupt_wq_v10,
406 };
407