1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #include <linux/ratelimit.h> 25 #include <linux/printk.h> 26 #include <linux/slab.h> 27 #include <linux/list.h> 28 #include <linux/types.h> 29 #include <linux/bitops.h> 30 #include <linux/sched.h> 31 #include "kfd_priv.h" 32 #include "kfd_device_queue_manager.h" 33 #include "kfd_mqd_manager.h" 34 #include "cik_regs.h" 35 #include "kfd_kernel_queue.h" 36 37 /* Size of the per-pipe EOP queue */ 38 #define CIK_HPD_EOP_BYTES_LOG2 11 39 #define CIK_HPD_EOP_BYTES (1U << CIK_HPD_EOP_BYTES_LOG2) 40 41 static int set_pasid_vmid_mapping(struct device_queue_manager *dqm, 42 unsigned int pasid, unsigned int vmid); 43 44 static int create_compute_queue_nocpsch(struct device_queue_manager *dqm, 45 struct queue *q, 46 struct qcm_process_device *qpd); 47 48 static int execute_queues_cpsch(struct device_queue_manager *dqm, 49 enum kfd_unmap_queues_filter filter, 50 uint32_t filter_param); 51 static int unmap_queues_cpsch(struct device_queue_manager *dqm, 52 enum kfd_unmap_queues_filter filter, 53 uint32_t filter_param); 54 55 static int map_queues_cpsch(struct device_queue_manager *dqm); 56 57 static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm, 58 struct queue *q, 59 struct qcm_process_device *qpd); 60 61 static void deallocate_sdma_queue(struct device_queue_manager *dqm, 62 unsigned int sdma_queue_id); 63 64 static inline 65 enum KFD_MQD_TYPE get_mqd_type_from_queue_type(enum kfd_queue_type type) 66 { 67 if (type == KFD_QUEUE_TYPE_SDMA) 68 return KFD_MQD_TYPE_SDMA; 69 return KFD_MQD_TYPE_CP; 70 } 71 72 static bool is_pipe_enabled(struct device_queue_manager *dqm, int mec, int pipe) 73 { 74 int i; 75 int pipe_offset = mec * dqm->dev->shared_resources.num_pipe_per_mec 76 + pipe * dqm->dev->shared_resources.num_queue_per_pipe; 77 78 /* queue is available for KFD usage if bit is 1 */ 79 for (i = 0; i < dqm->dev->shared_resources.num_queue_per_pipe; ++i) 80 if (test_bit(pipe_offset + i, 81 dqm->dev->shared_resources.queue_bitmap)) 82 return true; 83 return false; 84 } 85 86 unsigned int get_queues_num(struct device_queue_manager *dqm) 87 { 88 return bitmap_weight(dqm->dev->shared_resources.queue_bitmap, 89 KGD_MAX_QUEUES); 90 } 91 92 unsigned int get_queues_per_pipe(struct device_queue_manager *dqm) 93 { 94 return dqm->dev->shared_resources.num_queue_per_pipe; 95 } 96 97 unsigned int get_pipes_per_mec(struct device_queue_manager *dqm) 98 { 99 return dqm->dev->shared_resources.num_pipe_per_mec; 100 } 101 102 void program_sh_mem_settings(struct device_queue_manager *dqm, 103 struct qcm_process_device *qpd) 104 { 105 return dqm->dev->kfd2kgd->program_sh_mem_settings( 106 dqm->dev->kgd, qpd->vmid, 107 qpd->sh_mem_config, 108 qpd->sh_mem_ape1_base, 109 qpd->sh_mem_ape1_limit, 110 qpd->sh_mem_bases); 111 } 112 113 static int allocate_doorbell(struct qcm_process_device *qpd, struct queue *q) 114 { 115 struct kfd_dev *dev = qpd->dqm->dev; 116 117 if (!KFD_IS_SOC15(dev->device_info->asic_family)) { 118 /* On pre-SOC15 chips we need to use the queue ID to 119 * preserve the user mode ABI. 120 */ 121 q->doorbell_id = q->properties.queue_id; 122 } else if (q->properties.type == KFD_QUEUE_TYPE_SDMA) { 123 /* For SDMA queues on SOC15, use static doorbell 124 * assignments based on the engine and queue. 125 */ 126 q->doorbell_id = dev->shared_resources.sdma_doorbell 127 [q->properties.sdma_engine_id] 128 [q->properties.sdma_queue_id]; 129 } else { 130 /* For CP queues on SOC15 reserve a free doorbell ID */ 131 unsigned int found; 132 133 found = find_first_zero_bit(qpd->doorbell_bitmap, 134 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS); 135 if (found >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) { 136 pr_debug("No doorbells available"); 137 return -EBUSY; 138 } 139 set_bit(found, qpd->doorbell_bitmap); 140 q->doorbell_id = found; 141 } 142 143 q->properties.doorbell_off = 144 kfd_doorbell_id_to_offset(dev, q->process, 145 q->doorbell_id); 146 147 return 0; 148 } 149 150 static void deallocate_doorbell(struct qcm_process_device *qpd, 151 struct queue *q) 152 { 153 unsigned int old; 154 struct kfd_dev *dev = qpd->dqm->dev; 155 156 if (!KFD_IS_SOC15(dev->device_info->asic_family) || 157 q->properties.type == KFD_QUEUE_TYPE_SDMA) 158 return; 159 160 old = test_and_clear_bit(q->doorbell_id, qpd->doorbell_bitmap); 161 WARN_ON(!old); 162 } 163 164 static int allocate_vmid(struct device_queue_manager *dqm, 165 struct qcm_process_device *qpd, 166 struct queue *q) 167 { 168 int bit, allocated_vmid; 169 170 if (dqm->vmid_bitmap == 0) 171 return -ENOMEM; 172 173 bit = ffs(dqm->vmid_bitmap) - 1; 174 dqm->vmid_bitmap &= ~(1 << bit); 175 176 allocated_vmid = bit + dqm->dev->vm_info.first_vmid_kfd; 177 pr_debug("vmid allocation %d\n", allocated_vmid); 178 qpd->vmid = allocated_vmid; 179 q->properties.vmid = allocated_vmid; 180 181 set_pasid_vmid_mapping(dqm, q->process->pasid, q->properties.vmid); 182 program_sh_mem_settings(dqm, qpd); 183 184 /* qpd->page_table_base is set earlier when register_process() 185 * is called, i.e. when the first queue is created. 186 */ 187 dqm->dev->kfd2kgd->set_vm_context_page_table_base(dqm->dev->kgd, 188 qpd->vmid, 189 qpd->page_table_base); 190 /* invalidate the VM context after pasid and vmid mapping is set up */ 191 kfd_flush_tlb(qpd_to_pdd(qpd)); 192 193 return 0; 194 } 195 196 static int flush_texture_cache_nocpsch(struct kfd_dev *kdev, 197 struct qcm_process_device *qpd) 198 { 199 const struct packet_manager_funcs *pmf = qpd->dqm->packets.pmf; 200 int ret; 201 202 if (!qpd->ib_kaddr) 203 return -ENOMEM; 204 205 ret = pmf->release_mem(qpd->ib_base, (uint32_t *)qpd->ib_kaddr); 206 if (ret) 207 return ret; 208 209 return kdev->kfd2kgd->submit_ib(kdev->kgd, KGD_ENGINE_MEC1, qpd->vmid, 210 qpd->ib_base, (uint32_t *)qpd->ib_kaddr, 211 pmf->release_mem_size / sizeof(uint32_t)); 212 } 213 214 static void deallocate_vmid(struct device_queue_manager *dqm, 215 struct qcm_process_device *qpd, 216 struct queue *q) 217 { 218 int bit = qpd->vmid - dqm->dev->vm_info.first_vmid_kfd; 219 220 /* On GFX v7, CP doesn't flush TC at dequeue */ 221 if (q->device->device_info->asic_family == CHIP_HAWAII) 222 if (flush_texture_cache_nocpsch(q->device, qpd)) 223 pr_err("Failed to flush TC\n"); 224 225 kfd_flush_tlb(qpd_to_pdd(qpd)); 226 227 /* Release the vmid mapping */ 228 set_pasid_vmid_mapping(dqm, 0, qpd->vmid); 229 230 dqm->vmid_bitmap |= (1 << bit); 231 qpd->vmid = 0; 232 q->properties.vmid = 0; 233 } 234 235 static int create_queue_nocpsch(struct device_queue_manager *dqm, 236 struct queue *q, 237 struct qcm_process_device *qpd) 238 { 239 int retval; 240 241 print_queue(q); 242 243 mutex_lock(&dqm->lock); 244 245 if (dqm->total_queue_count >= max_num_of_queues_per_device) { 246 pr_warn("Can't create new usermode queue because %d queues were already created\n", 247 dqm->total_queue_count); 248 retval = -EPERM; 249 goto out_unlock; 250 } 251 252 if (list_empty(&qpd->queues_list)) { 253 retval = allocate_vmid(dqm, qpd, q); 254 if (retval) 255 goto out_unlock; 256 } 257 q->properties.vmid = qpd->vmid; 258 /* 259 * Eviction state logic: we only mark active queues as evicted 260 * to avoid the overhead of restoring inactive queues later 261 */ 262 if (qpd->evicted) 263 q->properties.is_evicted = (q->properties.queue_size > 0 && 264 q->properties.queue_percent > 0 && 265 q->properties.queue_address != 0); 266 267 q->properties.tba_addr = qpd->tba_addr; 268 q->properties.tma_addr = qpd->tma_addr; 269 270 if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE) 271 retval = create_compute_queue_nocpsch(dqm, q, qpd); 272 else if (q->properties.type == KFD_QUEUE_TYPE_SDMA) 273 retval = create_sdma_queue_nocpsch(dqm, q, qpd); 274 else 275 retval = -EINVAL; 276 277 if (retval) { 278 if (list_empty(&qpd->queues_list)) 279 deallocate_vmid(dqm, qpd, q); 280 goto out_unlock; 281 } 282 283 list_add(&q->list, &qpd->queues_list); 284 qpd->queue_count++; 285 if (q->properties.is_active) 286 dqm->queue_count++; 287 288 if (q->properties.type == KFD_QUEUE_TYPE_SDMA) 289 dqm->sdma_queue_count++; 290 291 /* 292 * Unconditionally increment this counter, regardless of the queue's 293 * type or whether the queue is active. 294 */ 295 dqm->total_queue_count++; 296 pr_debug("Total of %d queues are accountable so far\n", 297 dqm->total_queue_count); 298 299 out_unlock: 300 mutex_unlock(&dqm->lock); 301 return retval; 302 } 303 304 static int allocate_hqd(struct device_queue_manager *dqm, struct queue *q) 305 { 306 bool set; 307 int pipe, bit, i; 308 309 set = false; 310 311 for (pipe = dqm->next_pipe_to_allocate, i = 0; 312 i < get_pipes_per_mec(dqm); 313 pipe = ((pipe + 1) % get_pipes_per_mec(dqm)), ++i) { 314 315 if (!is_pipe_enabled(dqm, 0, pipe)) 316 continue; 317 318 if (dqm->allocated_queues[pipe] != 0) { 319 bit = ffs(dqm->allocated_queues[pipe]) - 1; 320 dqm->allocated_queues[pipe] &= ~(1 << bit); 321 q->pipe = pipe; 322 q->queue = bit; 323 set = true; 324 break; 325 } 326 } 327 328 if (!set) 329 return -EBUSY; 330 331 pr_debug("hqd slot - pipe %d, queue %d\n", q->pipe, q->queue); 332 /* horizontal hqd allocation */ 333 dqm->next_pipe_to_allocate = (pipe + 1) % get_pipes_per_mec(dqm); 334 335 return 0; 336 } 337 338 static inline void deallocate_hqd(struct device_queue_manager *dqm, 339 struct queue *q) 340 { 341 dqm->allocated_queues[q->pipe] |= (1 << q->queue); 342 } 343 344 static int create_compute_queue_nocpsch(struct device_queue_manager *dqm, 345 struct queue *q, 346 struct qcm_process_device *qpd) 347 { 348 int retval; 349 struct mqd_manager *mqd; 350 351 mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_COMPUTE); 352 if (!mqd) 353 return -ENOMEM; 354 355 retval = allocate_hqd(dqm, q); 356 if (retval) 357 return retval; 358 359 retval = allocate_doorbell(qpd, q); 360 if (retval) 361 goto out_deallocate_hqd; 362 363 retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj, 364 &q->gart_mqd_addr, &q->properties); 365 if (retval) 366 goto out_deallocate_doorbell; 367 368 pr_debug("Loading mqd to hqd on pipe %d, queue %d\n", 369 q->pipe, q->queue); 370 371 dqm->dev->kfd2kgd->set_scratch_backing_va( 372 dqm->dev->kgd, qpd->sh_hidden_private_base, qpd->vmid); 373 374 if (!q->properties.is_active) 375 return 0; 376 377 retval = mqd->load_mqd(mqd, q->mqd, q->pipe, q->queue, &q->properties, 378 q->process->mm); 379 if (retval) 380 goto out_uninit_mqd; 381 382 return 0; 383 384 out_uninit_mqd: 385 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj); 386 out_deallocate_doorbell: 387 deallocate_doorbell(qpd, q); 388 out_deallocate_hqd: 389 deallocate_hqd(dqm, q); 390 391 return retval; 392 } 393 394 /* Access to DQM has to be locked before calling destroy_queue_nocpsch_locked 395 * to avoid asynchronized access 396 */ 397 static int destroy_queue_nocpsch_locked(struct device_queue_manager *dqm, 398 struct qcm_process_device *qpd, 399 struct queue *q) 400 { 401 int retval; 402 struct mqd_manager *mqd; 403 404 mqd = dqm->ops.get_mqd_manager(dqm, 405 get_mqd_type_from_queue_type(q->properties.type)); 406 if (!mqd) 407 return -ENOMEM; 408 409 if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE) { 410 deallocate_hqd(dqm, q); 411 } else if (q->properties.type == KFD_QUEUE_TYPE_SDMA) { 412 dqm->sdma_queue_count--; 413 deallocate_sdma_queue(dqm, q->sdma_id); 414 } else { 415 pr_debug("q->properties.type %d is invalid\n", 416 q->properties.type); 417 return -EINVAL; 418 } 419 dqm->total_queue_count--; 420 421 deallocate_doorbell(qpd, q); 422 423 retval = mqd->destroy_mqd(mqd, q->mqd, 424 KFD_PREEMPT_TYPE_WAVEFRONT_RESET, 425 KFD_UNMAP_LATENCY_MS, 426 q->pipe, q->queue); 427 if (retval == -ETIME) 428 qpd->reset_wavefronts = true; 429 430 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj); 431 432 list_del(&q->list); 433 if (list_empty(&qpd->queues_list)) { 434 if (qpd->reset_wavefronts) { 435 pr_warn("Resetting wave fronts (nocpsch) on dev %p\n", 436 dqm->dev); 437 /* dbgdev_wave_reset_wavefronts has to be called before 438 * deallocate_vmid(), i.e. when vmid is still in use. 439 */ 440 dbgdev_wave_reset_wavefronts(dqm->dev, 441 qpd->pqm->process); 442 qpd->reset_wavefronts = false; 443 } 444 445 deallocate_vmid(dqm, qpd, q); 446 } 447 qpd->queue_count--; 448 if (q->properties.is_active) 449 dqm->queue_count--; 450 451 return retval; 452 } 453 454 static int destroy_queue_nocpsch(struct device_queue_manager *dqm, 455 struct qcm_process_device *qpd, 456 struct queue *q) 457 { 458 int retval; 459 460 mutex_lock(&dqm->lock); 461 retval = destroy_queue_nocpsch_locked(dqm, qpd, q); 462 mutex_unlock(&dqm->lock); 463 464 return retval; 465 } 466 467 static int update_queue(struct device_queue_manager *dqm, struct queue *q) 468 { 469 int retval; 470 struct mqd_manager *mqd; 471 struct kfd_process_device *pdd; 472 bool prev_active = false; 473 474 mutex_lock(&dqm->lock); 475 pdd = kfd_get_process_device_data(q->device, q->process); 476 if (!pdd) { 477 retval = -ENODEV; 478 goto out_unlock; 479 } 480 mqd = dqm->ops.get_mqd_manager(dqm, 481 get_mqd_type_from_queue_type(q->properties.type)); 482 if (!mqd) { 483 retval = -ENOMEM; 484 goto out_unlock; 485 } 486 /* 487 * Eviction state logic: we only mark active queues as evicted 488 * to avoid the overhead of restoring inactive queues later 489 */ 490 if (pdd->qpd.evicted) 491 q->properties.is_evicted = (q->properties.queue_size > 0 && 492 q->properties.queue_percent > 0 && 493 q->properties.queue_address != 0); 494 495 /* Save previous activity state for counters */ 496 prev_active = q->properties.is_active; 497 498 /* Make sure the queue is unmapped before updating the MQD */ 499 if (dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS) { 500 retval = unmap_queues_cpsch(dqm, 501 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0); 502 if (retval) { 503 pr_err("unmap queue failed\n"); 504 goto out_unlock; 505 } 506 } else if (prev_active && 507 (q->properties.type == KFD_QUEUE_TYPE_COMPUTE || 508 q->properties.type == KFD_QUEUE_TYPE_SDMA)) { 509 retval = mqd->destroy_mqd(mqd, q->mqd, 510 KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN, 511 KFD_UNMAP_LATENCY_MS, q->pipe, q->queue); 512 if (retval) { 513 pr_err("destroy mqd failed\n"); 514 goto out_unlock; 515 } 516 } 517 518 retval = mqd->update_mqd(mqd, q->mqd, &q->properties); 519 520 /* 521 * check active state vs. the previous state and modify 522 * counter accordingly. map_queues_cpsch uses the 523 * dqm->queue_count to determine whether a new runlist must be 524 * uploaded. 525 */ 526 if (q->properties.is_active && !prev_active) 527 dqm->queue_count++; 528 else if (!q->properties.is_active && prev_active) 529 dqm->queue_count--; 530 531 if (dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS) 532 retval = map_queues_cpsch(dqm); 533 else if (q->properties.is_active && 534 (q->properties.type == KFD_QUEUE_TYPE_COMPUTE || 535 q->properties.type == KFD_QUEUE_TYPE_SDMA)) 536 retval = mqd->load_mqd(mqd, q->mqd, q->pipe, q->queue, 537 &q->properties, q->process->mm); 538 539 out_unlock: 540 mutex_unlock(&dqm->lock); 541 return retval; 542 } 543 544 static struct mqd_manager *get_mqd_manager( 545 struct device_queue_manager *dqm, enum KFD_MQD_TYPE type) 546 { 547 struct mqd_manager *mqd; 548 549 if (WARN_ON(type >= KFD_MQD_TYPE_MAX)) 550 return NULL; 551 552 pr_debug("mqd type %d\n", type); 553 554 mqd = dqm->mqds[type]; 555 if (!mqd) { 556 mqd = mqd_manager_init(type, dqm->dev); 557 if (!mqd) 558 pr_err("mqd manager is NULL"); 559 dqm->mqds[type] = mqd; 560 } 561 562 return mqd; 563 } 564 565 static int evict_process_queues_nocpsch(struct device_queue_manager *dqm, 566 struct qcm_process_device *qpd) 567 { 568 struct queue *q; 569 struct mqd_manager *mqd; 570 struct kfd_process_device *pdd; 571 int retval = 0; 572 573 mutex_lock(&dqm->lock); 574 if (qpd->evicted++ > 0) /* already evicted, do nothing */ 575 goto out; 576 577 pdd = qpd_to_pdd(qpd); 578 pr_info_ratelimited("Evicting PASID %u queues\n", 579 pdd->process->pasid); 580 581 /* unactivate all active queues on the qpd */ 582 list_for_each_entry(q, &qpd->queues_list, list) { 583 if (!q->properties.is_active) 584 continue; 585 mqd = dqm->ops.get_mqd_manager(dqm, 586 get_mqd_type_from_queue_type(q->properties.type)); 587 if (!mqd) { /* should not be here */ 588 pr_err("Cannot evict queue, mqd mgr is NULL\n"); 589 retval = -ENOMEM; 590 goto out; 591 } 592 q->properties.is_evicted = true; 593 q->properties.is_active = false; 594 retval = mqd->destroy_mqd(mqd, q->mqd, 595 KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN, 596 KFD_UNMAP_LATENCY_MS, q->pipe, q->queue); 597 if (retval) 598 goto out; 599 dqm->queue_count--; 600 } 601 602 out: 603 mutex_unlock(&dqm->lock); 604 return retval; 605 } 606 607 static int evict_process_queues_cpsch(struct device_queue_manager *dqm, 608 struct qcm_process_device *qpd) 609 { 610 struct queue *q; 611 struct kfd_process_device *pdd; 612 int retval = 0; 613 614 mutex_lock(&dqm->lock); 615 if (qpd->evicted++ > 0) /* already evicted, do nothing */ 616 goto out; 617 618 pdd = qpd_to_pdd(qpd); 619 pr_info_ratelimited("Evicting PASID %u queues\n", 620 pdd->process->pasid); 621 622 /* unactivate all active queues on the qpd */ 623 list_for_each_entry(q, &qpd->queues_list, list) { 624 if (!q->properties.is_active) 625 continue; 626 q->properties.is_evicted = true; 627 q->properties.is_active = false; 628 dqm->queue_count--; 629 } 630 retval = execute_queues_cpsch(dqm, 631 qpd->is_debug ? 632 KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES : 633 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0); 634 635 out: 636 mutex_unlock(&dqm->lock); 637 return retval; 638 } 639 640 static int restore_process_queues_nocpsch(struct device_queue_manager *dqm, 641 struct qcm_process_device *qpd) 642 { 643 struct queue *q; 644 struct mqd_manager *mqd; 645 struct kfd_process_device *pdd; 646 uint32_t pd_base; 647 int retval = 0; 648 649 pdd = qpd_to_pdd(qpd); 650 /* Retrieve PD base */ 651 pd_base = dqm->dev->kfd2kgd->get_process_page_dir(pdd->vm); 652 653 mutex_lock(&dqm->lock); 654 if (WARN_ON_ONCE(!qpd->evicted)) /* already restored, do nothing */ 655 goto out; 656 if (qpd->evicted > 1) { /* ref count still > 0, decrement & quit */ 657 qpd->evicted--; 658 goto out; 659 } 660 661 pr_info_ratelimited("Restoring PASID %u queues\n", 662 pdd->process->pasid); 663 664 /* Update PD Base in QPD */ 665 qpd->page_table_base = pd_base; 666 pr_debug("Updated PD address to 0x%08x\n", pd_base); 667 668 if (!list_empty(&qpd->queues_list)) { 669 dqm->dev->kfd2kgd->set_vm_context_page_table_base( 670 dqm->dev->kgd, 671 qpd->vmid, 672 qpd->page_table_base); 673 kfd_flush_tlb(pdd); 674 } 675 676 /* activate all active queues on the qpd */ 677 list_for_each_entry(q, &qpd->queues_list, list) { 678 if (!q->properties.is_evicted) 679 continue; 680 mqd = dqm->ops.get_mqd_manager(dqm, 681 get_mqd_type_from_queue_type(q->properties.type)); 682 if (!mqd) { /* should not be here */ 683 pr_err("Cannot restore queue, mqd mgr is NULL\n"); 684 retval = -ENOMEM; 685 goto out; 686 } 687 q->properties.is_evicted = false; 688 q->properties.is_active = true; 689 retval = mqd->load_mqd(mqd, q->mqd, q->pipe, 690 q->queue, &q->properties, 691 q->process->mm); 692 if (retval) 693 goto out; 694 dqm->queue_count++; 695 } 696 qpd->evicted = 0; 697 out: 698 mutex_unlock(&dqm->lock); 699 return retval; 700 } 701 702 static int restore_process_queues_cpsch(struct device_queue_manager *dqm, 703 struct qcm_process_device *qpd) 704 { 705 struct queue *q; 706 struct kfd_process_device *pdd; 707 uint32_t pd_base; 708 int retval = 0; 709 710 pdd = qpd_to_pdd(qpd); 711 /* Retrieve PD base */ 712 pd_base = dqm->dev->kfd2kgd->get_process_page_dir(pdd->vm); 713 714 mutex_lock(&dqm->lock); 715 if (WARN_ON_ONCE(!qpd->evicted)) /* already restored, do nothing */ 716 goto out; 717 if (qpd->evicted > 1) { /* ref count still > 0, decrement & quit */ 718 qpd->evicted--; 719 goto out; 720 } 721 722 pr_info_ratelimited("Restoring PASID %u queues\n", 723 pdd->process->pasid); 724 725 /* Update PD Base in QPD */ 726 qpd->page_table_base = pd_base; 727 pr_debug("Updated PD address to 0x%08x\n", pd_base); 728 729 /* activate all active queues on the qpd */ 730 list_for_each_entry(q, &qpd->queues_list, list) { 731 if (!q->properties.is_evicted) 732 continue; 733 q->properties.is_evicted = false; 734 q->properties.is_active = true; 735 dqm->queue_count++; 736 } 737 retval = execute_queues_cpsch(dqm, 738 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0); 739 if (!retval) 740 qpd->evicted = 0; 741 out: 742 mutex_unlock(&dqm->lock); 743 return retval; 744 } 745 746 static int register_process(struct device_queue_manager *dqm, 747 struct qcm_process_device *qpd) 748 { 749 struct device_process_node *n; 750 struct kfd_process_device *pdd; 751 uint32_t pd_base; 752 int retval; 753 754 n = kzalloc(sizeof(*n), GFP_KERNEL); 755 if (!n) 756 return -ENOMEM; 757 758 n->qpd = qpd; 759 760 pdd = qpd_to_pdd(qpd); 761 /* Retrieve PD base */ 762 pd_base = dqm->dev->kfd2kgd->get_process_page_dir(pdd->vm); 763 764 mutex_lock(&dqm->lock); 765 list_add(&n->list, &dqm->queues); 766 767 /* Update PD Base in QPD */ 768 qpd->page_table_base = pd_base; 769 770 retval = dqm->asic_ops.update_qpd(dqm, qpd); 771 772 dqm->processes_count++; 773 774 mutex_unlock(&dqm->lock); 775 776 return retval; 777 } 778 779 static int unregister_process(struct device_queue_manager *dqm, 780 struct qcm_process_device *qpd) 781 { 782 int retval; 783 struct device_process_node *cur, *next; 784 785 pr_debug("qpd->queues_list is %s\n", 786 list_empty(&qpd->queues_list) ? "empty" : "not empty"); 787 788 retval = 0; 789 mutex_lock(&dqm->lock); 790 791 list_for_each_entry_safe(cur, next, &dqm->queues, list) { 792 if (qpd == cur->qpd) { 793 list_del(&cur->list); 794 kfree(cur); 795 dqm->processes_count--; 796 goto out; 797 } 798 } 799 /* qpd not found in dqm list */ 800 retval = 1; 801 out: 802 mutex_unlock(&dqm->lock); 803 return retval; 804 } 805 806 static int 807 set_pasid_vmid_mapping(struct device_queue_manager *dqm, unsigned int pasid, 808 unsigned int vmid) 809 { 810 uint32_t pasid_mapping; 811 812 pasid_mapping = (pasid == 0) ? 0 : 813 (uint32_t)pasid | 814 ATC_VMID_PASID_MAPPING_VALID; 815 816 return dqm->dev->kfd2kgd->set_pasid_vmid_mapping( 817 dqm->dev->kgd, pasid_mapping, 818 vmid); 819 } 820 821 static void init_interrupts(struct device_queue_manager *dqm) 822 { 823 unsigned int i; 824 825 for (i = 0 ; i < get_pipes_per_mec(dqm) ; i++) 826 if (is_pipe_enabled(dqm, 0, i)) 827 dqm->dev->kfd2kgd->init_interrupts(dqm->dev->kgd, i); 828 } 829 830 static int initialize_nocpsch(struct device_queue_manager *dqm) 831 { 832 int pipe, queue; 833 834 pr_debug("num of pipes: %d\n", get_pipes_per_mec(dqm)); 835 836 dqm->allocated_queues = kcalloc(get_pipes_per_mec(dqm), 837 sizeof(unsigned int), GFP_KERNEL); 838 if (!dqm->allocated_queues) 839 return -ENOMEM; 840 841 mutex_init(&dqm->lock); 842 INIT_LIST_HEAD(&dqm->queues); 843 dqm->queue_count = dqm->next_pipe_to_allocate = 0; 844 dqm->sdma_queue_count = 0; 845 846 for (pipe = 0; pipe < get_pipes_per_mec(dqm); pipe++) { 847 int pipe_offset = pipe * get_queues_per_pipe(dqm); 848 849 for (queue = 0; queue < get_queues_per_pipe(dqm); queue++) 850 if (test_bit(pipe_offset + queue, 851 dqm->dev->shared_resources.queue_bitmap)) 852 dqm->allocated_queues[pipe] |= 1 << queue; 853 } 854 855 dqm->vmid_bitmap = (1 << dqm->dev->vm_info.vmid_num_kfd) - 1; 856 dqm->sdma_bitmap = (1 << CIK_SDMA_QUEUES) - 1; 857 858 return 0; 859 } 860 861 static void uninitialize(struct device_queue_manager *dqm) 862 { 863 int i; 864 865 WARN_ON(dqm->queue_count > 0 || dqm->processes_count > 0); 866 867 kfree(dqm->allocated_queues); 868 for (i = 0 ; i < KFD_MQD_TYPE_MAX ; i++) 869 kfree(dqm->mqds[i]); 870 mutex_destroy(&dqm->lock); 871 kfd_gtt_sa_free(dqm->dev, dqm->pipeline_mem); 872 } 873 874 static int start_nocpsch(struct device_queue_manager *dqm) 875 { 876 init_interrupts(dqm); 877 return pm_init(&dqm->packets, dqm); 878 } 879 880 static int stop_nocpsch(struct device_queue_manager *dqm) 881 { 882 pm_uninit(&dqm->packets); 883 return 0; 884 } 885 886 static int allocate_sdma_queue(struct device_queue_manager *dqm, 887 unsigned int *sdma_queue_id) 888 { 889 int bit; 890 891 if (dqm->sdma_bitmap == 0) 892 return -ENOMEM; 893 894 bit = ffs(dqm->sdma_bitmap) - 1; 895 dqm->sdma_bitmap &= ~(1 << bit); 896 *sdma_queue_id = bit; 897 898 return 0; 899 } 900 901 static void deallocate_sdma_queue(struct device_queue_manager *dqm, 902 unsigned int sdma_queue_id) 903 { 904 if (sdma_queue_id >= CIK_SDMA_QUEUES) 905 return; 906 dqm->sdma_bitmap |= (1 << sdma_queue_id); 907 } 908 909 static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm, 910 struct queue *q, 911 struct qcm_process_device *qpd) 912 { 913 struct mqd_manager *mqd; 914 int retval; 915 916 mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_SDMA); 917 if (!mqd) 918 return -ENOMEM; 919 920 retval = allocate_sdma_queue(dqm, &q->sdma_id); 921 if (retval) 922 return retval; 923 924 q->properties.sdma_queue_id = q->sdma_id / CIK_SDMA_QUEUES_PER_ENGINE; 925 q->properties.sdma_engine_id = q->sdma_id % CIK_SDMA_QUEUES_PER_ENGINE; 926 927 retval = allocate_doorbell(qpd, q); 928 if (retval) 929 goto out_deallocate_sdma_queue; 930 931 pr_debug("SDMA id is: %d\n", q->sdma_id); 932 pr_debug("SDMA queue id: %d\n", q->properties.sdma_queue_id); 933 pr_debug("SDMA engine id: %d\n", q->properties.sdma_engine_id); 934 935 dqm->asic_ops.init_sdma_vm(dqm, q, qpd); 936 retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj, 937 &q->gart_mqd_addr, &q->properties); 938 if (retval) 939 goto out_deallocate_doorbell; 940 941 retval = mqd->load_mqd(mqd, q->mqd, 0, 0, &q->properties, NULL); 942 if (retval) 943 goto out_uninit_mqd; 944 945 return 0; 946 947 out_uninit_mqd: 948 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj); 949 out_deallocate_doorbell: 950 deallocate_doorbell(qpd, q); 951 out_deallocate_sdma_queue: 952 deallocate_sdma_queue(dqm, q->sdma_id); 953 954 return retval; 955 } 956 957 /* 958 * Device Queue Manager implementation for cp scheduler 959 */ 960 961 static int set_sched_resources(struct device_queue_manager *dqm) 962 { 963 int i, mec; 964 struct scheduling_resources res; 965 966 res.vmid_mask = dqm->dev->shared_resources.compute_vmid_bitmap; 967 968 res.queue_mask = 0; 969 for (i = 0; i < KGD_MAX_QUEUES; ++i) { 970 mec = (i / dqm->dev->shared_resources.num_queue_per_pipe) 971 / dqm->dev->shared_resources.num_pipe_per_mec; 972 973 if (!test_bit(i, dqm->dev->shared_resources.queue_bitmap)) 974 continue; 975 976 /* only acquire queues from the first MEC */ 977 if (mec > 0) 978 continue; 979 980 /* This situation may be hit in the future if a new HW 981 * generation exposes more than 64 queues. If so, the 982 * definition of res.queue_mask needs updating 983 */ 984 if (WARN_ON(i >= (sizeof(res.queue_mask)*8))) { 985 pr_err("Invalid queue enabled by amdgpu: %d\n", i); 986 break; 987 } 988 989 res.queue_mask |= (1ull << i); 990 } 991 res.gws_mask = res.oac_mask = res.gds_heap_base = 992 res.gds_heap_size = 0; 993 994 pr_debug("Scheduling resources:\n" 995 "vmid mask: 0x%8X\n" 996 "queue mask: 0x%8llX\n", 997 res.vmid_mask, res.queue_mask); 998 999 return pm_send_set_resources(&dqm->packets, &res); 1000 } 1001 1002 static int initialize_cpsch(struct device_queue_manager *dqm) 1003 { 1004 pr_debug("num of pipes: %d\n", get_pipes_per_mec(dqm)); 1005 1006 mutex_init(&dqm->lock); 1007 INIT_LIST_HEAD(&dqm->queues); 1008 dqm->queue_count = dqm->processes_count = 0; 1009 dqm->sdma_queue_count = 0; 1010 dqm->active_runlist = false; 1011 dqm->sdma_bitmap = (1 << CIK_SDMA_QUEUES) - 1; 1012 1013 return 0; 1014 } 1015 1016 static int start_cpsch(struct device_queue_manager *dqm) 1017 { 1018 int retval; 1019 1020 retval = 0; 1021 1022 retval = pm_init(&dqm->packets, dqm); 1023 if (retval) 1024 goto fail_packet_manager_init; 1025 1026 retval = set_sched_resources(dqm); 1027 if (retval) 1028 goto fail_set_sched_resources; 1029 1030 pr_debug("Allocating fence memory\n"); 1031 1032 /* allocate fence memory on the gart */ 1033 retval = kfd_gtt_sa_allocate(dqm->dev, sizeof(*dqm->fence_addr), 1034 &dqm->fence_mem); 1035 1036 if (retval) 1037 goto fail_allocate_vidmem; 1038 1039 dqm->fence_addr = dqm->fence_mem->cpu_ptr; 1040 dqm->fence_gpu_addr = dqm->fence_mem->gpu_addr; 1041 1042 init_interrupts(dqm); 1043 1044 mutex_lock(&dqm->lock); 1045 execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0); 1046 mutex_unlock(&dqm->lock); 1047 1048 return 0; 1049 fail_allocate_vidmem: 1050 fail_set_sched_resources: 1051 pm_uninit(&dqm->packets); 1052 fail_packet_manager_init: 1053 return retval; 1054 } 1055 1056 static int stop_cpsch(struct device_queue_manager *dqm) 1057 { 1058 mutex_lock(&dqm->lock); 1059 unmap_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0); 1060 mutex_unlock(&dqm->lock); 1061 1062 kfd_gtt_sa_free(dqm->dev, dqm->fence_mem); 1063 pm_uninit(&dqm->packets); 1064 1065 return 0; 1066 } 1067 1068 static int create_kernel_queue_cpsch(struct device_queue_manager *dqm, 1069 struct kernel_queue *kq, 1070 struct qcm_process_device *qpd) 1071 { 1072 mutex_lock(&dqm->lock); 1073 if (dqm->total_queue_count >= max_num_of_queues_per_device) { 1074 pr_warn("Can't create new kernel queue because %d queues were already created\n", 1075 dqm->total_queue_count); 1076 mutex_unlock(&dqm->lock); 1077 return -EPERM; 1078 } 1079 1080 /* 1081 * Unconditionally increment this counter, regardless of the queue's 1082 * type or whether the queue is active. 1083 */ 1084 dqm->total_queue_count++; 1085 pr_debug("Total of %d queues are accountable so far\n", 1086 dqm->total_queue_count); 1087 1088 list_add(&kq->list, &qpd->priv_queue_list); 1089 dqm->queue_count++; 1090 qpd->is_debug = true; 1091 execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0); 1092 mutex_unlock(&dqm->lock); 1093 1094 return 0; 1095 } 1096 1097 static void destroy_kernel_queue_cpsch(struct device_queue_manager *dqm, 1098 struct kernel_queue *kq, 1099 struct qcm_process_device *qpd) 1100 { 1101 mutex_lock(&dqm->lock); 1102 list_del(&kq->list); 1103 dqm->queue_count--; 1104 qpd->is_debug = false; 1105 execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0); 1106 /* 1107 * Unconditionally decrement this counter, regardless of the queue's 1108 * type. 1109 */ 1110 dqm->total_queue_count--; 1111 pr_debug("Total of %d queues are accountable so far\n", 1112 dqm->total_queue_count); 1113 mutex_unlock(&dqm->lock); 1114 } 1115 1116 static int create_queue_cpsch(struct device_queue_manager *dqm, struct queue *q, 1117 struct qcm_process_device *qpd) 1118 { 1119 int retval; 1120 struct mqd_manager *mqd; 1121 1122 retval = 0; 1123 1124 mutex_lock(&dqm->lock); 1125 1126 if (dqm->total_queue_count >= max_num_of_queues_per_device) { 1127 pr_warn("Can't create new usermode queue because %d queues were already created\n", 1128 dqm->total_queue_count); 1129 retval = -EPERM; 1130 goto out_unlock; 1131 } 1132 1133 if (q->properties.type == KFD_QUEUE_TYPE_SDMA) { 1134 retval = allocate_sdma_queue(dqm, &q->sdma_id); 1135 if (retval) 1136 goto out_unlock; 1137 q->properties.sdma_queue_id = 1138 q->sdma_id / CIK_SDMA_QUEUES_PER_ENGINE; 1139 q->properties.sdma_engine_id = 1140 q->sdma_id % CIK_SDMA_QUEUES_PER_ENGINE; 1141 } 1142 1143 retval = allocate_doorbell(qpd, q); 1144 if (retval) 1145 goto out_deallocate_sdma_queue; 1146 1147 mqd = dqm->ops.get_mqd_manager(dqm, 1148 get_mqd_type_from_queue_type(q->properties.type)); 1149 1150 if (!mqd) { 1151 retval = -ENOMEM; 1152 goto out_deallocate_doorbell; 1153 } 1154 /* 1155 * Eviction state logic: we only mark active queues as evicted 1156 * to avoid the overhead of restoring inactive queues later 1157 */ 1158 if (qpd->evicted) 1159 q->properties.is_evicted = (q->properties.queue_size > 0 && 1160 q->properties.queue_percent > 0 && 1161 q->properties.queue_address != 0); 1162 1163 dqm->asic_ops.init_sdma_vm(dqm, q, qpd); 1164 1165 q->properties.tba_addr = qpd->tba_addr; 1166 q->properties.tma_addr = qpd->tma_addr; 1167 retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj, 1168 &q->gart_mqd_addr, &q->properties); 1169 if (retval) 1170 goto out_deallocate_doorbell; 1171 1172 list_add(&q->list, &qpd->queues_list); 1173 qpd->queue_count++; 1174 if (q->properties.is_active) { 1175 dqm->queue_count++; 1176 retval = execute_queues_cpsch(dqm, 1177 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0); 1178 } 1179 1180 if (q->properties.type == KFD_QUEUE_TYPE_SDMA) 1181 dqm->sdma_queue_count++; 1182 /* 1183 * Unconditionally increment this counter, regardless of the queue's 1184 * type or whether the queue is active. 1185 */ 1186 dqm->total_queue_count++; 1187 1188 pr_debug("Total of %d queues are accountable so far\n", 1189 dqm->total_queue_count); 1190 1191 mutex_unlock(&dqm->lock); 1192 return retval; 1193 1194 out_deallocate_doorbell: 1195 deallocate_doorbell(qpd, q); 1196 out_deallocate_sdma_queue: 1197 if (q->properties.type == KFD_QUEUE_TYPE_SDMA) 1198 deallocate_sdma_queue(dqm, q->sdma_id); 1199 out_unlock: 1200 mutex_unlock(&dqm->lock); 1201 return retval; 1202 } 1203 1204 int amdkfd_fence_wait_timeout(unsigned int *fence_addr, 1205 unsigned int fence_value, 1206 unsigned int timeout_ms) 1207 { 1208 unsigned long end_jiffies = msecs_to_jiffies(timeout_ms) + jiffies; 1209 1210 while (*fence_addr != fence_value) { 1211 if (time_after(jiffies, end_jiffies)) { 1212 pr_err("qcm fence wait loop timeout expired\n"); 1213 return -ETIME; 1214 } 1215 schedule(); 1216 } 1217 1218 return 0; 1219 } 1220 1221 static int unmap_sdma_queues(struct device_queue_manager *dqm, 1222 unsigned int sdma_engine) 1223 { 1224 return pm_send_unmap_queue(&dqm->packets, KFD_QUEUE_TYPE_SDMA, 1225 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0, false, 1226 sdma_engine); 1227 } 1228 1229 /* dqm->lock mutex has to be locked before calling this function */ 1230 static int map_queues_cpsch(struct device_queue_manager *dqm) 1231 { 1232 int retval; 1233 1234 if (dqm->queue_count <= 0 || dqm->processes_count <= 0) 1235 return 0; 1236 1237 if (dqm->active_runlist) 1238 return 0; 1239 1240 retval = pm_send_runlist(&dqm->packets, &dqm->queues); 1241 if (retval) { 1242 pr_err("failed to execute runlist\n"); 1243 return retval; 1244 } 1245 dqm->active_runlist = true; 1246 1247 return retval; 1248 } 1249 1250 /* dqm->lock mutex has to be locked before calling this function */ 1251 static int unmap_queues_cpsch(struct device_queue_manager *dqm, 1252 enum kfd_unmap_queues_filter filter, 1253 uint32_t filter_param) 1254 { 1255 int retval = 0; 1256 1257 if (!dqm->active_runlist) 1258 return retval; 1259 1260 pr_debug("Before destroying queues, sdma queue count is : %u\n", 1261 dqm->sdma_queue_count); 1262 1263 if (dqm->sdma_queue_count > 0) { 1264 unmap_sdma_queues(dqm, 0); 1265 unmap_sdma_queues(dqm, 1); 1266 } 1267 1268 retval = pm_send_unmap_queue(&dqm->packets, KFD_QUEUE_TYPE_COMPUTE, 1269 filter, filter_param, false, 0); 1270 if (retval) 1271 return retval; 1272 1273 *dqm->fence_addr = KFD_FENCE_INIT; 1274 pm_send_query_status(&dqm->packets, dqm->fence_gpu_addr, 1275 KFD_FENCE_COMPLETED); 1276 /* should be timed out */ 1277 retval = amdkfd_fence_wait_timeout(dqm->fence_addr, KFD_FENCE_COMPLETED, 1278 QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS); 1279 if (retval) 1280 return retval; 1281 1282 pm_release_ib(&dqm->packets); 1283 dqm->active_runlist = false; 1284 1285 return retval; 1286 } 1287 1288 /* dqm->lock mutex has to be locked before calling this function */ 1289 static int execute_queues_cpsch(struct device_queue_manager *dqm, 1290 enum kfd_unmap_queues_filter filter, 1291 uint32_t filter_param) 1292 { 1293 int retval; 1294 1295 retval = unmap_queues_cpsch(dqm, filter, filter_param); 1296 if (retval) { 1297 pr_err("The cp might be in an unrecoverable state due to an unsuccessful queues preemption\n"); 1298 return retval; 1299 } 1300 1301 return map_queues_cpsch(dqm); 1302 } 1303 1304 static int destroy_queue_cpsch(struct device_queue_manager *dqm, 1305 struct qcm_process_device *qpd, 1306 struct queue *q) 1307 { 1308 int retval; 1309 struct mqd_manager *mqd; 1310 bool preempt_all_queues; 1311 1312 preempt_all_queues = false; 1313 1314 retval = 0; 1315 1316 /* remove queue from list to prevent rescheduling after preemption */ 1317 mutex_lock(&dqm->lock); 1318 1319 if (qpd->is_debug) { 1320 /* 1321 * error, currently we do not allow to destroy a queue 1322 * of a currently debugged process 1323 */ 1324 retval = -EBUSY; 1325 goto failed_try_destroy_debugged_queue; 1326 1327 } 1328 1329 mqd = dqm->ops.get_mqd_manager(dqm, 1330 get_mqd_type_from_queue_type(q->properties.type)); 1331 if (!mqd) { 1332 retval = -ENOMEM; 1333 goto failed; 1334 } 1335 1336 deallocate_doorbell(qpd, q); 1337 1338 if (q->properties.type == KFD_QUEUE_TYPE_SDMA) { 1339 dqm->sdma_queue_count--; 1340 deallocate_sdma_queue(dqm, q->sdma_id); 1341 } 1342 1343 list_del(&q->list); 1344 qpd->queue_count--; 1345 if (q->properties.is_active) { 1346 dqm->queue_count--; 1347 retval = execute_queues_cpsch(dqm, 1348 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0); 1349 if (retval == -ETIME) 1350 qpd->reset_wavefronts = true; 1351 } 1352 1353 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj); 1354 1355 /* 1356 * Unconditionally decrement this counter, regardless of the queue's 1357 * type 1358 */ 1359 dqm->total_queue_count--; 1360 pr_debug("Total of %d queues are accountable so far\n", 1361 dqm->total_queue_count); 1362 1363 mutex_unlock(&dqm->lock); 1364 1365 return retval; 1366 1367 failed: 1368 failed_try_destroy_debugged_queue: 1369 1370 mutex_unlock(&dqm->lock); 1371 return retval; 1372 } 1373 1374 /* 1375 * Low bits must be 0000/FFFF as required by HW, high bits must be 0 to 1376 * stay in user mode. 1377 */ 1378 #define APE1_FIXED_BITS_MASK 0xFFFF80000000FFFFULL 1379 /* APE1 limit is inclusive and 64K aligned. */ 1380 #define APE1_LIMIT_ALIGNMENT 0xFFFF 1381 1382 static bool set_cache_memory_policy(struct device_queue_manager *dqm, 1383 struct qcm_process_device *qpd, 1384 enum cache_policy default_policy, 1385 enum cache_policy alternate_policy, 1386 void __user *alternate_aperture_base, 1387 uint64_t alternate_aperture_size) 1388 { 1389 bool retval = true; 1390 1391 if (!dqm->asic_ops.set_cache_memory_policy) 1392 return retval; 1393 1394 mutex_lock(&dqm->lock); 1395 1396 if (alternate_aperture_size == 0) { 1397 /* base > limit disables APE1 */ 1398 qpd->sh_mem_ape1_base = 1; 1399 qpd->sh_mem_ape1_limit = 0; 1400 } else { 1401 /* 1402 * In FSA64, APE1_Base[63:0] = { 16{SH_MEM_APE1_BASE[31]}, 1403 * SH_MEM_APE1_BASE[31:0], 0x0000 } 1404 * APE1_Limit[63:0] = { 16{SH_MEM_APE1_LIMIT[31]}, 1405 * SH_MEM_APE1_LIMIT[31:0], 0xFFFF } 1406 * Verify that the base and size parameters can be 1407 * represented in this format and convert them. 1408 * Additionally restrict APE1 to user-mode addresses. 1409 */ 1410 1411 uint64_t base = (uintptr_t)alternate_aperture_base; 1412 uint64_t limit = base + alternate_aperture_size - 1; 1413 1414 if (limit <= base || (base & APE1_FIXED_BITS_MASK) != 0 || 1415 (limit & APE1_FIXED_BITS_MASK) != APE1_LIMIT_ALIGNMENT) { 1416 retval = false; 1417 goto out; 1418 } 1419 1420 qpd->sh_mem_ape1_base = base >> 16; 1421 qpd->sh_mem_ape1_limit = limit >> 16; 1422 } 1423 1424 retval = dqm->asic_ops.set_cache_memory_policy( 1425 dqm, 1426 qpd, 1427 default_policy, 1428 alternate_policy, 1429 alternate_aperture_base, 1430 alternate_aperture_size); 1431 1432 if ((dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) && (qpd->vmid != 0)) 1433 program_sh_mem_settings(dqm, qpd); 1434 1435 pr_debug("sh_mem_config: 0x%x, ape1_base: 0x%x, ape1_limit: 0x%x\n", 1436 qpd->sh_mem_config, qpd->sh_mem_ape1_base, 1437 qpd->sh_mem_ape1_limit); 1438 1439 out: 1440 mutex_unlock(&dqm->lock); 1441 return retval; 1442 } 1443 1444 static int set_trap_handler(struct device_queue_manager *dqm, 1445 struct qcm_process_device *qpd, 1446 uint64_t tba_addr, 1447 uint64_t tma_addr) 1448 { 1449 uint64_t *tma; 1450 1451 if (dqm->dev->cwsr_enabled) { 1452 /* Jump from CWSR trap handler to user trap */ 1453 tma = (uint64_t *)(qpd->cwsr_kaddr + KFD_CWSR_TMA_OFFSET); 1454 tma[0] = tba_addr; 1455 tma[1] = tma_addr; 1456 } else { 1457 qpd->tba_addr = tba_addr; 1458 qpd->tma_addr = tma_addr; 1459 } 1460 1461 return 0; 1462 } 1463 1464 static int process_termination_nocpsch(struct device_queue_manager *dqm, 1465 struct qcm_process_device *qpd) 1466 { 1467 struct queue *q, *next; 1468 struct device_process_node *cur, *next_dpn; 1469 int retval = 0; 1470 1471 mutex_lock(&dqm->lock); 1472 1473 /* Clear all user mode queues */ 1474 list_for_each_entry_safe(q, next, &qpd->queues_list, list) { 1475 int ret; 1476 1477 ret = destroy_queue_nocpsch_locked(dqm, qpd, q); 1478 if (ret) 1479 retval = ret; 1480 } 1481 1482 /* Unregister process */ 1483 list_for_each_entry_safe(cur, next_dpn, &dqm->queues, list) { 1484 if (qpd == cur->qpd) { 1485 list_del(&cur->list); 1486 kfree(cur); 1487 dqm->processes_count--; 1488 break; 1489 } 1490 } 1491 1492 mutex_unlock(&dqm->lock); 1493 return retval; 1494 } 1495 1496 1497 static int process_termination_cpsch(struct device_queue_manager *dqm, 1498 struct qcm_process_device *qpd) 1499 { 1500 int retval; 1501 struct queue *q, *next; 1502 struct kernel_queue *kq, *kq_next; 1503 struct mqd_manager *mqd; 1504 struct device_process_node *cur, *next_dpn; 1505 enum kfd_unmap_queues_filter filter = 1506 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES; 1507 1508 retval = 0; 1509 1510 mutex_lock(&dqm->lock); 1511 1512 /* Clean all kernel queues */ 1513 list_for_each_entry_safe(kq, kq_next, &qpd->priv_queue_list, list) { 1514 list_del(&kq->list); 1515 dqm->queue_count--; 1516 qpd->is_debug = false; 1517 dqm->total_queue_count--; 1518 filter = KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES; 1519 } 1520 1521 /* Clear all user mode queues */ 1522 list_for_each_entry(q, &qpd->queues_list, list) { 1523 if (q->properties.type == KFD_QUEUE_TYPE_SDMA) { 1524 dqm->sdma_queue_count--; 1525 deallocate_sdma_queue(dqm, q->sdma_id); 1526 } 1527 1528 if (q->properties.is_active) 1529 dqm->queue_count--; 1530 1531 dqm->total_queue_count--; 1532 } 1533 1534 /* Unregister process */ 1535 list_for_each_entry_safe(cur, next_dpn, &dqm->queues, list) { 1536 if (qpd == cur->qpd) { 1537 list_del(&cur->list); 1538 kfree(cur); 1539 dqm->processes_count--; 1540 break; 1541 } 1542 } 1543 1544 retval = execute_queues_cpsch(dqm, filter, 0); 1545 if (retval || qpd->reset_wavefronts) { 1546 pr_warn("Resetting wave fronts (cpsch) on dev %p\n", dqm->dev); 1547 dbgdev_wave_reset_wavefronts(dqm->dev, qpd->pqm->process); 1548 qpd->reset_wavefronts = false; 1549 } 1550 1551 /* lastly, free mqd resources */ 1552 list_for_each_entry_safe(q, next, &qpd->queues_list, list) { 1553 mqd = dqm->ops.get_mqd_manager(dqm, 1554 get_mqd_type_from_queue_type(q->properties.type)); 1555 if (!mqd) { 1556 retval = -ENOMEM; 1557 goto out; 1558 } 1559 list_del(&q->list); 1560 qpd->queue_count--; 1561 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj); 1562 } 1563 1564 out: 1565 mutex_unlock(&dqm->lock); 1566 return retval; 1567 } 1568 1569 struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev) 1570 { 1571 struct device_queue_manager *dqm; 1572 1573 pr_debug("Loading device queue manager\n"); 1574 1575 dqm = kzalloc(sizeof(*dqm), GFP_KERNEL); 1576 if (!dqm) 1577 return NULL; 1578 1579 switch (dev->device_info->asic_family) { 1580 /* HWS is not available on Hawaii. */ 1581 case CHIP_HAWAII: 1582 /* HWS depends on CWSR for timely dequeue. CWSR is not 1583 * available on Tonga. 1584 * 1585 * FIXME: This argument also applies to Kaveri. 1586 */ 1587 case CHIP_TONGA: 1588 dqm->sched_policy = KFD_SCHED_POLICY_NO_HWS; 1589 break; 1590 default: 1591 dqm->sched_policy = sched_policy; 1592 break; 1593 } 1594 1595 dqm->dev = dev; 1596 switch (dqm->sched_policy) { 1597 case KFD_SCHED_POLICY_HWS: 1598 case KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION: 1599 /* initialize dqm for cp scheduling */ 1600 dqm->ops.create_queue = create_queue_cpsch; 1601 dqm->ops.initialize = initialize_cpsch; 1602 dqm->ops.start = start_cpsch; 1603 dqm->ops.stop = stop_cpsch; 1604 dqm->ops.destroy_queue = destroy_queue_cpsch; 1605 dqm->ops.update_queue = update_queue; 1606 dqm->ops.get_mqd_manager = get_mqd_manager; 1607 dqm->ops.register_process = register_process; 1608 dqm->ops.unregister_process = unregister_process; 1609 dqm->ops.uninitialize = uninitialize; 1610 dqm->ops.create_kernel_queue = create_kernel_queue_cpsch; 1611 dqm->ops.destroy_kernel_queue = destroy_kernel_queue_cpsch; 1612 dqm->ops.set_cache_memory_policy = set_cache_memory_policy; 1613 dqm->ops.set_trap_handler = set_trap_handler; 1614 dqm->ops.process_termination = process_termination_cpsch; 1615 dqm->ops.evict_process_queues = evict_process_queues_cpsch; 1616 dqm->ops.restore_process_queues = restore_process_queues_cpsch; 1617 break; 1618 case KFD_SCHED_POLICY_NO_HWS: 1619 /* initialize dqm for no cp scheduling */ 1620 dqm->ops.start = start_nocpsch; 1621 dqm->ops.stop = stop_nocpsch; 1622 dqm->ops.create_queue = create_queue_nocpsch; 1623 dqm->ops.destroy_queue = destroy_queue_nocpsch; 1624 dqm->ops.update_queue = update_queue; 1625 dqm->ops.get_mqd_manager = get_mqd_manager; 1626 dqm->ops.register_process = register_process; 1627 dqm->ops.unregister_process = unregister_process; 1628 dqm->ops.initialize = initialize_nocpsch; 1629 dqm->ops.uninitialize = uninitialize; 1630 dqm->ops.set_cache_memory_policy = set_cache_memory_policy; 1631 dqm->ops.set_trap_handler = set_trap_handler; 1632 dqm->ops.process_termination = process_termination_nocpsch; 1633 dqm->ops.evict_process_queues = evict_process_queues_nocpsch; 1634 dqm->ops.restore_process_queues = 1635 restore_process_queues_nocpsch; 1636 break; 1637 default: 1638 pr_err("Invalid scheduling policy %d\n", dqm->sched_policy); 1639 goto out_free; 1640 } 1641 1642 switch (dev->device_info->asic_family) { 1643 case CHIP_CARRIZO: 1644 device_queue_manager_init_vi(&dqm->asic_ops); 1645 break; 1646 1647 case CHIP_KAVERI: 1648 device_queue_manager_init_cik(&dqm->asic_ops); 1649 break; 1650 1651 case CHIP_HAWAII: 1652 device_queue_manager_init_cik_hawaii(&dqm->asic_ops); 1653 break; 1654 1655 case CHIP_TONGA: 1656 case CHIP_FIJI: 1657 case CHIP_POLARIS10: 1658 case CHIP_POLARIS11: 1659 device_queue_manager_init_vi_tonga(&dqm->asic_ops); 1660 break; 1661 1662 case CHIP_VEGA10: 1663 case CHIP_RAVEN: 1664 device_queue_manager_init_v9(&dqm->asic_ops); 1665 break; 1666 default: 1667 WARN(1, "Unexpected ASIC family %u", 1668 dev->device_info->asic_family); 1669 goto out_free; 1670 } 1671 1672 if (!dqm->ops.initialize(dqm)) 1673 return dqm; 1674 1675 out_free: 1676 kfree(dqm); 1677 return NULL; 1678 } 1679 1680 void device_queue_manager_uninit(struct device_queue_manager *dqm) 1681 { 1682 dqm->ops.uninitialize(dqm); 1683 kfree(dqm); 1684 } 1685 1686 #if defined(CONFIG_DEBUG_FS) 1687 1688 static void seq_reg_dump(struct seq_file *m, 1689 uint32_t (*dump)[2], uint32_t n_regs) 1690 { 1691 uint32_t i, count; 1692 1693 for (i = 0, count = 0; i < n_regs; i++) { 1694 if (count == 0 || 1695 dump[i-1][0] + sizeof(uint32_t) != dump[i][0]) { 1696 seq_printf(m, "%s %08x: %08x", 1697 i ? "\n" : "", 1698 dump[i][0], dump[i][1]); 1699 count = 7; 1700 } else { 1701 seq_printf(m, " %08x", dump[i][1]); 1702 count--; 1703 } 1704 } 1705 1706 seq_puts(m, "\n"); 1707 } 1708 1709 int dqm_debugfs_hqds(struct seq_file *m, void *data) 1710 { 1711 struct device_queue_manager *dqm = data; 1712 uint32_t (*dump)[2], n_regs; 1713 int pipe, queue; 1714 int r = 0; 1715 1716 r = dqm->dev->kfd2kgd->hqd_dump(dqm->dev->kgd, 1717 KFD_CIK_HIQ_PIPE, KFD_CIK_HIQ_QUEUE, &dump, &n_regs); 1718 if (!r) { 1719 seq_printf(m, " HIQ on MEC %d Pipe %d Queue %d\n", 1720 KFD_CIK_HIQ_PIPE/get_pipes_per_mec(dqm)+1, 1721 KFD_CIK_HIQ_PIPE%get_pipes_per_mec(dqm), 1722 KFD_CIK_HIQ_QUEUE); 1723 seq_reg_dump(m, dump, n_regs); 1724 1725 kfree(dump); 1726 } 1727 1728 for (pipe = 0; pipe < get_pipes_per_mec(dqm); pipe++) { 1729 int pipe_offset = pipe * get_queues_per_pipe(dqm); 1730 1731 for (queue = 0; queue < get_queues_per_pipe(dqm); queue++) { 1732 if (!test_bit(pipe_offset + queue, 1733 dqm->dev->shared_resources.queue_bitmap)) 1734 continue; 1735 1736 r = dqm->dev->kfd2kgd->hqd_dump( 1737 dqm->dev->kgd, pipe, queue, &dump, &n_regs); 1738 if (r) 1739 break; 1740 1741 seq_printf(m, " CP Pipe %d, Queue %d\n", 1742 pipe, queue); 1743 seq_reg_dump(m, dump, n_regs); 1744 1745 kfree(dump); 1746 } 1747 } 1748 1749 for (pipe = 0; pipe < CIK_SDMA_ENGINE_NUM; pipe++) { 1750 for (queue = 0; queue < CIK_SDMA_QUEUES_PER_ENGINE; queue++) { 1751 r = dqm->dev->kfd2kgd->hqd_sdma_dump( 1752 dqm->dev->kgd, pipe, queue, &dump, &n_regs); 1753 if (r) 1754 break; 1755 1756 seq_printf(m, " SDMA Engine %d, RLC %d\n", 1757 pipe, queue); 1758 seq_reg_dump(m, dump, n_regs); 1759 1760 kfree(dump); 1761 } 1762 } 1763 1764 return r; 1765 } 1766 1767 #endif 1768