1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #include <linux/ratelimit.h> 25 #include <linux/printk.h> 26 #include <linux/slab.h> 27 #include <linux/list.h> 28 #include <linux/types.h> 29 #include <linux/bitops.h> 30 #include <linux/sched.h> 31 #include "kfd_priv.h" 32 #include "kfd_device_queue_manager.h" 33 #include "kfd_mqd_manager.h" 34 #include "cik_regs.h" 35 #include "kfd_kernel_queue.h" 36 37 /* Size of the per-pipe EOP queue */ 38 #define CIK_HPD_EOP_BYTES_LOG2 11 39 #define CIK_HPD_EOP_BYTES (1U << CIK_HPD_EOP_BYTES_LOG2) 40 41 static int set_pasid_vmid_mapping(struct device_queue_manager *dqm, 42 unsigned int pasid, unsigned int vmid); 43 44 static int create_compute_queue_nocpsch(struct device_queue_manager *dqm, 45 struct queue *q, 46 struct qcm_process_device *qpd); 47 48 static int execute_queues_cpsch(struct device_queue_manager *dqm, 49 enum kfd_unmap_queues_filter filter, 50 uint32_t filter_param); 51 static int unmap_queues_cpsch(struct device_queue_manager *dqm, 52 enum kfd_unmap_queues_filter filter, 53 uint32_t filter_param); 54 55 static int map_queues_cpsch(struct device_queue_manager *dqm); 56 57 static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm, 58 struct queue *q, 59 struct qcm_process_device *qpd); 60 61 static void deallocate_sdma_queue(struct device_queue_manager *dqm, 62 unsigned int sdma_queue_id); 63 64 static void kfd_process_hw_exception(struct work_struct *work); 65 66 static inline 67 enum KFD_MQD_TYPE get_mqd_type_from_queue_type(enum kfd_queue_type type) 68 { 69 if (type == KFD_QUEUE_TYPE_SDMA) 70 return KFD_MQD_TYPE_SDMA; 71 return KFD_MQD_TYPE_CP; 72 } 73 74 static bool is_pipe_enabled(struct device_queue_manager *dqm, int mec, int pipe) 75 { 76 int i; 77 int pipe_offset = mec * dqm->dev->shared_resources.num_pipe_per_mec 78 + pipe * dqm->dev->shared_resources.num_queue_per_pipe; 79 80 /* queue is available for KFD usage if bit is 1 */ 81 for (i = 0; i < dqm->dev->shared_resources.num_queue_per_pipe; ++i) 82 if (test_bit(pipe_offset + i, 83 dqm->dev->shared_resources.queue_bitmap)) 84 return true; 85 return false; 86 } 87 88 unsigned int get_queues_num(struct device_queue_manager *dqm) 89 { 90 return bitmap_weight(dqm->dev->shared_resources.queue_bitmap, 91 KGD_MAX_QUEUES); 92 } 93 94 unsigned int get_queues_per_pipe(struct device_queue_manager *dqm) 95 { 96 return dqm->dev->shared_resources.num_queue_per_pipe; 97 } 98 99 unsigned int get_pipes_per_mec(struct device_queue_manager *dqm) 100 { 101 return dqm->dev->shared_resources.num_pipe_per_mec; 102 } 103 104 static unsigned int get_num_sdma_engines(struct device_queue_manager *dqm) 105 { 106 return dqm->dev->device_info->num_sdma_engines; 107 } 108 109 unsigned int get_num_sdma_queues(struct device_queue_manager *dqm) 110 { 111 return dqm->dev->device_info->num_sdma_engines 112 * dqm->dev->device_info->num_sdma_queues_per_engine; 113 } 114 115 void program_sh_mem_settings(struct device_queue_manager *dqm, 116 struct qcm_process_device *qpd) 117 { 118 return dqm->dev->kfd2kgd->program_sh_mem_settings( 119 dqm->dev->kgd, qpd->vmid, 120 qpd->sh_mem_config, 121 qpd->sh_mem_ape1_base, 122 qpd->sh_mem_ape1_limit, 123 qpd->sh_mem_bases); 124 } 125 126 static int allocate_doorbell(struct qcm_process_device *qpd, struct queue *q) 127 { 128 struct kfd_dev *dev = qpd->dqm->dev; 129 130 if (!KFD_IS_SOC15(dev->device_info->asic_family)) { 131 /* On pre-SOC15 chips we need to use the queue ID to 132 * preserve the user mode ABI. 133 */ 134 q->doorbell_id = q->properties.queue_id; 135 } else if (q->properties.type == KFD_QUEUE_TYPE_SDMA) { 136 /* For SDMA queues on SOC15, use static doorbell 137 * assignments based on the engine and queue. 138 */ 139 q->doorbell_id = dev->shared_resources.sdma_doorbell 140 [q->properties.sdma_engine_id] 141 [q->properties.sdma_queue_id]; 142 } else { 143 /* For CP queues on SOC15 reserve a free doorbell ID */ 144 unsigned int found; 145 146 found = find_first_zero_bit(qpd->doorbell_bitmap, 147 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS); 148 if (found >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) { 149 pr_debug("No doorbells available"); 150 return -EBUSY; 151 } 152 set_bit(found, qpd->doorbell_bitmap); 153 q->doorbell_id = found; 154 } 155 156 q->properties.doorbell_off = 157 kfd_doorbell_id_to_offset(dev, q->process, 158 q->doorbell_id); 159 160 return 0; 161 } 162 163 static void deallocate_doorbell(struct qcm_process_device *qpd, 164 struct queue *q) 165 { 166 unsigned int old; 167 struct kfd_dev *dev = qpd->dqm->dev; 168 169 if (!KFD_IS_SOC15(dev->device_info->asic_family) || 170 q->properties.type == KFD_QUEUE_TYPE_SDMA) 171 return; 172 173 old = test_and_clear_bit(q->doorbell_id, qpd->doorbell_bitmap); 174 WARN_ON(!old); 175 } 176 177 static int allocate_vmid(struct device_queue_manager *dqm, 178 struct qcm_process_device *qpd, 179 struct queue *q) 180 { 181 int bit, allocated_vmid; 182 183 if (dqm->vmid_bitmap == 0) 184 return -ENOMEM; 185 186 bit = ffs(dqm->vmid_bitmap) - 1; 187 dqm->vmid_bitmap &= ~(1 << bit); 188 189 allocated_vmid = bit + dqm->dev->vm_info.first_vmid_kfd; 190 pr_debug("vmid allocation %d\n", allocated_vmid); 191 qpd->vmid = allocated_vmid; 192 q->properties.vmid = allocated_vmid; 193 194 set_pasid_vmid_mapping(dqm, q->process->pasid, q->properties.vmid); 195 program_sh_mem_settings(dqm, qpd); 196 197 /* qpd->page_table_base is set earlier when register_process() 198 * is called, i.e. when the first queue is created. 199 */ 200 dqm->dev->kfd2kgd->set_vm_context_page_table_base(dqm->dev->kgd, 201 qpd->vmid, 202 qpd->page_table_base); 203 /* invalidate the VM context after pasid and vmid mapping is set up */ 204 kfd_flush_tlb(qpd_to_pdd(qpd)); 205 206 return 0; 207 } 208 209 static int flush_texture_cache_nocpsch(struct kfd_dev *kdev, 210 struct qcm_process_device *qpd) 211 { 212 const struct packet_manager_funcs *pmf = qpd->dqm->packets.pmf; 213 int ret; 214 215 if (!qpd->ib_kaddr) 216 return -ENOMEM; 217 218 ret = pmf->release_mem(qpd->ib_base, (uint32_t *)qpd->ib_kaddr); 219 if (ret) 220 return ret; 221 222 return kdev->kfd2kgd->submit_ib(kdev->kgd, KGD_ENGINE_MEC1, qpd->vmid, 223 qpd->ib_base, (uint32_t *)qpd->ib_kaddr, 224 pmf->release_mem_size / sizeof(uint32_t)); 225 } 226 227 static void deallocate_vmid(struct device_queue_manager *dqm, 228 struct qcm_process_device *qpd, 229 struct queue *q) 230 { 231 int bit = qpd->vmid - dqm->dev->vm_info.first_vmid_kfd; 232 233 /* On GFX v7, CP doesn't flush TC at dequeue */ 234 if (q->device->device_info->asic_family == CHIP_HAWAII) 235 if (flush_texture_cache_nocpsch(q->device, qpd)) 236 pr_err("Failed to flush TC\n"); 237 238 kfd_flush_tlb(qpd_to_pdd(qpd)); 239 240 /* Release the vmid mapping */ 241 set_pasid_vmid_mapping(dqm, 0, qpd->vmid); 242 243 dqm->vmid_bitmap |= (1 << bit); 244 qpd->vmid = 0; 245 q->properties.vmid = 0; 246 } 247 248 static int create_queue_nocpsch(struct device_queue_manager *dqm, 249 struct queue *q, 250 struct qcm_process_device *qpd) 251 { 252 int retval; 253 254 print_queue(q); 255 256 dqm_lock(dqm); 257 258 if (dqm->total_queue_count >= max_num_of_queues_per_device) { 259 pr_warn("Can't create new usermode queue because %d queues were already created\n", 260 dqm->total_queue_count); 261 retval = -EPERM; 262 goto out_unlock; 263 } 264 265 if (list_empty(&qpd->queues_list)) { 266 retval = allocate_vmid(dqm, qpd, q); 267 if (retval) 268 goto out_unlock; 269 } 270 q->properties.vmid = qpd->vmid; 271 /* 272 * Eviction state logic: we only mark active queues as evicted 273 * to avoid the overhead of restoring inactive queues later 274 */ 275 if (qpd->evicted) 276 q->properties.is_evicted = (q->properties.queue_size > 0 && 277 q->properties.queue_percent > 0 && 278 q->properties.queue_address != 0); 279 280 q->properties.tba_addr = qpd->tba_addr; 281 q->properties.tma_addr = qpd->tma_addr; 282 283 if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE) 284 retval = create_compute_queue_nocpsch(dqm, q, qpd); 285 else if (q->properties.type == KFD_QUEUE_TYPE_SDMA) 286 retval = create_sdma_queue_nocpsch(dqm, q, qpd); 287 else 288 retval = -EINVAL; 289 290 if (retval) { 291 if (list_empty(&qpd->queues_list)) 292 deallocate_vmid(dqm, qpd, q); 293 goto out_unlock; 294 } 295 296 list_add(&q->list, &qpd->queues_list); 297 qpd->queue_count++; 298 if (q->properties.is_active) 299 dqm->queue_count++; 300 301 if (q->properties.type == KFD_QUEUE_TYPE_SDMA) 302 dqm->sdma_queue_count++; 303 304 /* 305 * Unconditionally increment this counter, regardless of the queue's 306 * type or whether the queue is active. 307 */ 308 dqm->total_queue_count++; 309 pr_debug("Total of %d queues are accountable so far\n", 310 dqm->total_queue_count); 311 312 out_unlock: 313 dqm_unlock(dqm); 314 return retval; 315 } 316 317 static int allocate_hqd(struct device_queue_manager *dqm, struct queue *q) 318 { 319 bool set; 320 int pipe, bit, i; 321 322 set = false; 323 324 for (pipe = dqm->next_pipe_to_allocate, i = 0; 325 i < get_pipes_per_mec(dqm); 326 pipe = ((pipe + 1) % get_pipes_per_mec(dqm)), ++i) { 327 328 if (!is_pipe_enabled(dqm, 0, pipe)) 329 continue; 330 331 if (dqm->allocated_queues[pipe] != 0) { 332 bit = ffs(dqm->allocated_queues[pipe]) - 1; 333 dqm->allocated_queues[pipe] &= ~(1 << bit); 334 q->pipe = pipe; 335 q->queue = bit; 336 set = true; 337 break; 338 } 339 } 340 341 if (!set) 342 return -EBUSY; 343 344 pr_debug("hqd slot - pipe %d, queue %d\n", q->pipe, q->queue); 345 /* horizontal hqd allocation */ 346 dqm->next_pipe_to_allocate = (pipe + 1) % get_pipes_per_mec(dqm); 347 348 return 0; 349 } 350 351 static inline void deallocate_hqd(struct device_queue_manager *dqm, 352 struct queue *q) 353 { 354 dqm->allocated_queues[q->pipe] |= (1 << q->queue); 355 } 356 357 static int create_compute_queue_nocpsch(struct device_queue_manager *dqm, 358 struct queue *q, 359 struct qcm_process_device *qpd) 360 { 361 struct mqd_manager *mqd_mgr; 362 int retval; 363 364 mqd_mgr = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_COMPUTE); 365 if (!mqd_mgr) 366 return -ENOMEM; 367 368 retval = allocate_hqd(dqm, q); 369 if (retval) 370 return retval; 371 372 retval = allocate_doorbell(qpd, q); 373 if (retval) 374 goto out_deallocate_hqd; 375 376 retval = mqd_mgr->init_mqd(mqd_mgr, &q->mqd, &q->mqd_mem_obj, 377 &q->gart_mqd_addr, &q->properties); 378 if (retval) 379 goto out_deallocate_doorbell; 380 381 pr_debug("Loading mqd to hqd on pipe %d, queue %d\n", 382 q->pipe, q->queue); 383 384 dqm->dev->kfd2kgd->set_scratch_backing_va( 385 dqm->dev->kgd, qpd->sh_hidden_private_base, qpd->vmid); 386 387 if (!q->properties.is_active) 388 return 0; 389 390 if (WARN(q->process->mm != current->mm, 391 "should only run in user thread")) 392 retval = -EFAULT; 393 else 394 retval = mqd_mgr->load_mqd(mqd_mgr, q->mqd, q->pipe, q->queue, 395 &q->properties, current->mm); 396 if (retval) 397 goto out_uninit_mqd; 398 399 return 0; 400 401 out_uninit_mqd: 402 mqd_mgr->uninit_mqd(mqd_mgr, q->mqd, q->mqd_mem_obj); 403 out_deallocate_doorbell: 404 deallocate_doorbell(qpd, q); 405 out_deallocate_hqd: 406 deallocate_hqd(dqm, q); 407 408 return retval; 409 } 410 411 /* Access to DQM has to be locked before calling destroy_queue_nocpsch_locked 412 * to avoid asynchronized access 413 */ 414 static int destroy_queue_nocpsch_locked(struct device_queue_manager *dqm, 415 struct qcm_process_device *qpd, 416 struct queue *q) 417 { 418 int retval; 419 struct mqd_manager *mqd_mgr; 420 421 mqd_mgr = dqm->ops.get_mqd_manager(dqm, 422 get_mqd_type_from_queue_type(q->properties.type)); 423 if (!mqd_mgr) 424 return -ENOMEM; 425 426 if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE) { 427 deallocate_hqd(dqm, q); 428 } else if (q->properties.type == KFD_QUEUE_TYPE_SDMA) { 429 dqm->sdma_queue_count--; 430 deallocate_sdma_queue(dqm, q->sdma_id); 431 } else { 432 pr_debug("q->properties.type %d is invalid\n", 433 q->properties.type); 434 return -EINVAL; 435 } 436 dqm->total_queue_count--; 437 438 deallocate_doorbell(qpd, q); 439 440 retval = mqd_mgr->destroy_mqd(mqd_mgr, q->mqd, 441 KFD_PREEMPT_TYPE_WAVEFRONT_RESET, 442 KFD_UNMAP_LATENCY_MS, 443 q->pipe, q->queue); 444 if (retval == -ETIME) 445 qpd->reset_wavefronts = true; 446 447 mqd_mgr->uninit_mqd(mqd_mgr, q->mqd, q->mqd_mem_obj); 448 449 list_del(&q->list); 450 if (list_empty(&qpd->queues_list)) { 451 if (qpd->reset_wavefronts) { 452 pr_warn("Resetting wave fronts (nocpsch) on dev %p\n", 453 dqm->dev); 454 /* dbgdev_wave_reset_wavefronts has to be called before 455 * deallocate_vmid(), i.e. when vmid is still in use. 456 */ 457 dbgdev_wave_reset_wavefronts(dqm->dev, 458 qpd->pqm->process); 459 qpd->reset_wavefronts = false; 460 } 461 462 deallocate_vmid(dqm, qpd, q); 463 } 464 qpd->queue_count--; 465 if (q->properties.is_active) 466 dqm->queue_count--; 467 468 return retval; 469 } 470 471 static int destroy_queue_nocpsch(struct device_queue_manager *dqm, 472 struct qcm_process_device *qpd, 473 struct queue *q) 474 { 475 int retval; 476 477 dqm_lock(dqm); 478 retval = destroy_queue_nocpsch_locked(dqm, qpd, q); 479 dqm_unlock(dqm); 480 481 return retval; 482 } 483 484 static int update_queue(struct device_queue_manager *dqm, struct queue *q) 485 { 486 int retval; 487 struct mqd_manager *mqd_mgr; 488 struct kfd_process_device *pdd; 489 bool prev_active = false; 490 491 dqm_lock(dqm); 492 pdd = kfd_get_process_device_data(q->device, q->process); 493 if (!pdd) { 494 retval = -ENODEV; 495 goto out_unlock; 496 } 497 mqd_mgr = dqm->ops.get_mqd_manager(dqm, 498 get_mqd_type_from_queue_type(q->properties.type)); 499 if (!mqd_mgr) { 500 retval = -ENOMEM; 501 goto out_unlock; 502 } 503 /* 504 * Eviction state logic: we only mark active queues as evicted 505 * to avoid the overhead of restoring inactive queues later 506 */ 507 if (pdd->qpd.evicted) 508 q->properties.is_evicted = (q->properties.queue_size > 0 && 509 q->properties.queue_percent > 0 && 510 q->properties.queue_address != 0); 511 512 /* Save previous activity state for counters */ 513 prev_active = q->properties.is_active; 514 515 /* Make sure the queue is unmapped before updating the MQD */ 516 if (dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS) { 517 retval = unmap_queues_cpsch(dqm, 518 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0); 519 if (retval) { 520 pr_err("unmap queue failed\n"); 521 goto out_unlock; 522 } 523 } else if (prev_active && 524 (q->properties.type == KFD_QUEUE_TYPE_COMPUTE || 525 q->properties.type == KFD_QUEUE_TYPE_SDMA)) { 526 retval = mqd_mgr->destroy_mqd(mqd_mgr, q->mqd, 527 KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN, 528 KFD_UNMAP_LATENCY_MS, q->pipe, q->queue); 529 if (retval) { 530 pr_err("destroy mqd failed\n"); 531 goto out_unlock; 532 } 533 } 534 535 retval = mqd_mgr->update_mqd(mqd_mgr, q->mqd, &q->properties); 536 537 /* 538 * check active state vs. the previous state and modify 539 * counter accordingly. map_queues_cpsch uses the 540 * dqm->queue_count to determine whether a new runlist must be 541 * uploaded. 542 */ 543 if (q->properties.is_active && !prev_active) 544 dqm->queue_count++; 545 else if (!q->properties.is_active && prev_active) 546 dqm->queue_count--; 547 548 if (dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS) 549 retval = map_queues_cpsch(dqm); 550 else if (q->properties.is_active && 551 (q->properties.type == KFD_QUEUE_TYPE_COMPUTE || 552 q->properties.type == KFD_QUEUE_TYPE_SDMA)) { 553 if (WARN(q->process->mm != current->mm, 554 "should only run in user thread")) 555 retval = -EFAULT; 556 else 557 retval = mqd_mgr->load_mqd(mqd_mgr, q->mqd, 558 q->pipe, q->queue, 559 &q->properties, current->mm); 560 } 561 562 out_unlock: 563 dqm_unlock(dqm); 564 return retval; 565 } 566 567 static struct mqd_manager *get_mqd_manager( 568 struct device_queue_manager *dqm, enum KFD_MQD_TYPE type) 569 { 570 struct mqd_manager *mqd_mgr; 571 572 if (WARN_ON(type >= KFD_MQD_TYPE_MAX)) 573 return NULL; 574 575 pr_debug("mqd type %d\n", type); 576 577 mqd_mgr = dqm->mqd_mgrs[type]; 578 if (!mqd_mgr) { 579 mqd_mgr = mqd_manager_init(type, dqm->dev); 580 if (!mqd_mgr) 581 pr_err("mqd manager is NULL"); 582 dqm->mqd_mgrs[type] = mqd_mgr; 583 } 584 585 return mqd_mgr; 586 } 587 588 static int evict_process_queues_nocpsch(struct device_queue_manager *dqm, 589 struct qcm_process_device *qpd) 590 { 591 struct queue *q; 592 struct mqd_manager *mqd_mgr; 593 struct kfd_process_device *pdd; 594 int retval = 0; 595 596 dqm_lock(dqm); 597 if (qpd->evicted++ > 0) /* already evicted, do nothing */ 598 goto out; 599 600 pdd = qpd_to_pdd(qpd); 601 pr_info_ratelimited("Evicting PASID %u queues\n", 602 pdd->process->pasid); 603 604 /* unactivate all active queues on the qpd */ 605 list_for_each_entry(q, &qpd->queues_list, list) { 606 if (!q->properties.is_active) 607 continue; 608 mqd_mgr = dqm->ops.get_mqd_manager(dqm, 609 get_mqd_type_from_queue_type(q->properties.type)); 610 if (!mqd_mgr) { /* should not be here */ 611 pr_err("Cannot evict queue, mqd mgr is NULL\n"); 612 retval = -ENOMEM; 613 goto out; 614 } 615 q->properties.is_evicted = true; 616 q->properties.is_active = false; 617 retval = mqd_mgr->destroy_mqd(mqd_mgr, q->mqd, 618 KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN, 619 KFD_UNMAP_LATENCY_MS, q->pipe, q->queue); 620 if (retval) 621 goto out; 622 dqm->queue_count--; 623 } 624 625 out: 626 dqm_unlock(dqm); 627 return retval; 628 } 629 630 static int evict_process_queues_cpsch(struct device_queue_manager *dqm, 631 struct qcm_process_device *qpd) 632 { 633 struct queue *q; 634 struct kfd_process_device *pdd; 635 int retval = 0; 636 637 dqm_lock(dqm); 638 if (qpd->evicted++ > 0) /* already evicted, do nothing */ 639 goto out; 640 641 pdd = qpd_to_pdd(qpd); 642 pr_info_ratelimited("Evicting PASID %u queues\n", 643 pdd->process->pasid); 644 645 /* unactivate all active queues on the qpd */ 646 list_for_each_entry(q, &qpd->queues_list, list) { 647 if (!q->properties.is_active) 648 continue; 649 q->properties.is_evicted = true; 650 q->properties.is_active = false; 651 dqm->queue_count--; 652 } 653 retval = execute_queues_cpsch(dqm, 654 qpd->is_debug ? 655 KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES : 656 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0); 657 658 out: 659 dqm_unlock(dqm); 660 return retval; 661 } 662 663 static int restore_process_queues_nocpsch(struct device_queue_manager *dqm, 664 struct qcm_process_device *qpd) 665 { 666 struct mm_struct *mm = NULL; 667 struct queue *q; 668 struct mqd_manager *mqd_mgr; 669 struct kfd_process_device *pdd; 670 uint64_t pd_base; 671 int retval = 0; 672 673 pdd = qpd_to_pdd(qpd); 674 /* Retrieve PD base */ 675 pd_base = dqm->dev->kfd2kgd->get_process_page_dir(pdd->vm); 676 677 dqm_lock(dqm); 678 if (WARN_ON_ONCE(!qpd->evicted)) /* already restored, do nothing */ 679 goto out; 680 if (qpd->evicted > 1) { /* ref count still > 0, decrement & quit */ 681 qpd->evicted--; 682 goto out; 683 } 684 685 pr_info_ratelimited("Restoring PASID %u queues\n", 686 pdd->process->pasid); 687 688 /* Update PD Base in QPD */ 689 qpd->page_table_base = pd_base; 690 pr_debug("Updated PD address to 0x%llx\n", pd_base); 691 692 if (!list_empty(&qpd->queues_list)) { 693 dqm->dev->kfd2kgd->set_vm_context_page_table_base( 694 dqm->dev->kgd, 695 qpd->vmid, 696 qpd->page_table_base); 697 kfd_flush_tlb(pdd); 698 } 699 700 /* Take a safe reference to the mm_struct, which may otherwise 701 * disappear even while the kfd_process is still referenced. 702 */ 703 mm = get_task_mm(pdd->process->lead_thread); 704 if (!mm) { 705 retval = -EFAULT; 706 goto out; 707 } 708 709 /* activate all active queues on the qpd */ 710 list_for_each_entry(q, &qpd->queues_list, list) { 711 if (!q->properties.is_evicted) 712 continue; 713 mqd_mgr = dqm->ops.get_mqd_manager(dqm, 714 get_mqd_type_from_queue_type(q->properties.type)); 715 if (!mqd_mgr) { /* should not be here */ 716 pr_err("Cannot restore queue, mqd mgr is NULL\n"); 717 retval = -ENOMEM; 718 goto out; 719 } 720 q->properties.is_evicted = false; 721 q->properties.is_active = true; 722 retval = mqd_mgr->load_mqd(mqd_mgr, q->mqd, q->pipe, 723 q->queue, &q->properties, mm); 724 if (retval) 725 goto out; 726 dqm->queue_count++; 727 } 728 qpd->evicted = 0; 729 out: 730 if (mm) 731 mmput(mm); 732 dqm_unlock(dqm); 733 return retval; 734 } 735 736 static int restore_process_queues_cpsch(struct device_queue_manager *dqm, 737 struct qcm_process_device *qpd) 738 { 739 struct queue *q; 740 struct kfd_process_device *pdd; 741 uint64_t pd_base; 742 int retval = 0; 743 744 pdd = qpd_to_pdd(qpd); 745 /* Retrieve PD base */ 746 pd_base = dqm->dev->kfd2kgd->get_process_page_dir(pdd->vm); 747 748 dqm_lock(dqm); 749 if (WARN_ON_ONCE(!qpd->evicted)) /* already restored, do nothing */ 750 goto out; 751 if (qpd->evicted > 1) { /* ref count still > 0, decrement & quit */ 752 qpd->evicted--; 753 goto out; 754 } 755 756 pr_info_ratelimited("Restoring PASID %u queues\n", 757 pdd->process->pasid); 758 759 /* Update PD Base in QPD */ 760 qpd->page_table_base = pd_base; 761 pr_debug("Updated PD address to 0x%llx\n", pd_base); 762 763 /* activate all active queues on the qpd */ 764 list_for_each_entry(q, &qpd->queues_list, list) { 765 if (!q->properties.is_evicted) 766 continue; 767 q->properties.is_evicted = false; 768 q->properties.is_active = true; 769 dqm->queue_count++; 770 } 771 retval = execute_queues_cpsch(dqm, 772 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0); 773 if (!retval) 774 qpd->evicted = 0; 775 out: 776 dqm_unlock(dqm); 777 return retval; 778 } 779 780 static int register_process(struct device_queue_manager *dqm, 781 struct qcm_process_device *qpd) 782 { 783 struct device_process_node *n; 784 struct kfd_process_device *pdd; 785 uint64_t pd_base; 786 int retval; 787 788 n = kzalloc(sizeof(*n), GFP_KERNEL); 789 if (!n) 790 return -ENOMEM; 791 792 n->qpd = qpd; 793 794 pdd = qpd_to_pdd(qpd); 795 /* Retrieve PD base */ 796 pd_base = dqm->dev->kfd2kgd->get_process_page_dir(pdd->vm); 797 798 dqm_lock(dqm); 799 list_add(&n->list, &dqm->queues); 800 801 /* Update PD Base in QPD */ 802 qpd->page_table_base = pd_base; 803 pr_debug("Updated PD address to 0x%llx\n", pd_base); 804 805 retval = dqm->asic_ops.update_qpd(dqm, qpd); 806 807 if (dqm->processes_count++ == 0) 808 dqm->dev->kfd2kgd->set_compute_idle(dqm->dev->kgd, false); 809 810 dqm_unlock(dqm); 811 812 return retval; 813 } 814 815 static int unregister_process(struct device_queue_manager *dqm, 816 struct qcm_process_device *qpd) 817 { 818 int retval; 819 struct device_process_node *cur, *next; 820 821 pr_debug("qpd->queues_list is %s\n", 822 list_empty(&qpd->queues_list) ? "empty" : "not empty"); 823 824 retval = 0; 825 dqm_lock(dqm); 826 827 list_for_each_entry_safe(cur, next, &dqm->queues, list) { 828 if (qpd == cur->qpd) { 829 list_del(&cur->list); 830 kfree(cur); 831 if (--dqm->processes_count == 0) 832 dqm->dev->kfd2kgd->set_compute_idle( 833 dqm->dev->kgd, true); 834 goto out; 835 } 836 } 837 /* qpd not found in dqm list */ 838 retval = 1; 839 out: 840 dqm_unlock(dqm); 841 return retval; 842 } 843 844 static int 845 set_pasid_vmid_mapping(struct device_queue_manager *dqm, unsigned int pasid, 846 unsigned int vmid) 847 { 848 uint32_t pasid_mapping; 849 850 pasid_mapping = (pasid == 0) ? 0 : 851 (uint32_t)pasid | 852 ATC_VMID_PASID_MAPPING_VALID; 853 854 return dqm->dev->kfd2kgd->set_pasid_vmid_mapping( 855 dqm->dev->kgd, pasid_mapping, 856 vmid); 857 } 858 859 static void init_interrupts(struct device_queue_manager *dqm) 860 { 861 unsigned int i; 862 863 for (i = 0 ; i < get_pipes_per_mec(dqm) ; i++) 864 if (is_pipe_enabled(dqm, 0, i)) 865 dqm->dev->kfd2kgd->init_interrupts(dqm->dev->kgd, i); 866 } 867 868 static int initialize_nocpsch(struct device_queue_manager *dqm) 869 { 870 int pipe, queue; 871 872 pr_debug("num of pipes: %d\n", get_pipes_per_mec(dqm)); 873 874 dqm->allocated_queues = kcalloc(get_pipes_per_mec(dqm), 875 sizeof(unsigned int), GFP_KERNEL); 876 if (!dqm->allocated_queues) 877 return -ENOMEM; 878 879 mutex_init(&dqm->lock_hidden); 880 INIT_LIST_HEAD(&dqm->queues); 881 dqm->queue_count = dqm->next_pipe_to_allocate = 0; 882 dqm->sdma_queue_count = 0; 883 884 for (pipe = 0; pipe < get_pipes_per_mec(dqm); pipe++) { 885 int pipe_offset = pipe * get_queues_per_pipe(dqm); 886 887 for (queue = 0; queue < get_queues_per_pipe(dqm); queue++) 888 if (test_bit(pipe_offset + queue, 889 dqm->dev->shared_resources.queue_bitmap)) 890 dqm->allocated_queues[pipe] |= 1 << queue; 891 } 892 893 dqm->vmid_bitmap = (1 << dqm->dev->vm_info.vmid_num_kfd) - 1; 894 dqm->sdma_bitmap = (1 << get_num_sdma_queues(dqm)) - 1; 895 896 return 0; 897 } 898 899 static void uninitialize(struct device_queue_manager *dqm) 900 { 901 int i; 902 903 WARN_ON(dqm->queue_count > 0 || dqm->processes_count > 0); 904 905 kfree(dqm->allocated_queues); 906 for (i = 0 ; i < KFD_MQD_TYPE_MAX ; i++) 907 kfree(dqm->mqd_mgrs[i]); 908 mutex_destroy(&dqm->lock_hidden); 909 kfd_gtt_sa_free(dqm->dev, dqm->pipeline_mem); 910 } 911 912 static int start_nocpsch(struct device_queue_manager *dqm) 913 { 914 init_interrupts(dqm); 915 return pm_init(&dqm->packets, dqm); 916 } 917 918 static int stop_nocpsch(struct device_queue_manager *dqm) 919 { 920 pm_uninit(&dqm->packets); 921 return 0; 922 } 923 924 static int allocate_sdma_queue(struct device_queue_manager *dqm, 925 unsigned int *sdma_queue_id) 926 { 927 int bit; 928 929 if (dqm->sdma_bitmap == 0) 930 return -ENOMEM; 931 932 bit = ffs(dqm->sdma_bitmap) - 1; 933 dqm->sdma_bitmap &= ~(1 << bit); 934 *sdma_queue_id = bit; 935 936 return 0; 937 } 938 939 static void deallocate_sdma_queue(struct device_queue_manager *dqm, 940 unsigned int sdma_queue_id) 941 { 942 if (sdma_queue_id >= get_num_sdma_queues(dqm)) 943 return; 944 dqm->sdma_bitmap |= (1 << sdma_queue_id); 945 } 946 947 static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm, 948 struct queue *q, 949 struct qcm_process_device *qpd) 950 { 951 struct mqd_manager *mqd_mgr; 952 int retval; 953 954 mqd_mgr = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_SDMA); 955 if (!mqd_mgr) 956 return -ENOMEM; 957 958 retval = allocate_sdma_queue(dqm, &q->sdma_id); 959 if (retval) 960 return retval; 961 962 q->properties.sdma_queue_id = q->sdma_id / get_num_sdma_engines(dqm); 963 q->properties.sdma_engine_id = q->sdma_id % get_num_sdma_engines(dqm); 964 965 retval = allocate_doorbell(qpd, q); 966 if (retval) 967 goto out_deallocate_sdma_queue; 968 969 pr_debug("SDMA id is: %d\n", q->sdma_id); 970 pr_debug("SDMA queue id: %d\n", q->properties.sdma_queue_id); 971 pr_debug("SDMA engine id: %d\n", q->properties.sdma_engine_id); 972 973 dqm->asic_ops.init_sdma_vm(dqm, q, qpd); 974 retval = mqd_mgr->init_mqd(mqd_mgr, &q->mqd, &q->mqd_mem_obj, 975 &q->gart_mqd_addr, &q->properties); 976 if (retval) 977 goto out_deallocate_doorbell; 978 979 retval = mqd_mgr->load_mqd(mqd_mgr, q->mqd, 0, 0, &q->properties, 980 NULL); 981 if (retval) 982 goto out_uninit_mqd; 983 984 return 0; 985 986 out_uninit_mqd: 987 mqd_mgr->uninit_mqd(mqd_mgr, q->mqd, q->mqd_mem_obj); 988 out_deallocate_doorbell: 989 deallocate_doorbell(qpd, q); 990 out_deallocate_sdma_queue: 991 deallocate_sdma_queue(dqm, q->sdma_id); 992 993 return retval; 994 } 995 996 /* 997 * Device Queue Manager implementation for cp scheduler 998 */ 999 1000 static int set_sched_resources(struct device_queue_manager *dqm) 1001 { 1002 int i, mec; 1003 struct scheduling_resources res; 1004 1005 res.vmid_mask = dqm->dev->shared_resources.compute_vmid_bitmap; 1006 1007 res.queue_mask = 0; 1008 for (i = 0; i < KGD_MAX_QUEUES; ++i) { 1009 mec = (i / dqm->dev->shared_resources.num_queue_per_pipe) 1010 / dqm->dev->shared_resources.num_pipe_per_mec; 1011 1012 if (!test_bit(i, dqm->dev->shared_resources.queue_bitmap)) 1013 continue; 1014 1015 /* only acquire queues from the first MEC */ 1016 if (mec > 0) 1017 continue; 1018 1019 /* This situation may be hit in the future if a new HW 1020 * generation exposes more than 64 queues. If so, the 1021 * definition of res.queue_mask needs updating 1022 */ 1023 if (WARN_ON(i >= (sizeof(res.queue_mask)*8))) { 1024 pr_err("Invalid queue enabled by amdgpu: %d\n", i); 1025 break; 1026 } 1027 1028 res.queue_mask |= (1ull << i); 1029 } 1030 res.gws_mask = res.oac_mask = res.gds_heap_base = 1031 res.gds_heap_size = 0; 1032 1033 pr_debug("Scheduling resources:\n" 1034 "vmid mask: 0x%8X\n" 1035 "queue mask: 0x%8llX\n", 1036 res.vmid_mask, res.queue_mask); 1037 1038 return pm_send_set_resources(&dqm->packets, &res); 1039 } 1040 1041 static int initialize_cpsch(struct device_queue_manager *dqm) 1042 { 1043 pr_debug("num of pipes: %d\n", get_pipes_per_mec(dqm)); 1044 1045 mutex_init(&dqm->lock_hidden); 1046 INIT_LIST_HEAD(&dqm->queues); 1047 dqm->queue_count = dqm->processes_count = 0; 1048 dqm->sdma_queue_count = 0; 1049 dqm->active_runlist = false; 1050 dqm->sdma_bitmap = (1 << get_num_sdma_queues(dqm)) - 1; 1051 1052 INIT_WORK(&dqm->hw_exception_work, kfd_process_hw_exception); 1053 1054 return 0; 1055 } 1056 1057 static int start_cpsch(struct device_queue_manager *dqm) 1058 { 1059 int retval; 1060 1061 retval = 0; 1062 1063 retval = pm_init(&dqm->packets, dqm); 1064 if (retval) 1065 goto fail_packet_manager_init; 1066 1067 retval = set_sched_resources(dqm); 1068 if (retval) 1069 goto fail_set_sched_resources; 1070 1071 pr_debug("Allocating fence memory\n"); 1072 1073 /* allocate fence memory on the gart */ 1074 retval = kfd_gtt_sa_allocate(dqm->dev, sizeof(*dqm->fence_addr), 1075 &dqm->fence_mem); 1076 1077 if (retval) 1078 goto fail_allocate_vidmem; 1079 1080 dqm->fence_addr = dqm->fence_mem->cpu_ptr; 1081 dqm->fence_gpu_addr = dqm->fence_mem->gpu_addr; 1082 1083 init_interrupts(dqm); 1084 1085 dqm_lock(dqm); 1086 /* clear hang status when driver try to start the hw scheduler */ 1087 dqm->is_hws_hang = false; 1088 execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0); 1089 dqm_unlock(dqm); 1090 1091 return 0; 1092 fail_allocate_vidmem: 1093 fail_set_sched_resources: 1094 pm_uninit(&dqm->packets); 1095 fail_packet_manager_init: 1096 return retval; 1097 } 1098 1099 static int stop_cpsch(struct device_queue_manager *dqm) 1100 { 1101 dqm_lock(dqm); 1102 unmap_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0); 1103 dqm_unlock(dqm); 1104 1105 kfd_gtt_sa_free(dqm->dev, dqm->fence_mem); 1106 pm_uninit(&dqm->packets); 1107 1108 return 0; 1109 } 1110 1111 static int create_kernel_queue_cpsch(struct device_queue_manager *dqm, 1112 struct kernel_queue *kq, 1113 struct qcm_process_device *qpd) 1114 { 1115 dqm_lock(dqm); 1116 if (dqm->total_queue_count >= max_num_of_queues_per_device) { 1117 pr_warn("Can't create new kernel queue because %d queues were already created\n", 1118 dqm->total_queue_count); 1119 dqm_unlock(dqm); 1120 return -EPERM; 1121 } 1122 1123 /* 1124 * Unconditionally increment this counter, regardless of the queue's 1125 * type or whether the queue is active. 1126 */ 1127 dqm->total_queue_count++; 1128 pr_debug("Total of %d queues are accountable so far\n", 1129 dqm->total_queue_count); 1130 1131 list_add(&kq->list, &qpd->priv_queue_list); 1132 dqm->queue_count++; 1133 qpd->is_debug = true; 1134 execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0); 1135 dqm_unlock(dqm); 1136 1137 return 0; 1138 } 1139 1140 static void destroy_kernel_queue_cpsch(struct device_queue_manager *dqm, 1141 struct kernel_queue *kq, 1142 struct qcm_process_device *qpd) 1143 { 1144 dqm_lock(dqm); 1145 list_del(&kq->list); 1146 dqm->queue_count--; 1147 qpd->is_debug = false; 1148 execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0); 1149 /* 1150 * Unconditionally decrement this counter, regardless of the queue's 1151 * type. 1152 */ 1153 dqm->total_queue_count--; 1154 pr_debug("Total of %d queues are accountable so far\n", 1155 dqm->total_queue_count); 1156 dqm_unlock(dqm); 1157 } 1158 1159 static int create_queue_cpsch(struct device_queue_manager *dqm, struct queue *q, 1160 struct qcm_process_device *qpd) 1161 { 1162 int retval; 1163 struct mqd_manager *mqd_mgr; 1164 1165 retval = 0; 1166 1167 dqm_lock(dqm); 1168 1169 if (dqm->total_queue_count >= max_num_of_queues_per_device) { 1170 pr_warn("Can't create new usermode queue because %d queues were already created\n", 1171 dqm->total_queue_count); 1172 retval = -EPERM; 1173 goto out_unlock; 1174 } 1175 1176 if (q->properties.type == KFD_QUEUE_TYPE_SDMA) { 1177 retval = allocate_sdma_queue(dqm, &q->sdma_id); 1178 if (retval) 1179 goto out_unlock; 1180 q->properties.sdma_queue_id = 1181 q->sdma_id / get_num_sdma_engines(dqm); 1182 q->properties.sdma_engine_id = 1183 q->sdma_id % get_num_sdma_engines(dqm); 1184 } 1185 1186 retval = allocate_doorbell(qpd, q); 1187 if (retval) 1188 goto out_deallocate_sdma_queue; 1189 1190 mqd_mgr = dqm->ops.get_mqd_manager(dqm, 1191 get_mqd_type_from_queue_type(q->properties.type)); 1192 1193 if (!mqd_mgr) { 1194 retval = -ENOMEM; 1195 goto out_deallocate_doorbell; 1196 } 1197 /* 1198 * Eviction state logic: we only mark active queues as evicted 1199 * to avoid the overhead of restoring inactive queues later 1200 */ 1201 if (qpd->evicted) 1202 q->properties.is_evicted = (q->properties.queue_size > 0 && 1203 q->properties.queue_percent > 0 && 1204 q->properties.queue_address != 0); 1205 1206 dqm->asic_ops.init_sdma_vm(dqm, q, qpd); 1207 1208 q->properties.tba_addr = qpd->tba_addr; 1209 q->properties.tma_addr = qpd->tma_addr; 1210 retval = mqd_mgr->init_mqd(mqd_mgr, &q->mqd, &q->mqd_mem_obj, 1211 &q->gart_mqd_addr, &q->properties); 1212 if (retval) 1213 goto out_deallocate_doorbell; 1214 1215 list_add(&q->list, &qpd->queues_list); 1216 qpd->queue_count++; 1217 if (q->properties.is_active) { 1218 dqm->queue_count++; 1219 retval = execute_queues_cpsch(dqm, 1220 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0); 1221 } 1222 1223 if (q->properties.type == KFD_QUEUE_TYPE_SDMA) 1224 dqm->sdma_queue_count++; 1225 /* 1226 * Unconditionally increment this counter, regardless of the queue's 1227 * type or whether the queue is active. 1228 */ 1229 dqm->total_queue_count++; 1230 1231 pr_debug("Total of %d queues are accountable so far\n", 1232 dqm->total_queue_count); 1233 1234 dqm_unlock(dqm); 1235 return retval; 1236 1237 out_deallocate_doorbell: 1238 deallocate_doorbell(qpd, q); 1239 out_deallocate_sdma_queue: 1240 if (q->properties.type == KFD_QUEUE_TYPE_SDMA) 1241 deallocate_sdma_queue(dqm, q->sdma_id); 1242 out_unlock: 1243 dqm_unlock(dqm); 1244 1245 return retval; 1246 } 1247 1248 int amdkfd_fence_wait_timeout(unsigned int *fence_addr, 1249 unsigned int fence_value, 1250 unsigned int timeout_ms) 1251 { 1252 unsigned long end_jiffies = msecs_to_jiffies(timeout_ms) + jiffies; 1253 1254 while (*fence_addr != fence_value) { 1255 if (time_after(jiffies, end_jiffies)) { 1256 pr_err("qcm fence wait loop timeout expired\n"); 1257 /* In HWS case, this is used to halt the driver thread 1258 * in order not to mess up CP states before doing 1259 * scandumps for FW debugging. 1260 */ 1261 while (halt_if_hws_hang) 1262 schedule(); 1263 1264 return -ETIME; 1265 } 1266 schedule(); 1267 } 1268 1269 return 0; 1270 } 1271 1272 static int unmap_sdma_queues(struct device_queue_manager *dqm, 1273 unsigned int sdma_engine) 1274 { 1275 return pm_send_unmap_queue(&dqm->packets, KFD_QUEUE_TYPE_SDMA, 1276 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0, false, 1277 sdma_engine); 1278 } 1279 1280 /* dqm->lock mutex has to be locked before calling this function */ 1281 static int map_queues_cpsch(struct device_queue_manager *dqm) 1282 { 1283 int retval; 1284 1285 if (dqm->queue_count <= 0 || dqm->processes_count <= 0) 1286 return 0; 1287 1288 if (dqm->active_runlist) 1289 return 0; 1290 1291 retval = pm_send_runlist(&dqm->packets, &dqm->queues); 1292 if (retval) { 1293 pr_err("failed to execute runlist\n"); 1294 return retval; 1295 } 1296 dqm->active_runlist = true; 1297 1298 return retval; 1299 } 1300 1301 /* dqm->lock mutex has to be locked before calling this function */ 1302 static int unmap_queues_cpsch(struct device_queue_manager *dqm, 1303 enum kfd_unmap_queues_filter filter, 1304 uint32_t filter_param) 1305 { 1306 int retval = 0; 1307 1308 if (dqm->is_hws_hang) 1309 return -EIO; 1310 if (!dqm->active_runlist) 1311 return retval; 1312 1313 pr_debug("Before destroying queues, sdma queue count is : %u\n", 1314 dqm->sdma_queue_count); 1315 1316 if (dqm->sdma_queue_count > 0) { 1317 unmap_sdma_queues(dqm, 0); 1318 unmap_sdma_queues(dqm, 1); 1319 } 1320 1321 retval = pm_send_unmap_queue(&dqm->packets, KFD_QUEUE_TYPE_COMPUTE, 1322 filter, filter_param, false, 0); 1323 if (retval) 1324 return retval; 1325 1326 *dqm->fence_addr = KFD_FENCE_INIT; 1327 pm_send_query_status(&dqm->packets, dqm->fence_gpu_addr, 1328 KFD_FENCE_COMPLETED); 1329 /* should be timed out */ 1330 retval = amdkfd_fence_wait_timeout(dqm->fence_addr, KFD_FENCE_COMPLETED, 1331 QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS); 1332 if (retval) 1333 return retval; 1334 1335 pm_release_ib(&dqm->packets); 1336 dqm->active_runlist = false; 1337 1338 return retval; 1339 } 1340 1341 /* dqm->lock mutex has to be locked before calling this function */ 1342 static int execute_queues_cpsch(struct device_queue_manager *dqm, 1343 enum kfd_unmap_queues_filter filter, 1344 uint32_t filter_param) 1345 { 1346 int retval; 1347 1348 if (dqm->is_hws_hang) 1349 return -EIO; 1350 retval = unmap_queues_cpsch(dqm, filter, filter_param); 1351 if (retval) { 1352 pr_err("The cp might be in an unrecoverable state due to an unsuccessful queues preemption\n"); 1353 dqm->is_hws_hang = true; 1354 schedule_work(&dqm->hw_exception_work); 1355 return retval; 1356 } 1357 1358 return map_queues_cpsch(dqm); 1359 } 1360 1361 static int destroy_queue_cpsch(struct device_queue_manager *dqm, 1362 struct qcm_process_device *qpd, 1363 struct queue *q) 1364 { 1365 int retval; 1366 struct mqd_manager *mqd_mgr; 1367 1368 retval = 0; 1369 1370 /* remove queue from list to prevent rescheduling after preemption */ 1371 dqm_lock(dqm); 1372 1373 if (qpd->is_debug) { 1374 /* 1375 * error, currently we do not allow to destroy a queue 1376 * of a currently debugged process 1377 */ 1378 retval = -EBUSY; 1379 goto failed_try_destroy_debugged_queue; 1380 1381 } 1382 1383 mqd_mgr = dqm->ops.get_mqd_manager(dqm, 1384 get_mqd_type_from_queue_type(q->properties.type)); 1385 if (!mqd_mgr) { 1386 retval = -ENOMEM; 1387 goto failed; 1388 } 1389 1390 deallocate_doorbell(qpd, q); 1391 1392 if (q->properties.type == KFD_QUEUE_TYPE_SDMA) { 1393 dqm->sdma_queue_count--; 1394 deallocate_sdma_queue(dqm, q->sdma_id); 1395 } 1396 1397 list_del(&q->list); 1398 qpd->queue_count--; 1399 if (q->properties.is_active) { 1400 dqm->queue_count--; 1401 retval = execute_queues_cpsch(dqm, 1402 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0); 1403 if (retval == -ETIME) 1404 qpd->reset_wavefronts = true; 1405 } 1406 1407 mqd_mgr->uninit_mqd(mqd_mgr, q->mqd, q->mqd_mem_obj); 1408 1409 /* 1410 * Unconditionally decrement this counter, regardless of the queue's 1411 * type 1412 */ 1413 dqm->total_queue_count--; 1414 pr_debug("Total of %d queues are accountable so far\n", 1415 dqm->total_queue_count); 1416 1417 dqm_unlock(dqm); 1418 1419 return retval; 1420 1421 failed: 1422 failed_try_destroy_debugged_queue: 1423 1424 dqm_unlock(dqm); 1425 return retval; 1426 } 1427 1428 /* 1429 * Low bits must be 0000/FFFF as required by HW, high bits must be 0 to 1430 * stay in user mode. 1431 */ 1432 #define APE1_FIXED_BITS_MASK 0xFFFF80000000FFFFULL 1433 /* APE1 limit is inclusive and 64K aligned. */ 1434 #define APE1_LIMIT_ALIGNMENT 0xFFFF 1435 1436 static bool set_cache_memory_policy(struct device_queue_manager *dqm, 1437 struct qcm_process_device *qpd, 1438 enum cache_policy default_policy, 1439 enum cache_policy alternate_policy, 1440 void __user *alternate_aperture_base, 1441 uint64_t alternate_aperture_size) 1442 { 1443 bool retval = true; 1444 1445 if (!dqm->asic_ops.set_cache_memory_policy) 1446 return retval; 1447 1448 dqm_lock(dqm); 1449 1450 if (alternate_aperture_size == 0) { 1451 /* base > limit disables APE1 */ 1452 qpd->sh_mem_ape1_base = 1; 1453 qpd->sh_mem_ape1_limit = 0; 1454 } else { 1455 /* 1456 * In FSA64, APE1_Base[63:0] = { 16{SH_MEM_APE1_BASE[31]}, 1457 * SH_MEM_APE1_BASE[31:0], 0x0000 } 1458 * APE1_Limit[63:0] = { 16{SH_MEM_APE1_LIMIT[31]}, 1459 * SH_MEM_APE1_LIMIT[31:0], 0xFFFF } 1460 * Verify that the base and size parameters can be 1461 * represented in this format and convert them. 1462 * Additionally restrict APE1 to user-mode addresses. 1463 */ 1464 1465 uint64_t base = (uintptr_t)alternate_aperture_base; 1466 uint64_t limit = base + alternate_aperture_size - 1; 1467 1468 if (limit <= base || (base & APE1_FIXED_BITS_MASK) != 0 || 1469 (limit & APE1_FIXED_BITS_MASK) != APE1_LIMIT_ALIGNMENT) { 1470 retval = false; 1471 goto out; 1472 } 1473 1474 qpd->sh_mem_ape1_base = base >> 16; 1475 qpd->sh_mem_ape1_limit = limit >> 16; 1476 } 1477 1478 retval = dqm->asic_ops.set_cache_memory_policy( 1479 dqm, 1480 qpd, 1481 default_policy, 1482 alternate_policy, 1483 alternate_aperture_base, 1484 alternate_aperture_size); 1485 1486 if ((dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) && (qpd->vmid != 0)) 1487 program_sh_mem_settings(dqm, qpd); 1488 1489 pr_debug("sh_mem_config: 0x%x, ape1_base: 0x%x, ape1_limit: 0x%x\n", 1490 qpd->sh_mem_config, qpd->sh_mem_ape1_base, 1491 qpd->sh_mem_ape1_limit); 1492 1493 out: 1494 dqm_unlock(dqm); 1495 return retval; 1496 } 1497 1498 static int set_trap_handler(struct device_queue_manager *dqm, 1499 struct qcm_process_device *qpd, 1500 uint64_t tba_addr, 1501 uint64_t tma_addr) 1502 { 1503 uint64_t *tma; 1504 1505 if (dqm->dev->cwsr_enabled) { 1506 /* Jump from CWSR trap handler to user trap */ 1507 tma = (uint64_t *)(qpd->cwsr_kaddr + KFD_CWSR_TMA_OFFSET); 1508 tma[0] = tba_addr; 1509 tma[1] = tma_addr; 1510 } else { 1511 qpd->tba_addr = tba_addr; 1512 qpd->tma_addr = tma_addr; 1513 } 1514 1515 return 0; 1516 } 1517 1518 static int process_termination_nocpsch(struct device_queue_manager *dqm, 1519 struct qcm_process_device *qpd) 1520 { 1521 struct queue *q, *next; 1522 struct device_process_node *cur, *next_dpn; 1523 int retval = 0; 1524 1525 dqm_lock(dqm); 1526 1527 /* Clear all user mode queues */ 1528 list_for_each_entry_safe(q, next, &qpd->queues_list, list) { 1529 int ret; 1530 1531 ret = destroy_queue_nocpsch_locked(dqm, qpd, q); 1532 if (ret) 1533 retval = ret; 1534 } 1535 1536 /* Unregister process */ 1537 list_for_each_entry_safe(cur, next_dpn, &dqm->queues, list) { 1538 if (qpd == cur->qpd) { 1539 list_del(&cur->list); 1540 kfree(cur); 1541 dqm->processes_count--; 1542 break; 1543 } 1544 } 1545 1546 dqm_unlock(dqm); 1547 return retval; 1548 } 1549 1550 static int get_wave_state(struct device_queue_manager *dqm, 1551 struct queue *q, 1552 void __user *ctl_stack, 1553 u32 *ctl_stack_used_size, 1554 u32 *save_area_used_size) 1555 { 1556 struct mqd_manager *mqd; 1557 int r; 1558 1559 dqm_lock(dqm); 1560 1561 if (q->properties.type != KFD_QUEUE_TYPE_COMPUTE || 1562 q->properties.is_active || !q->device->cwsr_enabled) { 1563 r = -EINVAL; 1564 goto dqm_unlock; 1565 } 1566 1567 mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_COMPUTE); 1568 if (!mqd) { 1569 r = -ENOMEM; 1570 goto dqm_unlock; 1571 } 1572 1573 if (!mqd->get_wave_state) { 1574 r = -EINVAL; 1575 goto dqm_unlock; 1576 } 1577 1578 r = mqd->get_wave_state(mqd, q->mqd, ctl_stack, ctl_stack_used_size, 1579 save_area_used_size); 1580 1581 dqm_unlock: 1582 dqm_unlock(dqm); 1583 return r; 1584 } 1585 1586 static int process_termination_cpsch(struct device_queue_manager *dqm, 1587 struct qcm_process_device *qpd) 1588 { 1589 int retval; 1590 struct queue *q, *next; 1591 struct kernel_queue *kq, *kq_next; 1592 struct mqd_manager *mqd_mgr; 1593 struct device_process_node *cur, *next_dpn; 1594 enum kfd_unmap_queues_filter filter = 1595 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES; 1596 1597 retval = 0; 1598 1599 dqm_lock(dqm); 1600 1601 /* Clean all kernel queues */ 1602 list_for_each_entry_safe(kq, kq_next, &qpd->priv_queue_list, list) { 1603 list_del(&kq->list); 1604 dqm->queue_count--; 1605 qpd->is_debug = false; 1606 dqm->total_queue_count--; 1607 filter = KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES; 1608 } 1609 1610 /* Clear all user mode queues */ 1611 list_for_each_entry(q, &qpd->queues_list, list) { 1612 if (q->properties.type == KFD_QUEUE_TYPE_SDMA) { 1613 dqm->sdma_queue_count--; 1614 deallocate_sdma_queue(dqm, q->sdma_id); 1615 } 1616 1617 if (q->properties.is_active) 1618 dqm->queue_count--; 1619 1620 dqm->total_queue_count--; 1621 } 1622 1623 /* Unregister process */ 1624 list_for_each_entry_safe(cur, next_dpn, &dqm->queues, list) { 1625 if (qpd == cur->qpd) { 1626 list_del(&cur->list); 1627 kfree(cur); 1628 dqm->processes_count--; 1629 break; 1630 } 1631 } 1632 1633 retval = execute_queues_cpsch(dqm, filter, 0); 1634 if ((!dqm->is_hws_hang) && (retval || qpd->reset_wavefronts)) { 1635 pr_warn("Resetting wave fronts (cpsch) on dev %p\n", dqm->dev); 1636 dbgdev_wave_reset_wavefronts(dqm->dev, qpd->pqm->process); 1637 qpd->reset_wavefronts = false; 1638 } 1639 1640 /* lastly, free mqd resources */ 1641 list_for_each_entry_safe(q, next, &qpd->queues_list, list) { 1642 mqd_mgr = dqm->ops.get_mqd_manager(dqm, 1643 get_mqd_type_from_queue_type(q->properties.type)); 1644 if (!mqd_mgr) { 1645 retval = -ENOMEM; 1646 goto out; 1647 } 1648 list_del(&q->list); 1649 qpd->queue_count--; 1650 mqd_mgr->uninit_mqd(mqd_mgr, q->mqd, q->mqd_mem_obj); 1651 } 1652 1653 out: 1654 dqm_unlock(dqm); 1655 return retval; 1656 } 1657 1658 struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev) 1659 { 1660 struct device_queue_manager *dqm; 1661 1662 pr_debug("Loading device queue manager\n"); 1663 1664 dqm = kzalloc(sizeof(*dqm), GFP_KERNEL); 1665 if (!dqm) 1666 return NULL; 1667 1668 switch (dev->device_info->asic_family) { 1669 /* HWS is not available on Hawaii. */ 1670 case CHIP_HAWAII: 1671 /* HWS depends on CWSR for timely dequeue. CWSR is not 1672 * available on Tonga. 1673 * 1674 * FIXME: This argument also applies to Kaveri. 1675 */ 1676 case CHIP_TONGA: 1677 dqm->sched_policy = KFD_SCHED_POLICY_NO_HWS; 1678 break; 1679 default: 1680 dqm->sched_policy = sched_policy; 1681 break; 1682 } 1683 1684 dqm->dev = dev; 1685 switch (dqm->sched_policy) { 1686 case KFD_SCHED_POLICY_HWS: 1687 case KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION: 1688 /* initialize dqm for cp scheduling */ 1689 dqm->ops.create_queue = create_queue_cpsch; 1690 dqm->ops.initialize = initialize_cpsch; 1691 dqm->ops.start = start_cpsch; 1692 dqm->ops.stop = stop_cpsch; 1693 dqm->ops.destroy_queue = destroy_queue_cpsch; 1694 dqm->ops.update_queue = update_queue; 1695 dqm->ops.get_mqd_manager = get_mqd_manager; 1696 dqm->ops.register_process = register_process; 1697 dqm->ops.unregister_process = unregister_process; 1698 dqm->ops.uninitialize = uninitialize; 1699 dqm->ops.create_kernel_queue = create_kernel_queue_cpsch; 1700 dqm->ops.destroy_kernel_queue = destroy_kernel_queue_cpsch; 1701 dqm->ops.set_cache_memory_policy = set_cache_memory_policy; 1702 dqm->ops.set_trap_handler = set_trap_handler; 1703 dqm->ops.process_termination = process_termination_cpsch; 1704 dqm->ops.evict_process_queues = evict_process_queues_cpsch; 1705 dqm->ops.restore_process_queues = restore_process_queues_cpsch; 1706 dqm->ops.get_wave_state = get_wave_state; 1707 break; 1708 case KFD_SCHED_POLICY_NO_HWS: 1709 /* initialize dqm for no cp scheduling */ 1710 dqm->ops.start = start_nocpsch; 1711 dqm->ops.stop = stop_nocpsch; 1712 dqm->ops.create_queue = create_queue_nocpsch; 1713 dqm->ops.destroy_queue = destroy_queue_nocpsch; 1714 dqm->ops.update_queue = update_queue; 1715 dqm->ops.get_mqd_manager = get_mqd_manager; 1716 dqm->ops.register_process = register_process; 1717 dqm->ops.unregister_process = unregister_process; 1718 dqm->ops.initialize = initialize_nocpsch; 1719 dqm->ops.uninitialize = uninitialize; 1720 dqm->ops.set_cache_memory_policy = set_cache_memory_policy; 1721 dqm->ops.set_trap_handler = set_trap_handler; 1722 dqm->ops.process_termination = process_termination_nocpsch; 1723 dqm->ops.evict_process_queues = evict_process_queues_nocpsch; 1724 dqm->ops.restore_process_queues = 1725 restore_process_queues_nocpsch; 1726 dqm->ops.get_wave_state = get_wave_state; 1727 break; 1728 default: 1729 pr_err("Invalid scheduling policy %d\n", dqm->sched_policy); 1730 goto out_free; 1731 } 1732 1733 switch (dev->device_info->asic_family) { 1734 case CHIP_CARRIZO: 1735 device_queue_manager_init_vi(&dqm->asic_ops); 1736 break; 1737 1738 case CHIP_KAVERI: 1739 device_queue_manager_init_cik(&dqm->asic_ops); 1740 break; 1741 1742 case CHIP_HAWAII: 1743 device_queue_manager_init_cik_hawaii(&dqm->asic_ops); 1744 break; 1745 1746 case CHIP_TONGA: 1747 case CHIP_FIJI: 1748 case CHIP_POLARIS10: 1749 case CHIP_POLARIS11: 1750 device_queue_manager_init_vi_tonga(&dqm->asic_ops); 1751 break; 1752 1753 case CHIP_VEGA10: 1754 case CHIP_VEGA20: 1755 case CHIP_RAVEN: 1756 device_queue_manager_init_v9(&dqm->asic_ops); 1757 break; 1758 default: 1759 WARN(1, "Unexpected ASIC family %u", 1760 dev->device_info->asic_family); 1761 goto out_free; 1762 } 1763 1764 if (!dqm->ops.initialize(dqm)) 1765 return dqm; 1766 1767 out_free: 1768 kfree(dqm); 1769 return NULL; 1770 } 1771 1772 void device_queue_manager_uninit(struct device_queue_manager *dqm) 1773 { 1774 dqm->ops.uninitialize(dqm); 1775 kfree(dqm); 1776 } 1777 1778 int kfd_process_vm_fault(struct device_queue_manager *dqm, 1779 unsigned int pasid) 1780 { 1781 struct kfd_process_device *pdd; 1782 struct kfd_process *p = kfd_lookup_process_by_pasid(pasid); 1783 int ret = 0; 1784 1785 if (!p) 1786 return -EINVAL; 1787 pdd = kfd_get_process_device_data(dqm->dev, p); 1788 if (pdd) 1789 ret = dqm->ops.evict_process_queues(dqm, &pdd->qpd); 1790 kfd_unref_process(p); 1791 1792 return ret; 1793 } 1794 1795 static void kfd_process_hw_exception(struct work_struct *work) 1796 { 1797 struct device_queue_manager *dqm = container_of(work, 1798 struct device_queue_manager, hw_exception_work); 1799 dqm->dev->kfd2kgd->gpu_recover(dqm->dev->kgd); 1800 } 1801 1802 #if defined(CONFIG_DEBUG_FS) 1803 1804 static void seq_reg_dump(struct seq_file *m, 1805 uint32_t (*dump)[2], uint32_t n_regs) 1806 { 1807 uint32_t i, count; 1808 1809 for (i = 0, count = 0; i < n_regs; i++) { 1810 if (count == 0 || 1811 dump[i-1][0] + sizeof(uint32_t) != dump[i][0]) { 1812 seq_printf(m, "%s %08x: %08x", 1813 i ? "\n" : "", 1814 dump[i][0], dump[i][1]); 1815 count = 7; 1816 } else { 1817 seq_printf(m, " %08x", dump[i][1]); 1818 count--; 1819 } 1820 } 1821 1822 seq_puts(m, "\n"); 1823 } 1824 1825 int dqm_debugfs_hqds(struct seq_file *m, void *data) 1826 { 1827 struct device_queue_manager *dqm = data; 1828 uint32_t (*dump)[2], n_regs; 1829 int pipe, queue; 1830 int r = 0; 1831 1832 r = dqm->dev->kfd2kgd->hqd_dump(dqm->dev->kgd, 1833 KFD_CIK_HIQ_PIPE, KFD_CIK_HIQ_QUEUE, &dump, &n_regs); 1834 if (!r) { 1835 seq_printf(m, " HIQ on MEC %d Pipe %d Queue %d\n", 1836 KFD_CIK_HIQ_PIPE/get_pipes_per_mec(dqm)+1, 1837 KFD_CIK_HIQ_PIPE%get_pipes_per_mec(dqm), 1838 KFD_CIK_HIQ_QUEUE); 1839 seq_reg_dump(m, dump, n_regs); 1840 1841 kfree(dump); 1842 } 1843 1844 for (pipe = 0; pipe < get_pipes_per_mec(dqm); pipe++) { 1845 int pipe_offset = pipe * get_queues_per_pipe(dqm); 1846 1847 for (queue = 0; queue < get_queues_per_pipe(dqm); queue++) { 1848 if (!test_bit(pipe_offset + queue, 1849 dqm->dev->shared_resources.queue_bitmap)) 1850 continue; 1851 1852 r = dqm->dev->kfd2kgd->hqd_dump( 1853 dqm->dev->kgd, pipe, queue, &dump, &n_regs); 1854 if (r) 1855 break; 1856 1857 seq_printf(m, " CP Pipe %d, Queue %d\n", 1858 pipe, queue); 1859 seq_reg_dump(m, dump, n_regs); 1860 1861 kfree(dump); 1862 } 1863 } 1864 1865 for (pipe = 0; pipe < get_num_sdma_engines(dqm); pipe++) { 1866 for (queue = 0; 1867 queue < dqm->dev->device_info->num_sdma_queues_per_engine; 1868 queue++) { 1869 r = dqm->dev->kfd2kgd->hqd_sdma_dump( 1870 dqm->dev->kgd, pipe, queue, &dump, &n_regs); 1871 if (r) 1872 break; 1873 1874 seq_printf(m, " SDMA Engine %d, RLC %d\n", 1875 pipe, queue); 1876 seq_reg_dump(m, dump, n_regs); 1877 1878 kfree(dump); 1879 } 1880 } 1881 1882 return r; 1883 } 1884 1885 int dqm_debugfs_execute_queues(struct device_queue_manager *dqm) 1886 { 1887 int r = 0; 1888 1889 dqm_lock(dqm); 1890 dqm->active_runlist = true; 1891 r = execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0); 1892 dqm_unlock(dqm); 1893 1894 return r; 1895 } 1896 1897 #endif 1898