1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 #include <linux/amd-iommu.h> 24 #include <linux/bsearch.h> 25 #include <linux/pci.h> 26 #include <linux/slab.h> 27 #include "kfd_priv.h" 28 #include "kfd_device_queue_manager.h" 29 #include "kfd_pm4_headers_vi.h" 30 #include "cwsr_trap_handler_gfx8.asm" 31 32 #define MQD_SIZE_ALIGNED 768 33 34 static const struct kfd_device_info kaveri_device_info = { 35 .asic_family = CHIP_KAVERI, 36 .max_pasid_bits = 16, 37 /* max num of queues for KV.TODO should be a dynamic value */ 38 .max_no_of_hqd = 24, 39 .ih_ring_entry_size = 4 * sizeof(uint32_t), 40 .event_interrupt_class = &event_interrupt_class_cik, 41 .num_of_watch_points = 4, 42 .mqd_size_aligned = MQD_SIZE_ALIGNED, 43 .supports_cwsr = false, 44 }; 45 46 static const struct kfd_device_info carrizo_device_info = { 47 .asic_family = CHIP_CARRIZO, 48 .max_pasid_bits = 16, 49 /* max num of queues for CZ.TODO should be a dynamic value */ 50 .max_no_of_hqd = 24, 51 .ih_ring_entry_size = 4 * sizeof(uint32_t), 52 .event_interrupt_class = &event_interrupt_class_cik, 53 .num_of_watch_points = 4, 54 .mqd_size_aligned = MQD_SIZE_ALIGNED, 55 .supports_cwsr = true, 56 }; 57 58 struct kfd_deviceid { 59 unsigned short did; 60 const struct kfd_device_info *device_info; 61 }; 62 63 /* Please keep this sorted by increasing device id. */ 64 static const struct kfd_deviceid supported_devices[] = { 65 { 0x1304, &kaveri_device_info }, /* Kaveri */ 66 { 0x1305, &kaveri_device_info }, /* Kaveri */ 67 { 0x1306, &kaveri_device_info }, /* Kaveri */ 68 { 0x1307, &kaveri_device_info }, /* Kaveri */ 69 { 0x1309, &kaveri_device_info }, /* Kaveri */ 70 { 0x130A, &kaveri_device_info }, /* Kaveri */ 71 { 0x130B, &kaveri_device_info }, /* Kaveri */ 72 { 0x130C, &kaveri_device_info }, /* Kaveri */ 73 { 0x130D, &kaveri_device_info }, /* Kaveri */ 74 { 0x130E, &kaveri_device_info }, /* Kaveri */ 75 { 0x130F, &kaveri_device_info }, /* Kaveri */ 76 { 0x1310, &kaveri_device_info }, /* Kaveri */ 77 { 0x1311, &kaveri_device_info }, /* Kaveri */ 78 { 0x1312, &kaveri_device_info }, /* Kaveri */ 79 { 0x1313, &kaveri_device_info }, /* Kaveri */ 80 { 0x1315, &kaveri_device_info }, /* Kaveri */ 81 { 0x1316, &kaveri_device_info }, /* Kaveri */ 82 { 0x1317, &kaveri_device_info }, /* Kaveri */ 83 { 0x1318, &kaveri_device_info }, /* Kaveri */ 84 { 0x131B, &kaveri_device_info }, /* Kaveri */ 85 { 0x131C, &kaveri_device_info }, /* Kaveri */ 86 { 0x131D, &kaveri_device_info }, /* Kaveri */ 87 { 0x9870, &carrizo_device_info }, /* Carrizo */ 88 { 0x9874, &carrizo_device_info }, /* Carrizo */ 89 { 0x9875, &carrizo_device_info }, /* Carrizo */ 90 { 0x9876, &carrizo_device_info }, /* Carrizo */ 91 { 0x9877, &carrizo_device_info } /* Carrizo */ 92 }; 93 94 static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size, 95 unsigned int chunk_size); 96 static void kfd_gtt_sa_fini(struct kfd_dev *kfd); 97 98 static int kfd_resume(struct kfd_dev *kfd); 99 100 static const struct kfd_device_info *lookup_device_info(unsigned short did) 101 { 102 size_t i; 103 104 for (i = 0; i < ARRAY_SIZE(supported_devices); i++) { 105 if (supported_devices[i].did == did) { 106 WARN_ON(!supported_devices[i].device_info); 107 return supported_devices[i].device_info; 108 } 109 } 110 111 dev_warn(kfd_device, "DID %04x is missing in supported_devices\n", 112 did); 113 114 return NULL; 115 } 116 117 struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd, 118 struct pci_dev *pdev, const struct kfd2kgd_calls *f2g) 119 { 120 struct kfd_dev *kfd; 121 122 const struct kfd_device_info *device_info = 123 lookup_device_info(pdev->device); 124 125 if (!device_info) { 126 dev_err(kfd_device, "kgd2kfd_probe failed\n"); 127 return NULL; 128 } 129 130 kfd = kzalloc(sizeof(*kfd), GFP_KERNEL); 131 if (!kfd) 132 return NULL; 133 134 kfd->kgd = kgd; 135 kfd->device_info = device_info; 136 kfd->pdev = pdev; 137 kfd->init_complete = false; 138 kfd->kfd2kgd = f2g; 139 140 mutex_init(&kfd->doorbell_mutex); 141 memset(&kfd->doorbell_available_index, 0, 142 sizeof(kfd->doorbell_available_index)); 143 144 return kfd; 145 } 146 147 static bool device_iommu_pasid_init(struct kfd_dev *kfd) 148 { 149 const u32 required_iommu_flags = AMD_IOMMU_DEVICE_FLAG_ATS_SUP | 150 AMD_IOMMU_DEVICE_FLAG_PRI_SUP | 151 AMD_IOMMU_DEVICE_FLAG_PASID_SUP; 152 153 struct amd_iommu_device_info iommu_info; 154 unsigned int pasid_limit; 155 int err; 156 157 err = amd_iommu_device_info(kfd->pdev, &iommu_info); 158 if (err < 0) { 159 dev_err(kfd_device, 160 "error getting iommu info. is the iommu enabled?\n"); 161 return false; 162 } 163 164 if ((iommu_info.flags & required_iommu_flags) != required_iommu_flags) { 165 dev_err(kfd_device, "error required iommu flags ats %i, pri %i, pasid %i\n", 166 (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_ATS_SUP) != 0, 167 (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PRI_SUP) != 0, 168 (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PASID_SUP) 169 != 0); 170 return false; 171 } 172 173 pasid_limit = min_t(unsigned int, 174 (unsigned int)(1 << kfd->device_info->max_pasid_bits), 175 iommu_info.max_pasids); 176 177 if (!kfd_set_pasid_limit(pasid_limit)) { 178 dev_err(kfd_device, "error setting pasid limit\n"); 179 return false; 180 } 181 182 return true; 183 } 184 185 static void iommu_pasid_shutdown_callback(struct pci_dev *pdev, int pasid) 186 { 187 struct kfd_dev *dev = kfd_device_by_pci_dev(pdev); 188 189 if (dev) 190 kfd_process_iommu_unbind_callback(dev, pasid); 191 } 192 193 /* 194 * This function called by IOMMU driver on PPR failure 195 */ 196 static int iommu_invalid_ppr_cb(struct pci_dev *pdev, int pasid, 197 unsigned long address, u16 flags) 198 { 199 struct kfd_dev *dev; 200 201 dev_warn(kfd_device, 202 "Invalid PPR device %x:%x.%x pasid %d address 0x%lX flags 0x%X", 203 PCI_BUS_NUM(pdev->devfn), 204 PCI_SLOT(pdev->devfn), 205 PCI_FUNC(pdev->devfn), 206 pasid, 207 address, 208 flags); 209 210 dev = kfd_device_by_pci_dev(pdev); 211 if (!WARN_ON(!dev)) 212 kfd_signal_iommu_event(dev, pasid, address, 213 flags & PPR_FAULT_WRITE, flags & PPR_FAULT_EXEC); 214 215 return AMD_IOMMU_INV_PRI_RSP_INVALID; 216 } 217 218 static void kfd_cwsr_init(struct kfd_dev *kfd) 219 { 220 if (cwsr_enable && kfd->device_info->supports_cwsr) { 221 BUILD_BUG_ON(sizeof(cwsr_trap_gfx8_hex) > PAGE_SIZE); 222 223 kfd->cwsr_isa = cwsr_trap_gfx8_hex; 224 kfd->cwsr_isa_size = sizeof(cwsr_trap_gfx8_hex); 225 kfd->cwsr_enabled = true; 226 } 227 } 228 229 bool kgd2kfd_device_init(struct kfd_dev *kfd, 230 const struct kgd2kfd_shared_resources *gpu_resources) 231 { 232 unsigned int size; 233 234 kfd->shared_resources = *gpu_resources; 235 236 kfd->vm_info.first_vmid_kfd = ffs(gpu_resources->compute_vmid_bitmap)-1; 237 kfd->vm_info.last_vmid_kfd = fls(gpu_resources->compute_vmid_bitmap)-1; 238 kfd->vm_info.vmid_num_kfd = kfd->vm_info.last_vmid_kfd 239 - kfd->vm_info.first_vmid_kfd + 1; 240 241 /* Verify module parameters regarding mapped process number*/ 242 if ((hws_max_conc_proc < 0) 243 || (hws_max_conc_proc > kfd->vm_info.vmid_num_kfd)) { 244 dev_err(kfd_device, 245 "hws_max_conc_proc %d must be between 0 and %d, use %d instead\n", 246 hws_max_conc_proc, kfd->vm_info.vmid_num_kfd, 247 kfd->vm_info.vmid_num_kfd); 248 kfd->max_proc_per_quantum = kfd->vm_info.vmid_num_kfd; 249 } else 250 kfd->max_proc_per_quantum = hws_max_conc_proc; 251 252 /* calculate max size of mqds needed for queues */ 253 size = max_num_of_queues_per_device * 254 kfd->device_info->mqd_size_aligned; 255 256 /* 257 * calculate max size of runlist packet. 258 * There can be only 2 packets at once 259 */ 260 size += (KFD_MAX_NUM_OF_PROCESSES * sizeof(struct pm4_mes_map_process) + 261 max_num_of_queues_per_device * sizeof(struct pm4_mes_map_queues) 262 + sizeof(struct pm4_mes_runlist)) * 2; 263 264 /* Add size of HIQ & DIQ */ 265 size += KFD_KERNEL_QUEUE_SIZE * 2; 266 267 /* add another 512KB for all other allocations on gart (HPD, fences) */ 268 size += 512 * 1024; 269 270 if (kfd->kfd2kgd->init_gtt_mem_allocation( 271 kfd->kgd, size, &kfd->gtt_mem, 272 &kfd->gtt_start_gpu_addr, &kfd->gtt_start_cpu_ptr)){ 273 dev_err(kfd_device, "Could not allocate %d bytes\n", size); 274 goto out; 275 } 276 277 dev_info(kfd_device, "Allocated %d bytes on gart\n", size); 278 279 /* Initialize GTT sa with 512 byte chunk size */ 280 if (kfd_gtt_sa_init(kfd, size, 512) != 0) { 281 dev_err(kfd_device, "Error initializing gtt sub-allocator\n"); 282 goto kfd_gtt_sa_init_error; 283 } 284 285 if (kfd_doorbell_init(kfd)) { 286 dev_err(kfd_device, 287 "Error initializing doorbell aperture\n"); 288 goto kfd_doorbell_error; 289 } 290 291 if (kfd_topology_add_device(kfd)) { 292 dev_err(kfd_device, "Error adding device to topology\n"); 293 goto kfd_topology_add_device_error; 294 } 295 296 if (kfd_interrupt_init(kfd)) { 297 dev_err(kfd_device, "Error initializing interrupts\n"); 298 goto kfd_interrupt_error; 299 } 300 301 kfd->dqm = device_queue_manager_init(kfd); 302 if (!kfd->dqm) { 303 dev_err(kfd_device, "Error initializing queue manager\n"); 304 goto device_queue_manager_error; 305 } 306 307 if (!device_iommu_pasid_init(kfd)) { 308 dev_err(kfd_device, 309 "Error initializing iommuv2 for device %x:%x\n", 310 kfd->pdev->vendor, kfd->pdev->device); 311 goto device_iommu_pasid_error; 312 } 313 314 kfd_cwsr_init(kfd); 315 316 if (kfd_resume(kfd)) 317 goto kfd_resume_error; 318 319 kfd->dbgmgr = NULL; 320 321 kfd->init_complete = true; 322 dev_info(kfd_device, "added device %x:%x\n", kfd->pdev->vendor, 323 kfd->pdev->device); 324 325 pr_debug("Starting kfd with the following scheduling policy %d\n", 326 sched_policy); 327 328 goto out; 329 330 kfd_resume_error: 331 device_iommu_pasid_error: 332 device_queue_manager_uninit(kfd->dqm); 333 device_queue_manager_error: 334 kfd_interrupt_exit(kfd); 335 kfd_interrupt_error: 336 kfd_topology_remove_device(kfd); 337 kfd_topology_add_device_error: 338 kfd_doorbell_fini(kfd); 339 kfd_doorbell_error: 340 kfd_gtt_sa_fini(kfd); 341 kfd_gtt_sa_init_error: 342 kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem); 343 dev_err(kfd_device, 344 "device %x:%x NOT added due to errors\n", 345 kfd->pdev->vendor, kfd->pdev->device); 346 out: 347 return kfd->init_complete; 348 } 349 350 void kgd2kfd_device_exit(struct kfd_dev *kfd) 351 { 352 if (kfd->init_complete) { 353 kgd2kfd_suspend(kfd); 354 device_queue_manager_uninit(kfd->dqm); 355 kfd_interrupt_exit(kfd); 356 kfd_topology_remove_device(kfd); 357 kfd_doorbell_fini(kfd); 358 kfd_gtt_sa_fini(kfd); 359 kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem); 360 } 361 362 kfree(kfd); 363 } 364 365 void kgd2kfd_suspend(struct kfd_dev *kfd) 366 { 367 if (!kfd->init_complete) 368 return; 369 370 kfd->dqm->ops.stop(kfd->dqm); 371 372 kfd_unbind_processes_from_device(kfd); 373 374 amd_iommu_set_invalidate_ctx_cb(kfd->pdev, NULL); 375 amd_iommu_set_invalid_ppr_cb(kfd->pdev, NULL); 376 amd_iommu_free_device(kfd->pdev); 377 } 378 379 int kgd2kfd_resume(struct kfd_dev *kfd) 380 { 381 if (!kfd->init_complete) 382 return 0; 383 384 return kfd_resume(kfd); 385 386 } 387 388 static int kfd_resume(struct kfd_dev *kfd) 389 { 390 int err = 0; 391 unsigned int pasid_limit = kfd_get_pasid_limit(); 392 393 err = amd_iommu_init_device(kfd->pdev, pasid_limit); 394 if (err) 395 return -ENXIO; 396 amd_iommu_set_invalidate_ctx_cb(kfd->pdev, 397 iommu_pasid_shutdown_callback); 398 amd_iommu_set_invalid_ppr_cb(kfd->pdev, 399 iommu_invalid_ppr_cb); 400 401 err = kfd_bind_processes_to_device(kfd); 402 if (err) 403 goto processes_bind_error; 404 405 err = kfd->dqm->ops.start(kfd->dqm); 406 if (err) { 407 dev_err(kfd_device, 408 "Error starting queue manager for device %x:%x\n", 409 kfd->pdev->vendor, kfd->pdev->device); 410 goto dqm_start_error; 411 } 412 413 return err; 414 415 dqm_start_error: 416 processes_bind_error: 417 amd_iommu_free_device(kfd->pdev); 418 419 return err; 420 } 421 422 /* This is called directly from KGD at ISR. */ 423 void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry) 424 { 425 if (!kfd->init_complete) 426 return; 427 428 spin_lock(&kfd->interrupt_lock); 429 430 if (kfd->interrupts_active 431 && interrupt_is_wanted(kfd, ih_ring_entry) 432 && enqueue_ih_ring_entry(kfd, ih_ring_entry)) 433 queue_work(kfd->ih_wq, &kfd->interrupt_work); 434 435 spin_unlock(&kfd->interrupt_lock); 436 } 437 438 static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size, 439 unsigned int chunk_size) 440 { 441 unsigned int num_of_longs; 442 443 if (WARN_ON(buf_size < chunk_size)) 444 return -EINVAL; 445 if (WARN_ON(buf_size == 0)) 446 return -EINVAL; 447 if (WARN_ON(chunk_size == 0)) 448 return -EINVAL; 449 450 kfd->gtt_sa_chunk_size = chunk_size; 451 kfd->gtt_sa_num_of_chunks = buf_size / chunk_size; 452 453 num_of_longs = (kfd->gtt_sa_num_of_chunks + BITS_PER_LONG - 1) / 454 BITS_PER_LONG; 455 456 kfd->gtt_sa_bitmap = kcalloc(num_of_longs, sizeof(long), GFP_KERNEL); 457 458 if (!kfd->gtt_sa_bitmap) 459 return -ENOMEM; 460 461 pr_debug("gtt_sa_num_of_chunks = %d, gtt_sa_bitmap = %p\n", 462 kfd->gtt_sa_num_of_chunks, kfd->gtt_sa_bitmap); 463 464 mutex_init(&kfd->gtt_sa_lock); 465 466 return 0; 467 468 } 469 470 static void kfd_gtt_sa_fini(struct kfd_dev *kfd) 471 { 472 mutex_destroy(&kfd->gtt_sa_lock); 473 kfree(kfd->gtt_sa_bitmap); 474 } 475 476 static inline uint64_t kfd_gtt_sa_calc_gpu_addr(uint64_t start_addr, 477 unsigned int bit_num, 478 unsigned int chunk_size) 479 { 480 return start_addr + bit_num * chunk_size; 481 } 482 483 static inline uint32_t *kfd_gtt_sa_calc_cpu_addr(void *start_addr, 484 unsigned int bit_num, 485 unsigned int chunk_size) 486 { 487 return (uint32_t *) ((uint64_t) start_addr + bit_num * chunk_size); 488 } 489 490 int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size, 491 struct kfd_mem_obj **mem_obj) 492 { 493 unsigned int found, start_search, cur_size; 494 495 if (size == 0) 496 return -EINVAL; 497 498 if (size > kfd->gtt_sa_num_of_chunks * kfd->gtt_sa_chunk_size) 499 return -ENOMEM; 500 501 *mem_obj = kmalloc(sizeof(struct kfd_mem_obj), GFP_KERNEL); 502 if ((*mem_obj) == NULL) 503 return -ENOMEM; 504 505 pr_debug("Allocated mem_obj = %p for size = %d\n", *mem_obj, size); 506 507 start_search = 0; 508 509 mutex_lock(&kfd->gtt_sa_lock); 510 511 kfd_gtt_restart_search: 512 /* Find the first chunk that is free */ 513 found = find_next_zero_bit(kfd->gtt_sa_bitmap, 514 kfd->gtt_sa_num_of_chunks, 515 start_search); 516 517 pr_debug("Found = %d\n", found); 518 519 /* If there wasn't any free chunk, bail out */ 520 if (found == kfd->gtt_sa_num_of_chunks) 521 goto kfd_gtt_no_free_chunk; 522 523 /* Update fields of mem_obj */ 524 (*mem_obj)->range_start = found; 525 (*mem_obj)->range_end = found; 526 (*mem_obj)->gpu_addr = kfd_gtt_sa_calc_gpu_addr( 527 kfd->gtt_start_gpu_addr, 528 found, 529 kfd->gtt_sa_chunk_size); 530 (*mem_obj)->cpu_ptr = kfd_gtt_sa_calc_cpu_addr( 531 kfd->gtt_start_cpu_ptr, 532 found, 533 kfd->gtt_sa_chunk_size); 534 535 pr_debug("gpu_addr = %p, cpu_addr = %p\n", 536 (uint64_t *) (*mem_obj)->gpu_addr, (*mem_obj)->cpu_ptr); 537 538 /* If we need only one chunk, mark it as allocated and get out */ 539 if (size <= kfd->gtt_sa_chunk_size) { 540 pr_debug("Single bit\n"); 541 set_bit(found, kfd->gtt_sa_bitmap); 542 goto kfd_gtt_out; 543 } 544 545 /* Otherwise, try to see if we have enough contiguous chunks */ 546 cur_size = size - kfd->gtt_sa_chunk_size; 547 do { 548 (*mem_obj)->range_end = 549 find_next_zero_bit(kfd->gtt_sa_bitmap, 550 kfd->gtt_sa_num_of_chunks, ++found); 551 /* 552 * If next free chunk is not contiguous than we need to 553 * restart our search from the last free chunk we found (which 554 * wasn't contiguous to the previous ones 555 */ 556 if ((*mem_obj)->range_end != found) { 557 start_search = found; 558 goto kfd_gtt_restart_search; 559 } 560 561 /* 562 * If we reached end of buffer, bail out with error 563 */ 564 if (found == kfd->gtt_sa_num_of_chunks) 565 goto kfd_gtt_no_free_chunk; 566 567 /* Check if we don't need another chunk */ 568 if (cur_size <= kfd->gtt_sa_chunk_size) 569 cur_size = 0; 570 else 571 cur_size -= kfd->gtt_sa_chunk_size; 572 573 } while (cur_size > 0); 574 575 pr_debug("range_start = %d, range_end = %d\n", 576 (*mem_obj)->range_start, (*mem_obj)->range_end); 577 578 /* Mark the chunks as allocated */ 579 for (found = (*mem_obj)->range_start; 580 found <= (*mem_obj)->range_end; 581 found++) 582 set_bit(found, kfd->gtt_sa_bitmap); 583 584 kfd_gtt_out: 585 mutex_unlock(&kfd->gtt_sa_lock); 586 return 0; 587 588 kfd_gtt_no_free_chunk: 589 pr_debug("Allocation failed with mem_obj = %p\n", mem_obj); 590 mutex_unlock(&kfd->gtt_sa_lock); 591 kfree(mem_obj); 592 return -ENOMEM; 593 } 594 595 int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj) 596 { 597 unsigned int bit; 598 599 /* Act like kfree when trying to free a NULL object */ 600 if (!mem_obj) 601 return 0; 602 603 pr_debug("Free mem_obj = %p, range_start = %d, range_end = %d\n", 604 mem_obj, mem_obj->range_start, mem_obj->range_end); 605 606 mutex_lock(&kfd->gtt_sa_lock); 607 608 /* Mark the chunks as free */ 609 for (bit = mem_obj->range_start; 610 bit <= mem_obj->range_end; 611 bit++) 612 clear_bit(bit, kfd->gtt_sa_bitmap); 613 614 mutex_unlock(&kfd->gtt_sa_lock); 615 616 kfree(mem_obj); 617 return 0; 618 } 619