1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 #include <linux/amd-iommu.h> 24 #include <linux/bsearch.h> 25 #include <linux/pci.h> 26 #include <linux/slab.h> 27 #include "kfd_priv.h" 28 #include "kfd_device_queue_manager.h" 29 #include "kfd_pm4_headers_vi.h" 30 31 #define MQD_SIZE_ALIGNED 768 32 33 static const struct kfd_device_info kaveri_device_info = { 34 .asic_family = CHIP_KAVERI, 35 .max_pasid_bits = 16, 36 /* max num of queues for KV.TODO should be a dynamic value */ 37 .max_no_of_hqd = 24, 38 .ih_ring_entry_size = 4 * sizeof(uint32_t), 39 .event_interrupt_class = &event_interrupt_class_cik, 40 .num_of_watch_points = 4, 41 .mqd_size_aligned = MQD_SIZE_ALIGNED 42 }; 43 44 static const struct kfd_device_info carrizo_device_info = { 45 .asic_family = CHIP_CARRIZO, 46 .max_pasid_bits = 16, 47 /* max num of queues for CZ.TODO should be a dynamic value */ 48 .max_no_of_hqd = 24, 49 .ih_ring_entry_size = 4 * sizeof(uint32_t), 50 .event_interrupt_class = &event_interrupt_class_cik, 51 .num_of_watch_points = 4, 52 .mqd_size_aligned = MQD_SIZE_ALIGNED 53 }; 54 55 struct kfd_deviceid { 56 unsigned short did; 57 const struct kfd_device_info *device_info; 58 }; 59 60 /* Please keep this sorted by increasing device id. */ 61 static const struct kfd_deviceid supported_devices[] = { 62 { 0x1304, &kaveri_device_info }, /* Kaveri */ 63 { 0x1305, &kaveri_device_info }, /* Kaveri */ 64 { 0x1306, &kaveri_device_info }, /* Kaveri */ 65 { 0x1307, &kaveri_device_info }, /* Kaveri */ 66 { 0x1309, &kaveri_device_info }, /* Kaveri */ 67 { 0x130A, &kaveri_device_info }, /* Kaveri */ 68 { 0x130B, &kaveri_device_info }, /* Kaveri */ 69 { 0x130C, &kaveri_device_info }, /* Kaveri */ 70 { 0x130D, &kaveri_device_info }, /* Kaveri */ 71 { 0x130E, &kaveri_device_info }, /* Kaveri */ 72 { 0x130F, &kaveri_device_info }, /* Kaveri */ 73 { 0x1310, &kaveri_device_info }, /* Kaveri */ 74 { 0x1311, &kaveri_device_info }, /* Kaveri */ 75 { 0x1312, &kaveri_device_info }, /* Kaveri */ 76 { 0x1313, &kaveri_device_info }, /* Kaveri */ 77 { 0x1315, &kaveri_device_info }, /* Kaveri */ 78 { 0x1316, &kaveri_device_info }, /* Kaveri */ 79 { 0x1317, &kaveri_device_info }, /* Kaveri */ 80 { 0x1318, &kaveri_device_info }, /* Kaveri */ 81 { 0x131B, &kaveri_device_info }, /* Kaveri */ 82 { 0x131C, &kaveri_device_info }, /* Kaveri */ 83 { 0x131D, &kaveri_device_info }, /* Kaveri */ 84 { 0x9870, &carrizo_device_info }, /* Carrizo */ 85 { 0x9874, &carrizo_device_info }, /* Carrizo */ 86 { 0x9875, &carrizo_device_info }, /* Carrizo */ 87 { 0x9876, &carrizo_device_info }, /* Carrizo */ 88 { 0x9877, &carrizo_device_info } /* Carrizo */ 89 }; 90 91 static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size, 92 unsigned int chunk_size); 93 static void kfd_gtt_sa_fini(struct kfd_dev *kfd); 94 95 static const struct kfd_device_info *lookup_device_info(unsigned short did) 96 { 97 size_t i; 98 99 for (i = 0; i < ARRAY_SIZE(supported_devices); i++) { 100 if (supported_devices[i].did == did) { 101 WARN_ON(!supported_devices[i].device_info); 102 return supported_devices[i].device_info; 103 } 104 } 105 106 dev_warn(kfd_device, "DID %04x is missing in supported_devices\n", 107 did); 108 109 return NULL; 110 } 111 112 struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd, 113 struct pci_dev *pdev, const struct kfd2kgd_calls *f2g) 114 { 115 struct kfd_dev *kfd; 116 117 const struct kfd_device_info *device_info = 118 lookup_device_info(pdev->device); 119 120 if (!device_info) { 121 dev_err(kfd_device, "kgd2kfd_probe failed\n"); 122 return NULL; 123 } 124 125 kfd = kzalloc(sizeof(*kfd), GFP_KERNEL); 126 if (!kfd) 127 return NULL; 128 129 kfd->kgd = kgd; 130 kfd->device_info = device_info; 131 kfd->pdev = pdev; 132 kfd->init_complete = false; 133 kfd->kfd2kgd = f2g; 134 135 mutex_init(&kfd->doorbell_mutex); 136 memset(&kfd->doorbell_available_index, 0, 137 sizeof(kfd->doorbell_available_index)); 138 139 return kfd; 140 } 141 142 static bool device_iommu_pasid_init(struct kfd_dev *kfd) 143 { 144 const u32 required_iommu_flags = AMD_IOMMU_DEVICE_FLAG_ATS_SUP | 145 AMD_IOMMU_DEVICE_FLAG_PRI_SUP | 146 AMD_IOMMU_DEVICE_FLAG_PASID_SUP; 147 148 struct amd_iommu_device_info iommu_info; 149 unsigned int pasid_limit; 150 int err; 151 152 err = amd_iommu_device_info(kfd->pdev, &iommu_info); 153 if (err < 0) { 154 dev_err(kfd_device, 155 "error getting iommu info. is the iommu enabled?\n"); 156 return false; 157 } 158 159 if ((iommu_info.flags & required_iommu_flags) != required_iommu_flags) { 160 dev_err(kfd_device, "error required iommu flags ats %i, pri %i, pasid %i\n", 161 (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_ATS_SUP) != 0, 162 (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PRI_SUP) != 0, 163 (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PASID_SUP) 164 != 0); 165 return false; 166 } 167 168 pasid_limit = min_t(unsigned int, 169 (unsigned int)(1 << kfd->device_info->max_pasid_bits), 170 iommu_info.max_pasids); 171 172 err = amd_iommu_init_device(kfd->pdev, pasid_limit); 173 if (err < 0) { 174 dev_err(kfd_device, "error initializing iommu device\n"); 175 return false; 176 } 177 178 if (!kfd_set_pasid_limit(pasid_limit)) { 179 dev_err(kfd_device, "error setting pasid limit\n"); 180 amd_iommu_free_device(kfd->pdev); 181 return false; 182 } 183 184 return true; 185 } 186 187 static void iommu_pasid_shutdown_callback(struct pci_dev *pdev, int pasid) 188 { 189 struct kfd_dev *dev = kfd_device_by_pci_dev(pdev); 190 191 if (dev) 192 kfd_unbind_process_from_device(dev, pasid); 193 } 194 195 /* 196 * This function called by IOMMU driver on PPR failure 197 */ 198 static int iommu_invalid_ppr_cb(struct pci_dev *pdev, int pasid, 199 unsigned long address, u16 flags) 200 { 201 struct kfd_dev *dev; 202 203 dev_warn(kfd_device, 204 "Invalid PPR device %x:%x.%x pasid %d address 0x%lX flags 0x%X", 205 PCI_BUS_NUM(pdev->devfn), 206 PCI_SLOT(pdev->devfn), 207 PCI_FUNC(pdev->devfn), 208 pasid, 209 address, 210 flags); 211 212 dev = kfd_device_by_pci_dev(pdev); 213 if (!WARN_ON(!dev)) 214 kfd_signal_iommu_event(dev, pasid, address, 215 flags & PPR_FAULT_WRITE, flags & PPR_FAULT_EXEC); 216 217 return AMD_IOMMU_INV_PRI_RSP_INVALID; 218 } 219 220 bool kgd2kfd_device_init(struct kfd_dev *kfd, 221 const struct kgd2kfd_shared_resources *gpu_resources) 222 { 223 unsigned int size; 224 225 kfd->shared_resources = *gpu_resources; 226 227 /* calculate max size of mqds needed for queues */ 228 size = max_num_of_queues_per_device * 229 kfd->device_info->mqd_size_aligned; 230 231 /* 232 * calculate max size of runlist packet. 233 * There can be only 2 packets at once 234 */ 235 size += (KFD_MAX_NUM_OF_PROCESSES * sizeof(struct pm4_mes_map_process) + 236 max_num_of_queues_per_device * sizeof(struct pm4_mes_map_queues) 237 + sizeof(struct pm4_mes_runlist)) * 2; 238 239 /* Add size of HIQ & DIQ */ 240 size += KFD_KERNEL_QUEUE_SIZE * 2; 241 242 /* add another 512KB for all other allocations on gart (HPD, fences) */ 243 size += 512 * 1024; 244 245 if (kfd->kfd2kgd->init_gtt_mem_allocation( 246 kfd->kgd, size, &kfd->gtt_mem, 247 &kfd->gtt_start_gpu_addr, &kfd->gtt_start_cpu_ptr)){ 248 dev_err(kfd_device, "Could not allocate %d bytes\n", size); 249 goto out; 250 } 251 252 dev_info(kfd_device, "Allocated %d bytes on gart\n", size); 253 254 /* Initialize GTT sa with 512 byte chunk size */ 255 if (kfd_gtt_sa_init(kfd, size, 512) != 0) { 256 dev_err(kfd_device, "Error initializing gtt sub-allocator\n"); 257 goto kfd_gtt_sa_init_error; 258 } 259 260 if (kfd_doorbell_init(kfd)) { 261 dev_err(kfd_device, 262 "Error initializing doorbell aperture\n"); 263 goto kfd_doorbell_error; 264 } 265 266 if (kfd_topology_add_device(kfd)) { 267 dev_err(kfd_device, "Error adding device to topology\n"); 268 goto kfd_topology_add_device_error; 269 } 270 271 if (kfd_interrupt_init(kfd)) { 272 dev_err(kfd_device, "Error initializing interrupts\n"); 273 goto kfd_interrupt_error; 274 } 275 276 if (!device_iommu_pasid_init(kfd)) { 277 dev_err(kfd_device, 278 "Error initializing iommuv2 for device %x:%x\n", 279 kfd->pdev->vendor, kfd->pdev->device); 280 goto device_iommu_pasid_error; 281 } 282 amd_iommu_set_invalidate_ctx_cb(kfd->pdev, 283 iommu_pasid_shutdown_callback); 284 amd_iommu_set_invalid_ppr_cb(kfd->pdev, iommu_invalid_ppr_cb); 285 286 kfd->dqm = device_queue_manager_init(kfd); 287 if (!kfd->dqm) { 288 dev_err(kfd_device, "Error initializing queue manager\n"); 289 goto device_queue_manager_error; 290 } 291 292 if (kfd->dqm->ops.start(kfd->dqm)) { 293 dev_err(kfd_device, 294 "Error starting queue manager for device %x:%x\n", 295 kfd->pdev->vendor, kfd->pdev->device); 296 goto dqm_start_error; 297 } 298 299 kfd->dbgmgr = NULL; 300 301 kfd->init_complete = true; 302 dev_info(kfd_device, "added device %x:%x\n", kfd->pdev->vendor, 303 kfd->pdev->device); 304 305 pr_debug("Starting kfd with the following scheduling policy %d\n", 306 sched_policy); 307 308 goto out; 309 310 dqm_start_error: 311 device_queue_manager_uninit(kfd->dqm); 312 device_queue_manager_error: 313 amd_iommu_free_device(kfd->pdev); 314 device_iommu_pasid_error: 315 kfd_interrupt_exit(kfd); 316 kfd_interrupt_error: 317 kfd_topology_remove_device(kfd); 318 kfd_topology_add_device_error: 319 kfd_doorbell_fini(kfd); 320 kfd_doorbell_error: 321 kfd_gtt_sa_fini(kfd); 322 kfd_gtt_sa_init_error: 323 kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem); 324 dev_err(kfd_device, 325 "device %x:%x NOT added due to errors\n", 326 kfd->pdev->vendor, kfd->pdev->device); 327 out: 328 return kfd->init_complete; 329 } 330 331 void kgd2kfd_device_exit(struct kfd_dev *kfd) 332 { 333 if (kfd->init_complete) { 334 device_queue_manager_uninit(kfd->dqm); 335 amd_iommu_free_device(kfd->pdev); 336 kfd_interrupt_exit(kfd); 337 kfd_topology_remove_device(kfd); 338 kfd_doorbell_fini(kfd); 339 kfd_gtt_sa_fini(kfd); 340 kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem); 341 } 342 343 kfree(kfd); 344 } 345 346 void kgd2kfd_suspend(struct kfd_dev *kfd) 347 { 348 if (kfd->init_complete) { 349 kfd->dqm->ops.stop(kfd->dqm); 350 amd_iommu_set_invalidate_ctx_cb(kfd->pdev, NULL); 351 amd_iommu_set_invalid_ppr_cb(kfd->pdev, NULL); 352 amd_iommu_free_device(kfd->pdev); 353 } 354 } 355 356 int kgd2kfd_resume(struct kfd_dev *kfd) 357 { 358 unsigned int pasid_limit; 359 int err; 360 361 pasid_limit = kfd_get_pasid_limit(); 362 363 if (kfd->init_complete) { 364 err = amd_iommu_init_device(kfd->pdev, pasid_limit); 365 if (err < 0) { 366 dev_err(kfd_device, "failed to initialize iommu\n"); 367 return -ENXIO; 368 } 369 370 amd_iommu_set_invalidate_ctx_cb(kfd->pdev, 371 iommu_pasid_shutdown_callback); 372 amd_iommu_set_invalid_ppr_cb(kfd->pdev, iommu_invalid_ppr_cb); 373 kfd->dqm->ops.start(kfd->dqm); 374 } 375 376 return 0; 377 } 378 379 /* This is called directly from KGD at ISR. */ 380 void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry) 381 { 382 if (!kfd->init_complete) 383 return; 384 385 spin_lock(&kfd->interrupt_lock); 386 387 if (kfd->interrupts_active 388 && interrupt_is_wanted(kfd, ih_ring_entry) 389 && enqueue_ih_ring_entry(kfd, ih_ring_entry)) 390 schedule_work(&kfd->interrupt_work); 391 392 spin_unlock(&kfd->interrupt_lock); 393 } 394 395 static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size, 396 unsigned int chunk_size) 397 { 398 unsigned int num_of_longs; 399 400 if (WARN_ON(buf_size < chunk_size)) 401 return -EINVAL; 402 if (WARN_ON(buf_size == 0)) 403 return -EINVAL; 404 if (WARN_ON(chunk_size == 0)) 405 return -EINVAL; 406 407 kfd->gtt_sa_chunk_size = chunk_size; 408 kfd->gtt_sa_num_of_chunks = buf_size / chunk_size; 409 410 num_of_longs = (kfd->gtt_sa_num_of_chunks + BITS_PER_LONG - 1) / 411 BITS_PER_LONG; 412 413 kfd->gtt_sa_bitmap = kcalloc(num_of_longs, sizeof(long), GFP_KERNEL); 414 415 if (!kfd->gtt_sa_bitmap) 416 return -ENOMEM; 417 418 pr_debug("gtt_sa_num_of_chunks = %d, gtt_sa_bitmap = %p\n", 419 kfd->gtt_sa_num_of_chunks, kfd->gtt_sa_bitmap); 420 421 mutex_init(&kfd->gtt_sa_lock); 422 423 return 0; 424 425 } 426 427 static void kfd_gtt_sa_fini(struct kfd_dev *kfd) 428 { 429 mutex_destroy(&kfd->gtt_sa_lock); 430 kfree(kfd->gtt_sa_bitmap); 431 } 432 433 static inline uint64_t kfd_gtt_sa_calc_gpu_addr(uint64_t start_addr, 434 unsigned int bit_num, 435 unsigned int chunk_size) 436 { 437 return start_addr + bit_num * chunk_size; 438 } 439 440 static inline uint32_t *kfd_gtt_sa_calc_cpu_addr(void *start_addr, 441 unsigned int bit_num, 442 unsigned int chunk_size) 443 { 444 return (uint32_t *) ((uint64_t) start_addr + bit_num * chunk_size); 445 } 446 447 int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size, 448 struct kfd_mem_obj **mem_obj) 449 { 450 unsigned int found, start_search, cur_size; 451 452 if (size == 0) 453 return -EINVAL; 454 455 if (size > kfd->gtt_sa_num_of_chunks * kfd->gtt_sa_chunk_size) 456 return -ENOMEM; 457 458 *mem_obj = kmalloc(sizeof(struct kfd_mem_obj), GFP_KERNEL); 459 if ((*mem_obj) == NULL) 460 return -ENOMEM; 461 462 pr_debug("Allocated mem_obj = %p for size = %d\n", *mem_obj, size); 463 464 start_search = 0; 465 466 mutex_lock(&kfd->gtt_sa_lock); 467 468 kfd_gtt_restart_search: 469 /* Find the first chunk that is free */ 470 found = find_next_zero_bit(kfd->gtt_sa_bitmap, 471 kfd->gtt_sa_num_of_chunks, 472 start_search); 473 474 pr_debug("Found = %d\n", found); 475 476 /* If there wasn't any free chunk, bail out */ 477 if (found == kfd->gtt_sa_num_of_chunks) 478 goto kfd_gtt_no_free_chunk; 479 480 /* Update fields of mem_obj */ 481 (*mem_obj)->range_start = found; 482 (*mem_obj)->range_end = found; 483 (*mem_obj)->gpu_addr = kfd_gtt_sa_calc_gpu_addr( 484 kfd->gtt_start_gpu_addr, 485 found, 486 kfd->gtt_sa_chunk_size); 487 (*mem_obj)->cpu_ptr = kfd_gtt_sa_calc_cpu_addr( 488 kfd->gtt_start_cpu_ptr, 489 found, 490 kfd->gtt_sa_chunk_size); 491 492 pr_debug("gpu_addr = %p, cpu_addr = %p\n", 493 (uint64_t *) (*mem_obj)->gpu_addr, (*mem_obj)->cpu_ptr); 494 495 /* If we need only one chunk, mark it as allocated and get out */ 496 if (size <= kfd->gtt_sa_chunk_size) { 497 pr_debug("Single bit\n"); 498 set_bit(found, kfd->gtt_sa_bitmap); 499 goto kfd_gtt_out; 500 } 501 502 /* Otherwise, try to see if we have enough contiguous chunks */ 503 cur_size = size - kfd->gtt_sa_chunk_size; 504 do { 505 (*mem_obj)->range_end = 506 find_next_zero_bit(kfd->gtt_sa_bitmap, 507 kfd->gtt_sa_num_of_chunks, ++found); 508 /* 509 * If next free chunk is not contiguous than we need to 510 * restart our search from the last free chunk we found (which 511 * wasn't contiguous to the previous ones 512 */ 513 if ((*mem_obj)->range_end != found) { 514 start_search = found; 515 goto kfd_gtt_restart_search; 516 } 517 518 /* 519 * If we reached end of buffer, bail out with error 520 */ 521 if (found == kfd->gtt_sa_num_of_chunks) 522 goto kfd_gtt_no_free_chunk; 523 524 /* Check if we don't need another chunk */ 525 if (cur_size <= kfd->gtt_sa_chunk_size) 526 cur_size = 0; 527 else 528 cur_size -= kfd->gtt_sa_chunk_size; 529 530 } while (cur_size > 0); 531 532 pr_debug("range_start = %d, range_end = %d\n", 533 (*mem_obj)->range_start, (*mem_obj)->range_end); 534 535 /* Mark the chunks as allocated */ 536 for (found = (*mem_obj)->range_start; 537 found <= (*mem_obj)->range_end; 538 found++) 539 set_bit(found, kfd->gtt_sa_bitmap); 540 541 kfd_gtt_out: 542 mutex_unlock(&kfd->gtt_sa_lock); 543 return 0; 544 545 kfd_gtt_no_free_chunk: 546 pr_debug("Allocation failed with mem_obj = %p\n", mem_obj); 547 mutex_unlock(&kfd->gtt_sa_lock); 548 kfree(mem_obj); 549 return -ENOMEM; 550 } 551 552 int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj) 553 { 554 unsigned int bit; 555 556 /* Act like kfree when trying to free a NULL object */ 557 if (!mem_obj) 558 return 0; 559 560 pr_debug("Free mem_obj = %p, range_start = %d, range_end = %d\n", 561 mem_obj, mem_obj->range_start, mem_obj->range_end); 562 563 mutex_lock(&kfd->gtt_sa_lock); 564 565 /* Mark the chunks as free */ 566 for (bit = mem_obj->range_start; 567 bit <= mem_obj->range_end; 568 bit++) 569 clear_bit(bit, kfd->gtt_sa_bitmap); 570 571 mutex_unlock(&kfd->gtt_sa_lock); 572 573 kfree(mem_obj); 574 return 0; 575 } 576