1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 #include <linux/amd-iommu.h> 24 #include <linux/bsearch.h> 25 #include <linux/pci.h> 26 #include <linux/slab.h> 27 #include "kfd_priv.h" 28 #include "kfd_device_queue_manager.h" 29 #include "kfd_pm4_headers.h" 30 31 #define MQD_SIZE_ALIGNED 768 32 33 static const struct kfd_device_info kaveri_device_info = { 34 .asic_family = CHIP_KAVERI, 35 .max_pasid_bits = 16, 36 /* max num of queues for KV.TODO should be a dynamic value */ 37 .max_no_of_hqd = 24, 38 .ih_ring_entry_size = 4 * sizeof(uint32_t), 39 .event_interrupt_class = &event_interrupt_class_cik, 40 .num_of_watch_points = 4, 41 .mqd_size_aligned = MQD_SIZE_ALIGNED 42 }; 43 44 static const struct kfd_device_info carrizo_device_info = { 45 .asic_family = CHIP_CARRIZO, 46 .max_pasid_bits = 16, 47 /* max num of queues for CZ.TODO should be a dynamic value */ 48 .max_no_of_hqd = 24, 49 .ih_ring_entry_size = 4 * sizeof(uint32_t), 50 .event_interrupt_class = &event_interrupt_class_cik, 51 .num_of_watch_points = 4, 52 .mqd_size_aligned = MQD_SIZE_ALIGNED 53 }; 54 55 struct kfd_deviceid { 56 unsigned short did; 57 const struct kfd_device_info *device_info; 58 }; 59 60 /* Please keep this sorted by increasing device id. */ 61 static const struct kfd_deviceid supported_devices[] = { 62 { 0x1304, &kaveri_device_info }, /* Kaveri */ 63 { 0x1305, &kaveri_device_info }, /* Kaveri */ 64 { 0x1306, &kaveri_device_info }, /* Kaveri */ 65 { 0x1307, &kaveri_device_info }, /* Kaveri */ 66 { 0x1309, &kaveri_device_info }, /* Kaveri */ 67 { 0x130A, &kaveri_device_info }, /* Kaveri */ 68 { 0x130B, &kaveri_device_info }, /* Kaveri */ 69 { 0x130C, &kaveri_device_info }, /* Kaveri */ 70 { 0x130D, &kaveri_device_info }, /* Kaveri */ 71 { 0x130E, &kaveri_device_info }, /* Kaveri */ 72 { 0x130F, &kaveri_device_info }, /* Kaveri */ 73 { 0x1310, &kaveri_device_info }, /* Kaveri */ 74 { 0x1311, &kaveri_device_info }, /* Kaveri */ 75 { 0x1312, &kaveri_device_info }, /* Kaveri */ 76 { 0x1313, &kaveri_device_info }, /* Kaveri */ 77 { 0x1315, &kaveri_device_info }, /* Kaveri */ 78 { 0x1316, &kaveri_device_info }, /* Kaveri */ 79 { 0x1317, &kaveri_device_info }, /* Kaveri */ 80 { 0x1318, &kaveri_device_info }, /* Kaveri */ 81 { 0x131B, &kaveri_device_info }, /* Kaveri */ 82 { 0x131C, &kaveri_device_info }, /* Kaveri */ 83 { 0x131D, &kaveri_device_info }, /* Kaveri */ 84 { 0x9870, &carrizo_device_info }, /* Carrizo */ 85 { 0x9874, &carrizo_device_info }, /* Carrizo */ 86 { 0x9875, &carrizo_device_info }, /* Carrizo */ 87 { 0x9876, &carrizo_device_info }, /* Carrizo */ 88 { 0x9877, &carrizo_device_info } /* Carrizo */ 89 }; 90 91 static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size, 92 unsigned int chunk_size); 93 static void kfd_gtt_sa_fini(struct kfd_dev *kfd); 94 95 static const struct kfd_device_info *lookup_device_info(unsigned short did) 96 { 97 size_t i; 98 99 for (i = 0; i < ARRAY_SIZE(supported_devices); i++) { 100 if (supported_devices[i].did == did) { 101 BUG_ON(supported_devices[i].device_info == NULL); 102 return supported_devices[i].device_info; 103 } 104 } 105 106 return NULL; 107 } 108 109 struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd, 110 struct pci_dev *pdev, const struct kfd2kgd_calls *f2g) 111 { 112 struct kfd_dev *kfd; 113 114 const struct kfd_device_info *device_info = 115 lookup_device_info(pdev->device); 116 117 if (!device_info) 118 return NULL; 119 120 kfd = kzalloc(sizeof(*kfd), GFP_KERNEL); 121 if (!kfd) 122 return NULL; 123 124 kfd->kgd = kgd; 125 kfd->device_info = device_info; 126 kfd->pdev = pdev; 127 kfd->init_complete = false; 128 kfd->kfd2kgd = f2g; 129 130 mutex_init(&kfd->doorbell_mutex); 131 memset(&kfd->doorbell_available_index, 0, 132 sizeof(kfd->doorbell_available_index)); 133 134 return kfd; 135 } 136 137 static bool device_iommu_pasid_init(struct kfd_dev *kfd) 138 { 139 const u32 required_iommu_flags = AMD_IOMMU_DEVICE_FLAG_ATS_SUP | 140 AMD_IOMMU_DEVICE_FLAG_PRI_SUP | 141 AMD_IOMMU_DEVICE_FLAG_PASID_SUP; 142 143 struct amd_iommu_device_info iommu_info; 144 unsigned int pasid_limit; 145 int err; 146 147 err = amd_iommu_device_info(kfd->pdev, &iommu_info); 148 if (err < 0) { 149 dev_err(kfd_device, 150 "error getting iommu info. is the iommu enabled?\n"); 151 return false; 152 } 153 154 if ((iommu_info.flags & required_iommu_flags) != required_iommu_flags) { 155 dev_err(kfd_device, "error required iommu flags ats(%i), pri(%i), pasid(%i)\n", 156 (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_ATS_SUP) != 0, 157 (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PRI_SUP) != 0, 158 (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PASID_SUP) != 0); 159 return false; 160 } 161 162 pasid_limit = min_t(unsigned int, 163 (unsigned int)1 << kfd->device_info->max_pasid_bits, 164 iommu_info.max_pasids); 165 /* 166 * last pasid is used for kernel queues doorbells 167 * in the future the last pasid might be used for a kernel thread. 168 */ 169 pasid_limit = min_t(unsigned int, 170 pasid_limit, 171 kfd->doorbell_process_limit - 1); 172 173 err = amd_iommu_init_device(kfd->pdev, pasid_limit); 174 if (err < 0) { 175 dev_err(kfd_device, "error initializing iommu device\n"); 176 return false; 177 } 178 179 if (!kfd_set_pasid_limit(pasid_limit)) { 180 dev_err(kfd_device, "error setting pasid limit\n"); 181 amd_iommu_free_device(kfd->pdev); 182 return false; 183 } 184 185 return true; 186 } 187 188 static void iommu_pasid_shutdown_callback(struct pci_dev *pdev, int pasid) 189 { 190 struct kfd_dev *dev = kfd_device_by_pci_dev(pdev); 191 192 if (dev) 193 kfd_unbind_process_from_device(dev, pasid); 194 } 195 196 /* 197 * This function called by IOMMU driver on PPR failure 198 */ 199 static int iommu_invalid_ppr_cb(struct pci_dev *pdev, int pasid, 200 unsigned long address, u16 flags) 201 { 202 struct kfd_dev *dev; 203 204 dev_warn(kfd_device, 205 "Invalid PPR device %x:%x.%x pasid %d address 0x%lX flags 0x%X", 206 PCI_BUS_NUM(pdev->devfn), 207 PCI_SLOT(pdev->devfn), 208 PCI_FUNC(pdev->devfn), 209 pasid, 210 address, 211 flags); 212 213 dev = kfd_device_by_pci_dev(pdev); 214 BUG_ON(dev == NULL); 215 216 kfd_signal_iommu_event(dev, pasid, address, 217 flags & PPR_FAULT_WRITE, flags & PPR_FAULT_EXEC); 218 219 return AMD_IOMMU_INV_PRI_RSP_INVALID; 220 } 221 222 bool kgd2kfd_device_init(struct kfd_dev *kfd, 223 const struct kgd2kfd_shared_resources *gpu_resources) 224 { 225 unsigned int size; 226 227 kfd->shared_resources = *gpu_resources; 228 229 /* We only use the first MEC */ 230 if (kfd->shared_resources.num_mec > 1) 231 kfd->shared_resources.num_mec = 1; 232 233 /* calculate max size of mqds needed for queues */ 234 size = max_num_of_queues_per_device * 235 kfd->device_info->mqd_size_aligned; 236 237 /* 238 * calculate max size of runlist packet. 239 * There can be only 2 packets at once 240 */ 241 size += (KFD_MAX_NUM_OF_PROCESSES * sizeof(struct pm4_map_process) + 242 max_num_of_queues_per_device * 243 sizeof(struct pm4_map_queues) + sizeof(struct pm4_runlist)) * 2; 244 245 /* Add size of HIQ & DIQ */ 246 size += KFD_KERNEL_QUEUE_SIZE * 2; 247 248 /* add another 512KB for all other allocations on gart (HPD, fences) */ 249 size += 512 * 1024; 250 251 if (kfd->kfd2kgd->init_gtt_mem_allocation( 252 kfd->kgd, size, &kfd->gtt_mem, 253 &kfd->gtt_start_gpu_addr, &kfd->gtt_start_cpu_ptr)){ 254 dev_err(kfd_device, 255 "Could not allocate %d bytes for device (%x:%x)\n", 256 size, kfd->pdev->vendor, kfd->pdev->device); 257 goto out; 258 } 259 260 dev_info(kfd_device, 261 "Allocated %d bytes on gart for device(%x:%x)\n", 262 size, kfd->pdev->vendor, kfd->pdev->device); 263 264 /* Initialize GTT sa with 512 byte chunk size */ 265 if (kfd_gtt_sa_init(kfd, size, 512) != 0) { 266 dev_err(kfd_device, 267 "Error initializing gtt sub-allocator\n"); 268 goto kfd_gtt_sa_init_error; 269 } 270 271 kfd_doorbell_init(kfd); 272 273 if (kfd_topology_add_device(kfd) != 0) { 274 dev_err(kfd_device, 275 "Error adding device (%x:%x) to topology\n", 276 kfd->pdev->vendor, kfd->pdev->device); 277 goto kfd_topology_add_device_error; 278 } 279 280 if (kfd_interrupt_init(kfd)) { 281 dev_err(kfd_device, 282 "Error initializing interrupts for device (%x:%x)\n", 283 kfd->pdev->vendor, kfd->pdev->device); 284 goto kfd_interrupt_error; 285 } 286 287 if (!device_iommu_pasid_init(kfd)) { 288 dev_err(kfd_device, 289 "Error initializing iommuv2 for device (%x:%x)\n", 290 kfd->pdev->vendor, kfd->pdev->device); 291 goto device_iommu_pasid_error; 292 } 293 amd_iommu_set_invalidate_ctx_cb(kfd->pdev, 294 iommu_pasid_shutdown_callback); 295 amd_iommu_set_invalid_ppr_cb(kfd->pdev, iommu_invalid_ppr_cb); 296 297 kfd->dqm = device_queue_manager_init(kfd); 298 if (!kfd->dqm) { 299 dev_err(kfd_device, 300 "Error initializing queue manager for device (%x:%x)\n", 301 kfd->pdev->vendor, kfd->pdev->device); 302 goto device_queue_manager_error; 303 } 304 305 if (kfd->dqm->ops.start(kfd->dqm) != 0) { 306 dev_err(kfd_device, 307 "Error starting queuen manager for device (%x:%x)\n", 308 kfd->pdev->vendor, kfd->pdev->device); 309 goto dqm_start_error; 310 } 311 312 kfd->dbgmgr = NULL; 313 314 kfd->init_complete = true; 315 dev_info(kfd_device, "added device (%x:%x)\n", kfd->pdev->vendor, 316 kfd->pdev->device); 317 318 pr_debug("kfd: Starting kfd with the following scheduling policy %d\n", 319 sched_policy); 320 321 goto out; 322 323 dqm_start_error: 324 device_queue_manager_uninit(kfd->dqm); 325 device_queue_manager_error: 326 amd_iommu_free_device(kfd->pdev); 327 device_iommu_pasid_error: 328 kfd_interrupt_exit(kfd); 329 kfd_interrupt_error: 330 kfd_topology_remove_device(kfd); 331 kfd_topology_add_device_error: 332 kfd_gtt_sa_fini(kfd); 333 kfd_gtt_sa_init_error: 334 kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem); 335 dev_err(kfd_device, 336 "device (%x:%x) NOT added due to errors\n", 337 kfd->pdev->vendor, kfd->pdev->device); 338 out: 339 return kfd->init_complete; 340 } 341 342 void kgd2kfd_device_exit(struct kfd_dev *kfd) 343 { 344 if (kfd->init_complete) { 345 device_queue_manager_uninit(kfd->dqm); 346 amd_iommu_free_device(kfd->pdev); 347 kfd_interrupt_exit(kfd); 348 kfd_topology_remove_device(kfd); 349 kfd_gtt_sa_fini(kfd); 350 kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem); 351 } 352 353 kfree(kfd); 354 } 355 356 void kgd2kfd_suspend(struct kfd_dev *kfd) 357 { 358 BUG_ON(kfd == NULL); 359 360 if (kfd->init_complete) { 361 kfd->dqm->ops.stop(kfd->dqm); 362 amd_iommu_set_invalidate_ctx_cb(kfd->pdev, NULL); 363 amd_iommu_set_invalid_ppr_cb(kfd->pdev, NULL); 364 amd_iommu_free_device(kfd->pdev); 365 } 366 } 367 368 int kgd2kfd_resume(struct kfd_dev *kfd) 369 { 370 unsigned int pasid_limit; 371 int err; 372 373 BUG_ON(kfd == NULL); 374 375 pasid_limit = kfd_get_pasid_limit(); 376 377 if (kfd->init_complete) { 378 err = amd_iommu_init_device(kfd->pdev, pasid_limit); 379 if (err < 0) 380 return -ENXIO; 381 amd_iommu_set_invalidate_ctx_cb(kfd->pdev, 382 iommu_pasid_shutdown_callback); 383 amd_iommu_set_invalid_ppr_cb(kfd->pdev, iommu_invalid_ppr_cb); 384 kfd->dqm->ops.start(kfd->dqm); 385 } 386 387 return 0; 388 } 389 390 /* This is called directly from KGD at ISR. */ 391 void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry) 392 { 393 if (!kfd->init_complete) 394 return; 395 396 spin_lock(&kfd->interrupt_lock); 397 398 if (kfd->interrupts_active 399 && interrupt_is_wanted(kfd, ih_ring_entry) 400 && enqueue_ih_ring_entry(kfd, ih_ring_entry)) 401 schedule_work(&kfd->interrupt_work); 402 403 spin_unlock(&kfd->interrupt_lock); 404 } 405 406 static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size, 407 unsigned int chunk_size) 408 { 409 unsigned int num_of_bits; 410 411 BUG_ON(!kfd); 412 BUG_ON(!kfd->gtt_mem); 413 BUG_ON(buf_size < chunk_size); 414 BUG_ON(buf_size == 0); 415 BUG_ON(chunk_size == 0); 416 417 kfd->gtt_sa_chunk_size = chunk_size; 418 kfd->gtt_sa_num_of_chunks = buf_size / chunk_size; 419 420 num_of_bits = kfd->gtt_sa_num_of_chunks / BITS_PER_BYTE; 421 BUG_ON(num_of_bits == 0); 422 423 kfd->gtt_sa_bitmap = kzalloc(num_of_bits, GFP_KERNEL); 424 425 if (!kfd->gtt_sa_bitmap) 426 return -ENOMEM; 427 428 pr_debug("kfd: gtt_sa_num_of_chunks = %d, gtt_sa_bitmap = %p\n", 429 kfd->gtt_sa_num_of_chunks, kfd->gtt_sa_bitmap); 430 431 mutex_init(&kfd->gtt_sa_lock); 432 433 return 0; 434 435 } 436 437 static void kfd_gtt_sa_fini(struct kfd_dev *kfd) 438 { 439 mutex_destroy(&kfd->gtt_sa_lock); 440 kfree(kfd->gtt_sa_bitmap); 441 } 442 443 static inline uint64_t kfd_gtt_sa_calc_gpu_addr(uint64_t start_addr, 444 unsigned int bit_num, 445 unsigned int chunk_size) 446 { 447 return start_addr + bit_num * chunk_size; 448 } 449 450 static inline uint32_t *kfd_gtt_sa_calc_cpu_addr(void *start_addr, 451 unsigned int bit_num, 452 unsigned int chunk_size) 453 { 454 return (uint32_t *) ((uint64_t) start_addr + bit_num * chunk_size); 455 } 456 457 int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size, 458 struct kfd_mem_obj **mem_obj) 459 { 460 unsigned int found, start_search, cur_size; 461 462 BUG_ON(!kfd); 463 464 if (size == 0) 465 return -EINVAL; 466 467 if (size > kfd->gtt_sa_num_of_chunks * kfd->gtt_sa_chunk_size) 468 return -ENOMEM; 469 470 *mem_obj = kmalloc(sizeof(struct kfd_mem_obj), GFP_KERNEL); 471 if ((*mem_obj) == NULL) 472 return -ENOMEM; 473 474 pr_debug("kfd: allocated mem_obj = %p for size = %d\n", *mem_obj, size); 475 476 start_search = 0; 477 478 mutex_lock(&kfd->gtt_sa_lock); 479 480 kfd_gtt_restart_search: 481 /* Find the first chunk that is free */ 482 found = find_next_zero_bit(kfd->gtt_sa_bitmap, 483 kfd->gtt_sa_num_of_chunks, 484 start_search); 485 486 pr_debug("kfd: found = %d\n", found); 487 488 /* If there wasn't any free chunk, bail out */ 489 if (found == kfd->gtt_sa_num_of_chunks) 490 goto kfd_gtt_no_free_chunk; 491 492 /* Update fields of mem_obj */ 493 (*mem_obj)->range_start = found; 494 (*mem_obj)->range_end = found; 495 (*mem_obj)->gpu_addr = kfd_gtt_sa_calc_gpu_addr( 496 kfd->gtt_start_gpu_addr, 497 found, 498 kfd->gtt_sa_chunk_size); 499 (*mem_obj)->cpu_ptr = kfd_gtt_sa_calc_cpu_addr( 500 kfd->gtt_start_cpu_ptr, 501 found, 502 kfd->gtt_sa_chunk_size); 503 504 pr_debug("kfd: gpu_addr = %p, cpu_addr = %p\n", 505 (uint64_t *) (*mem_obj)->gpu_addr, (*mem_obj)->cpu_ptr); 506 507 /* If we need only one chunk, mark it as allocated and get out */ 508 if (size <= kfd->gtt_sa_chunk_size) { 509 pr_debug("kfd: single bit\n"); 510 set_bit(found, kfd->gtt_sa_bitmap); 511 goto kfd_gtt_out; 512 } 513 514 /* Otherwise, try to see if we have enough contiguous chunks */ 515 cur_size = size - kfd->gtt_sa_chunk_size; 516 do { 517 (*mem_obj)->range_end = 518 find_next_zero_bit(kfd->gtt_sa_bitmap, 519 kfd->gtt_sa_num_of_chunks, ++found); 520 /* 521 * If next free chunk is not contiguous than we need to 522 * restart our search from the last free chunk we found (which 523 * wasn't contiguous to the previous ones 524 */ 525 if ((*mem_obj)->range_end != found) { 526 start_search = found; 527 goto kfd_gtt_restart_search; 528 } 529 530 /* 531 * If we reached end of buffer, bail out with error 532 */ 533 if (found == kfd->gtt_sa_num_of_chunks) 534 goto kfd_gtt_no_free_chunk; 535 536 /* Check if we don't need another chunk */ 537 if (cur_size <= kfd->gtt_sa_chunk_size) 538 cur_size = 0; 539 else 540 cur_size -= kfd->gtt_sa_chunk_size; 541 542 } while (cur_size > 0); 543 544 pr_debug("kfd: range_start = %d, range_end = %d\n", 545 (*mem_obj)->range_start, (*mem_obj)->range_end); 546 547 /* Mark the chunks as allocated */ 548 for (found = (*mem_obj)->range_start; 549 found <= (*mem_obj)->range_end; 550 found++) 551 set_bit(found, kfd->gtt_sa_bitmap); 552 553 kfd_gtt_out: 554 mutex_unlock(&kfd->gtt_sa_lock); 555 return 0; 556 557 kfd_gtt_no_free_chunk: 558 pr_debug("kfd: allocation failed with mem_obj = %p\n", mem_obj); 559 mutex_unlock(&kfd->gtt_sa_lock); 560 kfree(mem_obj); 561 return -ENOMEM; 562 } 563 564 int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj) 565 { 566 unsigned int bit; 567 568 BUG_ON(!kfd); 569 570 /* Act like kfree when trying to free a NULL object */ 571 if (!mem_obj) 572 return 0; 573 574 pr_debug("kfd: free mem_obj = %p, range_start = %d, range_end = %d\n", 575 mem_obj, mem_obj->range_start, mem_obj->range_end); 576 577 mutex_lock(&kfd->gtt_sa_lock); 578 579 /* Mark the chunks as free */ 580 for (bit = mem_obj->range_start; 581 bit <= mem_obj->range_end; 582 bit++) 583 clear_bit(bit, kfd->gtt_sa_bitmap); 584 585 mutex_unlock(&kfd->gtt_sa_lock); 586 587 kfree(mem_obj); 588 return 0; 589 } 590