1 /* 2 * Copyright 2015-2017 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 #include <linux/pci.h> 24 #include <linux/acpi.h> 25 #include "kfd_crat.h" 26 #include "kfd_priv.h" 27 #include "kfd_topology.h" 28 #include "kfd_iommu.h" 29 30 /* GPU Processor ID base for dGPUs for which VCRAT needs to be created. 31 * GPU processor ID are expressed with Bit[31]=1. 32 * The base is set to 0x8000_0000 + 0x1000 to avoid collision with GPU IDs 33 * used in the CRAT. 34 */ 35 static uint32_t gpu_processor_id_low = 0x80001000; 36 37 /* Return the next available gpu_processor_id and increment it for next GPU 38 * @total_cu_count - Total CUs present in the GPU including ones 39 * masked off 40 */ 41 static inline unsigned int get_and_inc_gpu_processor_id( 42 unsigned int total_cu_count) 43 { 44 int current_id = gpu_processor_id_low; 45 46 gpu_processor_id_low += total_cu_count; 47 return current_id; 48 } 49 50 /* Static table to describe GPU Cache information */ 51 struct kfd_gpu_cache_info { 52 uint32_t cache_size; 53 uint32_t cache_level; 54 uint32_t flags; 55 /* Indicates how many Compute Units share this cache 56 * Value = 1 indicates the cache is not shared 57 */ 58 uint32_t num_cu_shared; 59 }; 60 61 static struct kfd_gpu_cache_info kaveri_cache_info[] = { 62 { 63 /* TCP L1 Cache per CU */ 64 .cache_size = 16, 65 .cache_level = 1, 66 .flags = (CRAT_CACHE_FLAGS_ENABLED | 67 CRAT_CACHE_FLAGS_DATA_CACHE | 68 CRAT_CACHE_FLAGS_SIMD_CACHE), 69 .num_cu_shared = 1, 70 71 }, 72 { 73 /* Scalar L1 Instruction Cache (in SQC module) per bank */ 74 .cache_size = 16, 75 .cache_level = 1, 76 .flags = (CRAT_CACHE_FLAGS_ENABLED | 77 CRAT_CACHE_FLAGS_INST_CACHE | 78 CRAT_CACHE_FLAGS_SIMD_CACHE), 79 .num_cu_shared = 2, 80 }, 81 { 82 /* Scalar L1 Data Cache (in SQC module) per bank */ 83 .cache_size = 8, 84 .cache_level = 1, 85 .flags = (CRAT_CACHE_FLAGS_ENABLED | 86 CRAT_CACHE_FLAGS_DATA_CACHE | 87 CRAT_CACHE_FLAGS_SIMD_CACHE), 88 .num_cu_shared = 2, 89 }, 90 91 /* TODO: Add L2 Cache information */ 92 }; 93 94 95 static struct kfd_gpu_cache_info carrizo_cache_info[] = { 96 { 97 /* TCP L1 Cache per CU */ 98 .cache_size = 16, 99 .cache_level = 1, 100 .flags = (CRAT_CACHE_FLAGS_ENABLED | 101 CRAT_CACHE_FLAGS_DATA_CACHE | 102 CRAT_CACHE_FLAGS_SIMD_CACHE), 103 .num_cu_shared = 1, 104 }, 105 { 106 /* Scalar L1 Instruction Cache (in SQC module) per bank */ 107 .cache_size = 8, 108 .cache_level = 1, 109 .flags = (CRAT_CACHE_FLAGS_ENABLED | 110 CRAT_CACHE_FLAGS_INST_CACHE | 111 CRAT_CACHE_FLAGS_SIMD_CACHE), 112 .num_cu_shared = 4, 113 }, 114 { 115 /* Scalar L1 Data Cache (in SQC module) per bank. */ 116 .cache_size = 4, 117 .cache_level = 1, 118 .flags = (CRAT_CACHE_FLAGS_ENABLED | 119 CRAT_CACHE_FLAGS_DATA_CACHE | 120 CRAT_CACHE_FLAGS_SIMD_CACHE), 121 .num_cu_shared = 4, 122 }, 123 124 /* TODO: Add L2 Cache information */ 125 }; 126 127 /* NOTE: In future if more information is added to struct kfd_gpu_cache_info 128 * the following ASICs may need a separate table. 129 */ 130 #define hawaii_cache_info kaveri_cache_info 131 #define tonga_cache_info carrizo_cache_info 132 #define fiji_cache_info carrizo_cache_info 133 #define polaris10_cache_info carrizo_cache_info 134 #define polaris11_cache_info carrizo_cache_info 135 /* TODO - check & update Vega10 cache details */ 136 #define vega10_cache_info carrizo_cache_info 137 #define raven_cache_info carrizo_cache_info 138 139 static void kfd_populated_cu_info_cpu(struct kfd_topology_device *dev, 140 struct crat_subtype_computeunit *cu) 141 { 142 dev->node_props.cpu_cores_count = cu->num_cpu_cores; 143 dev->node_props.cpu_core_id_base = cu->processor_id_low; 144 if (cu->hsa_capability & CRAT_CU_FLAGS_IOMMU_PRESENT) 145 dev->node_props.capability |= HSA_CAP_ATS_PRESENT; 146 147 pr_debug("CU CPU: cores=%d id_base=%d\n", cu->num_cpu_cores, 148 cu->processor_id_low); 149 } 150 151 static void kfd_populated_cu_info_gpu(struct kfd_topology_device *dev, 152 struct crat_subtype_computeunit *cu) 153 { 154 dev->node_props.simd_id_base = cu->processor_id_low; 155 dev->node_props.simd_count = cu->num_simd_cores; 156 dev->node_props.lds_size_in_kb = cu->lds_size_in_kb; 157 dev->node_props.max_waves_per_simd = cu->max_waves_simd; 158 dev->node_props.wave_front_size = cu->wave_front_size; 159 dev->node_props.array_count = cu->array_count; 160 dev->node_props.cu_per_simd_array = cu->num_cu_per_array; 161 dev->node_props.simd_per_cu = cu->num_simd_per_cu; 162 dev->node_props.max_slots_scratch_cu = cu->max_slots_scatch_cu; 163 if (cu->hsa_capability & CRAT_CU_FLAGS_HOT_PLUGGABLE) 164 dev->node_props.capability |= HSA_CAP_HOT_PLUGGABLE; 165 pr_debug("CU GPU: id_base=%d\n", cu->processor_id_low); 166 } 167 168 /* kfd_parse_subtype_cu - parse compute unit subtypes and attach it to correct 169 * topology device present in the device_list 170 */ 171 static int kfd_parse_subtype_cu(struct crat_subtype_computeunit *cu, 172 struct list_head *device_list) 173 { 174 struct kfd_topology_device *dev; 175 176 pr_debug("Found CU entry in CRAT table with proximity_domain=%d caps=%x\n", 177 cu->proximity_domain, cu->hsa_capability); 178 list_for_each_entry(dev, device_list, list) { 179 if (cu->proximity_domain == dev->proximity_domain) { 180 if (cu->flags & CRAT_CU_FLAGS_CPU_PRESENT) 181 kfd_populated_cu_info_cpu(dev, cu); 182 183 if (cu->flags & CRAT_CU_FLAGS_GPU_PRESENT) 184 kfd_populated_cu_info_gpu(dev, cu); 185 break; 186 } 187 } 188 189 return 0; 190 } 191 192 static struct kfd_mem_properties * 193 find_subtype_mem(uint32_t heap_type, uint32_t flags, uint32_t width, 194 struct kfd_topology_device *dev) 195 { 196 struct kfd_mem_properties *props; 197 198 list_for_each_entry(props, &dev->mem_props, list) { 199 if (props->heap_type == heap_type 200 && props->flags == flags 201 && props->width == width) 202 return props; 203 } 204 205 return NULL; 206 } 207 /* kfd_parse_subtype_mem - parse memory subtypes and attach it to correct 208 * topology device present in the device_list 209 */ 210 static int kfd_parse_subtype_mem(struct crat_subtype_memory *mem, 211 struct list_head *device_list) 212 { 213 struct kfd_mem_properties *props; 214 struct kfd_topology_device *dev; 215 uint32_t heap_type; 216 uint64_t size_in_bytes; 217 uint32_t flags = 0; 218 uint32_t width; 219 220 pr_debug("Found memory entry in CRAT table with proximity_domain=%d\n", 221 mem->proximity_domain); 222 list_for_each_entry(dev, device_list, list) { 223 if (mem->proximity_domain == dev->proximity_domain) { 224 /* We're on GPU node */ 225 if (dev->node_props.cpu_cores_count == 0) { 226 /* APU */ 227 if (mem->visibility_type == 0) 228 heap_type = 229 HSA_MEM_HEAP_TYPE_FB_PRIVATE; 230 /* dGPU */ 231 else 232 heap_type = mem->visibility_type; 233 } else 234 heap_type = HSA_MEM_HEAP_TYPE_SYSTEM; 235 236 if (mem->flags & CRAT_MEM_FLAGS_HOT_PLUGGABLE) 237 flags |= HSA_MEM_FLAGS_HOT_PLUGGABLE; 238 if (mem->flags & CRAT_MEM_FLAGS_NON_VOLATILE) 239 flags |= HSA_MEM_FLAGS_NON_VOLATILE; 240 241 size_in_bytes = 242 ((uint64_t)mem->length_high << 32) + 243 mem->length_low; 244 width = mem->width; 245 246 /* Multiple banks of the same type are aggregated into 247 * one. User mode doesn't care about multiple physical 248 * memory segments. It's managed as a single virtual 249 * heap for user mode. 250 */ 251 props = find_subtype_mem(heap_type, flags, width, dev); 252 if (props) { 253 props->size_in_bytes += size_in_bytes; 254 break; 255 } 256 257 props = kfd_alloc_struct(props); 258 if (!props) 259 return -ENOMEM; 260 261 props->heap_type = heap_type; 262 props->flags = flags; 263 props->size_in_bytes = size_in_bytes; 264 props->width = width; 265 266 dev->node_props.mem_banks_count++; 267 list_add_tail(&props->list, &dev->mem_props); 268 269 break; 270 } 271 } 272 273 return 0; 274 } 275 276 /* kfd_parse_subtype_cache - parse cache subtypes and attach it to correct 277 * topology device present in the device_list 278 */ 279 static int kfd_parse_subtype_cache(struct crat_subtype_cache *cache, 280 struct list_head *device_list) 281 { 282 struct kfd_cache_properties *props; 283 struct kfd_topology_device *dev; 284 uint32_t id; 285 uint32_t total_num_of_cu; 286 287 id = cache->processor_id_low; 288 289 pr_debug("Found cache entry in CRAT table with processor_id=%d\n", id); 290 list_for_each_entry(dev, device_list, list) { 291 total_num_of_cu = (dev->node_props.array_count * 292 dev->node_props.cu_per_simd_array); 293 294 /* Cache infomration in CRAT doesn't have proximity_domain 295 * information as it is associated with a CPU core or GPU 296 * Compute Unit. So map the cache using CPU core Id or SIMD 297 * (GPU) ID. 298 * TODO: This works because currently we can safely assume that 299 * Compute Units are parsed before caches are parsed. In 300 * future, remove this dependency 301 */ 302 if ((id >= dev->node_props.cpu_core_id_base && 303 id <= dev->node_props.cpu_core_id_base + 304 dev->node_props.cpu_cores_count) || 305 (id >= dev->node_props.simd_id_base && 306 id < dev->node_props.simd_id_base + 307 total_num_of_cu)) { 308 props = kfd_alloc_struct(props); 309 if (!props) 310 return -ENOMEM; 311 312 props->processor_id_low = id; 313 props->cache_level = cache->cache_level; 314 props->cache_size = cache->cache_size; 315 props->cacheline_size = cache->cache_line_size; 316 props->cachelines_per_tag = cache->lines_per_tag; 317 props->cache_assoc = cache->associativity; 318 props->cache_latency = cache->cache_latency; 319 memcpy(props->sibling_map, cache->sibling_map, 320 sizeof(props->sibling_map)); 321 322 if (cache->flags & CRAT_CACHE_FLAGS_DATA_CACHE) 323 props->cache_type |= HSA_CACHE_TYPE_DATA; 324 if (cache->flags & CRAT_CACHE_FLAGS_INST_CACHE) 325 props->cache_type |= HSA_CACHE_TYPE_INSTRUCTION; 326 if (cache->flags & CRAT_CACHE_FLAGS_CPU_CACHE) 327 props->cache_type |= HSA_CACHE_TYPE_CPU; 328 if (cache->flags & CRAT_CACHE_FLAGS_SIMD_CACHE) 329 props->cache_type |= HSA_CACHE_TYPE_HSACU; 330 331 dev->cache_count++; 332 dev->node_props.caches_count++; 333 list_add_tail(&props->list, &dev->cache_props); 334 335 break; 336 } 337 } 338 339 return 0; 340 } 341 342 /* kfd_parse_subtype_iolink - parse iolink subtypes and attach it to correct 343 * topology device present in the device_list 344 */ 345 static int kfd_parse_subtype_iolink(struct crat_subtype_iolink *iolink, 346 struct list_head *device_list) 347 { 348 struct kfd_iolink_properties *props = NULL, *props2; 349 struct kfd_topology_device *dev, *to_dev; 350 uint32_t id_from; 351 uint32_t id_to; 352 353 id_from = iolink->proximity_domain_from; 354 id_to = iolink->proximity_domain_to; 355 356 pr_debug("Found IO link entry in CRAT table with id_from=%d, id_to %d\n", 357 id_from, id_to); 358 list_for_each_entry(dev, device_list, list) { 359 if (id_from == dev->proximity_domain) { 360 props = kfd_alloc_struct(props); 361 if (!props) 362 return -ENOMEM; 363 364 props->node_from = id_from; 365 props->node_to = id_to; 366 props->ver_maj = iolink->version_major; 367 props->ver_min = iolink->version_minor; 368 props->iolink_type = iolink->io_interface_type; 369 370 if (props->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS) 371 props->weight = 20; 372 else if (props->iolink_type == CRAT_IOLINK_TYPE_XGMI) 373 props->weight = 15; 374 else 375 props->weight = node_distance(id_from, id_to); 376 377 props->min_latency = iolink->minimum_latency; 378 props->max_latency = iolink->maximum_latency; 379 props->min_bandwidth = iolink->minimum_bandwidth_mbs; 380 props->max_bandwidth = iolink->maximum_bandwidth_mbs; 381 props->rec_transfer_size = 382 iolink->recommended_transfer_size; 383 384 dev->io_link_count++; 385 dev->node_props.io_links_count++; 386 list_add_tail(&props->list, &dev->io_link_props); 387 break; 388 } 389 } 390 391 /* CPU topology is created before GPUs are detected, so CPU->GPU 392 * links are not built at that time. If a PCIe type is discovered, it 393 * means a GPU is detected and we are adding GPU->CPU to the topology. 394 * At this time, also add the corresponded CPU->GPU link if GPU 395 * is large bar. 396 * For xGMI, we only added the link with one direction in the crat 397 * table, add corresponded reversed direction link now. 398 */ 399 if (props && (iolink->flags & CRAT_IOLINK_FLAGS_BI_DIRECTIONAL)) { 400 to_dev = kfd_topology_device_by_proximity_domain(id_to); 401 if (!to_dev) 402 return -ENODEV; 403 /* same everything but the other direction */ 404 props2 = kmemdup(props, sizeof(*props2), GFP_KERNEL); 405 props2->node_from = id_to; 406 props2->node_to = id_from; 407 props2->kobj = NULL; 408 to_dev->io_link_count++; 409 to_dev->node_props.io_links_count++; 410 list_add_tail(&props2->list, &to_dev->io_link_props); 411 } 412 413 return 0; 414 } 415 416 /* kfd_parse_subtype - parse subtypes and attach it to correct topology device 417 * present in the device_list 418 * @sub_type_hdr - subtype section of crat_image 419 * @device_list - list of topology devices present in this crat_image 420 */ 421 static int kfd_parse_subtype(struct crat_subtype_generic *sub_type_hdr, 422 struct list_head *device_list) 423 { 424 struct crat_subtype_computeunit *cu; 425 struct crat_subtype_memory *mem; 426 struct crat_subtype_cache *cache; 427 struct crat_subtype_iolink *iolink; 428 int ret = 0; 429 430 switch (sub_type_hdr->type) { 431 case CRAT_SUBTYPE_COMPUTEUNIT_AFFINITY: 432 cu = (struct crat_subtype_computeunit *)sub_type_hdr; 433 ret = kfd_parse_subtype_cu(cu, device_list); 434 break; 435 case CRAT_SUBTYPE_MEMORY_AFFINITY: 436 mem = (struct crat_subtype_memory *)sub_type_hdr; 437 ret = kfd_parse_subtype_mem(mem, device_list); 438 break; 439 case CRAT_SUBTYPE_CACHE_AFFINITY: 440 cache = (struct crat_subtype_cache *)sub_type_hdr; 441 ret = kfd_parse_subtype_cache(cache, device_list); 442 break; 443 case CRAT_SUBTYPE_TLB_AFFINITY: 444 /* 445 * For now, nothing to do here 446 */ 447 pr_debug("Found TLB entry in CRAT table (not processing)\n"); 448 break; 449 case CRAT_SUBTYPE_CCOMPUTE_AFFINITY: 450 /* 451 * For now, nothing to do here 452 */ 453 pr_debug("Found CCOMPUTE entry in CRAT table (not processing)\n"); 454 break; 455 case CRAT_SUBTYPE_IOLINK_AFFINITY: 456 iolink = (struct crat_subtype_iolink *)sub_type_hdr; 457 ret = kfd_parse_subtype_iolink(iolink, device_list); 458 break; 459 default: 460 pr_warn("Unknown subtype %d in CRAT\n", 461 sub_type_hdr->type); 462 } 463 464 return ret; 465 } 466 467 /* kfd_parse_crat_table - parse CRAT table. For each node present in CRAT 468 * create a kfd_topology_device and add in to device_list. Also parse 469 * CRAT subtypes and attach it to appropriate kfd_topology_device 470 * @crat_image - input image containing CRAT 471 * @device_list - [OUT] list of kfd_topology_device generated after 472 * parsing crat_image 473 * @proximity_domain - Proximity domain of the first device in the table 474 * 475 * Return - 0 if successful else -ve value 476 */ 477 int kfd_parse_crat_table(void *crat_image, struct list_head *device_list, 478 uint32_t proximity_domain) 479 { 480 struct kfd_topology_device *top_dev = NULL; 481 struct crat_subtype_generic *sub_type_hdr; 482 uint16_t node_id; 483 int ret = 0; 484 struct crat_header *crat_table = (struct crat_header *)crat_image; 485 uint16_t num_nodes; 486 uint32_t image_len; 487 488 if (!crat_image) 489 return -EINVAL; 490 491 if (!list_empty(device_list)) { 492 pr_warn("Error device list should be empty\n"); 493 return -EINVAL; 494 } 495 496 num_nodes = crat_table->num_domains; 497 image_len = crat_table->length; 498 499 pr_info("Parsing CRAT table with %d nodes\n", num_nodes); 500 501 for (node_id = 0; node_id < num_nodes; node_id++) { 502 top_dev = kfd_create_topology_device(device_list); 503 if (!top_dev) 504 break; 505 top_dev->proximity_domain = proximity_domain++; 506 } 507 508 if (!top_dev) { 509 ret = -ENOMEM; 510 goto err; 511 } 512 513 memcpy(top_dev->oem_id, crat_table->oem_id, CRAT_OEMID_LENGTH); 514 memcpy(top_dev->oem_table_id, crat_table->oem_table_id, 515 CRAT_OEMTABLEID_LENGTH); 516 top_dev->oem_revision = crat_table->oem_revision; 517 518 sub_type_hdr = (struct crat_subtype_generic *)(crat_table+1); 519 while ((char *)sub_type_hdr + sizeof(struct crat_subtype_generic) < 520 ((char *)crat_image) + image_len) { 521 if (sub_type_hdr->flags & CRAT_SUBTYPE_FLAGS_ENABLED) { 522 ret = kfd_parse_subtype(sub_type_hdr, device_list); 523 if (ret) 524 break; 525 } 526 527 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr + 528 sub_type_hdr->length); 529 } 530 531 err: 532 if (ret) 533 kfd_release_topology_device_list(device_list); 534 535 return ret; 536 } 537 538 /* Helper function. See kfd_fill_gpu_cache_info for parameter description */ 539 static int fill_in_pcache(struct crat_subtype_cache *pcache, 540 struct kfd_gpu_cache_info *pcache_info, 541 struct kfd_cu_info *cu_info, 542 int mem_available, 543 int cu_bitmask, 544 int cache_type, unsigned int cu_processor_id, 545 int cu_block) 546 { 547 unsigned int cu_sibling_map_mask; 548 int first_active_cu; 549 550 /* First check if enough memory is available */ 551 if (sizeof(struct crat_subtype_cache) > mem_available) 552 return -ENOMEM; 553 554 cu_sibling_map_mask = cu_bitmask; 555 cu_sibling_map_mask >>= cu_block; 556 cu_sibling_map_mask &= 557 ((1 << pcache_info[cache_type].num_cu_shared) - 1); 558 first_active_cu = ffs(cu_sibling_map_mask); 559 560 /* CU could be inactive. In case of shared cache find the first active 561 * CU. and incase of non-shared cache check if the CU is inactive. If 562 * inactive active skip it 563 */ 564 if (first_active_cu) { 565 memset(pcache, 0, sizeof(struct crat_subtype_cache)); 566 pcache->type = CRAT_SUBTYPE_CACHE_AFFINITY; 567 pcache->length = sizeof(struct crat_subtype_cache); 568 pcache->flags = pcache_info[cache_type].flags; 569 pcache->processor_id_low = cu_processor_id 570 + (first_active_cu - 1); 571 pcache->cache_level = pcache_info[cache_type].cache_level; 572 pcache->cache_size = pcache_info[cache_type].cache_size; 573 574 /* Sibling map is w.r.t processor_id_low, so shift out 575 * inactive CU 576 */ 577 cu_sibling_map_mask = 578 cu_sibling_map_mask >> (first_active_cu - 1); 579 580 pcache->sibling_map[0] = (uint8_t)(cu_sibling_map_mask & 0xFF); 581 pcache->sibling_map[1] = 582 (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF); 583 pcache->sibling_map[2] = 584 (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF); 585 pcache->sibling_map[3] = 586 (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF); 587 return 0; 588 } 589 return 1; 590 } 591 592 /* kfd_fill_gpu_cache_info - Fill GPU cache info using kfd_gpu_cache_info 593 * tables 594 * 595 * @kdev - [IN] GPU device 596 * @gpu_processor_id - [IN] GPU processor ID to which these caches 597 * associate 598 * @available_size - [IN] Amount of memory available in pcache 599 * @cu_info - [IN] Compute Unit info obtained from KGD 600 * @pcache - [OUT] memory into which cache data is to be filled in. 601 * @size_filled - [OUT] amount of data used up in pcache. 602 * @num_of_entries - [OUT] number of caches added 603 */ 604 static int kfd_fill_gpu_cache_info(struct kfd_dev *kdev, 605 int gpu_processor_id, 606 int available_size, 607 struct kfd_cu_info *cu_info, 608 struct crat_subtype_cache *pcache, 609 int *size_filled, 610 int *num_of_entries) 611 { 612 struct kfd_gpu_cache_info *pcache_info; 613 int num_of_cache_types = 0; 614 int i, j, k; 615 int ct = 0; 616 int mem_available = available_size; 617 unsigned int cu_processor_id; 618 int ret; 619 620 switch (kdev->device_info->asic_family) { 621 case CHIP_KAVERI: 622 pcache_info = kaveri_cache_info; 623 num_of_cache_types = ARRAY_SIZE(kaveri_cache_info); 624 break; 625 case CHIP_HAWAII: 626 pcache_info = hawaii_cache_info; 627 num_of_cache_types = ARRAY_SIZE(hawaii_cache_info); 628 break; 629 case CHIP_CARRIZO: 630 pcache_info = carrizo_cache_info; 631 num_of_cache_types = ARRAY_SIZE(carrizo_cache_info); 632 break; 633 case CHIP_TONGA: 634 pcache_info = tonga_cache_info; 635 num_of_cache_types = ARRAY_SIZE(tonga_cache_info); 636 break; 637 case CHIP_FIJI: 638 pcache_info = fiji_cache_info; 639 num_of_cache_types = ARRAY_SIZE(fiji_cache_info); 640 break; 641 case CHIP_POLARIS10: 642 pcache_info = polaris10_cache_info; 643 num_of_cache_types = ARRAY_SIZE(polaris10_cache_info); 644 break; 645 case CHIP_POLARIS11: 646 pcache_info = polaris11_cache_info; 647 num_of_cache_types = ARRAY_SIZE(polaris11_cache_info); 648 break; 649 case CHIP_VEGA10: 650 pcache_info = vega10_cache_info; 651 num_of_cache_types = ARRAY_SIZE(vega10_cache_info); 652 break; 653 case CHIP_RAVEN: 654 pcache_info = raven_cache_info; 655 num_of_cache_types = ARRAY_SIZE(raven_cache_info); 656 break; 657 default: 658 return -EINVAL; 659 } 660 661 *size_filled = 0; 662 *num_of_entries = 0; 663 664 /* For each type of cache listed in the kfd_gpu_cache_info table, 665 * go through all available Compute Units. 666 * The [i,j,k] loop will 667 * if kfd_gpu_cache_info.num_cu_shared = 1 668 * will parse through all available CU 669 * If (kfd_gpu_cache_info.num_cu_shared != 1) 670 * then it will consider only one CU from 671 * the shared unit 672 */ 673 674 for (ct = 0; ct < num_of_cache_types; ct++) { 675 cu_processor_id = gpu_processor_id; 676 for (i = 0; i < cu_info->num_shader_engines; i++) { 677 for (j = 0; j < cu_info->num_shader_arrays_per_engine; 678 j++) { 679 for (k = 0; k < cu_info->num_cu_per_sh; 680 k += pcache_info[ct].num_cu_shared) { 681 682 ret = fill_in_pcache(pcache, 683 pcache_info, 684 cu_info, 685 mem_available, 686 cu_info->cu_bitmap[i][j], 687 ct, 688 cu_processor_id, 689 k); 690 691 if (ret < 0) 692 break; 693 694 if (!ret) { 695 pcache++; 696 (*num_of_entries)++; 697 mem_available -= 698 sizeof(*pcache); 699 (*size_filled) += 700 sizeof(*pcache); 701 } 702 703 /* Move to next CU block */ 704 cu_processor_id += 705 pcache_info[ct].num_cu_shared; 706 } 707 } 708 } 709 } 710 711 pr_debug("Added [%d] GPU cache entries\n", *num_of_entries); 712 713 return 0; 714 } 715 716 /* 717 * kfd_create_crat_image_acpi - Allocates memory for CRAT image and 718 * copies CRAT from ACPI (if available). 719 * NOTE: Call kfd_destroy_crat_image to free CRAT image memory 720 * 721 * @crat_image: CRAT read from ACPI. If no CRAT in ACPI then 722 * crat_image will be NULL 723 * @size: [OUT] size of crat_image 724 * 725 * Return 0 if successful else return error code 726 */ 727 int kfd_create_crat_image_acpi(void **crat_image, size_t *size) 728 { 729 struct acpi_table_header *crat_table; 730 acpi_status status; 731 void *pcrat_image; 732 733 if (!crat_image) 734 return -EINVAL; 735 736 *crat_image = NULL; 737 738 /* Fetch the CRAT table from ACPI */ 739 status = acpi_get_table(CRAT_SIGNATURE, 0, &crat_table); 740 if (status == AE_NOT_FOUND) { 741 pr_warn("CRAT table not found\n"); 742 return -ENODATA; 743 } else if (ACPI_FAILURE(status)) { 744 const char *err = acpi_format_exception(status); 745 746 pr_err("CRAT table error: %s\n", err); 747 return -EINVAL; 748 } 749 750 if (ignore_crat) { 751 pr_info("CRAT table disabled by module option\n"); 752 return -ENODATA; 753 } 754 755 pcrat_image = kmalloc(crat_table->length, GFP_KERNEL); 756 if (!pcrat_image) 757 return -ENOMEM; 758 759 memcpy(pcrat_image, crat_table, crat_table->length); 760 761 *crat_image = pcrat_image; 762 *size = crat_table->length; 763 764 return 0; 765 } 766 767 /* Memory required to create Virtual CRAT. 768 * Since there is no easy way to predict the amount of memory required, the 769 * following amount are allocated for CPU and GPU Virtual CRAT. This is 770 * expected to cover all known conditions. But to be safe additional check 771 * is put in the code to ensure we don't overwrite. 772 */ 773 #define VCRAT_SIZE_FOR_CPU (2 * PAGE_SIZE) 774 #define VCRAT_SIZE_FOR_GPU (3 * PAGE_SIZE) 775 776 /* kfd_fill_cu_for_cpu - Fill in Compute info for the given CPU NUMA node 777 * 778 * @numa_node_id: CPU NUMA node id 779 * @avail_size: Available size in the memory 780 * @sub_type_hdr: Memory into which compute info will be filled in 781 * 782 * Return 0 if successful else return -ve value 783 */ 784 static int kfd_fill_cu_for_cpu(int numa_node_id, int *avail_size, 785 int proximity_domain, 786 struct crat_subtype_computeunit *sub_type_hdr) 787 { 788 const struct cpumask *cpumask; 789 790 *avail_size -= sizeof(struct crat_subtype_computeunit); 791 if (*avail_size < 0) 792 return -ENOMEM; 793 794 memset(sub_type_hdr, 0, sizeof(struct crat_subtype_computeunit)); 795 796 /* Fill in subtype header data */ 797 sub_type_hdr->type = CRAT_SUBTYPE_COMPUTEUNIT_AFFINITY; 798 sub_type_hdr->length = sizeof(struct crat_subtype_computeunit); 799 sub_type_hdr->flags = CRAT_SUBTYPE_FLAGS_ENABLED; 800 801 cpumask = cpumask_of_node(numa_node_id); 802 803 /* Fill in CU data */ 804 sub_type_hdr->flags |= CRAT_CU_FLAGS_CPU_PRESENT; 805 sub_type_hdr->proximity_domain = proximity_domain; 806 sub_type_hdr->processor_id_low = kfd_numa_node_to_apic_id(numa_node_id); 807 if (sub_type_hdr->processor_id_low == -1) 808 return -EINVAL; 809 810 sub_type_hdr->num_cpu_cores = cpumask_weight(cpumask); 811 812 return 0; 813 } 814 815 /* kfd_fill_mem_info_for_cpu - Fill in Memory info for the given CPU NUMA node 816 * 817 * @numa_node_id: CPU NUMA node id 818 * @avail_size: Available size in the memory 819 * @sub_type_hdr: Memory into which compute info will be filled in 820 * 821 * Return 0 if successful else return -ve value 822 */ 823 static int kfd_fill_mem_info_for_cpu(int numa_node_id, int *avail_size, 824 int proximity_domain, 825 struct crat_subtype_memory *sub_type_hdr) 826 { 827 uint64_t mem_in_bytes = 0; 828 pg_data_t *pgdat; 829 int zone_type; 830 831 *avail_size -= sizeof(struct crat_subtype_memory); 832 if (*avail_size < 0) 833 return -ENOMEM; 834 835 memset(sub_type_hdr, 0, sizeof(struct crat_subtype_memory)); 836 837 /* Fill in subtype header data */ 838 sub_type_hdr->type = CRAT_SUBTYPE_MEMORY_AFFINITY; 839 sub_type_hdr->length = sizeof(struct crat_subtype_memory); 840 sub_type_hdr->flags = CRAT_SUBTYPE_FLAGS_ENABLED; 841 842 /* Fill in Memory Subunit data */ 843 844 /* Unlike si_meminfo, si_meminfo_node is not exported. So 845 * the following lines are duplicated from si_meminfo_node 846 * function 847 */ 848 pgdat = NODE_DATA(numa_node_id); 849 for (zone_type = 0; zone_type < MAX_NR_ZONES; zone_type++) 850 mem_in_bytes += pgdat->node_zones[zone_type].managed_pages; 851 mem_in_bytes <<= PAGE_SHIFT; 852 853 sub_type_hdr->length_low = lower_32_bits(mem_in_bytes); 854 sub_type_hdr->length_high = upper_32_bits(mem_in_bytes); 855 sub_type_hdr->proximity_domain = proximity_domain; 856 857 return 0; 858 } 859 860 static int kfd_fill_iolink_info_for_cpu(int numa_node_id, int *avail_size, 861 uint32_t *num_entries, 862 struct crat_subtype_iolink *sub_type_hdr) 863 { 864 int nid; 865 struct cpuinfo_x86 *c = &cpu_data(0); 866 uint8_t link_type; 867 868 if (c->x86_vendor == X86_VENDOR_AMD) 869 link_type = CRAT_IOLINK_TYPE_HYPERTRANSPORT; 870 else 871 link_type = CRAT_IOLINK_TYPE_QPI_1_1; 872 873 *num_entries = 0; 874 875 /* Create IO links from this node to other CPU nodes */ 876 for_each_online_node(nid) { 877 if (nid == numa_node_id) /* node itself */ 878 continue; 879 880 *avail_size -= sizeof(struct crat_subtype_iolink); 881 if (*avail_size < 0) 882 return -ENOMEM; 883 884 memset(sub_type_hdr, 0, sizeof(struct crat_subtype_iolink)); 885 886 /* Fill in subtype header data */ 887 sub_type_hdr->type = CRAT_SUBTYPE_IOLINK_AFFINITY; 888 sub_type_hdr->length = sizeof(struct crat_subtype_iolink); 889 sub_type_hdr->flags = CRAT_SUBTYPE_FLAGS_ENABLED; 890 891 /* Fill in IO link data */ 892 sub_type_hdr->proximity_domain_from = numa_node_id; 893 sub_type_hdr->proximity_domain_to = nid; 894 sub_type_hdr->io_interface_type = link_type; 895 896 (*num_entries)++; 897 sub_type_hdr++; 898 } 899 900 return 0; 901 } 902 903 /* kfd_create_vcrat_image_cpu - Create Virtual CRAT for CPU 904 * 905 * @pcrat_image: Fill in VCRAT for CPU 906 * @size: [IN] allocated size of crat_image. 907 * [OUT] actual size of data filled in crat_image 908 */ 909 static int kfd_create_vcrat_image_cpu(void *pcrat_image, size_t *size) 910 { 911 struct crat_header *crat_table = (struct crat_header *)pcrat_image; 912 struct acpi_table_header *acpi_table; 913 acpi_status status; 914 struct crat_subtype_generic *sub_type_hdr; 915 int avail_size = *size; 916 int numa_node_id; 917 uint32_t entries = 0; 918 int ret = 0; 919 920 if (!pcrat_image || avail_size < VCRAT_SIZE_FOR_CPU) 921 return -EINVAL; 922 923 /* Fill in CRAT Header. 924 * Modify length and total_entries as subunits are added. 925 */ 926 avail_size -= sizeof(struct crat_header); 927 if (avail_size < 0) 928 return -ENOMEM; 929 930 memset(crat_table, 0, sizeof(struct crat_header)); 931 memcpy(&crat_table->signature, CRAT_SIGNATURE, 932 sizeof(crat_table->signature)); 933 crat_table->length = sizeof(struct crat_header); 934 935 status = acpi_get_table("DSDT", 0, &acpi_table); 936 if (status != AE_OK) 937 pr_warn("DSDT table not found for OEM information\n"); 938 else { 939 crat_table->oem_revision = acpi_table->revision; 940 memcpy(crat_table->oem_id, acpi_table->oem_id, 941 CRAT_OEMID_LENGTH); 942 memcpy(crat_table->oem_table_id, acpi_table->oem_table_id, 943 CRAT_OEMTABLEID_LENGTH); 944 } 945 crat_table->total_entries = 0; 946 crat_table->num_domains = 0; 947 948 sub_type_hdr = (struct crat_subtype_generic *)(crat_table+1); 949 950 for_each_online_node(numa_node_id) { 951 if (kfd_numa_node_to_apic_id(numa_node_id) == -1) 952 continue; 953 954 /* Fill in Subtype: Compute Unit */ 955 ret = kfd_fill_cu_for_cpu(numa_node_id, &avail_size, 956 crat_table->num_domains, 957 (struct crat_subtype_computeunit *)sub_type_hdr); 958 if (ret < 0) 959 return ret; 960 crat_table->length += sub_type_hdr->length; 961 crat_table->total_entries++; 962 963 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr + 964 sub_type_hdr->length); 965 966 /* Fill in Subtype: Memory */ 967 ret = kfd_fill_mem_info_for_cpu(numa_node_id, &avail_size, 968 crat_table->num_domains, 969 (struct crat_subtype_memory *)sub_type_hdr); 970 if (ret < 0) 971 return ret; 972 crat_table->length += sub_type_hdr->length; 973 crat_table->total_entries++; 974 975 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr + 976 sub_type_hdr->length); 977 978 /* Fill in Subtype: IO Link */ 979 ret = kfd_fill_iolink_info_for_cpu(numa_node_id, &avail_size, 980 &entries, 981 (struct crat_subtype_iolink *)sub_type_hdr); 982 if (ret < 0) 983 return ret; 984 crat_table->length += (sub_type_hdr->length * entries); 985 crat_table->total_entries += entries; 986 987 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr + 988 sub_type_hdr->length * entries); 989 990 crat_table->num_domains++; 991 } 992 993 /* TODO: Add cache Subtype for CPU. 994 * Currently, CPU cache information is available in function 995 * detect_cache_attributes(cpu) defined in the file 996 * ./arch/x86/kernel/cpu/intel_cacheinfo.c. This function is not 997 * exported and to get the same information the code needs to be 998 * duplicated. 999 */ 1000 1001 *size = crat_table->length; 1002 pr_info("Virtual CRAT table created for CPU\n"); 1003 1004 return 0; 1005 } 1006 1007 static int kfd_fill_gpu_memory_affinity(int *avail_size, 1008 struct kfd_dev *kdev, uint8_t type, uint64_t size, 1009 struct crat_subtype_memory *sub_type_hdr, 1010 uint32_t proximity_domain, 1011 const struct kfd_local_mem_info *local_mem_info) 1012 { 1013 *avail_size -= sizeof(struct crat_subtype_memory); 1014 if (*avail_size < 0) 1015 return -ENOMEM; 1016 1017 memset((void *)sub_type_hdr, 0, sizeof(struct crat_subtype_memory)); 1018 sub_type_hdr->type = CRAT_SUBTYPE_MEMORY_AFFINITY; 1019 sub_type_hdr->length = sizeof(struct crat_subtype_memory); 1020 sub_type_hdr->flags |= CRAT_SUBTYPE_FLAGS_ENABLED; 1021 1022 sub_type_hdr->proximity_domain = proximity_domain; 1023 1024 pr_debug("Fill gpu memory affinity - type 0x%x size 0x%llx\n", 1025 type, size); 1026 1027 sub_type_hdr->length_low = lower_32_bits(size); 1028 sub_type_hdr->length_high = upper_32_bits(size); 1029 1030 sub_type_hdr->width = local_mem_info->vram_width; 1031 sub_type_hdr->visibility_type = type; 1032 1033 return 0; 1034 } 1035 1036 /* kfd_fill_gpu_direct_io_link - Fill in direct io link from GPU 1037 * to its NUMA node 1038 * @avail_size: Available size in the memory 1039 * @kdev - [IN] GPU device 1040 * @sub_type_hdr: Memory into which io link info will be filled in 1041 * @proximity_domain - proximity domain of the GPU node 1042 * 1043 * Return 0 if successful else return -ve value 1044 */ 1045 static int kfd_fill_gpu_direct_io_link_to_cpu(int *avail_size, 1046 struct kfd_dev *kdev, 1047 struct crat_subtype_iolink *sub_type_hdr, 1048 uint32_t proximity_domain) 1049 { 1050 *avail_size -= sizeof(struct crat_subtype_iolink); 1051 if (*avail_size < 0) 1052 return -ENOMEM; 1053 1054 memset((void *)sub_type_hdr, 0, sizeof(struct crat_subtype_iolink)); 1055 1056 /* Fill in subtype header data */ 1057 sub_type_hdr->type = CRAT_SUBTYPE_IOLINK_AFFINITY; 1058 sub_type_hdr->length = sizeof(struct crat_subtype_iolink); 1059 sub_type_hdr->flags |= CRAT_SUBTYPE_FLAGS_ENABLED; 1060 if (kfd_dev_is_large_bar(kdev)) 1061 sub_type_hdr->flags |= CRAT_IOLINK_FLAGS_BI_DIRECTIONAL; 1062 1063 /* Fill in IOLINK subtype. 1064 * TODO: Fill-in other fields of iolink subtype 1065 */ 1066 sub_type_hdr->io_interface_type = CRAT_IOLINK_TYPE_PCIEXPRESS; 1067 sub_type_hdr->proximity_domain_from = proximity_domain; 1068 #ifdef CONFIG_NUMA 1069 if (kdev->pdev->dev.numa_node == NUMA_NO_NODE) 1070 sub_type_hdr->proximity_domain_to = 0; 1071 else 1072 sub_type_hdr->proximity_domain_to = kdev->pdev->dev.numa_node; 1073 #else 1074 sub_type_hdr->proximity_domain_to = 0; 1075 #endif 1076 return 0; 1077 } 1078 1079 static int kfd_fill_gpu_xgmi_link_to_gpu(int *avail_size, 1080 struct kfd_dev *kdev, 1081 struct crat_subtype_iolink *sub_type_hdr, 1082 uint32_t proximity_domain_from, 1083 uint32_t proximity_domain_to) 1084 { 1085 *avail_size -= sizeof(struct crat_subtype_iolink); 1086 if (*avail_size < 0) 1087 return -ENOMEM; 1088 1089 memset((void *)sub_type_hdr, 0, sizeof(struct crat_subtype_iolink)); 1090 1091 sub_type_hdr->type = CRAT_SUBTYPE_IOLINK_AFFINITY; 1092 sub_type_hdr->length = sizeof(struct crat_subtype_iolink); 1093 sub_type_hdr->flags |= CRAT_SUBTYPE_FLAGS_ENABLED | 1094 CRAT_IOLINK_FLAGS_BI_DIRECTIONAL; 1095 1096 sub_type_hdr->io_interface_type = CRAT_IOLINK_TYPE_XGMI; 1097 sub_type_hdr->proximity_domain_from = proximity_domain_from; 1098 sub_type_hdr->proximity_domain_to = proximity_domain_to; 1099 return 0; 1100 } 1101 1102 /* kfd_create_vcrat_image_gpu - Create Virtual CRAT for CPU 1103 * 1104 * @pcrat_image: Fill in VCRAT for GPU 1105 * @size: [IN] allocated size of crat_image. 1106 * [OUT] actual size of data filled in crat_image 1107 */ 1108 static int kfd_create_vcrat_image_gpu(void *pcrat_image, 1109 size_t *size, struct kfd_dev *kdev, 1110 uint32_t proximity_domain) 1111 { 1112 struct crat_header *crat_table = (struct crat_header *)pcrat_image; 1113 struct crat_subtype_generic *sub_type_hdr; 1114 struct kfd_local_mem_info local_mem_info; 1115 struct kfd_topology_device *peer_dev; 1116 struct crat_subtype_computeunit *cu; 1117 struct kfd_cu_info cu_info; 1118 int avail_size = *size; 1119 uint32_t total_num_of_cu; 1120 int num_of_cache_entries = 0; 1121 int cache_mem_filled = 0; 1122 uint32_t nid = 0; 1123 int ret = 0; 1124 1125 if (!pcrat_image || avail_size < VCRAT_SIZE_FOR_GPU) 1126 return -EINVAL; 1127 1128 /* Fill the CRAT Header. 1129 * Modify length and total_entries as subunits are added. 1130 */ 1131 avail_size -= sizeof(struct crat_header); 1132 if (avail_size < 0) 1133 return -ENOMEM; 1134 1135 memset(crat_table, 0, sizeof(struct crat_header)); 1136 1137 memcpy(&crat_table->signature, CRAT_SIGNATURE, 1138 sizeof(crat_table->signature)); 1139 /* Change length as we add more subtypes*/ 1140 crat_table->length = sizeof(struct crat_header); 1141 crat_table->num_domains = 1; 1142 crat_table->total_entries = 0; 1143 1144 /* Fill in Subtype: Compute Unit 1145 * First fill in the sub type header and then sub type data 1146 */ 1147 avail_size -= sizeof(struct crat_subtype_computeunit); 1148 if (avail_size < 0) 1149 return -ENOMEM; 1150 1151 sub_type_hdr = (struct crat_subtype_generic *)(crat_table + 1); 1152 memset(sub_type_hdr, 0, sizeof(struct crat_subtype_computeunit)); 1153 1154 sub_type_hdr->type = CRAT_SUBTYPE_COMPUTEUNIT_AFFINITY; 1155 sub_type_hdr->length = sizeof(struct crat_subtype_computeunit); 1156 sub_type_hdr->flags = CRAT_SUBTYPE_FLAGS_ENABLED; 1157 1158 /* Fill CU subtype data */ 1159 cu = (struct crat_subtype_computeunit *)sub_type_hdr; 1160 cu->flags |= CRAT_CU_FLAGS_GPU_PRESENT; 1161 cu->proximity_domain = proximity_domain; 1162 1163 kdev->kfd2kgd->get_cu_info(kdev->kgd, &cu_info); 1164 cu->num_simd_per_cu = cu_info.simd_per_cu; 1165 cu->num_simd_cores = cu_info.simd_per_cu * cu_info.cu_active_number; 1166 cu->max_waves_simd = cu_info.max_waves_per_simd; 1167 1168 cu->wave_front_size = cu_info.wave_front_size; 1169 cu->array_count = cu_info.num_shader_arrays_per_engine * 1170 cu_info.num_shader_engines; 1171 total_num_of_cu = (cu->array_count * cu_info.num_cu_per_sh); 1172 cu->processor_id_low = get_and_inc_gpu_processor_id(total_num_of_cu); 1173 cu->num_cu_per_array = cu_info.num_cu_per_sh; 1174 cu->max_slots_scatch_cu = cu_info.max_scratch_slots_per_cu; 1175 cu->num_banks = cu_info.num_shader_engines; 1176 cu->lds_size_in_kb = cu_info.lds_size; 1177 1178 cu->hsa_capability = 0; 1179 1180 /* Check if this node supports IOMMU. During parsing this flag will 1181 * translate to HSA_CAP_ATS_PRESENT 1182 */ 1183 if (!kfd_iommu_check_device(kdev)) 1184 cu->hsa_capability |= CRAT_CU_FLAGS_IOMMU_PRESENT; 1185 1186 crat_table->length += sub_type_hdr->length; 1187 crat_table->total_entries++; 1188 1189 /* Fill in Subtype: Memory. Only on systems with large BAR (no 1190 * private FB), report memory as public. On other systems 1191 * report the total FB size (public+private) as a single 1192 * private heap. 1193 */ 1194 kdev->kfd2kgd->get_local_mem_info(kdev->kgd, &local_mem_info); 1195 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr + 1196 sub_type_hdr->length); 1197 1198 if (debug_largebar) 1199 local_mem_info.local_mem_size_private = 0; 1200 1201 if (local_mem_info.local_mem_size_private == 0) 1202 ret = kfd_fill_gpu_memory_affinity(&avail_size, 1203 kdev, HSA_MEM_HEAP_TYPE_FB_PUBLIC, 1204 local_mem_info.local_mem_size_public, 1205 (struct crat_subtype_memory *)sub_type_hdr, 1206 proximity_domain, 1207 &local_mem_info); 1208 else 1209 ret = kfd_fill_gpu_memory_affinity(&avail_size, 1210 kdev, HSA_MEM_HEAP_TYPE_FB_PRIVATE, 1211 local_mem_info.local_mem_size_public + 1212 local_mem_info.local_mem_size_private, 1213 (struct crat_subtype_memory *)sub_type_hdr, 1214 proximity_domain, 1215 &local_mem_info); 1216 if (ret < 0) 1217 return ret; 1218 1219 crat_table->length += sizeof(struct crat_subtype_memory); 1220 crat_table->total_entries++; 1221 1222 /* TODO: Fill in cache information. This information is NOT readily 1223 * available in KGD 1224 */ 1225 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr + 1226 sub_type_hdr->length); 1227 ret = kfd_fill_gpu_cache_info(kdev, cu->processor_id_low, 1228 avail_size, 1229 &cu_info, 1230 (struct crat_subtype_cache *)sub_type_hdr, 1231 &cache_mem_filled, 1232 &num_of_cache_entries); 1233 1234 if (ret < 0) 1235 return ret; 1236 1237 crat_table->length += cache_mem_filled; 1238 crat_table->total_entries += num_of_cache_entries; 1239 avail_size -= cache_mem_filled; 1240 1241 /* Fill in Subtype: IO_LINKS 1242 * Only direct links are added here which is Link from GPU to 1243 * to its NUMA node. Indirect links are added by userspace. 1244 */ 1245 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr + 1246 cache_mem_filled); 1247 ret = kfd_fill_gpu_direct_io_link_to_cpu(&avail_size, kdev, 1248 (struct crat_subtype_iolink *)sub_type_hdr, proximity_domain); 1249 1250 if (ret < 0) 1251 return ret; 1252 1253 crat_table->length += sub_type_hdr->length; 1254 crat_table->total_entries++; 1255 1256 1257 /* Fill in Subtype: IO_LINKS 1258 * Direct links from GPU to other GPUs through xGMI. 1259 * We will loop GPUs that already be processed (with lower value 1260 * of proximity_domain), add the link for the GPUs with same 1261 * hive id (from this GPU to other GPU) . The reversed iolink 1262 * (from other GPU to this GPU) will be added 1263 * in kfd_parse_subtype_iolink. 1264 */ 1265 if (kdev->hive_id) { 1266 for (nid = 0; nid < proximity_domain; ++nid) { 1267 peer_dev = kfd_topology_device_by_proximity_domain(nid); 1268 if (!peer_dev->gpu) 1269 continue; 1270 if (peer_dev->gpu->hive_id != kdev->hive_id) 1271 continue; 1272 sub_type_hdr = (typeof(sub_type_hdr))( 1273 (char *)sub_type_hdr + 1274 sizeof(struct crat_subtype_iolink)); 1275 ret = kfd_fill_gpu_xgmi_link_to_gpu( 1276 &avail_size, kdev, 1277 (struct crat_subtype_iolink *)sub_type_hdr, 1278 proximity_domain, nid); 1279 if (ret < 0) 1280 return ret; 1281 crat_table->length += sub_type_hdr->length; 1282 crat_table->total_entries++; 1283 } 1284 } 1285 *size = crat_table->length; 1286 pr_info("Virtual CRAT table created for GPU\n"); 1287 1288 return ret; 1289 } 1290 1291 /* kfd_create_crat_image_virtual - Allocates memory for CRAT image and 1292 * creates a Virtual CRAT (VCRAT) image 1293 * 1294 * NOTE: Call kfd_destroy_crat_image to free CRAT image memory 1295 * 1296 * @crat_image: VCRAT image created because ACPI does not have a 1297 * CRAT for this device 1298 * @size: [OUT] size of virtual crat_image 1299 * @flags: COMPUTE_UNIT_CPU - Create VCRAT for CPU device 1300 * COMPUTE_UNIT_GPU - Create VCRAT for GPU 1301 * (COMPUTE_UNIT_CPU | COMPUTE_UNIT_GPU) - Create VCRAT for APU 1302 * -- this option is not currently implemented. 1303 * The assumption is that all AMD APUs will have CRAT 1304 * @kdev: Valid kfd_device required if flags contain COMPUTE_UNIT_GPU 1305 * 1306 * Return 0 if successful else return -ve value 1307 */ 1308 int kfd_create_crat_image_virtual(void **crat_image, size_t *size, 1309 int flags, struct kfd_dev *kdev, 1310 uint32_t proximity_domain) 1311 { 1312 void *pcrat_image = NULL; 1313 int ret = 0; 1314 1315 if (!crat_image) 1316 return -EINVAL; 1317 1318 *crat_image = NULL; 1319 1320 /* Allocate one VCRAT_SIZE_FOR_CPU for CPU virtual CRAT image and 1321 * VCRAT_SIZE_FOR_GPU for GPU virtual CRAT image. This should cover 1322 * all the current conditions. A check is put not to overwrite beyond 1323 * allocated size 1324 */ 1325 switch (flags) { 1326 case COMPUTE_UNIT_CPU: 1327 pcrat_image = kmalloc(VCRAT_SIZE_FOR_CPU, GFP_KERNEL); 1328 if (!pcrat_image) 1329 return -ENOMEM; 1330 *size = VCRAT_SIZE_FOR_CPU; 1331 ret = kfd_create_vcrat_image_cpu(pcrat_image, size); 1332 break; 1333 case COMPUTE_UNIT_GPU: 1334 if (!kdev) 1335 return -EINVAL; 1336 pcrat_image = kmalloc(VCRAT_SIZE_FOR_GPU, GFP_KERNEL); 1337 if (!pcrat_image) 1338 return -ENOMEM; 1339 *size = VCRAT_SIZE_FOR_GPU; 1340 ret = kfd_create_vcrat_image_gpu(pcrat_image, size, kdev, 1341 proximity_domain); 1342 break; 1343 case (COMPUTE_UNIT_CPU | COMPUTE_UNIT_GPU): 1344 /* TODO: */ 1345 ret = -EINVAL; 1346 pr_err("VCRAT not implemented for APU\n"); 1347 break; 1348 default: 1349 ret = -EINVAL; 1350 } 1351 1352 if (!ret) 1353 *crat_image = pcrat_image; 1354 else 1355 kfree(pcrat_image); 1356 1357 return ret; 1358 } 1359 1360 1361 /* kfd_destroy_crat_image 1362 * 1363 * @crat_image: [IN] - crat_image from kfd_create_crat_image_xxx(..) 1364 * 1365 */ 1366 void kfd_destroy_crat_image(void *crat_image) 1367 { 1368 kfree(crat_image); 1369 } 1370