1 /* 2 * Copyright 2015-2017 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 #include <linux/pci.h> 24 #include <linux/acpi.h> 25 #include "kfd_crat.h" 26 #include "kfd_priv.h" 27 #include "kfd_topology.h" 28 #include "kfd_iommu.h" 29 30 /* GPU Processor ID base for dGPUs for which VCRAT needs to be created. 31 * GPU processor ID are expressed with Bit[31]=1. 32 * The base is set to 0x8000_0000 + 0x1000 to avoid collision with GPU IDs 33 * used in the CRAT. 34 */ 35 static uint32_t gpu_processor_id_low = 0x80001000; 36 37 /* Return the next available gpu_processor_id and increment it for next GPU 38 * @total_cu_count - Total CUs present in the GPU including ones 39 * masked off 40 */ 41 static inline unsigned int get_and_inc_gpu_processor_id( 42 unsigned int total_cu_count) 43 { 44 int current_id = gpu_processor_id_low; 45 46 gpu_processor_id_low += total_cu_count; 47 return current_id; 48 } 49 50 /* Static table to describe GPU Cache information */ 51 struct kfd_gpu_cache_info { 52 uint32_t cache_size; 53 uint32_t cache_level; 54 uint32_t flags; 55 /* Indicates how many Compute Units share this cache 56 * Value = 1 indicates the cache is not shared 57 */ 58 uint32_t num_cu_shared; 59 }; 60 61 static struct kfd_gpu_cache_info kaveri_cache_info[] = { 62 { 63 /* TCP L1 Cache per CU */ 64 .cache_size = 16, 65 .cache_level = 1, 66 .flags = (CRAT_CACHE_FLAGS_ENABLED | 67 CRAT_CACHE_FLAGS_DATA_CACHE | 68 CRAT_CACHE_FLAGS_SIMD_CACHE), 69 .num_cu_shared = 1, 70 71 }, 72 { 73 /* Scalar L1 Instruction Cache (in SQC module) per bank */ 74 .cache_size = 16, 75 .cache_level = 1, 76 .flags = (CRAT_CACHE_FLAGS_ENABLED | 77 CRAT_CACHE_FLAGS_INST_CACHE | 78 CRAT_CACHE_FLAGS_SIMD_CACHE), 79 .num_cu_shared = 2, 80 }, 81 { 82 /* Scalar L1 Data Cache (in SQC module) per bank */ 83 .cache_size = 8, 84 .cache_level = 1, 85 .flags = (CRAT_CACHE_FLAGS_ENABLED | 86 CRAT_CACHE_FLAGS_DATA_CACHE | 87 CRAT_CACHE_FLAGS_SIMD_CACHE), 88 .num_cu_shared = 2, 89 }, 90 91 /* TODO: Add L2 Cache information */ 92 }; 93 94 95 static struct kfd_gpu_cache_info carrizo_cache_info[] = { 96 { 97 /* TCP L1 Cache per CU */ 98 .cache_size = 16, 99 .cache_level = 1, 100 .flags = (CRAT_CACHE_FLAGS_ENABLED | 101 CRAT_CACHE_FLAGS_DATA_CACHE | 102 CRAT_CACHE_FLAGS_SIMD_CACHE), 103 .num_cu_shared = 1, 104 }, 105 { 106 /* Scalar L1 Instruction Cache (in SQC module) per bank */ 107 .cache_size = 8, 108 .cache_level = 1, 109 .flags = (CRAT_CACHE_FLAGS_ENABLED | 110 CRAT_CACHE_FLAGS_INST_CACHE | 111 CRAT_CACHE_FLAGS_SIMD_CACHE), 112 .num_cu_shared = 4, 113 }, 114 { 115 /* Scalar L1 Data Cache (in SQC module) per bank. */ 116 .cache_size = 4, 117 .cache_level = 1, 118 .flags = (CRAT_CACHE_FLAGS_ENABLED | 119 CRAT_CACHE_FLAGS_DATA_CACHE | 120 CRAT_CACHE_FLAGS_SIMD_CACHE), 121 .num_cu_shared = 4, 122 }, 123 124 /* TODO: Add L2 Cache information */ 125 }; 126 127 /* NOTE: In future if more information is added to struct kfd_gpu_cache_info 128 * the following ASICs may need a separate table. 129 */ 130 #define hawaii_cache_info kaveri_cache_info 131 #define tonga_cache_info carrizo_cache_info 132 #define fiji_cache_info carrizo_cache_info 133 #define polaris10_cache_info carrizo_cache_info 134 #define polaris11_cache_info carrizo_cache_info 135 /* TODO - check & update Vega10 cache details */ 136 #define vega10_cache_info carrizo_cache_info 137 #define raven_cache_info carrizo_cache_info 138 139 static void kfd_populated_cu_info_cpu(struct kfd_topology_device *dev, 140 struct crat_subtype_computeunit *cu) 141 { 142 dev->node_props.cpu_cores_count = cu->num_cpu_cores; 143 dev->node_props.cpu_core_id_base = cu->processor_id_low; 144 if (cu->hsa_capability & CRAT_CU_FLAGS_IOMMU_PRESENT) 145 dev->node_props.capability |= HSA_CAP_ATS_PRESENT; 146 147 pr_debug("CU CPU: cores=%d id_base=%d\n", cu->num_cpu_cores, 148 cu->processor_id_low); 149 } 150 151 static void kfd_populated_cu_info_gpu(struct kfd_topology_device *dev, 152 struct crat_subtype_computeunit *cu) 153 { 154 dev->node_props.simd_id_base = cu->processor_id_low; 155 dev->node_props.simd_count = cu->num_simd_cores; 156 dev->node_props.lds_size_in_kb = cu->lds_size_in_kb; 157 dev->node_props.max_waves_per_simd = cu->max_waves_simd; 158 dev->node_props.wave_front_size = cu->wave_front_size; 159 dev->node_props.array_count = cu->array_count; 160 dev->node_props.cu_per_simd_array = cu->num_cu_per_array; 161 dev->node_props.simd_per_cu = cu->num_simd_per_cu; 162 dev->node_props.max_slots_scratch_cu = cu->max_slots_scatch_cu; 163 if (cu->hsa_capability & CRAT_CU_FLAGS_HOT_PLUGGABLE) 164 dev->node_props.capability |= HSA_CAP_HOT_PLUGGABLE; 165 pr_debug("CU GPU: id_base=%d\n", cu->processor_id_low); 166 } 167 168 /* kfd_parse_subtype_cu - parse compute unit subtypes and attach it to correct 169 * topology device present in the device_list 170 */ 171 static int kfd_parse_subtype_cu(struct crat_subtype_computeunit *cu, 172 struct list_head *device_list) 173 { 174 struct kfd_topology_device *dev; 175 176 pr_debug("Found CU entry in CRAT table with proximity_domain=%d caps=%x\n", 177 cu->proximity_domain, cu->hsa_capability); 178 list_for_each_entry(dev, device_list, list) { 179 if (cu->proximity_domain == dev->proximity_domain) { 180 if (cu->flags & CRAT_CU_FLAGS_CPU_PRESENT) 181 kfd_populated_cu_info_cpu(dev, cu); 182 183 if (cu->flags & CRAT_CU_FLAGS_GPU_PRESENT) 184 kfd_populated_cu_info_gpu(dev, cu); 185 break; 186 } 187 } 188 189 return 0; 190 } 191 192 static struct kfd_mem_properties * 193 find_subtype_mem(uint32_t heap_type, uint32_t flags, uint32_t width, 194 struct kfd_topology_device *dev) 195 { 196 struct kfd_mem_properties *props; 197 198 list_for_each_entry(props, &dev->mem_props, list) { 199 if (props->heap_type == heap_type 200 && props->flags == flags 201 && props->width == width) 202 return props; 203 } 204 205 return NULL; 206 } 207 /* kfd_parse_subtype_mem - parse memory subtypes and attach it to correct 208 * topology device present in the device_list 209 */ 210 static int kfd_parse_subtype_mem(struct crat_subtype_memory *mem, 211 struct list_head *device_list) 212 { 213 struct kfd_mem_properties *props; 214 struct kfd_topology_device *dev; 215 uint32_t heap_type; 216 uint64_t size_in_bytes; 217 uint32_t flags = 0; 218 uint32_t width; 219 220 pr_debug("Found memory entry in CRAT table with proximity_domain=%d\n", 221 mem->proximity_domain); 222 list_for_each_entry(dev, device_list, list) { 223 if (mem->proximity_domain == dev->proximity_domain) { 224 /* We're on GPU node */ 225 if (dev->node_props.cpu_cores_count == 0) { 226 /* APU */ 227 if (mem->visibility_type == 0) 228 heap_type = 229 HSA_MEM_HEAP_TYPE_FB_PRIVATE; 230 /* dGPU */ 231 else 232 heap_type = mem->visibility_type; 233 } else 234 heap_type = HSA_MEM_HEAP_TYPE_SYSTEM; 235 236 if (mem->flags & CRAT_MEM_FLAGS_HOT_PLUGGABLE) 237 flags |= HSA_MEM_FLAGS_HOT_PLUGGABLE; 238 if (mem->flags & CRAT_MEM_FLAGS_NON_VOLATILE) 239 flags |= HSA_MEM_FLAGS_NON_VOLATILE; 240 241 size_in_bytes = 242 ((uint64_t)mem->length_high << 32) + 243 mem->length_low; 244 width = mem->width; 245 246 /* Multiple banks of the same type are aggregated into 247 * one. User mode doesn't care about multiple physical 248 * memory segments. It's managed as a single virtual 249 * heap for user mode. 250 */ 251 props = find_subtype_mem(heap_type, flags, width, dev); 252 if (props) { 253 props->size_in_bytes += size_in_bytes; 254 break; 255 } 256 257 props = kfd_alloc_struct(props); 258 if (!props) 259 return -ENOMEM; 260 261 props->heap_type = heap_type; 262 props->flags = flags; 263 props->size_in_bytes = size_in_bytes; 264 props->width = width; 265 266 dev->node_props.mem_banks_count++; 267 list_add_tail(&props->list, &dev->mem_props); 268 269 break; 270 } 271 } 272 273 return 0; 274 } 275 276 /* kfd_parse_subtype_cache - parse cache subtypes and attach it to correct 277 * topology device present in the device_list 278 */ 279 static int kfd_parse_subtype_cache(struct crat_subtype_cache *cache, 280 struct list_head *device_list) 281 { 282 struct kfd_cache_properties *props; 283 struct kfd_topology_device *dev; 284 uint32_t id; 285 uint32_t total_num_of_cu; 286 287 id = cache->processor_id_low; 288 289 pr_debug("Found cache entry in CRAT table with processor_id=%d\n", id); 290 list_for_each_entry(dev, device_list, list) { 291 total_num_of_cu = (dev->node_props.array_count * 292 dev->node_props.cu_per_simd_array); 293 294 /* Cache infomration in CRAT doesn't have proximity_domain 295 * information as it is associated with a CPU core or GPU 296 * Compute Unit. So map the cache using CPU core Id or SIMD 297 * (GPU) ID. 298 * TODO: This works because currently we can safely assume that 299 * Compute Units are parsed before caches are parsed. In 300 * future, remove this dependency 301 */ 302 if ((id >= dev->node_props.cpu_core_id_base && 303 id <= dev->node_props.cpu_core_id_base + 304 dev->node_props.cpu_cores_count) || 305 (id >= dev->node_props.simd_id_base && 306 id < dev->node_props.simd_id_base + 307 total_num_of_cu)) { 308 props = kfd_alloc_struct(props); 309 if (!props) 310 return -ENOMEM; 311 312 props->processor_id_low = id; 313 props->cache_level = cache->cache_level; 314 props->cache_size = cache->cache_size; 315 props->cacheline_size = cache->cache_line_size; 316 props->cachelines_per_tag = cache->lines_per_tag; 317 props->cache_assoc = cache->associativity; 318 props->cache_latency = cache->cache_latency; 319 memcpy(props->sibling_map, cache->sibling_map, 320 sizeof(props->sibling_map)); 321 322 if (cache->flags & CRAT_CACHE_FLAGS_DATA_CACHE) 323 props->cache_type |= HSA_CACHE_TYPE_DATA; 324 if (cache->flags & CRAT_CACHE_FLAGS_INST_CACHE) 325 props->cache_type |= HSA_CACHE_TYPE_INSTRUCTION; 326 if (cache->flags & CRAT_CACHE_FLAGS_CPU_CACHE) 327 props->cache_type |= HSA_CACHE_TYPE_CPU; 328 if (cache->flags & CRAT_CACHE_FLAGS_SIMD_CACHE) 329 props->cache_type |= HSA_CACHE_TYPE_HSACU; 330 331 dev->cache_count++; 332 dev->node_props.caches_count++; 333 list_add_tail(&props->list, &dev->cache_props); 334 335 break; 336 } 337 } 338 339 return 0; 340 } 341 342 /* kfd_parse_subtype_iolink - parse iolink subtypes and attach it to correct 343 * topology device present in the device_list 344 */ 345 static int kfd_parse_subtype_iolink(struct crat_subtype_iolink *iolink, 346 struct list_head *device_list) 347 { 348 struct kfd_iolink_properties *props = NULL, *props2; 349 struct kfd_topology_device *dev, *to_dev; 350 uint32_t id_from; 351 uint32_t id_to; 352 353 id_from = iolink->proximity_domain_from; 354 id_to = iolink->proximity_domain_to; 355 356 pr_debug("Found IO link entry in CRAT table with id_from=%d, id_to %d\n", 357 id_from, id_to); 358 list_for_each_entry(dev, device_list, list) { 359 if (id_from == dev->proximity_domain) { 360 props = kfd_alloc_struct(props); 361 if (!props) 362 return -ENOMEM; 363 364 props->node_from = id_from; 365 props->node_to = id_to; 366 props->ver_maj = iolink->version_major; 367 props->ver_min = iolink->version_minor; 368 props->iolink_type = iolink->io_interface_type; 369 370 if (props->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS) 371 props->weight = 20; 372 else if (props->iolink_type == CRAT_IOLINK_TYPE_XGMI) 373 props->weight = 15; 374 else 375 props->weight = node_distance(id_from, id_to); 376 377 props->min_latency = iolink->minimum_latency; 378 props->max_latency = iolink->maximum_latency; 379 props->min_bandwidth = iolink->minimum_bandwidth_mbs; 380 props->max_bandwidth = iolink->maximum_bandwidth_mbs; 381 props->rec_transfer_size = 382 iolink->recommended_transfer_size; 383 384 dev->io_link_count++; 385 dev->node_props.io_links_count++; 386 list_add_tail(&props->list, &dev->io_link_props); 387 break; 388 } 389 } 390 391 /* CPU topology is created before GPUs are detected, so CPU->GPU 392 * links are not built at that time. If a PCIe type is discovered, it 393 * means a GPU is detected and we are adding GPU->CPU to the topology. 394 * At this time, also add the corresponded CPU->GPU link if GPU 395 * is large bar. 396 * For xGMI, we only added the link with one direction in the crat 397 * table, add corresponded reversed direction link now. 398 */ 399 if (props && (iolink->flags & CRAT_IOLINK_FLAGS_BI_DIRECTIONAL)) { 400 to_dev = kfd_topology_device_by_proximity_domain(id_to); 401 if (!to_dev) 402 return -ENODEV; 403 /* same everything but the other direction */ 404 props2 = kmemdup(props, sizeof(*props2), GFP_KERNEL); 405 props2->node_from = id_to; 406 props2->node_to = id_from; 407 props2->kobj = NULL; 408 to_dev->io_link_count++; 409 to_dev->node_props.io_links_count++; 410 list_add_tail(&props2->list, &to_dev->io_link_props); 411 } 412 413 return 0; 414 } 415 416 /* kfd_parse_subtype - parse subtypes and attach it to correct topology device 417 * present in the device_list 418 * @sub_type_hdr - subtype section of crat_image 419 * @device_list - list of topology devices present in this crat_image 420 */ 421 static int kfd_parse_subtype(struct crat_subtype_generic *sub_type_hdr, 422 struct list_head *device_list) 423 { 424 struct crat_subtype_computeunit *cu; 425 struct crat_subtype_memory *mem; 426 struct crat_subtype_cache *cache; 427 struct crat_subtype_iolink *iolink; 428 int ret = 0; 429 430 switch (sub_type_hdr->type) { 431 case CRAT_SUBTYPE_COMPUTEUNIT_AFFINITY: 432 cu = (struct crat_subtype_computeunit *)sub_type_hdr; 433 ret = kfd_parse_subtype_cu(cu, device_list); 434 break; 435 case CRAT_SUBTYPE_MEMORY_AFFINITY: 436 mem = (struct crat_subtype_memory *)sub_type_hdr; 437 ret = kfd_parse_subtype_mem(mem, device_list); 438 break; 439 case CRAT_SUBTYPE_CACHE_AFFINITY: 440 cache = (struct crat_subtype_cache *)sub_type_hdr; 441 ret = kfd_parse_subtype_cache(cache, device_list); 442 break; 443 case CRAT_SUBTYPE_TLB_AFFINITY: 444 /* 445 * For now, nothing to do here 446 */ 447 pr_debug("Found TLB entry in CRAT table (not processing)\n"); 448 break; 449 case CRAT_SUBTYPE_CCOMPUTE_AFFINITY: 450 /* 451 * For now, nothing to do here 452 */ 453 pr_debug("Found CCOMPUTE entry in CRAT table (not processing)\n"); 454 break; 455 case CRAT_SUBTYPE_IOLINK_AFFINITY: 456 iolink = (struct crat_subtype_iolink *)sub_type_hdr; 457 ret = kfd_parse_subtype_iolink(iolink, device_list); 458 break; 459 default: 460 pr_warn("Unknown subtype %d in CRAT\n", 461 sub_type_hdr->type); 462 } 463 464 return ret; 465 } 466 467 /* kfd_parse_crat_table - parse CRAT table. For each node present in CRAT 468 * create a kfd_topology_device and add in to device_list. Also parse 469 * CRAT subtypes and attach it to appropriate kfd_topology_device 470 * @crat_image - input image containing CRAT 471 * @device_list - [OUT] list of kfd_topology_device generated after 472 * parsing crat_image 473 * @proximity_domain - Proximity domain of the first device in the table 474 * 475 * Return - 0 if successful else -ve value 476 */ 477 int kfd_parse_crat_table(void *crat_image, struct list_head *device_list, 478 uint32_t proximity_domain) 479 { 480 struct kfd_topology_device *top_dev = NULL; 481 struct crat_subtype_generic *sub_type_hdr; 482 uint16_t node_id; 483 int ret = 0; 484 struct crat_header *crat_table = (struct crat_header *)crat_image; 485 uint16_t num_nodes; 486 uint32_t image_len; 487 488 if (!crat_image) 489 return -EINVAL; 490 491 if (!list_empty(device_list)) { 492 pr_warn("Error device list should be empty\n"); 493 return -EINVAL; 494 } 495 496 num_nodes = crat_table->num_domains; 497 image_len = crat_table->length; 498 499 pr_info("Parsing CRAT table with %d nodes\n", num_nodes); 500 501 for (node_id = 0; node_id < num_nodes; node_id++) { 502 top_dev = kfd_create_topology_device(device_list); 503 if (!top_dev) 504 break; 505 top_dev->proximity_domain = proximity_domain++; 506 } 507 508 if (!top_dev) { 509 ret = -ENOMEM; 510 goto err; 511 } 512 513 memcpy(top_dev->oem_id, crat_table->oem_id, CRAT_OEMID_LENGTH); 514 memcpy(top_dev->oem_table_id, crat_table->oem_table_id, 515 CRAT_OEMTABLEID_LENGTH); 516 top_dev->oem_revision = crat_table->oem_revision; 517 518 sub_type_hdr = (struct crat_subtype_generic *)(crat_table+1); 519 while ((char *)sub_type_hdr + sizeof(struct crat_subtype_generic) < 520 ((char *)crat_image) + image_len) { 521 if (sub_type_hdr->flags & CRAT_SUBTYPE_FLAGS_ENABLED) { 522 ret = kfd_parse_subtype(sub_type_hdr, device_list); 523 if (ret) 524 break; 525 } 526 527 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr + 528 sub_type_hdr->length); 529 } 530 531 err: 532 if (ret) 533 kfd_release_topology_device_list(device_list); 534 535 return ret; 536 } 537 538 /* Helper function. See kfd_fill_gpu_cache_info for parameter description */ 539 static int fill_in_pcache(struct crat_subtype_cache *pcache, 540 struct kfd_gpu_cache_info *pcache_info, 541 struct kfd_cu_info *cu_info, 542 int mem_available, 543 int cu_bitmask, 544 int cache_type, unsigned int cu_processor_id, 545 int cu_block) 546 { 547 unsigned int cu_sibling_map_mask; 548 int first_active_cu; 549 550 /* First check if enough memory is available */ 551 if (sizeof(struct crat_subtype_cache) > mem_available) 552 return -ENOMEM; 553 554 cu_sibling_map_mask = cu_bitmask; 555 cu_sibling_map_mask >>= cu_block; 556 cu_sibling_map_mask &= 557 ((1 << pcache_info[cache_type].num_cu_shared) - 1); 558 first_active_cu = ffs(cu_sibling_map_mask); 559 560 /* CU could be inactive. In case of shared cache find the first active 561 * CU. and incase of non-shared cache check if the CU is inactive. If 562 * inactive active skip it 563 */ 564 if (first_active_cu) { 565 memset(pcache, 0, sizeof(struct crat_subtype_cache)); 566 pcache->type = CRAT_SUBTYPE_CACHE_AFFINITY; 567 pcache->length = sizeof(struct crat_subtype_cache); 568 pcache->flags = pcache_info[cache_type].flags; 569 pcache->processor_id_low = cu_processor_id 570 + (first_active_cu - 1); 571 pcache->cache_level = pcache_info[cache_type].cache_level; 572 pcache->cache_size = pcache_info[cache_type].cache_size; 573 574 /* Sibling map is w.r.t processor_id_low, so shift out 575 * inactive CU 576 */ 577 cu_sibling_map_mask = 578 cu_sibling_map_mask >> (first_active_cu - 1); 579 580 pcache->sibling_map[0] = (uint8_t)(cu_sibling_map_mask & 0xFF); 581 pcache->sibling_map[1] = 582 (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF); 583 pcache->sibling_map[2] = 584 (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF); 585 pcache->sibling_map[3] = 586 (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF); 587 return 0; 588 } 589 return 1; 590 } 591 592 /* kfd_fill_gpu_cache_info - Fill GPU cache info using kfd_gpu_cache_info 593 * tables 594 * 595 * @kdev - [IN] GPU device 596 * @gpu_processor_id - [IN] GPU processor ID to which these caches 597 * associate 598 * @available_size - [IN] Amount of memory available in pcache 599 * @cu_info - [IN] Compute Unit info obtained from KGD 600 * @pcache - [OUT] memory into which cache data is to be filled in. 601 * @size_filled - [OUT] amount of data used up in pcache. 602 * @num_of_entries - [OUT] number of caches added 603 */ 604 static int kfd_fill_gpu_cache_info(struct kfd_dev *kdev, 605 int gpu_processor_id, 606 int available_size, 607 struct kfd_cu_info *cu_info, 608 struct crat_subtype_cache *pcache, 609 int *size_filled, 610 int *num_of_entries) 611 { 612 struct kfd_gpu_cache_info *pcache_info; 613 int num_of_cache_types = 0; 614 int i, j, k; 615 int ct = 0; 616 int mem_available = available_size; 617 unsigned int cu_processor_id; 618 int ret; 619 620 switch (kdev->device_info->asic_family) { 621 case CHIP_KAVERI: 622 pcache_info = kaveri_cache_info; 623 num_of_cache_types = ARRAY_SIZE(kaveri_cache_info); 624 break; 625 case CHIP_HAWAII: 626 pcache_info = hawaii_cache_info; 627 num_of_cache_types = ARRAY_SIZE(hawaii_cache_info); 628 break; 629 case CHIP_CARRIZO: 630 pcache_info = carrizo_cache_info; 631 num_of_cache_types = ARRAY_SIZE(carrizo_cache_info); 632 break; 633 case CHIP_TONGA: 634 pcache_info = tonga_cache_info; 635 num_of_cache_types = ARRAY_SIZE(tonga_cache_info); 636 break; 637 case CHIP_FIJI: 638 pcache_info = fiji_cache_info; 639 num_of_cache_types = ARRAY_SIZE(fiji_cache_info); 640 break; 641 case CHIP_POLARIS10: 642 pcache_info = polaris10_cache_info; 643 num_of_cache_types = ARRAY_SIZE(polaris10_cache_info); 644 break; 645 case CHIP_POLARIS11: 646 pcache_info = polaris11_cache_info; 647 num_of_cache_types = ARRAY_SIZE(polaris11_cache_info); 648 break; 649 case CHIP_VEGA10: 650 case CHIP_VEGA20: 651 pcache_info = vega10_cache_info; 652 num_of_cache_types = ARRAY_SIZE(vega10_cache_info); 653 break; 654 case CHIP_RAVEN: 655 pcache_info = raven_cache_info; 656 num_of_cache_types = ARRAY_SIZE(raven_cache_info); 657 break; 658 default: 659 return -EINVAL; 660 } 661 662 *size_filled = 0; 663 *num_of_entries = 0; 664 665 /* For each type of cache listed in the kfd_gpu_cache_info table, 666 * go through all available Compute Units. 667 * The [i,j,k] loop will 668 * if kfd_gpu_cache_info.num_cu_shared = 1 669 * will parse through all available CU 670 * If (kfd_gpu_cache_info.num_cu_shared != 1) 671 * then it will consider only one CU from 672 * the shared unit 673 */ 674 675 for (ct = 0; ct < num_of_cache_types; ct++) { 676 cu_processor_id = gpu_processor_id; 677 for (i = 0; i < cu_info->num_shader_engines; i++) { 678 for (j = 0; j < cu_info->num_shader_arrays_per_engine; 679 j++) { 680 for (k = 0; k < cu_info->num_cu_per_sh; 681 k += pcache_info[ct].num_cu_shared) { 682 683 ret = fill_in_pcache(pcache, 684 pcache_info, 685 cu_info, 686 mem_available, 687 cu_info->cu_bitmap[i][j], 688 ct, 689 cu_processor_id, 690 k); 691 692 if (ret < 0) 693 break; 694 695 if (!ret) { 696 pcache++; 697 (*num_of_entries)++; 698 mem_available -= 699 sizeof(*pcache); 700 (*size_filled) += 701 sizeof(*pcache); 702 } 703 704 /* Move to next CU block */ 705 cu_processor_id += 706 pcache_info[ct].num_cu_shared; 707 } 708 } 709 } 710 } 711 712 pr_debug("Added [%d] GPU cache entries\n", *num_of_entries); 713 714 return 0; 715 } 716 717 /* 718 * kfd_create_crat_image_acpi - Allocates memory for CRAT image and 719 * copies CRAT from ACPI (if available). 720 * NOTE: Call kfd_destroy_crat_image to free CRAT image memory 721 * 722 * @crat_image: CRAT read from ACPI. If no CRAT in ACPI then 723 * crat_image will be NULL 724 * @size: [OUT] size of crat_image 725 * 726 * Return 0 if successful else return error code 727 */ 728 int kfd_create_crat_image_acpi(void **crat_image, size_t *size) 729 { 730 struct acpi_table_header *crat_table; 731 acpi_status status; 732 void *pcrat_image; 733 734 if (!crat_image) 735 return -EINVAL; 736 737 *crat_image = NULL; 738 739 /* Fetch the CRAT table from ACPI */ 740 status = acpi_get_table(CRAT_SIGNATURE, 0, &crat_table); 741 if (status == AE_NOT_FOUND) { 742 pr_warn("CRAT table not found\n"); 743 return -ENODATA; 744 } else if (ACPI_FAILURE(status)) { 745 const char *err = acpi_format_exception(status); 746 747 pr_err("CRAT table error: %s\n", err); 748 return -EINVAL; 749 } 750 751 if (ignore_crat) { 752 pr_info("CRAT table disabled by module option\n"); 753 return -ENODATA; 754 } 755 756 pcrat_image = kmalloc(crat_table->length, GFP_KERNEL); 757 if (!pcrat_image) 758 return -ENOMEM; 759 760 memcpy(pcrat_image, crat_table, crat_table->length); 761 762 *crat_image = pcrat_image; 763 *size = crat_table->length; 764 765 return 0; 766 } 767 768 /* Memory required to create Virtual CRAT. 769 * Since there is no easy way to predict the amount of memory required, the 770 * following amount are allocated for CPU and GPU Virtual CRAT. This is 771 * expected to cover all known conditions. But to be safe additional check 772 * is put in the code to ensure we don't overwrite. 773 */ 774 #define VCRAT_SIZE_FOR_CPU (2 * PAGE_SIZE) 775 #define VCRAT_SIZE_FOR_GPU (3 * PAGE_SIZE) 776 777 /* kfd_fill_cu_for_cpu - Fill in Compute info for the given CPU NUMA node 778 * 779 * @numa_node_id: CPU NUMA node id 780 * @avail_size: Available size in the memory 781 * @sub_type_hdr: Memory into which compute info will be filled in 782 * 783 * Return 0 if successful else return -ve value 784 */ 785 static int kfd_fill_cu_for_cpu(int numa_node_id, int *avail_size, 786 int proximity_domain, 787 struct crat_subtype_computeunit *sub_type_hdr) 788 { 789 const struct cpumask *cpumask; 790 791 *avail_size -= sizeof(struct crat_subtype_computeunit); 792 if (*avail_size < 0) 793 return -ENOMEM; 794 795 memset(sub_type_hdr, 0, sizeof(struct crat_subtype_computeunit)); 796 797 /* Fill in subtype header data */ 798 sub_type_hdr->type = CRAT_SUBTYPE_COMPUTEUNIT_AFFINITY; 799 sub_type_hdr->length = sizeof(struct crat_subtype_computeunit); 800 sub_type_hdr->flags = CRAT_SUBTYPE_FLAGS_ENABLED; 801 802 cpumask = cpumask_of_node(numa_node_id); 803 804 /* Fill in CU data */ 805 sub_type_hdr->flags |= CRAT_CU_FLAGS_CPU_PRESENT; 806 sub_type_hdr->proximity_domain = proximity_domain; 807 sub_type_hdr->processor_id_low = kfd_numa_node_to_apic_id(numa_node_id); 808 if (sub_type_hdr->processor_id_low == -1) 809 return -EINVAL; 810 811 sub_type_hdr->num_cpu_cores = cpumask_weight(cpumask); 812 813 return 0; 814 } 815 816 /* kfd_fill_mem_info_for_cpu - Fill in Memory info for the given CPU NUMA node 817 * 818 * @numa_node_id: CPU NUMA node id 819 * @avail_size: Available size in the memory 820 * @sub_type_hdr: Memory into which compute info will be filled in 821 * 822 * Return 0 if successful else return -ve value 823 */ 824 static int kfd_fill_mem_info_for_cpu(int numa_node_id, int *avail_size, 825 int proximity_domain, 826 struct crat_subtype_memory *sub_type_hdr) 827 { 828 uint64_t mem_in_bytes = 0; 829 pg_data_t *pgdat; 830 int zone_type; 831 832 *avail_size -= sizeof(struct crat_subtype_memory); 833 if (*avail_size < 0) 834 return -ENOMEM; 835 836 memset(sub_type_hdr, 0, sizeof(struct crat_subtype_memory)); 837 838 /* Fill in subtype header data */ 839 sub_type_hdr->type = CRAT_SUBTYPE_MEMORY_AFFINITY; 840 sub_type_hdr->length = sizeof(struct crat_subtype_memory); 841 sub_type_hdr->flags = CRAT_SUBTYPE_FLAGS_ENABLED; 842 843 /* Fill in Memory Subunit data */ 844 845 /* Unlike si_meminfo, si_meminfo_node is not exported. So 846 * the following lines are duplicated from si_meminfo_node 847 * function 848 */ 849 pgdat = NODE_DATA(numa_node_id); 850 for (zone_type = 0; zone_type < MAX_NR_ZONES; zone_type++) 851 mem_in_bytes += pgdat->node_zones[zone_type].managed_pages; 852 mem_in_bytes <<= PAGE_SHIFT; 853 854 sub_type_hdr->length_low = lower_32_bits(mem_in_bytes); 855 sub_type_hdr->length_high = upper_32_bits(mem_in_bytes); 856 sub_type_hdr->proximity_domain = proximity_domain; 857 858 return 0; 859 } 860 861 static int kfd_fill_iolink_info_for_cpu(int numa_node_id, int *avail_size, 862 uint32_t *num_entries, 863 struct crat_subtype_iolink *sub_type_hdr) 864 { 865 int nid; 866 struct cpuinfo_x86 *c = &cpu_data(0); 867 uint8_t link_type; 868 869 if (c->x86_vendor == X86_VENDOR_AMD) 870 link_type = CRAT_IOLINK_TYPE_HYPERTRANSPORT; 871 else 872 link_type = CRAT_IOLINK_TYPE_QPI_1_1; 873 874 *num_entries = 0; 875 876 /* Create IO links from this node to other CPU nodes */ 877 for_each_online_node(nid) { 878 if (nid == numa_node_id) /* node itself */ 879 continue; 880 881 *avail_size -= sizeof(struct crat_subtype_iolink); 882 if (*avail_size < 0) 883 return -ENOMEM; 884 885 memset(sub_type_hdr, 0, sizeof(struct crat_subtype_iolink)); 886 887 /* Fill in subtype header data */ 888 sub_type_hdr->type = CRAT_SUBTYPE_IOLINK_AFFINITY; 889 sub_type_hdr->length = sizeof(struct crat_subtype_iolink); 890 sub_type_hdr->flags = CRAT_SUBTYPE_FLAGS_ENABLED; 891 892 /* Fill in IO link data */ 893 sub_type_hdr->proximity_domain_from = numa_node_id; 894 sub_type_hdr->proximity_domain_to = nid; 895 sub_type_hdr->io_interface_type = link_type; 896 897 (*num_entries)++; 898 sub_type_hdr++; 899 } 900 901 return 0; 902 } 903 904 /* kfd_create_vcrat_image_cpu - Create Virtual CRAT for CPU 905 * 906 * @pcrat_image: Fill in VCRAT for CPU 907 * @size: [IN] allocated size of crat_image. 908 * [OUT] actual size of data filled in crat_image 909 */ 910 static int kfd_create_vcrat_image_cpu(void *pcrat_image, size_t *size) 911 { 912 struct crat_header *crat_table = (struct crat_header *)pcrat_image; 913 struct acpi_table_header *acpi_table; 914 acpi_status status; 915 struct crat_subtype_generic *sub_type_hdr; 916 int avail_size = *size; 917 int numa_node_id; 918 uint32_t entries = 0; 919 int ret = 0; 920 921 if (!pcrat_image || avail_size < VCRAT_SIZE_FOR_CPU) 922 return -EINVAL; 923 924 /* Fill in CRAT Header. 925 * Modify length and total_entries as subunits are added. 926 */ 927 avail_size -= sizeof(struct crat_header); 928 if (avail_size < 0) 929 return -ENOMEM; 930 931 memset(crat_table, 0, sizeof(struct crat_header)); 932 memcpy(&crat_table->signature, CRAT_SIGNATURE, 933 sizeof(crat_table->signature)); 934 crat_table->length = sizeof(struct crat_header); 935 936 status = acpi_get_table("DSDT", 0, &acpi_table); 937 if (status != AE_OK) 938 pr_warn("DSDT table not found for OEM information\n"); 939 else { 940 crat_table->oem_revision = acpi_table->revision; 941 memcpy(crat_table->oem_id, acpi_table->oem_id, 942 CRAT_OEMID_LENGTH); 943 memcpy(crat_table->oem_table_id, acpi_table->oem_table_id, 944 CRAT_OEMTABLEID_LENGTH); 945 } 946 crat_table->total_entries = 0; 947 crat_table->num_domains = 0; 948 949 sub_type_hdr = (struct crat_subtype_generic *)(crat_table+1); 950 951 for_each_online_node(numa_node_id) { 952 if (kfd_numa_node_to_apic_id(numa_node_id) == -1) 953 continue; 954 955 /* Fill in Subtype: Compute Unit */ 956 ret = kfd_fill_cu_for_cpu(numa_node_id, &avail_size, 957 crat_table->num_domains, 958 (struct crat_subtype_computeunit *)sub_type_hdr); 959 if (ret < 0) 960 return ret; 961 crat_table->length += sub_type_hdr->length; 962 crat_table->total_entries++; 963 964 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr + 965 sub_type_hdr->length); 966 967 /* Fill in Subtype: Memory */ 968 ret = kfd_fill_mem_info_for_cpu(numa_node_id, &avail_size, 969 crat_table->num_domains, 970 (struct crat_subtype_memory *)sub_type_hdr); 971 if (ret < 0) 972 return ret; 973 crat_table->length += sub_type_hdr->length; 974 crat_table->total_entries++; 975 976 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr + 977 sub_type_hdr->length); 978 979 /* Fill in Subtype: IO Link */ 980 ret = kfd_fill_iolink_info_for_cpu(numa_node_id, &avail_size, 981 &entries, 982 (struct crat_subtype_iolink *)sub_type_hdr); 983 if (ret < 0) 984 return ret; 985 crat_table->length += (sub_type_hdr->length * entries); 986 crat_table->total_entries += entries; 987 988 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr + 989 sub_type_hdr->length * entries); 990 991 crat_table->num_domains++; 992 } 993 994 /* TODO: Add cache Subtype for CPU. 995 * Currently, CPU cache information is available in function 996 * detect_cache_attributes(cpu) defined in the file 997 * ./arch/x86/kernel/cpu/intel_cacheinfo.c. This function is not 998 * exported and to get the same information the code needs to be 999 * duplicated. 1000 */ 1001 1002 *size = crat_table->length; 1003 pr_info("Virtual CRAT table created for CPU\n"); 1004 1005 return 0; 1006 } 1007 1008 static int kfd_fill_gpu_memory_affinity(int *avail_size, 1009 struct kfd_dev *kdev, uint8_t type, uint64_t size, 1010 struct crat_subtype_memory *sub_type_hdr, 1011 uint32_t proximity_domain, 1012 const struct kfd_local_mem_info *local_mem_info) 1013 { 1014 *avail_size -= sizeof(struct crat_subtype_memory); 1015 if (*avail_size < 0) 1016 return -ENOMEM; 1017 1018 memset((void *)sub_type_hdr, 0, sizeof(struct crat_subtype_memory)); 1019 sub_type_hdr->type = CRAT_SUBTYPE_MEMORY_AFFINITY; 1020 sub_type_hdr->length = sizeof(struct crat_subtype_memory); 1021 sub_type_hdr->flags |= CRAT_SUBTYPE_FLAGS_ENABLED; 1022 1023 sub_type_hdr->proximity_domain = proximity_domain; 1024 1025 pr_debug("Fill gpu memory affinity - type 0x%x size 0x%llx\n", 1026 type, size); 1027 1028 sub_type_hdr->length_low = lower_32_bits(size); 1029 sub_type_hdr->length_high = upper_32_bits(size); 1030 1031 sub_type_hdr->width = local_mem_info->vram_width; 1032 sub_type_hdr->visibility_type = type; 1033 1034 return 0; 1035 } 1036 1037 /* kfd_fill_gpu_direct_io_link - Fill in direct io link from GPU 1038 * to its NUMA node 1039 * @avail_size: Available size in the memory 1040 * @kdev - [IN] GPU device 1041 * @sub_type_hdr: Memory into which io link info will be filled in 1042 * @proximity_domain - proximity domain of the GPU node 1043 * 1044 * Return 0 if successful else return -ve value 1045 */ 1046 static int kfd_fill_gpu_direct_io_link_to_cpu(int *avail_size, 1047 struct kfd_dev *kdev, 1048 struct crat_subtype_iolink *sub_type_hdr, 1049 uint32_t proximity_domain) 1050 { 1051 *avail_size -= sizeof(struct crat_subtype_iolink); 1052 if (*avail_size < 0) 1053 return -ENOMEM; 1054 1055 memset((void *)sub_type_hdr, 0, sizeof(struct crat_subtype_iolink)); 1056 1057 /* Fill in subtype header data */ 1058 sub_type_hdr->type = CRAT_SUBTYPE_IOLINK_AFFINITY; 1059 sub_type_hdr->length = sizeof(struct crat_subtype_iolink); 1060 sub_type_hdr->flags |= CRAT_SUBTYPE_FLAGS_ENABLED; 1061 if (kfd_dev_is_large_bar(kdev)) 1062 sub_type_hdr->flags |= CRAT_IOLINK_FLAGS_BI_DIRECTIONAL; 1063 1064 /* Fill in IOLINK subtype. 1065 * TODO: Fill-in other fields of iolink subtype 1066 */ 1067 sub_type_hdr->io_interface_type = CRAT_IOLINK_TYPE_PCIEXPRESS; 1068 sub_type_hdr->proximity_domain_from = proximity_domain; 1069 #ifdef CONFIG_NUMA 1070 if (kdev->pdev->dev.numa_node == NUMA_NO_NODE) 1071 sub_type_hdr->proximity_domain_to = 0; 1072 else 1073 sub_type_hdr->proximity_domain_to = kdev->pdev->dev.numa_node; 1074 #else 1075 sub_type_hdr->proximity_domain_to = 0; 1076 #endif 1077 return 0; 1078 } 1079 1080 static int kfd_fill_gpu_xgmi_link_to_gpu(int *avail_size, 1081 struct kfd_dev *kdev, 1082 struct crat_subtype_iolink *sub_type_hdr, 1083 uint32_t proximity_domain_from, 1084 uint32_t proximity_domain_to) 1085 { 1086 *avail_size -= sizeof(struct crat_subtype_iolink); 1087 if (*avail_size < 0) 1088 return -ENOMEM; 1089 1090 memset((void *)sub_type_hdr, 0, sizeof(struct crat_subtype_iolink)); 1091 1092 sub_type_hdr->type = CRAT_SUBTYPE_IOLINK_AFFINITY; 1093 sub_type_hdr->length = sizeof(struct crat_subtype_iolink); 1094 sub_type_hdr->flags |= CRAT_SUBTYPE_FLAGS_ENABLED | 1095 CRAT_IOLINK_FLAGS_BI_DIRECTIONAL; 1096 1097 sub_type_hdr->io_interface_type = CRAT_IOLINK_TYPE_XGMI; 1098 sub_type_hdr->proximity_domain_from = proximity_domain_from; 1099 sub_type_hdr->proximity_domain_to = proximity_domain_to; 1100 return 0; 1101 } 1102 1103 /* kfd_create_vcrat_image_gpu - Create Virtual CRAT for CPU 1104 * 1105 * @pcrat_image: Fill in VCRAT for GPU 1106 * @size: [IN] allocated size of crat_image. 1107 * [OUT] actual size of data filled in crat_image 1108 */ 1109 static int kfd_create_vcrat_image_gpu(void *pcrat_image, 1110 size_t *size, struct kfd_dev *kdev, 1111 uint32_t proximity_domain) 1112 { 1113 struct crat_header *crat_table = (struct crat_header *)pcrat_image; 1114 struct crat_subtype_generic *sub_type_hdr; 1115 struct kfd_local_mem_info local_mem_info; 1116 struct kfd_topology_device *peer_dev; 1117 struct crat_subtype_computeunit *cu; 1118 struct kfd_cu_info cu_info; 1119 int avail_size = *size; 1120 uint32_t total_num_of_cu; 1121 int num_of_cache_entries = 0; 1122 int cache_mem_filled = 0; 1123 uint32_t nid = 0; 1124 int ret = 0; 1125 1126 if (!pcrat_image || avail_size < VCRAT_SIZE_FOR_GPU) 1127 return -EINVAL; 1128 1129 /* Fill the CRAT Header. 1130 * Modify length and total_entries as subunits are added. 1131 */ 1132 avail_size -= sizeof(struct crat_header); 1133 if (avail_size < 0) 1134 return -ENOMEM; 1135 1136 memset(crat_table, 0, sizeof(struct crat_header)); 1137 1138 memcpy(&crat_table->signature, CRAT_SIGNATURE, 1139 sizeof(crat_table->signature)); 1140 /* Change length as we add more subtypes*/ 1141 crat_table->length = sizeof(struct crat_header); 1142 crat_table->num_domains = 1; 1143 crat_table->total_entries = 0; 1144 1145 /* Fill in Subtype: Compute Unit 1146 * First fill in the sub type header and then sub type data 1147 */ 1148 avail_size -= sizeof(struct crat_subtype_computeunit); 1149 if (avail_size < 0) 1150 return -ENOMEM; 1151 1152 sub_type_hdr = (struct crat_subtype_generic *)(crat_table + 1); 1153 memset(sub_type_hdr, 0, sizeof(struct crat_subtype_computeunit)); 1154 1155 sub_type_hdr->type = CRAT_SUBTYPE_COMPUTEUNIT_AFFINITY; 1156 sub_type_hdr->length = sizeof(struct crat_subtype_computeunit); 1157 sub_type_hdr->flags = CRAT_SUBTYPE_FLAGS_ENABLED; 1158 1159 /* Fill CU subtype data */ 1160 cu = (struct crat_subtype_computeunit *)sub_type_hdr; 1161 cu->flags |= CRAT_CU_FLAGS_GPU_PRESENT; 1162 cu->proximity_domain = proximity_domain; 1163 1164 kdev->kfd2kgd->get_cu_info(kdev->kgd, &cu_info); 1165 cu->num_simd_per_cu = cu_info.simd_per_cu; 1166 cu->num_simd_cores = cu_info.simd_per_cu * cu_info.cu_active_number; 1167 cu->max_waves_simd = cu_info.max_waves_per_simd; 1168 1169 cu->wave_front_size = cu_info.wave_front_size; 1170 cu->array_count = cu_info.num_shader_arrays_per_engine * 1171 cu_info.num_shader_engines; 1172 total_num_of_cu = (cu->array_count * cu_info.num_cu_per_sh); 1173 cu->processor_id_low = get_and_inc_gpu_processor_id(total_num_of_cu); 1174 cu->num_cu_per_array = cu_info.num_cu_per_sh; 1175 cu->max_slots_scatch_cu = cu_info.max_scratch_slots_per_cu; 1176 cu->num_banks = cu_info.num_shader_engines; 1177 cu->lds_size_in_kb = cu_info.lds_size; 1178 1179 cu->hsa_capability = 0; 1180 1181 /* Check if this node supports IOMMU. During parsing this flag will 1182 * translate to HSA_CAP_ATS_PRESENT 1183 */ 1184 if (!kfd_iommu_check_device(kdev)) 1185 cu->hsa_capability |= CRAT_CU_FLAGS_IOMMU_PRESENT; 1186 1187 crat_table->length += sub_type_hdr->length; 1188 crat_table->total_entries++; 1189 1190 /* Fill in Subtype: Memory. Only on systems with large BAR (no 1191 * private FB), report memory as public. On other systems 1192 * report the total FB size (public+private) as a single 1193 * private heap. 1194 */ 1195 kdev->kfd2kgd->get_local_mem_info(kdev->kgd, &local_mem_info); 1196 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr + 1197 sub_type_hdr->length); 1198 1199 if (debug_largebar) 1200 local_mem_info.local_mem_size_private = 0; 1201 1202 if (local_mem_info.local_mem_size_private == 0) 1203 ret = kfd_fill_gpu_memory_affinity(&avail_size, 1204 kdev, HSA_MEM_HEAP_TYPE_FB_PUBLIC, 1205 local_mem_info.local_mem_size_public, 1206 (struct crat_subtype_memory *)sub_type_hdr, 1207 proximity_domain, 1208 &local_mem_info); 1209 else 1210 ret = kfd_fill_gpu_memory_affinity(&avail_size, 1211 kdev, HSA_MEM_HEAP_TYPE_FB_PRIVATE, 1212 local_mem_info.local_mem_size_public + 1213 local_mem_info.local_mem_size_private, 1214 (struct crat_subtype_memory *)sub_type_hdr, 1215 proximity_domain, 1216 &local_mem_info); 1217 if (ret < 0) 1218 return ret; 1219 1220 crat_table->length += sizeof(struct crat_subtype_memory); 1221 crat_table->total_entries++; 1222 1223 /* TODO: Fill in cache information. This information is NOT readily 1224 * available in KGD 1225 */ 1226 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr + 1227 sub_type_hdr->length); 1228 ret = kfd_fill_gpu_cache_info(kdev, cu->processor_id_low, 1229 avail_size, 1230 &cu_info, 1231 (struct crat_subtype_cache *)sub_type_hdr, 1232 &cache_mem_filled, 1233 &num_of_cache_entries); 1234 1235 if (ret < 0) 1236 return ret; 1237 1238 crat_table->length += cache_mem_filled; 1239 crat_table->total_entries += num_of_cache_entries; 1240 avail_size -= cache_mem_filled; 1241 1242 /* Fill in Subtype: IO_LINKS 1243 * Only direct links are added here which is Link from GPU to 1244 * to its NUMA node. Indirect links are added by userspace. 1245 */ 1246 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr + 1247 cache_mem_filled); 1248 ret = kfd_fill_gpu_direct_io_link_to_cpu(&avail_size, kdev, 1249 (struct crat_subtype_iolink *)sub_type_hdr, proximity_domain); 1250 1251 if (ret < 0) 1252 return ret; 1253 1254 crat_table->length += sub_type_hdr->length; 1255 crat_table->total_entries++; 1256 1257 1258 /* Fill in Subtype: IO_LINKS 1259 * Direct links from GPU to other GPUs through xGMI. 1260 * We will loop GPUs that already be processed (with lower value 1261 * of proximity_domain), add the link for the GPUs with same 1262 * hive id (from this GPU to other GPU) . The reversed iolink 1263 * (from other GPU to this GPU) will be added 1264 * in kfd_parse_subtype_iolink. 1265 */ 1266 if (kdev->hive_id) { 1267 for (nid = 0; nid < proximity_domain; ++nid) { 1268 peer_dev = kfd_topology_device_by_proximity_domain(nid); 1269 if (!peer_dev->gpu) 1270 continue; 1271 if (peer_dev->gpu->hive_id != kdev->hive_id) 1272 continue; 1273 sub_type_hdr = (typeof(sub_type_hdr))( 1274 (char *)sub_type_hdr + 1275 sizeof(struct crat_subtype_iolink)); 1276 ret = kfd_fill_gpu_xgmi_link_to_gpu( 1277 &avail_size, kdev, 1278 (struct crat_subtype_iolink *)sub_type_hdr, 1279 proximity_domain, nid); 1280 if (ret < 0) 1281 return ret; 1282 crat_table->length += sub_type_hdr->length; 1283 crat_table->total_entries++; 1284 } 1285 } 1286 *size = crat_table->length; 1287 pr_info("Virtual CRAT table created for GPU\n"); 1288 1289 return ret; 1290 } 1291 1292 /* kfd_create_crat_image_virtual - Allocates memory for CRAT image and 1293 * creates a Virtual CRAT (VCRAT) image 1294 * 1295 * NOTE: Call kfd_destroy_crat_image to free CRAT image memory 1296 * 1297 * @crat_image: VCRAT image created because ACPI does not have a 1298 * CRAT for this device 1299 * @size: [OUT] size of virtual crat_image 1300 * @flags: COMPUTE_UNIT_CPU - Create VCRAT for CPU device 1301 * COMPUTE_UNIT_GPU - Create VCRAT for GPU 1302 * (COMPUTE_UNIT_CPU | COMPUTE_UNIT_GPU) - Create VCRAT for APU 1303 * -- this option is not currently implemented. 1304 * The assumption is that all AMD APUs will have CRAT 1305 * @kdev: Valid kfd_device required if flags contain COMPUTE_UNIT_GPU 1306 * 1307 * Return 0 if successful else return -ve value 1308 */ 1309 int kfd_create_crat_image_virtual(void **crat_image, size_t *size, 1310 int flags, struct kfd_dev *kdev, 1311 uint32_t proximity_domain) 1312 { 1313 void *pcrat_image = NULL; 1314 int ret = 0; 1315 1316 if (!crat_image) 1317 return -EINVAL; 1318 1319 *crat_image = NULL; 1320 1321 /* Allocate one VCRAT_SIZE_FOR_CPU for CPU virtual CRAT image and 1322 * VCRAT_SIZE_FOR_GPU for GPU virtual CRAT image. This should cover 1323 * all the current conditions. A check is put not to overwrite beyond 1324 * allocated size 1325 */ 1326 switch (flags) { 1327 case COMPUTE_UNIT_CPU: 1328 pcrat_image = kmalloc(VCRAT_SIZE_FOR_CPU, GFP_KERNEL); 1329 if (!pcrat_image) 1330 return -ENOMEM; 1331 *size = VCRAT_SIZE_FOR_CPU; 1332 ret = kfd_create_vcrat_image_cpu(pcrat_image, size); 1333 break; 1334 case COMPUTE_UNIT_GPU: 1335 if (!kdev) 1336 return -EINVAL; 1337 pcrat_image = kmalloc(VCRAT_SIZE_FOR_GPU, GFP_KERNEL); 1338 if (!pcrat_image) 1339 return -ENOMEM; 1340 *size = VCRAT_SIZE_FOR_GPU; 1341 ret = kfd_create_vcrat_image_gpu(pcrat_image, size, kdev, 1342 proximity_domain); 1343 break; 1344 case (COMPUTE_UNIT_CPU | COMPUTE_UNIT_GPU): 1345 /* TODO: */ 1346 ret = -EINVAL; 1347 pr_err("VCRAT not implemented for APU\n"); 1348 break; 1349 default: 1350 ret = -EINVAL; 1351 } 1352 1353 if (!ret) 1354 *crat_image = pcrat_image; 1355 else 1356 kfree(pcrat_image); 1357 1358 return ret; 1359 } 1360 1361 1362 /* kfd_destroy_crat_image 1363 * 1364 * @crat_image: [IN] - crat_image from kfd_create_crat_image_xxx(..) 1365 * 1366 */ 1367 void kfd_destroy_crat_image(void *crat_image) 1368 { 1369 kfree(crat_image); 1370 } 1371