1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/device.h> 25 #include <linux/export.h> 26 #include <linux/err.h> 27 #include <linux/fs.h> 28 #include <linux/file.h> 29 #include <linux/sched.h> 30 #include <linux/slab.h> 31 #include <linux/uaccess.h> 32 #include <linux/compat.h> 33 #include <uapi/linux/kfd_ioctl.h> 34 #include <linux/time.h> 35 #include <linux/mm.h> 36 #include <linux/mman.h> 37 #include <linux/ptrace.h> 38 #include <linux/dma-buf.h> 39 #include <linux/fdtable.h> 40 #include <linux/processor.h> 41 #include "kfd_priv.h" 42 #include "kfd_device_queue_manager.h" 43 #include "kfd_svm.h" 44 #include "amdgpu_amdkfd.h" 45 #include "kfd_smi_events.h" 46 #include "amdgpu_dma_buf.h" 47 48 static long kfd_ioctl(struct file *, unsigned int, unsigned long); 49 static int kfd_open(struct inode *, struct file *); 50 static int kfd_release(struct inode *, struct file *); 51 static int kfd_mmap(struct file *, struct vm_area_struct *); 52 53 static const char kfd_dev_name[] = "kfd"; 54 55 static const struct file_operations kfd_fops = { 56 .owner = THIS_MODULE, 57 .unlocked_ioctl = kfd_ioctl, 58 .compat_ioctl = compat_ptr_ioctl, 59 .open = kfd_open, 60 .release = kfd_release, 61 .mmap = kfd_mmap, 62 }; 63 64 static int kfd_char_dev_major = -1; 65 static struct class *kfd_class; 66 struct device *kfd_device; 67 68 static inline struct kfd_process_device *kfd_lock_pdd_by_id(struct kfd_process *p, __u32 gpu_id) 69 { 70 struct kfd_process_device *pdd; 71 72 mutex_lock(&p->mutex); 73 pdd = kfd_process_device_data_by_id(p, gpu_id); 74 75 if (pdd) 76 return pdd; 77 78 mutex_unlock(&p->mutex); 79 return NULL; 80 } 81 82 static inline void kfd_unlock_pdd(struct kfd_process_device *pdd) 83 { 84 mutex_unlock(&pdd->process->mutex); 85 } 86 87 int kfd_chardev_init(void) 88 { 89 int err = 0; 90 91 kfd_char_dev_major = register_chrdev(0, kfd_dev_name, &kfd_fops); 92 err = kfd_char_dev_major; 93 if (err < 0) 94 goto err_register_chrdev; 95 96 kfd_class = class_create(THIS_MODULE, kfd_dev_name); 97 err = PTR_ERR(kfd_class); 98 if (IS_ERR(kfd_class)) 99 goto err_class_create; 100 101 kfd_device = device_create(kfd_class, NULL, 102 MKDEV(kfd_char_dev_major, 0), 103 NULL, kfd_dev_name); 104 err = PTR_ERR(kfd_device); 105 if (IS_ERR(kfd_device)) 106 goto err_device_create; 107 108 return 0; 109 110 err_device_create: 111 class_destroy(kfd_class); 112 err_class_create: 113 unregister_chrdev(kfd_char_dev_major, kfd_dev_name); 114 err_register_chrdev: 115 return err; 116 } 117 118 void kfd_chardev_exit(void) 119 { 120 device_destroy(kfd_class, MKDEV(kfd_char_dev_major, 0)); 121 class_destroy(kfd_class); 122 unregister_chrdev(kfd_char_dev_major, kfd_dev_name); 123 kfd_device = NULL; 124 } 125 126 127 static int kfd_open(struct inode *inode, struct file *filep) 128 { 129 struct kfd_process *process; 130 bool is_32bit_user_mode; 131 132 if (iminor(inode) != 0) 133 return -ENODEV; 134 135 is_32bit_user_mode = in_compat_syscall(); 136 137 if (is_32bit_user_mode) { 138 dev_warn(kfd_device, 139 "Process %d (32-bit) failed to open /dev/kfd\n" 140 "32-bit processes are not supported by amdkfd\n", 141 current->pid); 142 return -EPERM; 143 } 144 145 process = kfd_create_process(filep); 146 if (IS_ERR(process)) 147 return PTR_ERR(process); 148 149 if (kfd_is_locked()) { 150 dev_dbg(kfd_device, "kfd is locked!\n" 151 "process %d unreferenced", process->pasid); 152 kfd_unref_process(process); 153 return -EAGAIN; 154 } 155 156 /* filep now owns the reference returned by kfd_create_process */ 157 filep->private_data = process; 158 159 dev_dbg(kfd_device, "process %d opened, compat mode (32 bit) - %d\n", 160 process->pasid, process->is_32bit_user_mode); 161 162 return 0; 163 } 164 165 static int kfd_release(struct inode *inode, struct file *filep) 166 { 167 struct kfd_process *process = filep->private_data; 168 169 if (process) 170 kfd_unref_process(process); 171 172 return 0; 173 } 174 175 static int kfd_ioctl_get_version(struct file *filep, struct kfd_process *p, 176 void *data) 177 { 178 struct kfd_ioctl_get_version_args *args = data; 179 180 args->major_version = KFD_IOCTL_MAJOR_VERSION; 181 args->minor_version = KFD_IOCTL_MINOR_VERSION; 182 183 return 0; 184 } 185 186 static int set_queue_properties_from_user(struct queue_properties *q_properties, 187 struct kfd_ioctl_create_queue_args *args) 188 { 189 if (args->queue_percentage > KFD_MAX_QUEUE_PERCENTAGE) { 190 pr_err("Queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n"); 191 return -EINVAL; 192 } 193 194 if (args->queue_priority > KFD_MAX_QUEUE_PRIORITY) { 195 pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n"); 196 return -EINVAL; 197 } 198 199 if ((args->ring_base_address) && 200 (!access_ok((const void __user *) args->ring_base_address, 201 sizeof(uint64_t)))) { 202 pr_err("Can't access ring base address\n"); 203 return -EFAULT; 204 } 205 206 if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) { 207 pr_err("Ring size must be a power of 2 or 0\n"); 208 return -EINVAL; 209 } 210 211 if (!access_ok((const void __user *) args->read_pointer_address, 212 sizeof(uint32_t))) { 213 pr_err("Can't access read pointer\n"); 214 return -EFAULT; 215 } 216 217 if (!access_ok((const void __user *) args->write_pointer_address, 218 sizeof(uint32_t))) { 219 pr_err("Can't access write pointer\n"); 220 return -EFAULT; 221 } 222 223 if (args->eop_buffer_address && 224 !access_ok((const void __user *) args->eop_buffer_address, 225 sizeof(uint32_t))) { 226 pr_debug("Can't access eop buffer"); 227 return -EFAULT; 228 } 229 230 if (args->ctx_save_restore_address && 231 !access_ok((const void __user *) args->ctx_save_restore_address, 232 sizeof(uint32_t))) { 233 pr_debug("Can't access ctx save restore buffer"); 234 return -EFAULT; 235 } 236 237 q_properties->is_interop = false; 238 q_properties->is_gws = false; 239 q_properties->queue_percent = args->queue_percentage; 240 q_properties->priority = args->queue_priority; 241 q_properties->queue_address = args->ring_base_address; 242 q_properties->queue_size = args->ring_size; 243 q_properties->read_ptr = (uint32_t *) args->read_pointer_address; 244 q_properties->write_ptr = (uint32_t *) args->write_pointer_address; 245 q_properties->eop_ring_buffer_address = args->eop_buffer_address; 246 q_properties->eop_ring_buffer_size = args->eop_buffer_size; 247 q_properties->ctx_save_restore_area_address = 248 args->ctx_save_restore_address; 249 q_properties->ctx_save_restore_area_size = args->ctx_save_restore_size; 250 q_properties->ctl_stack_size = args->ctl_stack_size; 251 if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE || 252 args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL) 253 q_properties->type = KFD_QUEUE_TYPE_COMPUTE; 254 else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA) 255 q_properties->type = KFD_QUEUE_TYPE_SDMA; 256 else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA_XGMI) 257 q_properties->type = KFD_QUEUE_TYPE_SDMA_XGMI; 258 else 259 return -ENOTSUPP; 260 261 if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL) 262 q_properties->format = KFD_QUEUE_FORMAT_AQL; 263 else 264 q_properties->format = KFD_QUEUE_FORMAT_PM4; 265 266 pr_debug("Queue Percentage: %d, %d\n", 267 q_properties->queue_percent, args->queue_percentage); 268 269 pr_debug("Queue Priority: %d, %d\n", 270 q_properties->priority, args->queue_priority); 271 272 pr_debug("Queue Address: 0x%llX, 0x%llX\n", 273 q_properties->queue_address, args->ring_base_address); 274 275 pr_debug("Queue Size: 0x%llX, %u\n", 276 q_properties->queue_size, args->ring_size); 277 278 pr_debug("Queue r/w Pointers: %px, %px\n", 279 q_properties->read_ptr, 280 q_properties->write_ptr); 281 282 pr_debug("Queue Format: %d\n", q_properties->format); 283 284 pr_debug("Queue EOP: 0x%llX\n", q_properties->eop_ring_buffer_address); 285 286 pr_debug("Queue CTX save area: 0x%llX\n", 287 q_properties->ctx_save_restore_area_address); 288 289 return 0; 290 } 291 292 static int kfd_ioctl_create_queue(struct file *filep, struct kfd_process *p, 293 void *data) 294 { 295 struct kfd_ioctl_create_queue_args *args = data; 296 struct kfd_dev *dev; 297 int err = 0; 298 unsigned int queue_id; 299 struct kfd_process_device *pdd; 300 struct queue_properties q_properties; 301 uint32_t doorbell_offset_in_process = 0; 302 303 memset(&q_properties, 0, sizeof(struct queue_properties)); 304 305 pr_debug("Creating queue ioctl\n"); 306 307 err = set_queue_properties_from_user(&q_properties, args); 308 if (err) 309 return err; 310 311 pr_debug("Looking for gpu id 0x%x\n", args->gpu_id); 312 313 mutex_lock(&p->mutex); 314 315 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 316 if (!pdd) { 317 pr_debug("Could not find gpu id 0x%x\n", args->gpu_id); 318 err = -EINVAL; 319 goto err_pdd; 320 } 321 dev = pdd->dev; 322 323 pdd = kfd_bind_process_to_device(dev, p); 324 if (IS_ERR(pdd)) { 325 err = -ESRCH; 326 goto err_bind_process; 327 } 328 329 pr_debug("Creating queue for PASID 0x%x on gpu 0x%x\n", 330 p->pasid, 331 dev->id); 332 333 err = pqm_create_queue(&p->pqm, dev, filep, &q_properties, &queue_id, NULL, NULL, NULL, 334 &doorbell_offset_in_process); 335 if (err != 0) 336 goto err_create_queue; 337 338 args->queue_id = queue_id; 339 340 341 /* Return gpu_id as doorbell offset for mmap usage */ 342 args->doorbell_offset = KFD_MMAP_TYPE_DOORBELL; 343 args->doorbell_offset |= KFD_MMAP_GPU_ID(args->gpu_id); 344 if (KFD_IS_SOC15(dev)) 345 /* On SOC15 ASICs, include the doorbell offset within the 346 * process doorbell frame, which is 2 pages. 347 */ 348 args->doorbell_offset |= doorbell_offset_in_process; 349 350 mutex_unlock(&p->mutex); 351 352 pr_debug("Queue id %d was created successfully\n", args->queue_id); 353 354 pr_debug("Ring buffer address == 0x%016llX\n", 355 args->ring_base_address); 356 357 pr_debug("Read ptr address == 0x%016llX\n", 358 args->read_pointer_address); 359 360 pr_debug("Write ptr address == 0x%016llX\n", 361 args->write_pointer_address); 362 363 return 0; 364 365 err_create_queue: 366 err_bind_process: 367 err_pdd: 368 mutex_unlock(&p->mutex); 369 return err; 370 } 371 372 static int kfd_ioctl_destroy_queue(struct file *filp, struct kfd_process *p, 373 void *data) 374 { 375 int retval; 376 struct kfd_ioctl_destroy_queue_args *args = data; 377 378 pr_debug("Destroying queue id %d for pasid 0x%x\n", 379 args->queue_id, 380 p->pasid); 381 382 mutex_lock(&p->mutex); 383 384 retval = pqm_destroy_queue(&p->pqm, args->queue_id); 385 386 mutex_unlock(&p->mutex); 387 return retval; 388 } 389 390 static int kfd_ioctl_update_queue(struct file *filp, struct kfd_process *p, 391 void *data) 392 { 393 int retval; 394 struct kfd_ioctl_update_queue_args *args = data; 395 struct queue_properties properties; 396 397 if (args->queue_percentage > KFD_MAX_QUEUE_PERCENTAGE) { 398 pr_err("Queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n"); 399 return -EINVAL; 400 } 401 402 if (args->queue_priority > KFD_MAX_QUEUE_PRIORITY) { 403 pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n"); 404 return -EINVAL; 405 } 406 407 if ((args->ring_base_address) && 408 (!access_ok((const void __user *) args->ring_base_address, 409 sizeof(uint64_t)))) { 410 pr_err("Can't access ring base address\n"); 411 return -EFAULT; 412 } 413 414 if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) { 415 pr_err("Ring size must be a power of 2 or 0\n"); 416 return -EINVAL; 417 } 418 419 properties.queue_address = args->ring_base_address; 420 properties.queue_size = args->ring_size; 421 properties.queue_percent = args->queue_percentage; 422 properties.priority = args->queue_priority; 423 424 pr_debug("Updating queue id %d for pasid 0x%x\n", 425 args->queue_id, p->pasid); 426 427 mutex_lock(&p->mutex); 428 429 retval = pqm_update_queue_properties(&p->pqm, args->queue_id, &properties); 430 431 mutex_unlock(&p->mutex); 432 433 return retval; 434 } 435 436 static int kfd_ioctl_set_cu_mask(struct file *filp, struct kfd_process *p, 437 void *data) 438 { 439 int retval; 440 const int max_num_cus = 1024; 441 struct kfd_ioctl_set_cu_mask_args *args = data; 442 struct mqd_update_info minfo = {0}; 443 uint32_t __user *cu_mask_ptr = (uint32_t __user *)args->cu_mask_ptr; 444 size_t cu_mask_size = sizeof(uint32_t) * (args->num_cu_mask / 32); 445 446 if ((args->num_cu_mask % 32) != 0) { 447 pr_debug("num_cu_mask 0x%x must be a multiple of 32", 448 args->num_cu_mask); 449 return -EINVAL; 450 } 451 452 minfo.cu_mask.count = args->num_cu_mask; 453 if (minfo.cu_mask.count == 0) { 454 pr_debug("CU mask cannot be 0"); 455 return -EINVAL; 456 } 457 458 /* To prevent an unreasonably large CU mask size, set an arbitrary 459 * limit of max_num_cus bits. We can then just drop any CU mask bits 460 * past max_num_cus bits and just use the first max_num_cus bits. 461 */ 462 if (minfo.cu_mask.count > max_num_cus) { 463 pr_debug("CU mask cannot be greater than 1024 bits"); 464 minfo.cu_mask.count = max_num_cus; 465 cu_mask_size = sizeof(uint32_t) * (max_num_cus/32); 466 } 467 468 minfo.cu_mask.ptr = kzalloc(cu_mask_size, GFP_KERNEL); 469 if (!minfo.cu_mask.ptr) 470 return -ENOMEM; 471 472 retval = copy_from_user(minfo.cu_mask.ptr, cu_mask_ptr, cu_mask_size); 473 if (retval) { 474 pr_debug("Could not copy CU mask from userspace"); 475 retval = -EFAULT; 476 goto out; 477 } 478 479 minfo.update_flag = UPDATE_FLAG_CU_MASK; 480 481 mutex_lock(&p->mutex); 482 483 retval = pqm_update_mqd(&p->pqm, args->queue_id, &minfo); 484 485 mutex_unlock(&p->mutex); 486 487 out: 488 kfree(minfo.cu_mask.ptr); 489 return retval; 490 } 491 492 static int kfd_ioctl_get_queue_wave_state(struct file *filep, 493 struct kfd_process *p, void *data) 494 { 495 struct kfd_ioctl_get_queue_wave_state_args *args = data; 496 int r; 497 498 mutex_lock(&p->mutex); 499 500 r = pqm_get_wave_state(&p->pqm, args->queue_id, 501 (void __user *)args->ctl_stack_address, 502 &args->ctl_stack_used_size, 503 &args->save_area_used_size); 504 505 mutex_unlock(&p->mutex); 506 507 return r; 508 } 509 510 static int kfd_ioctl_set_memory_policy(struct file *filep, 511 struct kfd_process *p, void *data) 512 { 513 struct kfd_ioctl_set_memory_policy_args *args = data; 514 int err = 0; 515 struct kfd_process_device *pdd; 516 enum cache_policy default_policy, alternate_policy; 517 518 if (args->default_policy != KFD_IOC_CACHE_POLICY_COHERENT 519 && args->default_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) { 520 return -EINVAL; 521 } 522 523 if (args->alternate_policy != KFD_IOC_CACHE_POLICY_COHERENT 524 && args->alternate_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) { 525 return -EINVAL; 526 } 527 528 mutex_lock(&p->mutex); 529 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 530 if (!pdd) { 531 pr_debug("Could not find gpu id 0x%x\n", args->gpu_id); 532 err = -EINVAL; 533 goto err_pdd; 534 } 535 536 pdd = kfd_bind_process_to_device(pdd->dev, p); 537 if (IS_ERR(pdd)) { 538 err = -ESRCH; 539 goto out; 540 } 541 542 default_policy = (args->default_policy == KFD_IOC_CACHE_POLICY_COHERENT) 543 ? cache_policy_coherent : cache_policy_noncoherent; 544 545 alternate_policy = 546 (args->alternate_policy == KFD_IOC_CACHE_POLICY_COHERENT) 547 ? cache_policy_coherent : cache_policy_noncoherent; 548 549 if (!pdd->dev->dqm->ops.set_cache_memory_policy(pdd->dev->dqm, 550 &pdd->qpd, 551 default_policy, 552 alternate_policy, 553 (void __user *)args->alternate_aperture_base, 554 args->alternate_aperture_size)) 555 err = -EINVAL; 556 557 out: 558 err_pdd: 559 mutex_unlock(&p->mutex); 560 561 return err; 562 } 563 564 static int kfd_ioctl_set_trap_handler(struct file *filep, 565 struct kfd_process *p, void *data) 566 { 567 struct kfd_ioctl_set_trap_handler_args *args = data; 568 int err = 0; 569 struct kfd_process_device *pdd; 570 571 mutex_lock(&p->mutex); 572 573 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 574 if (!pdd) { 575 err = -EINVAL; 576 goto err_pdd; 577 } 578 579 pdd = kfd_bind_process_to_device(pdd->dev, p); 580 if (IS_ERR(pdd)) { 581 err = -ESRCH; 582 goto out; 583 } 584 585 kfd_process_set_trap_handler(&pdd->qpd, args->tba_addr, args->tma_addr); 586 587 out: 588 err_pdd: 589 mutex_unlock(&p->mutex); 590 591 return err; 592 } 593 594 static int kfd_ioctl_dbg_register(struct file *filep, 595 struct kfd_process *p, void *data) 596 { 597 return -EPERM; 598 } 599 600 static int kfd_ioctl_dbg_unregister(struct file *filep, 601 struct kfd_process *p, void *data) 602 { 603 return -EPERM; 604 } 605 606 static int kfd_ioctl_dbg_address_watch(struct file *filep, 607 struct kfd_process *p, void *data) 608 { 609 return -EPERM; 610 } 611 612 /* Parse and generate fixed size data structure for wave control */ 613 static int kfd_ioctl_dbg_wave_control(struct file *filep, 614 struct kfd_process *p, void *data) 615 { 616 return -EPERM; 617 } 618 619 static int kfd_ioctl_get_clock_counters(struct file *filep, 620 struct kfd_process *p, void *data) 621 { 622 struct kfd_ioctl_get_clock_counters_args *args = data; 623 struct kfd_process_device *pdd; 624 625 mutex_lock(&p->mutex); 626 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 627 mutex_unlock(&p->mutex); 628 if (pdd) 629 /* Reading GPU clock counter from KGD */ 630 args->gpu_clock_counter = amdgpu_amdkfd_get_gpu_clock_counter(pdd->dev->adev); 631 else 632 /* Node without GPU resource */ 633 args->gpu_clock_counter = 0; 634 635 /* No access to rdtsc. Using raw monotonic time */ 636 args->cpu_clock_counter = ktime_get_raw_ns(); 637 args->system_clock_counter = ktime_get_boottime_ns(); 638 639 /* Since the counter is in nano-seconds we use 1GHz frequency */ 640 args->system_clock_freq = 1000000000; 641 642 return 0; 643 } 644 645 646 static int kfd_ioctl_get_process_apertures(struct file *filp, 647 struct kfd_process *p, void *data) 648 { 649 struct kfd_ioctl_get_process_apertures_args *args = data; 650 struct kfd_process_device_apertures *pAperture; 651 int i; 652 653 dev_dbg(kfd_device, "get apertures for PASID 0x%x", p->pasid); 654 655 args->num_of_nodes = 0; 656 657 mutex_lock(&p->mutex); 658 /* Run over all pdd of the process */ 659 for (i = 0; i < p->n_pdds; i++) { 660 struct kfd_process_device *pdd = p->pdds[i]; 661 662 pAperture = 663 &args->process_apertures[args->num_of_nodes]; 664 pAperture->gpu_id = pdd->dev->id; 665 pAperture->lds_base = pdd->lds_base; 666 pAperture->lds_limit = pdd->lds_limit; 667 pAperture->gpuvm_base = pdd->gpuvm_base; 668 pAperture->gpuvm_limit = pdd->gpuvm_limit; 669 pAperture->scratch_base = pdd->scratch_base; 670 pAperture->scratch_limit = pdd->scratch_limit; 671 672 dev_dbg(kfd_device, 673 "node id %u\n", args->num_of_nodes); 674 dev_dbg(kfd_device, 675 "gpu id %u\n", pdd->dev->id); 676 dev_dbg(kfd_device, 677 "lds_base %llX\n", pdd->lds_base); 678 dev_dbg(kfd_device, 679 "lds_limit %llX\n", pdd->lds_limit); 680 dev_dbg(kfd_device, 681 "gpuvm_base %llX\n", pdd->gpuvm_base); 682 dev_dbg(kfd_device, 683 "gpuvm_limit %llX\n", pdd->gpuvm_limit); 684 dev_dbg(kfd_device, 685 "scratch_base %llX\n", pdd->scratch_base); 686 dev_dbg(kfd_device, 687 "scratch_limit %llX\n", pdd->scratch_limit); 688 689 if (++args->num_of_nodes >= NUM_OF_SUPPORTED_GPUS) 690 break; 691 } 692 mutex_unlock(&p->mutex); 693 694 return 0; 695 } 696 697 static int kfd_ioctl_get_process_apertures_new(struct file *filp, 698 struct kfd_process *p, void *data) 699 { 700 struct kfd_ioctl_get_process_apertures_new_args *args = data; 701 struct kfd_process_device_apertures *pa; 702 int ret; 703 int i; 704 705 dev_dbg(kfd_device, "get apertures for PASID 0x%x", p->pasid); 706 707 if (args->num_of_nodes == 0) { 708 /* Return number of nodes, so that user space can alloacate 709 * sufficient memory 710 */ 711 mutex_lock(&p->mutex); 712 args->num_of_nodes = p->n_pdds; 713 goto out_unlock; 714 } 715 716 /* Fill in process-aperture information for all available 717 * nodes, but not more than args->num_of_nodes as that is 718 * the amount of memory allocated by user 719 */ 720 pa = kzalloc((sizeof(struct kfd_process_device_apertures) * 721 args->num_of_nodes), GFP_KERNEL); 722 if (!pa) 723 return -ENOMEM; 724 725 mutex_lock(&p->mutex); 726 727 if (!p->n_pdds) { 728 args->num_of_nodes = 0; 729 kfree(pa); 730 goto out_unlock; 731 } 732 733 /* Run over all pdd of the process */ 734 for (i = 0; i < min(p->n_pdds, args->num_of_nodes); i++) { 735 struct kfd_process_device *pdd = p->pdds[i]; 736 737 pa[i].gpu_id = pdd->dev->id; 738 pa[i].lds_base = pdd->lds_base; 739 pa[i].lds_limit = pdd->lds_limit; 740 pa[i].gpuvm_base = pdd->gpuvm_base; 741 pa[i].gpuvm_limit = pdd->gpuvm_limit; 742 pa[i].scratch_base = pdd->scratch_base; 743 pa[i].scratch_limit = pdd->scratch_limit; 744 745 dev_dbg(kfd_device, 746 "gpu id %u\n", pdd->dev->id); 747 dev_dbg(kfd_device, 748 "lds_base %llX\n", pdd->lds_base); 749 dev_dbg(kfd_device, 750 "lds_limit %llX\n", pdd->lds_limit); 751 dev_dbg(kfd_device, 752 "gpuvm_base %llX\n", pdd->gpuvm_base); 753 dev_dbg(kfd_device, 754 "gpuvm_limit %llX\n", pdd->gpuvm_limit); 755 dev_dbg(kfd_device, 756 "scratch_base %llX\n", pdd->scratch_base); 757 dev_dbg(kfd_device, 758 "scratch_limit %llX\n", pdd->scratch_limit); 759 } 760 mutex_unlock(&p->mutex); 761 762 args->num_of_nodes = i; 763 ret = copy_to_user( 764 (void __user *)args->kfd_process_device_apertures_ptr, 765 pa, 766 (i * sizeof(struct kfd_process_device_apertures))); 767 kfree(pa); 768 return ret ? -EFAULT : 0; 769 770 out_unlock: 771 mutex_unlock(&p->mutex); 772 return 0; 773 } 774 775 static int kfd_ioctl_create_event(struct file *filp, struct kfd_process *p, 776 void *data) 777 { 778 struct kfd_ioctl_create_event_args *args = data; 779 int err; 780 781 /* For dGPUs the event page is allocated in user mode. The 782 * handle is passed to KFD with the first call to this IOCTL 783 * through the event_page_offset field. 784 */ 785 if (args->event_page_offset) { 786 mutex_lock(&p->mutex); 787 err = kfd_kmap_event_page(p, args->event_page_offset); 788 mutex_unlock(&p->mutex); 789 if (err) 790 return err; 791 } 792 793 err = kfd_event_create(filp, p, args->event_type, 794 args->auto_reset != 0, args->node_id, 795 &args->event_id, &args->event_trigger_data, 796 &args->event_page_offset, 797 &args->event_slot_index); 798 799 pr_debug("Created event (id:0x%08x) (%s)\n", args->event_id, __func__); 800 return err; 801 } 802 803 static int kfd_ioctl_destroy_event(struct file *filp, struct kfd_process *p, 804 void *data) 805 { 806 struct kfd_ioctl_destroy_event_args *args = data; 807 808 return kfd_event_destroy(p, args->event_id); 809 } 810 811 static int kfd_ioctl_set_event(struct file *filp, struct kfd_process *p, 812 void *data) 813 { 814 struct kfd_ioctl_set_event_args *args = data; 815 816 return kfd_set_event(p, args->event_id); 817 } 818 819 static int kfd_ioctl_reset_event(struct file *filp, struct kfd_process *p, 820 void *data) 821 { 822 struct kfd_ioctl_reset_event_args *args = data; 823 824 return kfd_reset_event(p, args->event_id); 825 } 826 827 static int kfd_ioctl_wait_events(struct file *filp, struct kfd_process *p, 828 void *data) 829 { 830 struct kfd_ioctl_wait_events_args *args = data; 831 int err; 832 833 err = kfd_wait_on_events(p, args->num_events, 834 (void __user *)args->events_ptr, 835 (args->wait_for_all != 0), 836 args->timeout, &args->wait_result); 837 838 return err; 839 } 840 static int kfd_ioctl_set_scratch_backing_va(struct file *filep, 841 struct kfd_process *p, void *data) 842 { 843 struct kfd_ioctl_set_scratch_backing_va_args *args = data; 844 struct kfd_process_device *pdd; 845 struct kfd_dev *dev; 846 long err; 847 848 mutex_lock(&p->mutex); 849 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 850 if (!pdd) { 851 err = -EINVAL; 852 goto err_pdd; 853 } 854 dev = pdd->dev; 855 856 pdd = kfd_bind_process_to_device(dev, p); 857 if (IS_ERR(pdd)) { 858 err = PTR_ERR(pdd); 859 goto bind_process_to_device_fail; 860 } 861 862 pdd->qpd.sh_hidden_private_base = args->va_addr; 863 864 mutex_unlock(&p->mutex); 865 866 if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS && 867 pdd->qpd.vmid != 0 && dev->kfd2kgd->set_scratch_backing_va) 868 dev->kfd2kgd->set_scratch_backing_va( 869 dev->adev, args->va_addr, pdd->qpd.vmid); 870 871 return 0; 872 873 bind_process_to_device_fail: 874 err_pdd: 875 mutex_unlock(&p->mutex); 876 return err; 877 } 878 879 static int kfd_ioctl_get_tile_config(struct file *filep, 880 struct kfd_process *p, void *data) 881 { 882 struct kfd_ioctl_get_tile_config_args *args = data; 883 struct kfd_process_device *pdd; 884 struct tile_config config; 885 int err = 0; 886 887 mutex_lock(&p->mutex); 888 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 889 mutex_unlock(&p->mutex); 890 if (!pdd) 891 return -EINVAL; 892 893 amdgpu_amdkfd_get_tile_config(pdd->dev->adev, &config); 894 895 args->gb_addr_config = config.gb_addr_config; 896 args->num_banks = config.num_banks; 897 args->num_ranks = config.num_ranks; 898 899 if (args->num_tile_configs > config.num_tile_configs) 900 args->num_tile_configs = config.num_tile_configs; 901 err = copy_to_user((void __user *)args->tile_config_ptr, 902 config.tile_config_ptr, 903 args->num_tile_configs * sizeof(uint32_t)); 904 if (err) { 905 args->num_tile_configs = 0; 906 return -EFAULT; 907 } 908 909 if (args->num_macro_tile_configs > config.num_macro_tile_configs) 910 args->num_macro_tile_configs = 911 config.num_macro_tile_configs; 912 err = copy_to_user((void __user *)args->macro_tile_config_ptr, 913 config.macro_tile_config_ptr, 914 args->num_macro_tile_configs * sizeof(uint32_t)); 915 if (err) { 916 args->num_macro_tile_configs = 0; 917 return -EFAULT; 918 } 919 920 return 0; 921 } 922 923 static int kfd_ioctl_acquire_vm(struct file *filep, struct kfd_process *p, 924 void *data) 925 { 926 struct kfd_ioctl_acquire_vm_args *args = data; 927 struct kfd_process_device *pdd; 928 struct file *drm_file; 929 int ret; 930 931 drm_file = fget(args->drm_fd); 932 if (!drm_file) 933 return -EINVAL; 934 935 mutex_lock(&p->mutex); 936 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 937 if (!pdd) { 938 ret = -EINVAL; 939 goto err_pdd; 940 } 941 942 if (pdd->drm_file) { 943 ret = pdd->drm_file == drm_file ? 0 : -EBUSY; 944 goto err_drm_file; 945 } 946 947 ret = kfd_process_device_init_vm(pdd, drm_file); 948 if (ret) 949 goto err_unlock; 950 951 /* On success, the PDD keeps the drm_file reference */ 952 mutex_unlock(&p->mutex); 953 954 return 0; 955 956 err_unlock: 957 err_pdd: 958 err_drm_file: 959 mutex_unlock(&p->mutex); 960 fput(drm_file); 961 return ret; 962 } 963 964 bool kfd_dev_is_large_bar(struct kfd_dev *dev) 965 { 966 if (debug_largebar) { 967 pr_debug("Simulate large-bar allocation on non large-bar machine\n"); 968 return true; 969 } 970 971 if (dev->use_iommu_v2) 972 return false; 973 974 if (dev->local_mem_info.local_mem_size_private == 0 && 975 dev->local_mem_info.local_mem_size_public > 0) 976 return true; 977 return false; 978 } 979 980 static int kfd_ioctl_get_available_memory(struct file *filep, 981 struct kfd_process *p, void *data) 982 { 983 struct kfd_ioctl_get_available_memory_args *args = data; 984 struct kfd_process_device *pdd = kfd_lock_pdd_by_id(p, args->gpu_id); 985 986 if (!pdd) 987 return -EINVAL; 988 args->available = amdgpu_amdkfd_get_available_memory(pdd->dev->adev); 989 kfd_unlock_pdd(pdd); 990 return 0; 991 } 992 993 static int kfd_ioctl_alloc_memory_of_gpu(struct file *filep, 994 struct kfd_process *p, void *data) 995 { 996 struct kfd_ioctl_alloc_memory_of_gpu_args *args = data; 997 struct kfd_process_device *pdd; 998 void *mem; 999 struct kfd_dev *dev; 1000 int idr_handle; 1001 long err; 1002 uint64_t offset = args->mmap_offset; 1003 uint32_t flags = args->flags; 1004 1005 if (args->size == 0) 1006 return -EINVAL; 1007 1008 #if IS_ENABLED(CONFIG_HSA_AMD_SVM) 1009 /* Flush pending deferred work to avoid racing with deferred actions 1010 * from previous memory map changes (e.g. munmap). 1011 */ 1012 svm_range_list_lock_and_flush_work(&p->svms, current->mm); 1013 mutex_lock(&p->svms.lock); 1014 mmap_write_unlock(current->mm); 1015 if (interval_tree_iter_first(&p->svms.objects, 1016 args->va_addr >> PAGE_SHIFT, 1017 (args->va_addr + args->size - 1) >> PAGE_SHIFT)) { 1018 pr_err("Address: 0x%llx already allocated by SVM\n", 1019 args->va_addr); 1020 mutex_unlock(&p->svms.lock); 1021 return -EADDRINUSE; 1022 } 1023 mutex_unlock(&p->svms.lock); 1024 #endif 1025 mutex_lock(&p->mutex); 1026 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 1027 if (!pdd) { 1028 err = -EINVAL; 1029 goto err_pdd; 1030 } 1031 1032 dev = pdd->dev; 1033 1034 if ((flags & KFD_IOC_ALLOC_MEM_FLAGS_PUBLIC) && 1035 (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) && 1036 !kfd_dev_is_large_bar(dev)) { 1037 pr_err("Alloc host visible vram on small bar is not allowed\n"); 1038 err = -EINVAL; 1039 goto err_large_bar; 1040 } 1041 1042 pdd = kfd_bind_process_to_device(dev, p); 1043 if (IS_ERR(pdd)) { 1044 err = PTR_ERR(pdd); 1045 goto err_unlock; 1046 } 1047 1048 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) { 1049 if (args->size != kfd_doorbell_process_slice(dev)) { 1050 err = -EINVAL; 1051 goto err_unlock; 1052 } 1053 offset = kfd_get_process_doorbells(pdd); 1054 } else if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 1055 if (args->size != PAGE_SIZE) { 1056 err = -EINVAL; 1057 goto err_unlock; 1058 } 1059 offset = dev->adev->rmmio_remap.bus_addr; 1060 if (!offset) { 1061 err = -ENOMEM; 1062 goto err_unlock; 1063 } 1064 } 1065 1066 err = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu( 1067 dev->adev, args->va_addr, args->size, 1068 pdd->drm_priv, (struct kgd_mem **) &mem, &offset, 1069 flags, false); 1070 1071 if (err) 1072 goto err_unlock; 1073 1074 idr_handle = kfd_process_device_create_obj_handle(pdd, mem); 1075 if (idr_handle < 0) { 1076 err = -EFAULT; 1077 goto err_free; 1078 } 1079 1080 /* Update the VRAM usage count */ 1081 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) 1082 WRITE_ONCE(pdd->vram_usage, pdd->vram_usage + args->size); 1083 1084 mutex_unlock(&p->mutex); 1085 1086 args->handle = MAKE_HANDLE(args->gpu_id, idr_handle); 1087 args->mmap_offset = offset; 1088 1089 /* MMIO is mapped through kfd device 1090 * Generate a kfd mmap offset 1091 */ 1092 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) 1093 args->mmap_offset = KFD_MMAP_TYPE_MMIO 1094 | KFD_MMAP_GPU_ID(args->gpu_id); 1095 1096 return 0; 1097 1098 err_free: 1099 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(dev->adev, (struct kgd_mem *)mem, 1100 pdd->drm_priv, NULL); 1101 err_unlock: 1102 err_pdd: 1103 err_large_bar: 1104 mutex_unlock(&p->mutex); 1105 return err; 1106 } 1107 1108 static int kfd_ioctl_free_memory_of_gpu(struct file *filep, 1109 struct kfd_process *p, void *data) 1110 { 1111 struct kfd_ioctl_free_memory_of_gpu_args *args = data; 1112 struct kfd_process_device *pdd; 1113 void *mem; 1114 int ret; 1115 uint64_t size = 0; 1116 1117 mutex_lock(&p->mutex); 1118 /* 1119 * Safeguard to prevent user space from freeing signal BO. 1120 * It will be freed at process termination. 1121 */ 1122 if (p->signal_handle && (p->signal_handle == args->handle)) { 1123 pr_err("Free signal BO is not allowed\n"); 1124 ret = -EPERM; 1125 goto err_unlock; 1126 } 1127 1128 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1129 if (!pdd) { 1130 pr_err("Process device data doesn't exist\n"); 1131 ret = -EINVAL; 1132 goto err_pdd; 1133 } 1134 1135 mem = kfd_process_device_translate_handle( 1136 pdd, GET_IDR_HANDLE(args->handle)); 1137 if (!mem) { 1138 ret = -EINVAL; 1139 goto err_unlock; 1140 } 1141 1142 ret = amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, 1143 (struct kgd_mem *)mem, pdd->drm_priv, &size); 1144 1145 /* If freeing the buffer failed, leave the handle in place for 1146 * clean-up during process tear-down. 1147 */ 1148 if (!ret) 1149 kfd_process_device_remove_obj_handle( 1150 pdd, GET_IDR_HANDLE(args->handle)); 1151 1152 WRITE_ONCE(pdd->vram_usage, pdd->vram_usage - size); 1153 1154 err_unlock: 1155 err_pdd: 1156 mutex_unlock(&p->mutex); 1157 return ret; 1158 } 1159 1160 static int kfd_ioctl_map_memory_to_gpu(struct file *filep, 1161 struct kfd_process *p, void *data) 1162 { 1163 struct kfd_ioctl_map_memory_to_gpu_args *args = data; 1164 struct kfd_process_device *pdd, *peer_pdd; 1165 void *mem; 1166 struct kfd_dev *dev; 1167 long err = 0; 1168 int i; 1169 uint32_t *devices_arr = NULL; 1170 1171 if (!args->n_devices) { 1172 pr_debug("Device IDs array empty\n"); 1173 return -EINVAL; 1174 } 1175 if (args->n_success > args->n_devices) { 1176 pr_debug("n_success exceeds n_devices\n"); 1177 return -EINVAL; 1178 } 1179 1180 devices_arr = kmalloc_array(args->n_devices, sizeof(*devices_arr), 1181 GFP_KERNEL); 1182 if (!devices_arr) 1183 return -ENOMEM; 1184 1185 err = copy_from_user(devices_arr, 1186 (void __user *)args->device_ids_array_ptr, 1187 args->n_devices * sizeof(*devices_arr)); 1188 if (err != 0) { 1189 err = -EFAULT; 1190 goto copy_from_user_failed; 1191 } 1192 1193 mutex_lock(&p->mutex); 1194 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1195 if (!pdd) { 1196 err = -EINVAL; 1197 goto get_process_device_data_failed; 1198 } 1199 dev = pdd->dev; 1200 1201 pdd = kfd_bind_process_to_device(dev, p); 1202 if (IS_ERR(pdd)) { 1203 err = PTR_ERR(pdd); 1204 goto bind_process_to_device_failed; 1205 } 1206 1207 mem = kfd_process_device_translate_handle(pdd, 1208 GET_IDR_HANDLE(args->handle)); 1209 if (!mem) { 1210 err = -ENOMEM; 1211 goto get_mem_obj_from_handle_failed; 1212 } 1213 1214 for (i = args->n_success; i < args->n_devices; i++) { 1215 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1216 if (!peer_pdd) { 1217 pr_debug("Getting device by id failed for 0x%x\n", 1218 devices_arr[i]); 1219 err = -EINVAL; 1220 goto get_mem_obj_from_handle_failed; 1221 } 1222 1223 peer_pdd = kfd_bind_process_to_device(peer_pdd->dev, p); 1224 if (IS_ERR(peer_pdd)) { 1225 err = PTR_ERR(peer_pdd); 1226 goto get_mem_obj_from_handle_failed; 1227 } 1228 1229 err = amdgpu_amdkfd_gpuvm_map_memory_to_gpu( 1230 peer_pdd->dev->adev, (struct kgd_mem *)mem, 1231 peer_pdd->drm_priv); 1232 if (err) { 1233 struct pci_dev *pdev = peer_pdd->dev->adev->pdev; 1234 1235 dev_err(dev->adev->dev, 1236 "Failed to map peer:%04x:%02x:%02x.%d mem_domain:%d\n", 1237 pci_domain_nr(pdev->bus), 1238 pdev->bus->number, 1239 PCI_SLOT(pdev->devfn), 1240 PCI_FUNC(pdev->devfn), 1241 ((struct kgd_mem *)mem)->domain); 1242 goto map_memory_to_gpu_failed; 1243 } 1244 args->n_success = i+1; 1245 } 1246 1247 mutex_unlock(&p->mutex); 1248 1249 err = amdgpu_amdkfd_gpuvm_sync_memory(dev->adev, (struct kgd_mem *) mem, true); 1250 if (err) { 1251 pr_debug("Sync memory failed, wait interrupted by user signal\n"); 1252 goto sync_memory_failed; 1253 } 1254 1255 /* Flush TLBs after waiting for the page table updates to complete */ 1256 for (i = 0; i < args->n_devices; i++) { 1257 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1258 if (WARN_ON_ONCE(!peer_pdd)) 1259 continue; 1260 kfd_flush_tlb(peer_pdd, TLB_FLUSH_LEGACY); 1261 } 1262 kfree(devices_arr); 1263 1264 return err; 1265 1266 get_process_device_data_failed: 1267 bind_process_to_device_failed: 1268 get_mem_obj_from_handle_failed: 1269 map_memory_to_gpu_failed: 1270 mutex_unlock(&p->mutex); 1271 copy_from_user_failed: 1272 sync_memory_failed: 1273 kfree(devices_arr); 1274 1275 return err; 1276 } 1277 1278 static int kfd_ioctl_unmap_memory_from_gpu(struct file *filep, 1279 struct kfd_process *p, void *data) 1280 { 1281 struct kfd_ioctl_unmap_memory_from_gpu_args *args = data; 1282 struct kfd_process_device *pdd, *peer_pdd; 1283 void *mem; 1284 long err = 0; 1285 uint32_t *devices_arr = NULL, i; 1286 1287 if (!args->n_devices) { 1288 pr_debug("Device IDs array empty\n"); 1289 return -EINVAL; 1290 } 1291 if (args->n_success > args->n_devices) { 1292 pr_debug("n_success exceeds n_devices\n"); 1293 return -EINVAL; 1294 } 1295 1296 devices_arr = kmalloc_array(args->n_devices, sizeof(*devices_arr), 1297 GFP_KERNEL); 1298 if (!devices_arr) 1299 return -ENOMEM; 1300 1301 err = copy_from_user(devices_arr, 1302 (void __user *)args->device_ids_array_ptr, 1303 args->n_devices * sizeof(*devices_arr)); 1304 if (err != 0) { 1305 err = -EFAULT; 1306 goto copy_from_user_failed; 1307 } 1308 1309 mutex_lock(&p->mutex); 1310 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1311 if (!pdd) { 1312 err = -EINVAL; 1313 goto bind_process_to_device_failed; 1314 } 1315 1316 mem = kfd_process_device_translate_handle(pdd, 1317 GET_IDR_HANDLE(args->handle)); 1318 if (!mem) { 1319 err = -ENOMEM; 1320 goto get_mem_obj_from_handle_failed; 1321 } 1322 1323 for (i = args->n_success; i < args->n_devices; i++) { 1324 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1325 if (!peer_pdd) { 1326 err = -EINVAL; 1327 goto get_mem_obj_from_handle_failed; 1328 } 1329 err = amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu( 1330 peer_pdd->dev->adev, (struct kgd_mem *)mem, peer_pdd->drm_priv); 1331 if (err) { 1332 pr_err("Failed to unmap from gpu %d/%d\n", 1333 i, args->n_devices); 1334 goto unmap_memory_from_gpu_failed; 1335 } 1336 args->n_success = i+1; 1337 } 1338 mutex_unlock(&p->mutex); 1339 1340 if (kfd_flush_tlb_after_unmap(pdd->dev)) { 1341 err = amdgpu_amdkfd_gpuvm_sync_memory(pdd->dev->adev, 1342 (struct kgd_mem *) mem, true); 1343 if (err) { 1344 pr_debug("Sync memory failed, wait interrupted by user signal\n"); 1345 goto sync_memory_failed; 1346 } 1347 1348 /* Flush TLBs after waiting for the page table updates to complete */ 1349 for (i = 0; i < args->n_devices; i++) { 1350 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1351 if (WARN_ON_ONCE(!peer_pdd)) 1352 continue; 1353 kfd_flush_tlb(peer_pdd, TLB_FLUSH_HEAVYWEIGHT); 1354 } 1355 } 1356 kfree(devices_arr); 1357 1358 return 0; 1359 1360 bind_process_to_device_failed: 1361 get_mem_obj_from_handle_failed: 1362 unmap_memory_from_gpu_failed: 1363 mutex_unlock(&p->mutex); 1364 copy_from_user_failed: 1365 sync_memory_failed: 1366 kfree(devices_arr); 1367 return err; 1368 } 1369 1370 static int kfd_ioctl_alloc_queue_gws(struct file *filep, 1371 struct kfd_process *p, void *data) 1372 { 1373 int retval; 1374 struct kfd_ioctl_alloc_queue_gws_args *args = data; 1375 struct queue *q; 1376 struct kfd_dev *dev; 1377 1378 mutex_lock(&p->mutex); 1379 q = pqm_get_user_queue(&p->pqm, args->queue_id); 1380 1381 if (q) { 1382 dev = q->device; 1383 } else { 1384 retval = -EINVAL; 1385 goto out_unlock; 1386 } 1387 1388 if (!dev->gws) { 1389 retval = -ENODEV; 1390 goto out_unlock; 1391 } 1392 1393 if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) { 1394 retval = -ENODEV; 1395 goto out_unlock; 1396 } 1397 1398 retval = pqm_set_gws(&p->pqm, args->queue_id, args->num_gws ? dev->gws : NULL); 1399 mutex_unlock(&p->mutex); 1400 1401 args->first_gws = 0; 1402 return retval; 1403 1404 out_unlock: 1405 mutex_unlock(&p->mutex); 1406 return retval; 1407 } 1408 1409 static int kfd_ioctl_get_dmabuf_info(struct file *filep, 1410 struct kfd_process *p, void *data) 1411 { 1412 struct kfd_ioctl_get_dmabuf_info_args *args = data; 1413 struct kfd_dev *dev = NULL; 1414 struct amdgpu_device *dmabuf_adev; 1415 void *metadata_buffer = NULL; 1416 uint32_t flags; 1417 unsigned int i; 1418 int r; 1419 1420 /* Find a KFD GPU device that supports the get_dmabuf_info query */ 1421 for (i = 0; kfd_topology_enum_kfd_devices(i, &dev) == 0; i++) 1422 if (dev) 1423 break; 1424 if (!dev) 1425 return -EINVAL; 1426 1427 if (args->metadata_ptr) { 1428 metadata_buffer = kzalloc(args->metadata_size, GFP_KERNEL); 1429 if (!metadata_buffer) 1430 return -ENOMEM; 1431 } 1432 1433 /* Get dmabuf info from KGD */ 1434 r = amdgpu_amdkfd_get_dmabuf_info(dev->adev, args->dmabuf_fd, 1435 &dmabuf_adev, &args->size, 1436 metadata_buffer, args->metadata_size, 1437 &args->metadata_size, &flags); 1438 if (r) 1439 goto exit; 1440 1441 /* Reverse-lookup gpu_id from kgd pointer */ 1442 dev = kfd_device_by_adev(dmabuf_adev); 1443 if (!dev) { 1444 r = -EINVAL; 1445 goto exit; 1446 } 1447 args->gpu_id = dev->id; 1448 args->flags = flags; 1449 1450 /* Copy metadata buffer to user mode */ 1451 if (metadata_buffer) { 1452 r = copy_to_user((void __user *)args->metadata_ptr, 1453 metadata_buffer, args->metadata_size); 1454 if (r != 0) 1455 r = -EFAULT; 1456 } 1457 1458 exit: 1459 kfree(metadata_buffer); 1460 1461 return r; 1462 } 1463 1464 static int kfd_ioctl_import_dmabuf(struct file *filep, 1465 struct kfd_process *p, void *data) 1466 { 1467 struct kfd_ioctl_import_dmabuf_args *args = data; 1468 struct kfd_process_device *pdd; 1469 struct dma_buf *dmabuf; 1470 int idr_handle; 1471 uint64_t size; 1472 void *mem; 1473 int r; 1474 1475 dmabuf = dma_buf_get(args->dmabuf_fd); 1476 if (IS_ERR(dmabuf)) 1477 return PTR_ERR(dmabuf); 1478 1479 mutex_lock(&p->mutex); 1480 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 1481 if (!pdd) { 1482 r = -EINVAL; 1483 goto err_unlock; 1484 } 1485 1486 pdd = kfd_bind_process_to_device(pdd->dev, p); 1487 if (IS_ERR(pdd)) { 1488 r = PTR_ERR(pdd); 1489 goto err_unlock; 1490 } 1491 1492 r = amdgpu_amdkfd_gpuvm_import_dmabuf(pdd->dev->adev, dmabuf, 1493 args->va_addr, pdd->drm_priv, 1494 (struct kgd_mem **)&mem, &size, 1495 NULL); 1496 if (r) 1497 goto err_unlock; 1498 1499 idr_handle = kfd_process_device_create_obj_handle(pdd, mem); 1500 if (idr_handle < 0) { 1501 r = -EFAULT; 1502 goto err_free; 1503 } 1504 1505 mutex_unlock(&p->mutex); 1506 dma_buf_put(dmabuf); 1507 1508 args->handle = MAKE_HANDLE(args->gpu_id, idr_handle); 1509 1510 return 0; 1511 1512 err_free: 1513 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, (struct kgd_mem *)mem, 1514 pdd->drm_priv, NULL); 1515 err_unlock: 1516 mutex_unlock(&p->mutex); 1517 dma_buf_put(dmabuf); 1518 return r; 1519 } 1520 1521 /* Handle requests for watching SMI events */ 1522 static int kfd_ioctl_smi_events(struct file *filep, 1523 struct kfd_process *p, void *data) 1524 { 1525 struct kfd_ioctl_smi_events_args *args = data; 1526 struct kfd_process_device *pdd; 1527 1528 mutex_lock(&p->mutex); 1529 1530 pdd = kfd_process_device_data_by_id(p, args->gpuid); 1531 mutex_unlock(&p->mutex); 1532 if (!pdd) 1533 return -EINVAL; 1534 1535 return kfd_smi_event_open(pdd->dev, &args->anon_fd); 1536 } 1537 1538 static int kfd_ioctl_set_xnack_mode(struct file *filep, 1539 struct kfd_process *p, void *data) 1540 { 1541 struct kfd_ioctl_set_xnack_mode_args *args = data; 1542 int r = 0; 1543 1544 mutex_lock(&p->mutex); 1545 if (args->xnack_enabled >= 0) { 1546 if (!list_empty(&p->pqm.queues)) { 1547 pr_debug("Process has user queues running\n"); 1548 mutex_unlock(&p->mutex); 1549 return -EBUSY; 1550 } 1551 if (args->xnack_enabled && !kfd_process_xnack_mode(p, true)) 1552 r = -EPERM; 1553 else 1554 p->xnack_enabled = args->xnack_enabled; 1555 } else { 1556 args->xnack_enabled = p->xnack_enabled; 1557 } 1558 mutex_unlock(&p->mutex); 1559 1560 return r; 1561 } 1562 1563 #if IS_ENABLED(CONFIG_HSA_AMD_SVM) 1564 static int kfd_ioctl_svm(struct file *filep, struct kfd_process *p, void *data) 1565 { 1566 struct kfd_ioctl_svm_args *args = data; 1567 int r = 0; 1568 1569 pr_debug("start 0x%llx size 0x%llx op 0x%x nattr 0x%x\n", 1570 args->start_addr, args->size, args->op, args->nattr); 1571 1572 if ((args->start_addr & ~PAGE_MASK) || (args->size & ~PAGE_MASK)) 1573 return -EINVAL; 1574 if (!args->start_addr || !args->size) 1575 return -EINVAL; 1576 1577 r = svm_ioctl(p, args->op, args->start_addr, args->size, args->nattr, 1578 args->attrs); 1579 1580 return r; 1581 } 1582 #else 1583 static int kfd_ioctl_svm(struct file *filep, struct kfd_process *p, void *data) 1584 { 1585 return -EPERM; 1586 } 1587 #endif 1588 1589 static int criu_checkpoint_process(struct kfd_process *p, 1590 uint8_t __user *user_priv_data, 1591 uint64_t *priv_offset) 1592 { 1593 struct kfd_criu_process_priv_data process_priv; 1594 int ret; 1595 1596 memset(&process_priv, 0, sizeof(process_priv)); 1597 1598 process_priv.version = KFD_CRIU_PRIV_VERSION; 1599 /* For CR, we don't consider negative xnack mode which is used for 1600 * querying without changing it, here 0 simply means disabled and 1 1601 * means enabled so retry for finding a valid PTE. 1602 */ 1603 process_priv.xnack_mode = p->xnack_enabled ? 1 : 0; 1604 1605 ret = copy_to_user(user_priv_data + *priv_offset, 1606 &process_priv, sizeof(process_priv)); 1607 1608 if (ret) { 1609 pr_err("Failed to copy process information to user\n"); 1610 ret = -EFAULT; 1611 } 1612 1613 *priv_offset += sizeof(process_priv); 1614 return ret; 1615 } 1616 1617 static int criu_checkpoint_devices(struct kfd_process *p, 1618 uint32_t num_devices, 1619 uint8_t __user *user_addr, 1620 uint8_t __user *user_priv_data, 1621 uint64_t *priv_offset) 1622 { 1623 struct kfd_criu_device_priv_data *device_priv = NULL; 1624 struct kfd_criu_device_bucket *device_buckets = NULL; 1625 int ret = 0, i; 1626 1627 device_buckets = kvzalloc(num_devices * sizeof(*device_buckets), GFP_KERNEL); 1628 if (!device_buckets) { 1629 ret = -ENOMEM; 1630 goto exit; 1631 } 1632 1633 device_priv = kvzalloc(num_devices * sizeof(*device_priv), GFP_KERNEL); 1634 if (!device_priv) { 1635 ret = -ENOMEM; 1636 goto exit; 1637 } 1638 1639 for (i = 0; i < num_devices; i++) { 1640 struct kfd_process_device *pdd = p->pdds[i]; 1641 1642 device_buckets[i].user_gpu_id = pdd->user_gpu_id; 1643 device_buckets[i].actual_gpu_id = pdd->dev->id; 1644 1645 /* 1646 * priv_data does not contain useful information for now and is reserved for 1647 * future use, so we do not set its contents. 1648 */ 1649 } 1650 1651 ret = copy_to_user(user_addr, device_buckets, num_devices * sizeof(*device_buckets)); 1652 if (ret) { 1653 pr_err("Failed to copy device information to user\n"); 1654 ret = -EFAULT; 1655 goto exit; 1656 } 1657 1658 ret = copy_to_user(user_priv_data + *priv_offset, 1659 device_priv, 1660 num_devices * sizeof(*device_priv)); 1661 if (ret) { 1662 pr_err("Failed to copy device information to user\n"); 1663 ret = -EFAULT; 1664 } 1665 *priv_offset += num_devices * sizeof(*device_priv); 1666 1667 exit: 1668 kvfree(device_buckets); 1669 kvfree(device_priv); 1670 return ret; 1671 } 1672 1673 static uint32_t get_process_num_bos(struct kfd_process *p) 1674 { 1675 uint32_t num_of_bos = 0; 1676 int i; 1677 1678 /* Run over all PDDs of the process */ 1679 for (i = 0; i < p->n_pdds; i++) { 1680 struct kfd_process_device *pdd = p->pdds[i]; 1681 void *mem; 1682 int id; 1683 1684 idr_for_each_entry(&pdd->alloc_idr, mem, id) { 1685 struct kgd_mem *kgd_mem = (struct kgd_mem *)mem; 1686 1687 if ((uint64_t)kgd_mem->va > pdd->gpuvm_base) 1688 num_of_bos++; 1689 } 1690 } 1691 return num_of_bos; 1692 } 1693 1694 static int criu_get_prime_handle(struct drm_gem_object *gobj, int flags, 1695 u32 *shared_fd) 1696 { 1697 struct dma_buf *dmabuf; 1698 int ret; 1699 1700 dmabuf = amdgpu_gem_prime_export(gobj, flags); 1701 if (IS_ERR(dmabuf)) { 1702 ret = PTR_ERR(dmabuf); 1703 pr_err("dmabuf export failed for the BO\n"); 1704 return ret; 1705 } 1706 1707 ret = dma_buf_fd(dmabuf, flags); 1708 if (ret < 0) { 1709 pr_err("dmabuf create fd failed, ret:%d\n", ret); 1710 goto out_free_dmabuf; 1711 } 1712 1713 *shared_fd = ret; 1714 return 0; 1715 1716 out_free_dmabuf: 1717 dma_buf_put(dmabuf); 1718 return ret; 1719 } 1720 1721 static int criu_checkpoint_bos(struct kfd_process *p, 1722 uint32_t num_bos, 1723 uint8_t __user *user_bos, 1724 uint8_t __user *user_priv_data, 1725 uint64_t *priv_offset) 1726 { 1727 struct kfd_criu_bo_bucket *bo_buckets; 1728 struct kfd_criu_bo_priv_data *bo_privs; 1729 int ret = 0, pdd_index, bo_index = 0, id; 1730 void *mem; 1731 1732 bo_buckets = kvzalloc(num_bos * sizeof(*bo_buckets), GFP_KERNEL); 1733 if (!bo_buckets) 1734 return -ENOMEM; 1735 1736 bo_privs = kvzalloc(num_bos * sizeof(*bo_privs), GFP_KERNEL); 1737 if (!bo_privs) { 1738 ret = -ENOMEM; 1739 goto exit; 1740 } 1741 1742 for (pdd_index = 0; pdd_index < p->n_pdds; pdd_index++) { 1743 struct kfd_process_device *pdd = p->pdds[pdd_index]; 1744 struct amdgpu_bo *dumper_bo; 1745 struct kgd_mem *kgd_mem; 1746 1747 idr_for_each_entry(&pdd->alloc_idr, mem, id) { 1748 struct kfd_criu_bo_bucket *bo_bucket; 1749 struct kfd_criu_bo_priv_data *bo_priv; 1750 int i, dev_idx = 0; 1751 1752 if (!mem) { 1753 ret = -ENOMEM; 1754 goto exit; 1755 } 1756 1757 kgd_mem = (struct kgd_mem *)mem; 1758 dumper_bo = kgd_mem->bo; 1759 1760 if ((uint64_t)kgd_mem->va <= pdd->gpuvm_base) 1761 continue; 1762 1763 bo_bucket = &bo_buckets[bo_index]; 1764 bo_priv = &bo_privs[bo_index]; 1765 1766 bo_bucket->gpu_id = pdd->user_gpu_id; 1767 bo_bucket->addr = (uint64_t)kgd_mem->va; 1768 bo_bucket->size = amdgpu_bo_size(dumper_bo); 1769 bo_bucket->alloc_flags = (uint32_t)kgd_mem->alloc_flags; 1770 bo_priv->idr_handle = id; 1771 1772 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) { 1773 ret = amdgpu_ttm_tt_get_userptr(&dumper_bo->tbo, 1774 &bo_priv->user_addr); 1775 if (ret) { 1776 pr_err("Failed to obtain user address for user-pointer bo\n"); 1777 goto exit; 1778 } 1779 } 1780 if (bo_bucket->alloc_flags 1781 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) { 1782 ret = criu_get_prime_handle(&dumper_bo->tbo.base, 1783 bo_bucket->alloc_flags & 1784 KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE ? DRM_RDWR : 0, 1785 &bo_bucket->dmabuf_fd); 1786 if (ret) 1787 goto exit; 1788 } else { 1789 bo_bucket->dmabuf_fd = KFD_INVALID_FD; 1790 } 1791 1792 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) 1793 bo_bucket->offset = KFD_MMAP_TYPE_DOORBELL | 1794 KFD_MMAP_GPU_ID(pdd->dev->id); 1795 else if (bo_bucket->alloc_flags & 1796 KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) 1797 bo_bucket->offset = KFD_MMAP_TYPE_MMIO | 1798 KFD_MMAP_GPU_ID(pdd->dev->id); 1799 else 1800 bo_bucket->offset = amdgpu_bo_mmap_offset(dumper_bo); 1801 1802 for (i = 0; i < p->n_pdds; i++) { 1803 if (amdgpu_amdkfd_bo_mapped_to_dev(p->pdds[i]->dev->adev, kgd_mem)) 1804 bo_priv->mapped_gpuids[dev_idx++] = p->pdds[i]->user_gpu_id; 1805 } 1806 1807 pr_debug("bo_size = 0x%llx, bo_addr = 0x%llx bo_offset = 0x%llx\n" 1808 "gpu_id = 0x%x alloc_flags = 0x%x idr_handle = 0x%x", 1809 bo_bucket->size, 1810 bo_bucket->addr, 1811 bo_bucket->offset, 1812 bo_bucket->gpu_id, 1813 bo_bucket->alloc_flags, 1814 bo_priv->idr_handle); 1815 bo_index++; 1816 } 1817 } 1818 1819 ret = copy_to_user(user_bos, bo_buckets, num_bos * sizeof(*bo_buckets)); 1820 if (ret) { 1821 pr_err("Failed to copy BO information to user\n"); 1822 ret = -EFAULT; 1823 goto exit; 1824 } 1825 1826 ret = copy_to_user(user_priv_data + *priv_offset, bo_privs, num_bos * sizeof(*bo_privs)); 1827 if (ret) { 1828 pr_err("Failed to copy BO priv information to user\n"); 1829 ret = -EFAULT; 1830 goto exit; 1831 } 1832 1833 *priv_offset += num_bos * sizeof(*bo_privs); 1834 1835 exit: 1836 while (ret && bo_index--) { 1837 if (bo_buckets[bo_index].alloc_flags 1838 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) 1839 close_fd(bo_buckets[bo_index].dmabuf_fd); 1840 } 1841 1842 kvfree(bo_buckets); 1843 kvfree(bo_privs); 1844 return ret; 1845 } 1846 1847 static int criu_get_process_object_info(struct kfd_process *p, 1848 uint32_t *num_devices, 1849 uint32_t *num_bos, 1850 uint32_t *num_objects, 1851 uint64_t *objs_priv_size) 1852 { 1853 uint64_t queues_priv_data_size, svm_priv_data_size, priv_size; 1854 uint32_t num_queues, num_events, num_svm_ranges; 1855 int ret; 1856 1857 *num_devices = p->n_pdds; 1858 *num_bos = get_process_num_bos(p); 1859 1860 ret = kfd_process_get_queue_info(p, &num_queues, &queues_priv_data_size); 1861 if (ret) 1862 return ret; 1863 1864 num_events = kfd_get_num_events(p); 1865 1866 ret = svm_range_get_info(p, &num_svm_ranges, &svm_priv_data_size); 1867 if (ret) 1868 return ret; 1869 1870 *num_objects = num_queues + num_events + num_svm_ranges; 1871 1872 if (objs_priv_size) { 1873 priv_size = sizeof(struct kfd_criu_process_priv_data); 1874 priv_size += *num_devices * sizeof(struct kfd_criu_device_priv_data); 1875 priv_size += *num_bos * sizeof(struct kfd_criu_bo_priv_data); 1876 priv_size += queues_priv_data_size; 1877 priv_size += num_events * sizeof(struct kfd_criu_event_priv_data); 1878 priv_size += svm_priv_data_size; 1879 *objs_priv_size = priv_size; 1880 } 1881 return 0; 1882 } 1883 1884 static int criu_checkpoint(struct file *filep, 1885 struct kfd_process *p, 1886 struct kfd_ioctl_criu_args *args) 1887 { 1888 int ret; 1889 uint32_t num_devices, num_bos, num_objects; 1890 uint64_t priv_size, priv_offset = 0; 1891 1892 if (!args->devices || !args->bos || !args->priv_data) 1893 return -EINVAL; 1894 1895 mutex_lock(&p->mutex); 1896 1897 if (!p->n_pdds) { 1898 pr_err("No pdd for given process\n"); 1899 ret = -ENODEV; 1900 goto exit_unlock; 1901 } 1902 1903 /* Confirm all process queues are evicted */ 1904 if (!p->queues_paused) { 1905 pr_err("Cannot dump process when queues are not in evicted state\n"); 1906 /* CRIU plugin did not call op PROCESS_INFO before checkpointing */ 1907 ret = -EINVAL; 1908 goto exit_unlock; 1909 } 1910 1911 ret = criu_get_process_object_info(p, &num_devices, &num_bos, &num_objects, &priv_size); 1912 if (ret) 1913 goto exit_unlock; 1914 1915 if (num_devices != args->num_devices || 1916 num_bos != args->num_bos || 1917 num_objects != args->num_objects || 1918 priv_size != args->priv_data_size) { 1919 1920 ret = -EINVAL; 1921 goto exit_unlock; 1922 } 1923 1924 /* each function will store private data inside priv_data and adjust priv_offset */ 1925 ret = criu_checkpoint_process(p, (uint8_t __user *)args->priv_data, &priv_offset); 1926 if (ret) 1927 goto exit_unlock; 1928 1929 ret = criu_checkpoint_devices(p, num_devices, (uint8_t __user *)args->devices, 1930 (uint8_t __user *)args->priv_data, &priv_offset); 1931 if (ret) 1932 goto exit_unlock; 1933 1934 ret = criu_checkpoint_bos(p, num_bos, (uint8_t __user *)args->bos, 1935 (uint8_t __user *)args->priv_data, &priv_offset); 1936 if (ret) 1937 goto exit_unlock; 1938 1939 if (num_objects) { 1940 ret = kfd_criu_checkpoint_queues(p, (uint8_t __user *)args->priv_data, 1941 &priv_offset); 1942 if (ret) 1943 goto close_bo_fds; 1944 1945 ret = kfd_criu_checkpoint_events(p, (uint8_t __user *)args->priv_data, 1946 &priv_offset); 1947 if (ret) 1948 goto close_bo_fds; 1949 1950 ret = kfd_criu_checkpoint_svm(p, (uint8_t __user *)args->priv_data, &priv_offset); 1951 if (ret) 1952 goto close_bo_fds; 1953 } 1954 1955 close_bo_fds: 1956 if (ret) { 1957 /* If IOCTL returns err, user assumes all FDs opened in criu_dump_bos are closed */ 1958 uint32_t i; 1959 struct kfd_criu_bo_bucket *bo_buckets = (struct kfd_criu_bo_bucket *) args->bos; 1960 1961 for (i = 0; i < num_bos; i++) { 1962 if (bo_buckets[i].alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) 1963 close_fd(bo_buckets[i].dmabuf_fd); 1964 } 1965 } 1966 1967 exit_unlock: 1968 mutex_unlock(&p->mutex); 1969 if (ret) 1970 pr_err("Failed to dump CRIU ret:%d\n", ret); 1971 else 1972 pr_debug("CRIU dump ret:%d\n", ret); 1973 1974 return ret; 1975 } 1976 1977 static int criu_restore_process(struct kfd_process *p, 1978 struct kfd_ioctl_criu_args *args, 1979 uint64_t *priv_offset, 1980 uint64_t max_priv_data_size) 1981 { 1982 int ret = 0; 1983 struct kfd_criu_process_priv_data process_priv; 1984 1985 if (*priv_offset + sizeof(process_priv) > max_priv_data_size) 1986 return -EINVAL; 1987 1988 ret = copy_from_user(&process_priv, 1989 (void __user *)(args->priv_data + *priv_offset), 1990 sizeof(process_priv)); 1991 if (ret) { 1992 pr_err("Failed to copy process private information from user\n"); 1993 ret = -EFAULT; 1994 goto exit; 1995 } 1996 *priv_offset += sizeof(process_priv); 1997 1998 if (process_priv.version != KFD_CRIU_PRIV_VERSION) { 1999 pr_err("Invalid CRIU API version (checkpointed:%d current:%d)\n", 2000 process_priv.version, KFD_CRIU_PRIV_VERSION); 2001 return -EINVAL; 2002 } 2003 2004 pr_debug("Setting XNACK mode\n"); 2005 if (process_priv.xnack_mode && !kfd_process_xnack_mode(p, true)) { 2006 pr_err("xnack mode cannot be set\n"); 2007 ret = -EPERM; 2008 goto exit; 2009 } else { 2010 pr_debug("set xnack mode: %d\n", process_priv.xnack_mode); 2011 p->xnack_enabled = process_priv.xnack_mode; 2012 } 2013 2014 exit: 2015 return ret; 2016 } 2017 2018 static int criu_restore_devices(struct kfd_process *p, 2019 struct kfd_ioctl_criu_args *args, 2020 uint64_t *priv_offset, 2021 uint64_t max_priv_data_size) 2022 { 2023 struct kfd_criu_device_bucket *device_buckets; 2024 struct kfd_criu_device_priv_data *device_privs; 2025 int ret = 0; 2026 uint32_t i; 2027 2028 if (args->num_devices != p->n_pdds) 2029 return -EINVAL; 2030 2031 if (*priv_offset + (args->num_devices * sizeof(*device_privs)) > max_priv_data_size) 2032 return -EINVAL; 2033 2034 device_buckets = kmalloc_array(args->num_devices, sizeof(*device_buckets), GFP_KERNEL); 2035 if (!device_buckets) 2036 return -ENOMEM; 2037 2038 ret = copy_from_user(device_buckets, (void __user *)args->devices, 2039 args->num_devices * sizeof(*device_buckets)); 2040 if (ret) { 2041 pr_err("Failed to copy devices buckets from user\n"); 2042 ret = -EFAULT; 2043 goto exit; 2044 } 2045 2046 for (i = 0; i < args->num_devices; i++) { 2047 struct kfd_dev *dev; 2048 struct kfd_process_device *pdd; 2049 struct file *drm_file; 2050 2051 /* device private data is not currently used */ 2052 2053 if (!device_buckets[i].user_gpu_id) { 2054 pr_err("Invalid user gpu_id\n"); 2055 ret = -EINVAL; 2056 goto exit; 2057 } 2058 2059 dev = kfd_device_by_id(device_buckets[i].actual_gpu_id); 2060 if (!dev) { 2061 pr_err("Failed to find device with gpu_id = %x\n", 2062 device_buckets[i].actual_gpu_id); 2063 ret = -EINVAL; 2064 goto exit; 2065 } 2066 2067 pdd = kfd_get_process_device_data(dev, p); 2068 if (!pdd) { 2069 pr_err("Failed to get pdd for gpu_id = %x\n", 2070 device_buckets[i].actual_gpu_id); 2071 ret = -EINVAL; 2072 goto exit; 2073 } 2074 pdd->user_gpu_id = device_buckets[i].user_gpu_id; 2075 2076 drm_file = fget(device_buckets[i].drm_fd); 2077 if (!drm_file) { 2078 pr_err("Invalid render node file descriptor sent from plugin (%d)\n", 2079 device_buckets[i].drm_fd); 2080 ret = -EINVAL; 2081 goto exit; 2082 } 2083 2084 if (pdd->drm_file) { 2085 ret = -EINVAL; 2086 goto exit; 2087 } 2088 2089 /* create the vm using render nodes for kfd pdd */ 2090 if (kfd_process_device_init_vm(pdd, drm_file)) { 2091 pr_err("could not init vm for given pdd\n"); 2092 /* On success, the PDD keeps the drm_file reference */ 2093 fput(drm_file); 2094 ret = -EINVAL; 2095 goto exit; 2096 } 2097 /* 2098 * pdd now already has the vm bound to render node so below api won't create a new 2099 * exclusive kfd mapping but use existing one with renderDXXX but is still needed 2100 * for iommu v2 binding and runtime pm. 2101 */ 2102 pdd = kfd_bind_process_to_device(dev, p); 2103 if (IS_ERR(pdd)) { 2104 ret = PTR_ERR(pdd); 2105 goto exit; 2106 } 2107 } 2108 2109 /* 2110 * We are not copying device private data from user as we are not using the data for now, 2111 * but we still adjust for its private data. 2112 */ 2113 *priv_offset += args->num_devices * sizeof(*device_privs); 2114 2115 exit: 2116 kfree(device_buckets); 2117 return ret; 2118 } 2119 2120 static int criu_restore_memory_of_gpu(struct kfd_process_device *pdd, 2121 struct kfd_criu_bo_bucket *bo_bucket, 2122 struct kfd_criu_bo_priv_data *bo_priv, 2123 struct kgd_mem **kgd_mem) 2124 { 2125 int idr_handle; 2126 int ret; 2127 const bool criu_resume = true; 2128 u64 offset; 2129 2130 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) { 2131 if (bo_bucket->size != kfd_doorbell_process_slice(pdd->dev)) 2132 return -EINVAL; 2133 2134 offset = kfd_get_process_doorbells(pdd); 2135 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 2136 /* MMIO BOs need remapped bus address */ 2137 if (bo_bucket->size != PAGE_SIZE) { 2138 pr_err("Invalid page size\n"); 2139 return -EINVAL; 2140 } 2141 offset = pdd->dev->adev->rmmio_remap.bus_addr; 2142 if (!offset) { 2143 pr_err("amdgpu_amdkfd_get_mmio_remap_phys_addr failed\n"); 2144 return -ENOMEM; 2145 } 2146 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) { 2147 offset = bo_priv->user_addr; 2148 } 2149 /* Create the BO */ 2150 ret = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(pdd->dev->adev, bo_bucket->addr, 2151 bo_bucket->size, pdd->drm_priv, kgd_mem, 2152 &offset, bo_bucket->alloc_flags, criu_resume); 2153 if (ret) { 2154 pr_err("Could not create the BO\n"); 2155 return ret; 2156 } 2157 pr_debug("New BO created: size:0x%llx addr:0x%llx offset:0x%llx\n", 2158 bo_bucket->size, bo_bucket->addr, offset); 2159 2160 /* Restore previous IDR handle */ 2161 pr_debug("Restoring old IDR handle for the BO"); 2162 idr_handle = idr_alloc(&pdd->alloc_idr, *kgd_mem, bo_priv->idr_handle, 2163 bo_priv->idr_handle + 1, GFP_KERNEL); 2164 2165 if (idr_handle < 0) { 2166 pr_err("Could not allocate idr\n"); 2167 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, *kgd_mem, pdd->drm_priv, 2168 NULL); 2169 return -ENOMEM; 2170 } 2171 2172 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) 2173 bo_bucket->restored_offset = KFD_MMAP_TYPE_DOORBELL | KFD_MMAP_GPU_ID(pdd->dev->id); 2174 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 2175 bo_bucket->restored_offset = KFD_MMAP_TYPE_MMIO | KFD_MMAP_GPU_ID(pdd->dev->id); 2176 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_GTT) { 2177 bo_bucket->restored_offset = offset; 2178 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) { 2179 bo_bucket->restored_offset = offset; 2180 /* Update the VRAM usage count */ 2181 WRITE_ONCE(pdd->vram_usage, pdd->vram_usage + bo_bucket->size); 2182 } 2183 return 0; 2184 } 2185 2186 static int criu_restore_bo(struct kfd_process *p, 2187 struct kfd_criu_bo_bucket *bo_bucket, 2188 struct kfd_criu_bo_priv_data *bo_priv) 2189 { 2190 struct kfd_process_device *pdd; 2191 struct kgd_mem *kgd_mem; 2192 int ret; 2193 int j; 2194 2195 pr_debug("Restoring BO size:0x%llx addr:0x%llx gpu_id:0x%x flags:0x%x idr_handle:0x%x\n", 2196 bo_bucket->size, bo_bucket->addr, bo_bucket->gpu_id, bo_bucket->alloc_flags, 2197 bo_priv->idr_handle); 2198 2199 pdd = kfd_process_device_data_by_id(p, bo_bucket->gpu_id); 2200 if (!pdd) { 2201 pr_err("Failed to get pdd\n"); 2202 return -ENODEV; 2203 } 2204 2205 ret = criu_restore_memory_of_gpu(pdd, bo_bucket, bo_priv, &kgd_mem); 2206 if (ret) 2207 return ret; 2208 2209 /* now map these BOs to GPU/s */ 2210 for (j = 0; j < p->n_pdds; j++) { 2211 struct kfd_dev *peer; 2212 struct kfd_process_device *peer_pdd; 2213 2214 if (!bo_priv->mapped_gpuids[j]) 2215 break; 2216 2217 peer_pdd = kfd_process_device_data_by_id(p, bo_priv->mapped_gpuids[j]); 2218 if (!peer_pdd) 2219 return -EINVAL; 2220 2221 peer = peer_pdd->dev; 2222 2223 peer_pdd = kfd_bind_process_to_device(peer, p); 2224 if (IS_ERR(peer_pdd)) 2225 return PTR_ERR(peer_pdd); 2226 2227 ret = amdgpu_amdkfd_gpuvm_map_memory_to_gpu(peer->adev, kgd_mem, 2228 peer_pdd->drm_priv); 2229 if (ret) { 2230 pr_err("Failed to map to gpu %d/%d\n", j, p->n_pdds); 2231 return ret; 2232 } 2233 } 2234 2235 pr_debug("map memory was successful for the BO\n"); 2236 /* create the dmabuf object and export the bo */ 2237 if (bo_bucket->alloc_flags 2238 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) { 2239 ret = criu_get_prime_handle(&kgd_mem->bo->tbo.base, DRM_RDWR, 2240 &bo_bucket->dmabuf_fd); 2241 if (ret) 2242 return ret; 2243 } else { 2244 bo_bucket->dmabuf_fd = KFD_INVALID_FD; 2245 } 2246 2247 return 0; 2248 } 2249 2250 static int criu_restore_bos(struct kfd_process *p, 2251 struct kfd_ioctl_criu_args *args, 2252 uint64_t *priv_offset, 2253 uint64_t max_priv_data_size) 2254 { 2255 struct kfd_criu_bo_bucket *bo_buckets = NULL; 2256 struct kfd_criu_bo_priv_data *bo_privs = NULL; 2257 int ret = 0; 2258 uint32_t i = 0; 2259 2260 if (*priv_offset + (args->num_bos * sizeof(*bo_privs)) > max_priv_data_size) 2261 return -EINVAL; 2262 2263 /* Prevent MMU notifications until stage-4 IOCTL (CRIU_RESUME) is received */ 2264 amdgpu_amdkfd_block_mmu_notifications(p->kgd_process_info); 2265 2266 bo_buckets = kvmalloc_array(args->num_bos, sizeof(*bo_buckets), GFP_KERNEL); 2267 if (!bo_buckets) 2268 return -ENOMEM; 2269 2270 ret = copy_from_user(bo_buckets, (void __user *)args->bos, 2271 args->num_bos * sizeof(*bo_buckets)); 2272 if (ret) { 2273 pr_err("Failed to copy BOs information from user\n"); 2274 ret = -EFAULT; 2275 goto exit; 2276 } 2277 2278 bo_privs = kvmalloc_array(args->num_bos, sizeof(*bo_privs), GFP_KERNEL); 2279 if (!bo_privs) { 2280 ret = -ENOMEM; 2281 goto exit; 2282 } 2283 2284 ret = copy_from_user(bo_privs, (void __user *)args->priv_data + *priv_offset, 2285 args->num_bos * sizeof(*bo_privs)); 2286 if (ret) { 2287 pr_err("Failed to copy BOs information from user\n"); 2288 ret = -EFAULT; 2289 goto exit; 2290 } 2291 *priv_offset += args->num_bos * sizeof(*bo_privs); 2292 2293 /* Create and map new BOs */ 2294 for (; i < args->num_bos; i++) { 2295 ret = criu_restore_bo(p, &bo_buckets[i], &bo_privs[i]); 2296 if (ret) { 2297 pr_debug("Failed to restore BO[%d] ret%d\n", i, ret); 2298 goto exit; 2299 } 2300 } /* done */ 2301 2302 /* Copy only the buckets back so user can read bo_buckets[N].restored_offset */ 2303 ret = copy_to_user((void __user *)args->bos, 2304 bo_buckets, 2305 (args->num_bos * sizeof(*bo_buckets))); 2306 if (ret) 2307 ret = -EFAULT; 2308 2309 exit: 2310 while (ret && i--) { 2311 if (bo_buckets[i].alloc_flags 2312 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) 2313 close_fd(bo_buckets[i].dmabuf_fd); 2314 } 2315 kvfree(bo_buckets); 2316 kvfree(bo_privs); 2317 return ret; 2318 } 2319 2320 static int criu_restore_objects(struct file *filep, 2321 struct kfd_process *p, 2322 struct kfd_ioctl_criu_args *args, 2323 uint64_t *priv_offset, 2324 uint64_t max_priv_data_size) 2325 { 2326 int ret = 0; 2327 uint32_t i; 2328 2329 BUILD_BUG_ON(offsetof(struct kfd_criu_queue_priv_data, object_type)); 2330 BUILD_BUG_ON(offsetof(struct kfd_criu_event_priv_data, object_type)); 2331 BUILD_BUG_ON(offsetof(struct kfd_criu_svm_range_priv_data, object_type)); 2332 2333 for (i = 0; i < args->num_objects; i++) { 2334 uint32_t object_type; 2335 2336 if (*priv_offset + sizeof(object_type) > max_priv_data_size) { 2337 pr_err("Invalid private data size\n"); 2338 return -EINVAL; 2339 } 2340 2341 ret = get_user(object_type, (uint32_t __user *)(args->priv_data + *priv_offset)); 2342 if (ret) { 2343 pr_err("Failed to copy private information from user\n"); 2344 goto exit; 2345 } 2346 2347 switch (object_type) { 2348 case KFD_CRIU_OBJECT_TYPE_QUEUE: 2349 ret = kfd_criu_restore_queue(p, (uint8_t __user *)args->priv_data, 2350 priv_offset, max_priv_data_size); 2351 if (ret) 2352 goto exit; 2353 break; 2354 case KFD_CRIU_OBJECT_TYPE_EVENT: 2355 ret = kfd_criu_restore_event(filep, p, (uint8_t __user *)args->priv_data, 2356 priv_offset, max_priv_data_size); 2357 if (ret) 2358 goto exit; 2359 break; 2360 case KFD_CRIU_OBJECT_TYPE_SVM_RANGE: 2361 ret = kfd_criu_restore_svm(p, (uint8_t __user *)args->priv_data, 2362 priv_offset, max_priv_data_size); 2363 if (ret) 2364 goto exit; 2365 break; 2366 default: 2367 pr_err("Invalid object type:%u at index:%d\n", object_type, i); 2368 ret = -EINVAL; 2369 goto exit; 2370 } 2371 } 2372 exit: 2373 return ret; 2374 } 2375 2376 static int criu_restore(struct file *filep, 2377 struct kfd_process *p, 2378 struct kfd_ioctl_criu_args *args) 2379 { 2380 uint64_t priv_offset = 0; 2381 int ret = 0; 2382 2383 pr_debug("CRIU restore (num_devices:%u num_bos:%u num_objects:%u priv_data_size:%llu)\n", 2384 args->num_devices, args->num_bos, args->num_objects, args->priv_data_size); 2385 2386 if (!args->bos || !args->devices || !args->priv_data || !args->priv_data_size || 2387 !args->num_devices || !args->num_bos) 2388 return -EINVAL; 2389 2390 mutex_lock(&p->mutex); 2391 2392 /* 2393 * Set the process to evicted state to avoid running any new queues before all the memory 2394 * mappings are ready. 2395 */ 2396 ret = kfd_process_evict_queues(p); 2397 if (ret) 2398 goto exit_unlock; 2399 2400 /* Each function will adjust priv_offset based on how many bytes they consumed */ 2401 ret = criu_restore_process(p, args, &priv_offset, args->priv_data_size); 2402 if (ret) 2403 goto exit_unlock; 2404 2405 ret = criu_restore_devices(p, args, &priv_offset, args->priv_data_size); 2406 if (ret) 2407 goto exit_unlock; 2408 2409 ret = criu_restore_bos(p, args, &priv_offset, args->priv_data_size); 2410 if (ret) 2411 goto exit_unlock; 2412 2413 ret = criu_restore_objects(filep, p, args, &priv_offset, args->priv_data_size); 2414 if (ret) 2415 goto exit_unlock; 2416 2417 if (priv_offset != args->priv_data_size) { 2418 pr_err("Invalid private data size\n"); 2419 ret = -EINVAL; 2420 } 2421 2422 exit_unlock: 2423 mutex_unlock(&p->mutex); 2424 if (ret) 2425 pr_err("Failed to restore CRIU ret:%d\n", ret); 2426 else 2427 pr_debug("CRIU restore successful\n"); 2428 2429 return ret; 2430 } 2431 2432 static int criu_unpause(struct file *filep, 2433 struct kfd_process *p, 2434 struct kfd_ioctl_criu_args *args) 2435 { 2436 int ret; 2437 2438 mutex_lock(&p->mutex); 2439 2440 if (!p->queues_paused) { 2441 mutex_unlock(&p->mutex); 2442 return -EINVAL; 2443 } 2444 2445 ret = kfd_process_restore_queues(p); 2446 if (ret) 2447 pr_err("Failed to unpause queues ret:%d\n", ret); 2448 else 2449 p->queues_paused = false; 2450 2451 mutex_unlock(&p->mutex); 2452 2453 return ret; 2454 } 2455 2456 static int criu_resume(struct file *filep, 2457 struct kfd_process *p, 2458 struct kfd_ioctl_criu_args *args) 2459 { 2460 struct kfd_process *target = NULL; 2461 struct pid *pid = NULL; 2462 int ret = 0; 2463 2464 pr_debug("Inside %s, target pid for criu restore: %d\n", __func__, 2465 args->pid); 2466 2467 pid = find_get_pid(args->pid); 2468 if (!pid) { 2469 pr_err("Cannot find pid info for %i\n", args->pid); 2470 return -ESRCH; 2471 } 2472 2473 pr_debug("calling kfd_lookup_process_by_pid\n"); 2474 target = kfd_lookup_process_by_pid(pid); 2475 2476 put_pid(pid); 2477 2478 if (!target) { 2479 pr_debug("Cannot find process info for %i\n", args->pid); 2480 return -ESRCH; 2481 } 2482 2483 mutex_lock(&target->mutex); 2484 ret = kfd_criu_resume_svm(target); 2485 if (ret) { 2486 pr_err("kfd_criu_resume_svm failed for %i\n", args->pid); 2487 goto exit; 2488 } 2489 2490 ret = amdgpu_amdkfd_criu_resume(target->kgd_process_info); 2491 if (ret) 2492 pr_err("amdgpu_amdkfd_criu_resume failed for %i\n", args->pid); 2493 2494 exit: 2495 mutex_unlock(&target->mutex); 2496 2497 kfd_unref_process(target); 2498 return ret; 2499 } 2500 2501 static int criu_process_info(struct file *filep, 2502 struct kfd_process *p, 2503 struct kfd_ioctl_criu_args *args) 2504 { 2505 int ret = 0; 2506 2507 mutex_lock(&p->mutex); 2508 2509 if (!p->n_pdds) { 2510 pr_err("No pdd for given process\n"); 2511 ret = -ENODEV; 2512 goto err_unlock; 2513 } 2514 2515 ret = kfd_process_evict_queues(p); 2516 if (ret) 2517 goto err_unlock; 2518 2519 p->queues_paused = true; 2520 2521 args->pid = task_pid_nr_ns(p->lead_thread, 2522 task_active_pid_ns(p->lead_thread)); 2523 2524 ret = criu_get_process_object_info(p, &args->num_devices, &args->num_bos, 2525 &args->num_objects, &args->priv_data_size); 2526 if (ret) 2527 goto err_unlock; 2528 2529 dev_dbg(kfd_device, "Num of devices:%u bos:%u objects:%u priv_data_size:%lld\n", 2530 args->num_devices, args->num_bos, args->num_objects, 2531 args->priv_data_size); 2532 2533 err_unlock: 2534 if (ret) { 2535 kfd_process_restore_queues(p); 2536 p->queues_paused = false; 2537 } 2538 mutex_unlock(&p->mutex); 2539 return ret; 2540 } 2541 2542 static int kfd_ioctl_criu(struct file *filep, struct kfd_process *p, void *data) 2543 { 2544 struct kfd_ioctl_criu_args *args = data; 2545 int ret; 2546 2547 dev_dbg(kfd_device, "CRIU operation: %d\n", args->op); 2548 switch (args->op) { 2549 case KFD_CRIU_OP_PROCESS_INFO: 2550 ret = criu_process_info(filep, p, args); 2551 break; 2552 case KFD_CRIU_OP_CHECKPOINT: 2553 ret = criu_checkpoint(filep, p, args); 2554 break; 2555 case KFD_CRIU_OP_UNPAUSE: 2556 ret = criu_unpause(filep, p, args); 2557 break; 2558 case KFD_CRIU_OP_RESTORE: 2559 ret = criu_restore(filep, p, args); 2560 break; 2561 case KFD_CRIU_OP_RESUME: 2562 ret = criu_resume(filep, p, args); 2563 break; 2564 default: 2565 dev_dbg(kfd_device, "Unsupported CRIU operation:%d\n", args->op); 2566 ret = -EINVAL; 2567 break; 2568 } 2569 2570 if (ret) 2571 dev_dbg(kfd_device, "CRIU operation:%d err:%d\n", args->op, ret); 2572 2573 return ret; 2574 } 2575 2576 #define AMDKFD_IOCTL_DEF(ioctl, _func, _flags) \ 2577 [_IOC_NR(ioctl)] = {.cmd = ioctl, .func = _func, .flags = _flags, \ 2578 .cmd_drv = 0, .name = #ioctl} 2579 2580 /** Ioctl table */ 2581 static const struct amdkfd_ioctl_desc amdkfd_ioctls[] = { 2582 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_VERSION, 2583 kfd_ioctl_get_version, 0), 2584 2585 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_QUEUE, 2586 kfd_ioctl_create_queue, 0), 2587 2588 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DESTROY_QUEUE, 2589 kfd_ioctl_destroy_queue, 0), 2590 2591 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_MEMORY_POLICY, 2592 kfd_ioctl_set_memory_policy, 0), 2593 2594 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_CLOCK_COUNTERS, 2595 kfd_ioctl_get_clock_counters, 0), 2596 2597 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_PROCESS_APERTURES, 2598 kfd_ioctl_get_process_apertures, 0), 2599 2600 AMDKFD_IOCTL_DEF(AMDKFD_IOC_UPDATE_QUEUE, 2601 kfd_ioctl_update_queue, 0), 2602 2603 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_EVENT, 2604 kfd_ioctl_create_event, 0), 2605 2606 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DESTROY_EVENT, 2607 kfd_ioctl_destroy_event, 0), 2608 2609 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_EVENT, 2610 kfd_ioctl_set_event, 0), 2611 2612 AMDKFD_IOCTL_DEF(AMDKFD_IOC_RESET_EVENT, 2613 kfd_ioctl_reset_event, 0), 2614 2615 AMDKFD_IOCTL_DEF(AMDKFD_IOC_WAIT_EVENTS, 2616 kfd_ioctl_wait_events, 0), 2617 2618 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_REGISTER_DEPRECATED, 2619 kfd_ioctl_dbg_register, 0), 2620 2621 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_UNREGISTER_DEPRECATED, 2622 kfd_ioctl_dbg_unregister, 0), 2623 2624 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_ADDRESS_WATCH_DEPRECATED, 2625 kfd_ioctl_dbg_address_watch, 0), 2626 2627 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_WAVE_CONTROL_DEPRECATED, 2628 kfd_ioctl_dbg_wave_control, 0), 2629 2630 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_SCRATCH_BACKING_VA, 2631 kfd_ioctl_set_scratch_backing_va, 0), 2632 2633 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_TILE_CONFIG, 2634 kfd_ioctl_get_tile_config, 0), 2635 2636 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_TRAP_HANDLER, 2637 kfd_ioctl_set_trap_handler, 0), 2638 2639 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_PROCESS_APERTURES_NEW, 2640 kfd_ioctl_get_process_apertures_new, 0), 2641 2642 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ACQUIRE_VM, 2643 kfd_ioctl_acquire_vm, 0), 2644 2645 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_MEMORY_OF_GPU, 2646 kfd_ioctl_alloc_memory_of_gpu, 0), 2647 2648 AMDKFD_IOCTL_DEF(AMDKFD_IOC_FREE_MEMORY_OF_GPU, 2649 kfd_ioctl_free_memory_of_gpu, 0), 2650 2651 AMDKFD_IOCTL_DEF(AMDKFD_IOC_MAP_MEMORY_TO_GPU, 2652 kfd_ioctl_map_memory_to_gpu, 0), 2653 2654 AMDKFD_IOCTL_DEF(AMDKFD_IOC_UNMAP_MEMORY_FROM_GPU, 2655 kfd_ioctl_unmap_memory_from_gpu, 0), 2656 2657 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_CU_MASK, 2658 kfd_ioctl_set_cu_mask, 0), 2659 2660 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_QUEUE_WAVE_STATE, 2661 kfd_ioctl_get_queue_wave_state, 0), 2662 2663 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_DMABUF_INFO, 2664 kfd_ioctl_get_dmabuf_info, 0), 2665 2666 AMDKFD_IOCTL_DEF(AMDKFD_IOC_IMPORT_DMABUF, 2667 kfd_ioctl_import_dmabuf, 0), 2668 2669 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_QUEUE_GWS, 2670 kfd_ioctl_alloc_queue_gws, 0), 2671 2672 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SMI_EVENTS, 2673 kfd_ioctl_smi_events, 0), 2674 2675 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SVM, kfd_ioctl_svm, 0), 2676 2677 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_XNACK_MODE, 2678 kfd_ioctl_set_xnack_mode, 0), 2679 2680 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CRIU_OP, 2681 kfd_ioctl_criu, KFD_IOC_FLAG_CHECKPOINT_RESTORE), 2682 2683 AMDKFD_IOCTL_DEF(AMDKFD_IOC_AVAILABLE_MEMORY, 2684 kfd_ioctl_get_available_memory, 0), 2685 }; 2686 2687 #define AMDKFD_CORE_IOCTL_COUNT ARRAY_SIZE(amdkfd_ioctls) 2688 2689 static long kfd_ioctl(struct file *filep, unsigned int cmd, unsigned long arg) 2690 { 2691 struct kfd_process *process; 2692 amdkfd_ioctl_t *func; 2693 const struct amdkfd_ioctl_desc *ioctl = NULL; 2694 unsigned int nr = _IOC_NR(cmd); 2695 char stack_kdata[128]; 2696 char *kdata = NULL; 2697 unsigned int usize, asize; 2698 int retcode = -EINVAL; 2699 bool ptrace_attached = false; 2700 2701 if (nr >= AMDKFD_CORE_IOCTL_COUNT) 2702 goto err_i1; 2703 2704 if ((nr >= AMDKFD_COMMAND_START) && (nr < AMDKFD_COMMAND_END)) { 2705 u32 amdkfd_size; 2706 2707 ioctl = &amdkfd_ioctls[nr]; 2708 2709 amdkfd_size = _IOC_SIZE(ioctl->cmd); 2710 usize = asize = _IOC_SIZE(cmd); 2711 if (amdkfd_size > asize) 2712 asize = amdkfd_size; 2713 2714 cmd = ioctl->cmd; 2715 } else 2716 goto err_i1; 2717 2718 dev_dbg(kfd_device, "ioctl cmd 0x%x (#0x%x), arg 0x%lx\n", cmd, nr, arg); 2719 2720 /* Get the process struct from the filep. Only the process 2721 * that opened /dev/kfd can use the file descriptor. Child 2722 * processes need to create their own KFD device context. 2723 */ 2724 process = filep->private_data; 2725 2726 rcu_read_lock(); 2727 if ((ioctl->flags & KFD_IOC_FLAG_CHECKPOINT_RESTORE) && 2728 ptrace_parent(process->lead_thread) == current) 2729 ptrace_attached = true; 2730 rcu_read_unlock(); 2731 2732 if (process->lead_thread != current->group_leader 2733 && !ptrace_attached) { 2734 dev_dbg(kfd_device, "Using KFD FD in wrong process\n"); 2735 retcode = -EBADF; 2736 goto err_i1; 2737 } 2738 2739 /* Do not trust userspace, use our own definition */ 2740 func = ioctl->func; 2741 2742 if (unlikely(!func)) { 2743 dev_dbg(kfd_device, "no function\n"); 2744 retcode = -EINVAL; 2745 goto err_i1; 2746 } 2747 2748 /* 2749 * Versions of docker shipped in Ubuntu 18.xx and 20.xx do not support 2750 * CAP_CHECKPOINT_RESTORE, so we also allow access if CAP_SYS_ADMIN as CAP_SYS_ADMIN is a 2751 * more priviledged access. 2752 */ 2753 if (unlikely(ioctl->flags & KFD_IOC_FLAG_CHECKPOINT_RESTORE)) { 2754 if (!capable(CAP_CHECKPOINT_RESTORE) && 2755 !capable(CAP_SYS_ADMIN)) { 2756 retcode = -EACCES; 2757 goto err_i1; 2758 } 2759 } 2760 2761 if (cmd & (IOC_IN | IOC_OUT)) { 2762 if (asize <= sizeof(stack_kdata)) { 2763 kdata = stack_kdata; 2764 } else { 2765 kdata = kmalloc(asize, GFP_KERNEL); 2766 if (!kdata) { 2767 retcode = -ENOMEM; 2768 goto err_i1; 2769 } 2770 } 2771 if (asize > usize) 2772 memset(kdata + usize, 0, asize - usize); 2773 } 2774 2775 if (cmd & IOC_IN) { 2776 if (copy_from_user(kdata, (void __user *)arg, usize) != 0) { 2777 retcode = -EFAULT; 2778 goto err_i1; 2779 } 2780 } else if (cmd & IOC_OUT) { 2781 memset(kdata, 0, usize); 2782 } 2783 2784 retcode = func(filep, process, kdata); 2785 2786 if (cmd & IOC_OUT) 2787 if (copy_to_user((void __user *)arg, kdata, usize) != 0) 2788 retcode = -EFAULT; 2789 2790 err_i1: 2791 if (!ioctl) 2792 dev_dbg(kfd_device, "invalid ioctl: pid=%d, cmd=0x%02x, nr=0x%02x\n", 2793 task_pid_nr(current), cmd, nr); 2794 2795 if (kdata != stack_kdata) 2796 kfree(kdata); 2797 2798 if (retcode) 2799 dev_dbg(kfd_device, "ioctl cmd (#0x%x), arg 0x%lx, ret = %d\n", 2800 nr, arg, retcode); 2801 2802 return retcode; 2803 } 2804 2805 static int kfd_mmio_mmap(struct kfd_dev *dev, struct kfd_process *process, 2806 struct vm_area_struct *vma) 2807 { 2808 phys_addr_t address; 2809 int ret; 2810 2811 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 2812 return -EINVAL; 2813 2814 address = dev->adev->rmmio_remap.bus_addr; 2815 2816 vma->vm_flags |= VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_NORESERVE | 2817 VM_DONTDUMP | VM_PFNMAP; 2818 2819 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 2820 2821 pr_debug("pasid 0x%x mapping mmio page\n" 2822 " target user address == 0x%08llX\n" 2823 " physical address == 0x%08llX\n" 2824 " vm_flags == 0x%04lX\n" 2825 " size == 0x%04lX\n", 2826 process->pasid, (unsigned long long) vma->vm_start, 2827 address, vma->vm_flags, PAGE_SIZE); 2828 2829 ret = io_remap_pfn_range(vma, 2830 vma->vm_start, 2831 address >> PAGE_SHIFT, 2832 PAGE_SIZE, 2833 vma->vm_page_prot); 2834 return ret; 2835 } 2836 2837 2838 static int kfd_mmap(struct file *filp, struct vm_area_struct *vma) 2839 { 2840 struct kfd_process *process; 2841 struct kfd_dev *dev = NULL; 2842 unsigned long mmap_offset; 2843 unsigned int gpu_id; 2844 2845 process = kfd_get_process(current); 2846 if (IS_ERR(process)) 2847 return PTR_ERR(process); 2848 2849 mmap_offset = vma->vm_pgoff << PAGE_SHIFT; 2850 gpu_id = KFD_MMAP_GET_GPU_ID(mmap_offset); 2851 if (gpu_id) 2852 dev = kfd_device_by_id(gpu_id); 2853 2854 switch (mmap_offset & KFD_MMAP_TYPE_MASK) { 2855 case KFD_MMAP_TYPE_DOORBELL: 2856 if (!dev) 2857 return -ENODEV; 2858 return kfd_doorbell_mmap(dev, process, vma); 2859 2860 case KFD_MMAP_TYPE_EVENTS: 2861 return kfd_event_mmap(process, vma); 2862 2863 case KFD_MMAP_TYPE_RESERVED_MEM: 2864 if (!dev) 2865 return -ENODEV; 2866 return kfd_reserved_mem_mmap(dev, process, vma); 2867 case KFD_MMAP_TYPE_MMIO: 2868 if (!dev) 2869 return -ENODEV; 2870 return kfd_mmio_mmap(dev, process, vma); 2871 } 2872 2873 return -EFAULT; 2874 } 2875