1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/device.h> 25 #include <linux/export.h> 26 #include <linux/err.h> 27 #include <linux/fs.h> 28 #include <linux/file.h> 29 #include <linux/sched.h> 30 #include <linux/slab.h> 31 #include <linux/uaccess.h> 32 #include <linux/compat.h> 33 #include <uapi/linux/kfd_ioctl.h> 34 #include <linux/time.h> 35 #include <linux/mm.h> 36 #include <linux/mman.h> 37 #include <linux/ptrace.h> 38 #include <linux/dma-buf.h> 39 #include <linux/fdtable.h> 40 #include <linux/processor.h> 41 #include "kfd_priv.h" 42 #include "kfd_device_queue_manager.h" 43 #include "kfd_svm.h" 44 #include "amdgpu_amdkfd.h" 45 #include "kfd_smi_events.h" 46 #include "amdgpu_dma_buf.h" 47 48 static long kfd_ioctl(struct file *, unsigned int, unsigned long); 49 static int kfd_open(struct inode *, struct file *); 50 static int kfd_release(struct inode *, struct file *); 51 static int kfd_mmap(struct file *, struct vm_area_struct *); 52 53 static const char kfd_dev_name[] = "kfd"; 54 55 static const struct file_operations kfd_fops = { 56 .owner = THIS_MODULE, 57 .unlocked_ioctl = kfd_ioctl, 58 .compat_ioctl = compat_ptr_ioctl, 59 .open = kfd_open, 60 .release = kfd_release, 61 .mmap = kfd_mmap, 62 }; 63 64 static int kfd_char_dev_major = -1; 65 static struct class *kfd_class; 66 struct device *kfd_device; 67 68 int kfd_chardev_init(void) 69 { 70 int err = 0; 71 72 kfd_char_dev_major = register_chrdev(0, kfd_dev_name, &kfd_fops); 73 err = kfd_char_dev_major; 74 if (err < 0) 75 goto err_register_chrdev; 76 77 kfd_class = class_create(THIS_MODULE, kfd_dev_name); 78 err = PTR_ERR(kfd_class); 79 if (IS_ERR(kfd_class)) 80 goto err_class_create; 81 82 kfd_device = device_create(kfd_class, NULL, 83 MKDEV(kfd_char_dev_major, 0), 84 NULL, kfd_dev_name); 85 err = PTR_ERR(kfd_device); 86 if (IS_ERR(kfd_device)) 87 goto err_device_create; 88 89 return 0; 90 91 err_device_create: 92 class_destroy(kfd_class); 93 err_class_create: 94 unregister_chrdev(kfd_char_dev_major, kfd_dev_name); 95 err_register_chrdev: 96 return err; 97 } 98 99 void kfd_chardev_exit(void) 100 { 101 device_destroy(kfd_class, MKDEV(kfd_char_dev_major, 0)); 102 class_destroy(kfd_class); 103 unregister_chrdev(kfd_char_dev_major, kfd_dev_name); 104 kfd_device = NULL; 105 } 106 107 108 static int kfd_open(struct inode *inode, struct file *filep) 109 { 110 struct kfd_process *process; 111 bool is_32bit_user_mode; 112 113 if (iminor(inode) != 0) 114 return -ENODEV; 115 116 is_32bit_user_mode = in_compat_syscall(); 117 118 if (is_32bit_user_mode) { 119 dev_warn(kfd_device, 120 "Process %d (32-bit) failed to open /dev/kfd\n" 121 "32-bit processes are not supported by amdkfd\n", 122 current->pid); 123 return -EPERM; 124 } 125 126 process = kfd_create_process(filep); 127 if (IS_ERR(process)) 128 return PTR_ERR(process); 129 130 if (kfd_is_locked()) { 131 dev_dbg(kfd_device, "kfd is locked!\n" 132 "process %d unreferenced", process->pasid); 133 kfd_unref_process(process); 134 return -EAGAIN; 135 } 136 137 /* filep now owns the reference returned by kfd_create_process */ 138 filep->private_data = process; 139 140 dev_dbg(kfd_device, "process %d opened, compat mode (32 bit) - %d\n", 141 process->pasid, process->is_32bit_user_mode); 142 143 return 0; 144 } 145 146 static int kfd_release(struct inode *inode, struct file *filep) 147 { 148 struct kfd_process *process = filep->private_data; 149 150 if (process) 151 kfd_unref_process(process); 152 153 return 0; 154 } 155 156 static int kfd_ioctl_get_version(struct file *filep, struct kfd_process *p, 157 void *data) 158 { 159 struct kfd_ioctl_get_version_args *args = data; 160 161 args->major_version = KFD_IOCTL_MAJOR_VERSION; 162 args->minor_version = KFD_IOCTL_MINOR_VERSION; 163 164 return 0; 165 } 166 167 static int set_queue_properties_from_user(struct queue_properties *q_properties, 168 struct kfd_ioctl_create_queue_args *args) 169 { 170 if (args->queue_percentage > KFD_MAX_QUEUE_PERCENTAGE) { 171 pr_err("Queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n"); 172 return -EINVAL; 173 } 174 175 if (args->queue_priority > KFD_MAX_QUEUE_PRIORITY) { 176 pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n"); 177 return -EINVAL; 178 } 179 180 if ((args->ring_base_address) && 181 (!access_ok((const void __user *) args->ring_base_address, 182 sizeof(uint64_t)))) { 183 pr_err("Can't access ring base address\n"); 184 return -EFAULT; 185 } 186 187 if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) { 188 pr_err("Ring size must be a power of 2 or 0\n"); 189 return -EINVAL; 190 } 191 192 if (!access_ok((const void __user *) args->read_pointer_address, 193 sizeof(uint32_t))) { 194 pr_err("Can't access read pointer\n"); 195 return -EFAULT; 196 } 197 198 if (!access_ok((const void __user *) args->write_pointer_address, 199 sizeof(uint32_t))) { 200 pr_err("Can't access write pointer\n"); 201 return -EFAULT; 202 } 203 204 if (args->eop_buffer_address && 205 !access_ok((const void __user *) args->eop_buffer_address, 206 sizeof(uint32_t))) { 207 pr_debug("Can't access eop buffer"); 208 return -EFAULT; 209 } 210 211 if (args->ctx_save_restore_address && 212 !access_ok((const void __user *) args->ctx_save_restore_address, 213 sizeof(uint32_t))) { 214 pr_debug("Can't access ctx save restore buffer"); 215 return -EFAULT; 216 } 217 218 q_properties->is_interop = false; 219 q_properties->is_gws = false; 220 q_properties->queue_percent = args->queue_percentage; 221 q_properties->priority = args->queue_priority; 222 q_properties->queue_address = args->ring_base_address; 223 q_properties->queue_size = args->ring_size; 224 q_properties->read_ptr = (uint32_t *) args->read_pointer_address; 225 q_properties->write_ptr = (uint32_t *) args->write_pointer_address; 226 q_properties->eop_ring_buffer_address = args->eop_buffer_address; 227 q_properties->eop_ring_buffer_size = args->eop_buffer_size; 228 q_properties->ctx_save_restore_area_address = 229 args->ctx_save_restore_address; 230 q_properties->ctx_save_restore_area_size = args->ctx_save_restore_size; 231 q_properties->ctl_stack_size = args->ctl_stack_size; 232 if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE || 233 args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL) 234 q_properties->type = KFD_QUEUE_TYPE_COMPUTE; 235 else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA) 236 q_properties->type = KFD_QUEUE_TYPE_SDMA; 237 else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA_XGMI) 238 q_properties->type = KFD_QUEUE_TYPE_SDMA_XGMI; 239 else 240 return -ENOTSUPP; 241 242 if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL) 243 q_properties->format = KFD_QUEUE_FORMAT_AQL; 244 else 245 q_properties->format = KFD_QUEUE_FORMAT_PM4; 246 247 pr_debug("Queue Percentage: %d, %d\n", 248 q_properties->queue_percent, args->queue_percentage); 249 250 pr_debug("Queue Priority: %d, %d\n", 251 q_properties->priority, args->queue_priority); 252 253 pr_debug("Queue Address: 0x%llX, 0x%llX\n", 254 q_properties->queue_address, args->ring_base_address); 255 256 pr_debug("Queue Size: 0x%llX, %u\n", 257 q_properties->queue_size, args->ring_size); 258 259 pr_debug("Queue r/w Pointers: %px, %px\n", 260 q_properties->read_ptr, 261 q_properties->write_ptr); 262 263 pr_debug("Queue Format: %d\n", q_properties->format); 264 265 pr_debug("Queue EOP: 0x%llX\n", q_properties->eop_ring_buffer_address); 266 267 pr_debug("Queue CTX save area: 0x%llX\n", 268 q_properties->ctx_save_restore_area_address); 269 270 return 0; 271 } 272 273 static int kfd_ioctl_create_queue(struct file *filep, struct kfd_process *p, 274 void *data) 275 { 276 struct kfd_ioctl_create_queue_args *args = data; 277 struct kfd_dev *dev; 278 int err = 0; 279 unsigned int queue_id; 280 struct kfd_process_device *pdd; 281 struct queue_properties q_properties; 282 uint32_t doorbell_offset_in_process = 0; 283 284 memset(&q_properties, 0, sizeof(struct queue_properties)); 285 286 pr_debug("Creating queue ioctl\n"); 287 288 err = set_queue_properties_from_user(&q_properties, args); 289 if (err) 290 return err; 291 292 pr_debug("Looking for gpu id 0x%x\n", args->gpu_id); 293 294 mutex_lock(&p->mutex); 295 296 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 297 if (!pdd) { 298 pr_debug("Could not find gpu id 0x%x\n", args->gpu_id); 299 err = -EINVAL; 300 goto err_pdd; 301 } 302 dev = pdd->dev; 303 304 pdd = kfd_bind_process_to_device(dev, p); 305 if (IS_ERR(pdd)) { 306 err = -ESRCH; 307 goto err_bind_process; 308 } 309 310 pr_debug("Creating queue for PASID 0x%x on gpu 0x%x\n", 311 p->pasid, 312 dev->id); 313 314 err = pqm_create_queue(&p->pqm, dev, filep, &q_properties, &queue_id, NULL, NULL, NULL, 315 &doorbell_offset_in_process); 316 if (err != 0) 317 goto err_create_queue; 318 319 args->queue_id = queue_id; 320 321 322 /* Return gpu_id as doorbell offset for mmap usage */ 323 args->doorbell_offset = KFD_MMAP_TYPE_DOORBELL; 324 args->doorbell_offset |= KFD_MMAP_GPU_ID(args->gpu_id); 325 if (KFD_IS_SOC15(dev)) 326 /* On SOC15 ASICs, include the doorbell offset within the 327 * process doorbell frame, which is 2 pages. 328 */ 329 args->doorbell_offset |= doorbell_offset_in_process; 330 331 mutex_unlock(&p->mutex); 332 333 pr_debug("Queue id %d was created successfully\n", args->queue_id); 334 335 pr_debug("Ring buffer address == 0x%016llX\n", 336 args->ring_base_address); 337 338 pr_debug("Read ptr address == 0x%016llX\n", 339 args->read_pointer_address); 340 341 pr_debug("Write ptr address == 0x%016llX\n", 342 args->write_pointer_address); 343 344 return 0; 345 346 err_create_queue: 347 err_bind_process: 348 err_pdd: 349 mutex_unlock(&p->mutex); 350 return err; 351 } 352 353 static int kfd_ioctl_destroy_queue(struct file *filp, struct kfd_process *p, 354 void *data) 355 { 356 int retval; 357 struct kfd_ioctl_destroy_queue_args *args = data; 358 359 pr_debug("Destroying queue id %d for pasid 0x%x\n", 360 args->queue_id, 361 p->pasid); 362 363 mutex_lock(&p->mutex); 364 365 retval = pqm_destroy_queue(&p->pqm, args->queue_id); 366 367 mutex_unlock(&p->mutex); 368 return retval; 369 } 370 371 static int kfd_ioctl_update_queue(struct file *filp, struct kfd_process *p, 372 void *data) 373 { 374 int retval; 375 struct kfd_ioctl_update_queue_args *args = data; 376 struct queue_properties properties; 377 378 if (args->queue_percentage > KFD_MAX_QUEUE_PERCENTAGE) { 379 pr_err("Queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n"); 380 return -EINVAL; 381 } 382 383 if (args->queue_priority > KFD_MAX_QUEUE_PRIORITY) { 384 pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n"); 385 return -EINVAL; 386 } 387 388 if ((args->ring_base_address) && 389 (!access_ok((const void __user *) args->ring_base_address, 390 sizeof(uint64_t)))) { 391 pr_err("Can't access ring base address\n"); 392 return -EFAULT; 393 } 394 395 if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) { 396 pr_err("Ring size must be a power of 2 or 0\n"); 397 return -EINVAL; 398 } 399 400 properties.queue_address = args->ring_base_address; 401 properties.queue_size = args->ring_size; 402 properties.queue_percent = args->queue_percentage; 403 properties.priority = args->queue_priority; 404 405 pr_debug("Updating queue id %d for pasid 0x%x\n", 406 args->queue_id, p->pasid); 407 408 mutex_lock(&p->mutex); 409 410 retval = pqm_update_queue_properties(&p->pqm, args->queue_id, &properties); 411 412 mutex_unlock(&p->mutex); 413 414 return retval; 415 } 416 417 static int kfd_ioctl_set_cu_mask(struct file *filp, struct kfd_process *p, 418 void *data) 419 { 420 int retval; 421 const int max_num_cus = 1024; 422 struct kfd_ioctl_set_cu_mask_args *args = data; 423 struct mqd_update_info minfo = {0}; 424 uint32_t __user *cu_mask_ptr = (uint32_t __user *)args->cu_mask_ptr; 425 size_t cu_mask_size = sizeof(uint32_t) * (args->num_cu_mask / 32); 426 427 if ((args->num_cu_mask % 32) != 0) { 428 pr_debug("num_cu_mask 0x%x must be a multiple of 32", 429 args->num_cu_mask); 430 return -EINVAL; 431 } 432 433 minfo.cu_mask.count = args->num_cu_mask; 434 if (minfo.cu_mask.count == 0) { 435 pr_debug("CU mask cannot be 0"); 436 return -EINVAL; 437 } 438 439 /* To prevent an unreasonably large CU mask size, set an arbitrary 440 * limit of max_num_cus bits. We can then just drop any CU mask bits 441 * past max_num_cus bits and just use the first max_num_cus bits. 442 */ 443 if (minfo.cu_mask.count > max_num_cus) { 444 pr_debug("CU mask cannot be greater than 1024 bits"); 445 minfo.cu_mask.count = max_num_cus; 446 cu_mask_size = sizeof(uint32_t) * (max_num_cus/32); 447 } 448 449 minfo.cu_mask.ptr = kzalloc(cu_mask_size, GFP_KERNEL); 450 if (!minfo.cu_mask.ptr) 451 return -ENOMEM; 452 453 retval = copy_from_user(minfo.cu_mask.ptr, cu_mask_ptr, cu_mask_size); 454 if (retval) { 455 pr_debug("Could not copy CU mask from userspace"); 456 retval = -EFAULT; 457 goto out; 458 } 459 460 minfo.update_flag = UPDATE_FLAG_CU_MASK; 461 462 mutex_lock(&p->mutex); 463 464 retval = pqm_update_mqd(&p->pqm, args->queue_id, &minfo); 465 466 mutex_unlock(&p->mutex); 467 468 out: 469 kfree(minfo.cu_mask.ptr); 470 return retval; 471 } 472 473 static int kfd_ioctl_get_queue_wave_state(struct file *filep, 474 struct kfd_process *p, void *data) 475 { 476 struct kfd_ioctl_get_queue_wave_state_args *args = data; 477 int r; 478 479 mutex_lock(&p->mutex); 480 481 r = pqm_get_wave_state(&p->pqm, args->queue_id, 482 (void __user *)args->ctl_stack_address, 483 &args->ctl_stack_used_size, 484 &args->save_area_used_size); 485 486 mutex_unlock(&p->mutex); 487 488 return r; 489 } 490 491 static int kfd_ioctl_set_memory_policy(struct file *filep, 492 struct kfd_process *p, void *data) 493 { 494 struct kfd_ioctl_set_memory_policy_args *args = data; 495 int err = 0; 496 struct kfd_process_device *pdd; 497 enum cache_policy default_policy, alternate_policy; 498 499 if (args->default_policy != KFD_IOC_CACHE_POLICY_COHERENT 500 && args->default_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) { 501 return -EINVAL; 502 } 503 504 if (args->alternate_policy != KFD_IOC_CACHE_POLICY_COHERENT 505 && args->alternate_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) { 506 return -EINVAL; 507 } 508 509 mutex_lock(&p->mutex); 510 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 511 if (!pdd) { 512 pr_debug("Could not find gpu id 0x%x\n", args->gpu_id); 513 err = -EINVAL; 514 goto err_pdd; 515 } 516 517 pdd = kfd_bind_process_to_device(pdd->dev, p); 518 if (IS_ERR(pdd)) { 519 err = -ESRCH; 520 goto out; 521 } 522 523 default_policy = (args->default_policy == KFD_IOC_CACHE_POLICY_COHERENT) 524 ? cache_policy_coherent : cache_policy_noncoherent; 525 526 alternate_policy = 527 (args->alternate_policy == KFD_IOC_CACHE_POLICY_COHERENT) 528 ? cache_policy_coherent : cache_policy_noncoherent; 529 530 if (!pdd->dev->dqm->ops.set_cache_memory_policy(pdd->dev->dqm, 531 &pdd->qpd, 532 default_policy, 533 alternate_policy, 534 (void __user *)args->alternate_aperture_base, 535 args->alternate_aperture_size)) 536 err = -EINVAL; 537 538 out: 539 err_pdd: 540 mutex_unlock(&p->mutex); 541 542 return err; 543 } 544 545 static int kfd_ioctl_set_trap_handler(struct file *filep, 546 struct kfd_process *p, void *data) 547 { 548 struct kfd_ioctl_set_trap_handler_args *args = data; 549 int err = 0; 550 struct kfd_process_device *pdd; 551 552 mutex_lock(&p->mutex); 553 554 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 555 if (!pdd) { 556 err = -EINVAL; 557 goto err_pdd; 558 } 559 560 pdd = kfd_bind_process_to_device(pdd->dev, p); 561 if (IS_ERR(pdd)) { 562 err = -ESRCH; 563 goto out; 564 } 565 566 kfd_process_set_trap_handler(&pdd->qpd, args->tba_addr, args->tma_addr); 567 568 out: 569 err_pdd: 570 mutex_unlock(&p->mutex); 571 572 return err; 573 } 574 575 static int kfd_ioctl_dbg_register(struct file *filep, 576 struct kfd_process *p, void *data) 577 { 578 return -EPERM; 579 } 580 581 static int kfd_ioctl_dbg_unregister(struct file *filep, 582 struct kfd_process *p, void *data) 583 { 584 return -EPERM; 585 } 586 587 static int kfd_ioctl_dbg_address_watch(struct file *filep, 588 struct kfd_process *p, void *data) 589 { 590 return -EPERM; 591 } 592 593 /* Parse and generate fixed size data structure for wave control */ 594 static int kfd_ioctl_dbg_wave_control(struct file *filep, 595 struct kfd_process *p, void *data) 596 { 597 return -EPERM; 598 } 599 600 static int kfd_ioctl_get_clock_counters(struct file *filep, 601 struct kfd_process *p, void *data) 602 { 603 struct kfd_ioctl_get_clock_counters_args *args = data; 604 struct kfd_process_device *pdd; 605 606 mutex_lock(&p->mutex); 607 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 608 mutex_unlock(&p->mutex); 609 if (pdd) 610 /* Reading GPU clock counter from KGD */ 611 args->gpu_clock_counter = amdgpu_amdkfd_get_gpu_clock_counter(pdd->dev->adev); 612 else 613 /* Node without GPU resource */ 614 args->gpu_clock_counter = 0; 615 616 /* No access to rdtsc. Using raw monotonic time */ 617 args->cpu_clock_counter = ktime_get_raw_ns(); 618 args->system_clock_counter = ktime_get_boottime_ns(); 619 620 /* Since the counter is in nano-seconds we use 1GHz frequency */ 621 args->system_clock_freq = 1000000000; 622 623 return 0; 624 } 625 626 627 static int kfd_ioctl_get_process_apertures(struct file *filp, 628 struct kfd_process *p, void *data) 629 { 630 struct kfd_ioctl_get_process_apertures_args *args = data; 631 struct kfd_process_device_apertures *pAperture; 632 int i; 633 634 dev_dbg(kfd_device, "get apertures for PASID 0x%x", p->pasid); 635 636 args->num_of_nodes = 0; 637 638 mutex_lock(&p->mutex); 639 /* Run over all pdd of the process */ 640 for (i = 0; i < p->n_pdds; i++) { 641 struct kfd_process_device *pdd = p->pdds[i]; 642 643 pAperture = 644 &args->process_apertures[args->num_of_nodes]; 645 pAperture->gpu_id = pdd->dev->id; 646 pAperture->lds_base = pdd->lds_base; 647 pAperture->lds_limit = pdd->lds_limit; 648 pAperture->gpuvm_base = pdd->gpuvm_base; 649 pAperture->gpuvm_limit = pdd->gpuvm_limit; 650 pAperture->scratch_base = pdd->scratch_base; 651 pAperture->scratch_limit = pdd->scratch_limit; 652 653 dev_dbg(kfd_device, 654 "node id %u\n", args->num_of_nodes); 655 dev_dbg(kfd_device, 656 "gpu id %u\n", pdd->dev->id); 657 dev_dbg(kfd_device, 658 "lds_base %llX\n", pdd->lds_base); 659 dev_dbg(kfd_device, 660 "lds_limit %llX\n", pdd->lds_limit); 661 dev_dbg(kfd_device, 662 "gpuvm_base %llX\n", pdd->gpuvm_base); 663 dev_dbg(kfd_device, 664 "gpuvm_limit %llX\n", pdd->gpuvm_limit); 665 dev_dbg(kfd_device, 666 "scratch_base %llX\n", pdd->scratch_base); 667 dev_dbg(kfd_device, 668 "scratch_limit %llX\n", pdd->scratch_limit); 669 670 if (++args->num_of_nodes >= NUM_OF_SUPPORTED_GPUS) 671 break; 672 } 673 mutex_unlock(&p->mutex); 674 675 return 0; 676 } 677 678 static int kfd_ioctl_get_process_apertures_new(struct file *filp, 679 struct kfd_process *p, void *data) 680 { 681 struct kfd_ioctl_get_process_apertures_new_args *args = data; 682 struct kfd_process_device_apertures *pa; 683 int ret; 684 int i; 685 686 dev_dbg(kfd_device, "get apertures for PASID 0x%x", p->pasid); 687 688 if (args->num_of_nodes == 0) { 689 /* Return number of nodes, so that user space can alloacate 690 * sufficient memory 691 */ 692 mutex_lock(&p->mutex); 693 args->num_of_nodes = p->n_pdds; 694 goto out_unlock; 695 } 696 697 /* Fill in process-aperture information for all available 698 * nodes, but not more than args->num_of_nodes as that is 699 * the amount of memory allocated by user 700 */ 701 pa = kzalloc((sizeof(struct kfd_process_device_apertures) * 702 args->num_of_nodes), GFP_KERNEL); 703 if (!pa) 704 return -ENOMEM; 705 706 mutex_lock(&p->mutex); 707 708 if (!p->n_pdds) { 709 args->num_of_nodes = 0; 710 kfree(pa); 711 goto out_unlock; 712 } 713 714 /* Run over all pdd of the process */ 715 for (i = 0; i < min(p->n_pdds, args->num_of_nodes); i++) { 716 struct kfd_process_device *pdd = p->pdds[i]; 717 718 pa[i].gpu_id = pdd->dev->id; 719 pa[i].lds_base = pdd->lds_base; 720 pa[i].lds_limit = pdd->lds_limit; 721 pa[i].gpuvm_base = pdd->gpuvm_base; 722 pa[i].gpuvm_limit = pdd->gpuvm_limit; 723 pa[i].scratch_base = pdd->scratch_base; 724 pa[i].scratch_limit = pdd->scratch_limit; 725 726 dev_dbg(kfd_device, 727 "gpu id %u\n", pdd->dev->id); 728 dev_dbg(kfd_device, 729 "lds_base %llX\n", pdd->lds_base); 730 dev_dbg(kfd_device, 731 "lds_limit %llX\n", pdd->lds_limit); 732 dev_dbg(kfd_device, 733 "gpuvm_base %llX\n", pdd->gpuvm_base); 734 dev_dbg(kfd_device, 735 "gpuvm_limit %llX\n", pdd->gpuvm_limit); 736 dev_dbg(kfd_device, 737 "scratch_base %llX\n", pdd->scratch_base); 738 dev_dbg(kfd_device, 739 "scratch_limit %llX\n", pdd->scratch_limit); 740 } 741 mutex_unlock(&p->mutex); 742 743 args->num_of_nodes = i; 744 ret = copy_to_user( 745 (void __user *)args->kfd_process_device_apertures_ptr, 746 pa, 747 (i * sizeof(struct kfd_process_device_apertures))); 748 kfree(pa); 749 return ret ? -EFAULT : 0; 750 751 out_unlock: 752 mutex_unlock(&p->mutex); 753 return 0; 754 } 755 756 static int kfd_ioctl_create_event(struct file *filp, struct kfd_process *p, 757 void *data) 758 { 759 struct kfd_ioctl_create_event_args *args = data; 760 int err; 761 762 /* For dGPUs the event page is allocated in user mode. The 763 * handle is passed to KFD with the first call to this IOCTL 764 * through the event_page_offset field. 765 */ 766 if (args->event_page_offset) { 767 mutex_lock(&p->mutex); 768 err = kfd_kmap_event_page(p, args->event_page_offset); 769 mutex_unlock(&p->mutex); 770 if (err) 771 return err; 772 } 773 774 err = kfd_event_create(filp, p, args->event_type, 775 args->auto_reset != 0, args->node_id, 776 &args->event_id, &args->event_trigger_data, 777 &args->event_page_offset, 778 &args->event_slot_index); 779 780 pr_debug("Created event (id:0x%08x) (%s)\n", args->event_id, __func__); 781 return err; 782 } 783 784 static int kfd_ioctl_destroy_event(struct file *filp, struct kfd_process *p, 785 void *data) 786 { 787 struct kfd_ioctl_destroy_event_args *args = data; 788 789 return kfd_event_destroy(p, args->event_id); 790 } 791 792 static int kfd_ioctl_set_event(struct file *filp, struct kfd_process *p, 793 void *data) 794 { 795 struct kfd_ioctl_set_event_args *args = data; 796 797 return kfd_set_event(p, args->event_id); 798 } 799 800 static int kfd_ioctl_reset_event(struct file *filp, struct kfd_process *p, 801 void *data) 802 { 803 struct kfd_ioctl_reset_event_args *args = data; 804 805 return kfd_reset_event(p, args->event_id); 806 } 807 808 static int kfd_ioctl_wait_events(struct file *filp, struct kfd_process *p, 809 void *data) 810 { 811 struct kfd_ioctl_wait_events_args *args = data; 812 int err; 813 814 err = kfd_wait_on_events(p, args->num_events, 815 (void __user *)args->events_ptr, 816 (args->wait_for_all != 0), 817 args->timeout, &args->wait_result); 818 819 return err; 820 } 821 static int kfd_ioctl_set_scratch_backing_va(struct file *filep, 822 struct kfd_process *p, void *data) 823 { 824 struct kfd_ioctl_set_scratch_backing_va_args *args = data; 825 struct kfd_process_device *pdd; 826 struct kfd_dev *dev; 827 long err; 828 829 mutex_lock(&p->mutex); 830 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 831 if (!pdd) { 832 err = -EINVAL; 833 goto err_pdd; 834 } 835 dev = pdd->dev; 836 837 pdd = kfd_bind_process_to_device(dev, p); 838 if (IS_ERR(pdd)) { 839 err = PTR_ERR(pdd); 840 goto bind_process_to_device_fail; 841 } 842 843 pdd->qpd.sh_hidden_private_base = args->va_addr; 844 845 mutex_unlock(&p->mutex); 846 847 if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS && 848 pdd->qpd.vmid != 0 && dev->kfd2kgd->set_scratch_backing_va) 849 dev->kfd2kgd->set_scratch_backing_va( 850 dev->adev, args->va_addr, pdd->qpd.vmid); 851 852 return 0; 853 854 bind_process_to_device_fail: 855 err_pdd: 856 mutex_unlock(&p->mutex); 857 return err; 858 } 859 860 static int kfd_ioctl_get_tile_config(struct file *filep, 861 struct kfd_process *p, void *data) 862 { 863 struct kfd_ioctl_get_tile_config_args *args = data; 864 struct kfd_process_device *pdd; 865 struct tile_config config; 866 int err = 0; 867 868 mutex_lock(&p->mutex); 869 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 870 mutex_unlock(&p->mutex); 871 if (!pdd) 872 return -EINVAL; 873 874 amdgpu_amdkfd_get_tile_config(pdd->dev->adev, &config); 875 876 args->gb_addr_config = config.gb_addr_config; 877 args->num_banks = config.num_banks; 878 args->num_ranks = config.num_ranks; 879 880 if (args->num_tile_configs > config.num_tile_configs) 881 args->num_tile_configs = config.num_tile_configs; 882 err = copy_to_user((void __user *)args->tile_config_ptr, 883 config.tile_config_ptr, 884 args->num_tile_configs * sizeof(uint32_t)); 885 if (err) { 886 args->num_tile_configs = 0; 887 return -EFAULT; 888 } 889 890 if (args->num_macro_tile_configs > config.num_macro_tile_configs) 891 args->num_macro_tile_configs = 892 config.num_macro_tile_configs; 893 err = copy_to_user((void __user *)args->macro_tile_config_ptr, 894 config.macro_tile_config_ptr, 895 args->num_macro_tile_configs * sizeof(uint32_t)); 896 if (err) { 897 args->num_macro_tile_configs = 0; 898 return -EFAULT; 899 } 900 901 return 0; 902 } 903 904 static int kfd_ioctl_acquire_vm(struct file *filep, struct kfd_process *p, 905 void *data) 906 { 907 struct kfd_ioctl_acquire_vm_args *args = data; 908 struct kfd_process_device *pdd; 909 struct file *drm_file; 910 int ret; 911 912 drm_file = fget(args->drm_fd); 913 if (!drm_file) 914 return -EINVAL; 915 916 mutex_lock(&p->mutex); 917 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 918 if (!pdd) { 919 ret = -EINVAL; 920 goto err_pdd; 921 } 922 923 if (pdd->drm_file) { 924 ret = pdd->drm_file == drm_file ? 0 : -EBUSY; 925 goto err_drm_file; 926 } 927 928 ret = kfd_process_device_init_vm(pdd, drm_file); 929 if (ret) 930 goto err_unlock; 931 932 /* On success, the PDD keeps the drm_file reference */ 933 mutex_unlock(&p->mutex); 934 935 return 0; 936 937 err_unlock: 938 err_pdd: 939 err_drm_file: 940 mutex_unlock(&p->mutex); 941 fput(drm_file); 942 return ret; 943 } 944 945 bool kfd_dev_is_large_bar(struct kfd_dev *dev) 946 { 947 struct kfd_local_mem_info mem_info; 948 949 if (debug_largebar) { 950 pr_debug("Simulate large-bar allocation on non large-bar machine\n"); 951 return true; 952 } 953 954 if (dev->use_iommu_v2) 955 return false; 956 957 amdgpu_amdkfd_get_local_mem_info(dev->adev, &mem_info); 958 if (mem_info.local_mem_size_private == 0 && 959 mem_info.local_mem_size_public > 0) 960 return true; 961 return false; 962 } 963 964 static int kfd_ioctl_alloc_memory_of_gpu(struct file *filep, 965 struct kfd_process *p, void *data) 966 { 967 struct kfd_ioctl_alloc_memory_of_gpu_args *args = data; 968 struct kfd_process_device *pdd; 969 void *mem; 970 struct kfd_dev *dev; 971 int idr_handle; 972 long err; 973 uint64_t offset = args->mmap_offset; 974 uint32_t flags = args->flags; 975 976 if (args->size == 0) 977 return -EINVAL; 978 979 #if IS_ENABLED(CONFIG_HSA_AMD_SVM) 980 /* Flush pending deferred work to avoid racing with deferred actions 981 * from previous memory map changes (e.g. munmap). 982 */ 983 svm_range_list_lock_and_flush_work(&p->svms, current->mm); 984 mutex_lock(&p->svms.lock); 985 mmap_write_unlock(current->mm); 986 if (interval_tree_iter_first(&p->svms.objects, 987 args->va_addr >> PAGE_SHIFT, 988 (args->va_addr + args->size - 1) >> PAGE_SHIFT)) { 989 pr_err("Address: 0x%llx already allocated by SVM\n", 990 args->va_addr); 991 mutex_unlock(&p->svms.lock); 992 return -EADDRINUSE; 993 } 994 mutex_unlock(&p->svms.lock); 995 #endif 996 mutex_lock(&p->mutex); 997 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 998 if (!pdd) { 999 err = -EINVAL; 1000 goto err_pdd; 1001 } 1002 1003 dev = pdd->dev; 1004 1005 if ((flags & KFD_IOC_ALLOC_MEM_FLAGS_PUBLIC) && 1006 (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) && 1007 !kfd_dev_is_large_bar(dev)) { 1008 pr_err("Alloc host visible vram on small bar is not allowed\n"); 1009 err = -EINVAL; 1010 goto err_large_bar; 1011 } 1012 1013 pdd = kfd_bind_process_to_device(dev, p); 1014 if (IS_ERR(pdd)) { 1015 err = PTR_ERR(pdd); 1016 goto err_unlock; 1017 } 1018 1019 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) { 1020 if (args->size != kfd_doorbell_process_slice(dev)) { 1021 err = -EINVAL; 1022 goto err_unlock; 1023 } 1024 offset = kfd_get_process_doorbells(pdd); 1025 } else if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 1026 if (args->size != PAGE_SIZE) { 1027 err = -EINVAL; 1028 goto err_unlock; 1029 } 1030 offset = dev->adev->rmmio_remap.bus_addr; 1031 if (!offset) { 1032 err = -ENOMEM; 1033 goto err_unlock; 1034 } 1035 } 1036 1037 err = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu( 1038 dev->adev, args->va_addr, args->size, 1039 pdd->drm_priv, (struct kgd_mem **) &mem, &offset, 1040 flags, false); 1041 1042 if (err) 1043 goto err_unlock; 1044 1045 idr_handle = kfd_process_device_create_obj_handle(pdd, mem); 1046 if (idr_handle < 0) { 1047 err = -EFAULT; 1048 goto err_free; 1049 } 1050 1051 /* Update the VRAM usage count */ 1052 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) 1053 WRITE_ONCE(pdd->vram_usage, pdd->vram_usage + args->size); 1054 1055 mutex_unlock(&p->mutex); 1056 1057 args->handle = MAKE_HANDLE(args->gpu_id, idr_handle); 1058 args->mmap_offset = offset; 1059 1060 /* MMIO is mapped through kfd device 1061 * Generate a kfd mmap offset 1062 */ 1063 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) 1064 args->mmap_offset = KFD_MMAP_TYPE_MMIO 1065 | KFD_MMAP_GPU_ID(args->gpu_id); 1066 1067 return 0; 1068 1069 err_free: 1070 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(dev->adev, (struct kgd_mem *)mem, 1071 pdd->drm_priv, NULL); 1072 err_unlock: 1073 err_pdd: 1074 err_large_bar: 1075 mutex_unlock(&p->mutex); 1076 return err; 1077 } 1078 1079 static int kfd_ioctl_free_memory_of_gpu(struct file *filep, 1080 struct kfd_process *p, void *data) 1081 { 1082 struct kfd_ioctl_free_memory_of_gpu_args *args = data; 1083 struct kfd_process_device *pdd; 1084 void *mem; 1085 int ret; 1086 uint64_t size = 0; 1087 1088 mutex_lock(&p->mutex); 1089 /* 1090 * Safeguard to prevent user space from freeing signal BO. 1091 * It will be freed at process termination. 1092 */ 1093 if (p->signal_handle && (p->signal_handle == args->handle)) { 1094 pr_err("Free signal BO is not allowed\n"); 1095 ret = -EPERM; 1096 goto err_unlock; 1097 } 1098 1099 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1100 if (!pdd) { 1101 pr_err("Process device data doesn't exist\n"); 1102 ret = -EINVAL; 1103 goto err_pdd; 1104 } 1105 1106 mem = kfd_process_device_translate_handle( 1107 pdd, GET_IDR_HANDLE(args->handle)); 1108 if (!mem) { 1109 ret = -EINVAL; 1110 goto err_unlock; 1111 } 1112 1113 ret = amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, 1114 (struct kgd_mem *)mem, pdd->drm_priv, &size); 1115 1116 /* If freeing the buffer failed, leave the handle in place for 1117 * clean-up during process tear-down. 1118 */ 1119 if (!ret) 1120 kfd_process_device_remove_obj_handle( 1121 pdd, GET_IDR_HANDLE(args->handle)); 1122 1123 WRITE_ONCE(pdd->vram_usage, pdd->vram_usage - size); 1124 1125 err_unlock: 1126 err_pdd: 1127 mutex_unlock(&p->mutex); 1128 return ret; 1129 } 1130 1131 static int kfd_ioctl_map_memory_to_gpu(struct file *filep, 1132 struct kfd_process *p, void *data) 1133 { 1134 struct kfd_ioctl_map_memory_to_gpu_args *args = data; 1135 struct kfd_process_device *pdd, *peer_pdd; 1136 void *mem; 1137 struct kfd_dev *dev; 1138 long err = 0; 1139 int i; 1140 uint32_t *devices_arr = NULL; 1141 1142 if (!args->n_devices) { 1143 pr_debug("Device IDs array empty\n"); 1144 return -EINVAL; 1145 } 1146 if (args->n_success > args->n_devices) { 1147 pr_debug("n_success exceeds n_devices\n"); 1148 return -EINVAL; 1149 } 1150 1151 devices_arr = kmalloc_array(args->n_devices, sizeof(*devices_arr), 1152 GFP_KERNEL); 1153 if (!devices_arr) 1154 return -ENOMEM; 1155 1156 err = copy_from_user(devices_arr, 1157 (void __user *)args->device_ids_array_ptr, 1158 args->n_devices * sizeof(*devices_arr)); 1159 if (err != 0) { 1160 err = -EFAULT; 1161 goto copy_from_user_failed; 1162 } 1163 1164 mutex_lock(&p->mutex); 1165 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1166 if (!pdd) { 1167 err = -EINVAL; 1168 goto get_process_device_data_failed; 1169 } 1170 dev = pdd->dev; 1171 1172 pdd = kfd_bind_process_to_device(dev, p); 1173 if (IS_ERR(pdd)) { 1174 err = PTR_ERR(pdd); 1175 goto bind_process_to_device_failed; 1176 } 1177 1178 mem = kfd_process_device_translate_handle(pdd, 1179 GET_IDR_HANDLE(args->handle)); 1180 if (!mem) { 1181 err = -ENOMEM; 1182 goto get_mem_obj_from_handle_failed; 1183 } 1184 1185 for (i = args->n_success; i < args->n_devices; i++) { 1186 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1187 if (!peer_pdd) { 1188 pr_debug("Getting device by id failed for 0x%x\n", 1189 devices_arr[i]); 1190 err = -EINVAL; 1191 goto get_mem_obj_from_handle_failed; 1192 } 1193 1194 peer_pdd = kfd_bind_process_to_device(peer_pdd->dev, p); 1195 if (IS_ERR(peer_pdd)) { 1196 err = PTR_ERR(peer_pdd); 1197 goto get_mem_obj_from_handle_failed; 1198 } 1199 1200 err = amdgpu_amdkfd_gpuvm_map_memory_to_gpu( 1201 peer_pdd->dev->adev, (struct kgd_mem *)mem, 1202 peer_pdd->drm_priv); 1203 if (err) { 1204 struct pci_dev *pdev = peer_pdd->dev->adev->pdev; 1205 1206 dev_err(dev->adev->dev, 1207 "Failed to map peer:%04x:%02x:%02x.%d mem_domain:%d\n", 1208 pci_domain_nr(pdev->bus), 1209 pdev->bus->number, 1210 PCI_SLOT(pdev->devfn), 1211 PCI_FUNC(pdev->devfn), 1212 ((struct kgd_mem *)mem)->domain); 1213 goto map_memory_to_gpu_failed; 1214 } 1215 args->n_success = i+1; 1216 } 1217 1218 mutex_unlock(&p->mutex); 1219 1220 err = amdgpu_amdkfd_gpuvm_sync_memory(dev->adev, (struct kgd_mem *) mem, true); 1221 if (err) { 1222 pr_debug("Sync memory failed, wait interrupted by user signal\n"); 1223 goto sync_memory_failed; 1224 } 1225 1226 /* Flush TLBs after waiting for the page table updates to complete */ 1227 for (i = 0; i < args->n_devices; i++) { 1228 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1229 if (WARN_ON_ONCE(!peer_pdd)) 1230 continue; 1231 kfd_flush_tlb(peer_pdd, TLB_FLUSH_LEGACY); 1232 } 1233 kfree(devices_arr); 1234 1235 return err; 1236 1237 get_process_device_data_failed: 1238 bind_process_to_device_failed: 1239 get_mem_obj_from_handle_failed: 1240 map_memory_to_gpu_failed: 1241 mutex_unlock(&p->mutex); 1242 copy_from_user_failed: 1243 sync_memory_failed: 1244 kfree(devices_arr); 1245 1246 return err; 1247 } 1248 1249 static int kfd_ioctl_unmap_memory_from_gpu(struct file *filep, 1250 struct kfd_process *p, void *data) 1251 { 1252 struct kfd_ioctl_unmap_memory_from_gpu_args *args = data; 1253 struct kfd_process_device *pdd, *peer_pdd; 1254 void *mem; 1255 long err = 0; 1256 uint32_t *devices_arr = NULL, i; 1257 1258 if (!args->n_devices) { 1259 pr_debug("Device IDs array empty\n"); 1260 return -EINVAL; 1261 } 1262 if (args->n_success > args->n_devices) { 1263 pr_debug("n_success exceeds n_devices\n"); 1264 return -EINVAL; 1265 } 1266 1267 devices_arr = kmalloc_array(args->n_devices, sizeof(*devices_arr), 1268 GFP_KERNEL); 1269 if (!devices_arr) 1270 return -ENOMEM; 1271 1272 err = copy_from_user(devices_arr, 1273 (void __user *)args->device_ids_array_ptr, 1274 args->n_devices * sizeof(*devices_arr)); 1275 if (err != 0) { 1276 err = -EFAULT; 1277 goto copy_from_user_failed; 1278 } 1279 1280 mutex_lock(&p->mutex); 1281 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1282 if (!pdd) { 1283 err = -EINVAL; 1284 goto bind_process_to_device_failed; 1285 } 1286 1287 mem = kfd_process_device_translate_handle(pdd, 1288 GET_IDR_HANDLE(args->handle)); 1289 if (!mem) { 1290 err = -ENOMEM; 1291 goto get_mem_obj_from_handle_failed; 1292 } 1293 1294 for (i = args->n_success; i < args->n_devices; i++) { 1295 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1296 if (!peer_pdd) { 1297 err = -EINVAL; 1298 goto get_mem_obj_from_handle_failed; 1299 } 1300 err = amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu( 1301 peer_pdd->dev->adev, (struct kgd_mem *)mem, peer_pdd->drm_priv); 1302 if (err) { 1303 pr_err("Failed to unmap from gpu %d/%d\n", 1304 i, args->n_devices); 1305 goto unmap_memory_from_gpu_failed; 1306 } 1307 args->n_success = i+1; 1308 } 1309 mutex_unlock(&p->mutex); 1310 1311 if (kfd_flush_tlb_after_unmap(pdd->dev)) { 1312 err = amdgpu_amdkfd_gpuvm_sync_memory(pdd->dev->adev, 1313 (struct kgd_mem *) mem, true); 1314 if (err) { 1315 pr_debug("Sync memory failed, wait interrupted by user signal\n"); 1316 goto sync_memory_failed; 1317 } 1318 1319 /* Flush TLBs after waiting for the page table updates to complete */ 1320 for (i = 0; i < args->n_devices; i++) { 1321 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1322 if (WARN_ON_ONCE(!peer_pdd)) 1323 continue; 1324 kfd_flush_tlb(peer_pdd, TLB_FLUSH_HEAVYWEIGHT); 1325 } 1326 } 1327 kfree(devices_arr); 1328 1329 return 0; 1330 1331 bind_process_to_device_failed: 1332 get_mem_obj_from_handle_failed: 1333 unmap_memory_from_gpu_failed: 1334 mutex_unlock(&p->mutex); 1335 copy_from_user_failed: 1336 sync_memory_failed: 1337 kfree(devices_arr); 1338 return err; 1339 } 1340 1341 static int kfd_ioctl_alloc_queue_gws(struct file *filep, 1342 struct kfd_process *p, void *data) 1343 { 1344 int retval; 1345 struct kfd_ioctl_alloc_queue_gws_args *args = data; 1346 struct queue *q; 1347 struct kfd_dev *dev; 1348 1349 mutex_lock(&p->mutex); 1350 q = pqm_get_user_queue(&p->pqm, args->queue_id); 1351 1352 if (q) { 1353 dev = q->device; 1354 } else { 1355 retval = -EINVAL; 1356 goto out_unlock; 1357 } 1358 1359 if (!dev->gws) { 1360 retval = -ENODEV; 1361 goto out_unlock; 1362 } 1363 1364 if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) { 1365 retval = -ENODEV; 1366 goto out_unlock; 1367 } 1368 1369 retval = pqm_set_gws(&p->pqm, args->queue_id, args->num_gws ? dev->gws : NULL); 1370 mutex_unlock(&p->mutex); 1371 1372 args->first_gws = 0; 1373 return retval; 1374 1375 out_unlock: 1376 mutex_unlock(&p->mutex); 1377 return retval; 1378 } 1379 1380 static int kfd_ioctl_get_dmabuf_info(struct file *filep, 1381 struct kfd_process *p, void *data) 1382 { 1383 struct kfd_ioctl_get_dmabuf_info_args *args = data; 1384 struct kfd_dev *dev = NULL; 1385 struct amdgpu_device *dmabuf_adev; 1386 void *metadata_buffer = NULL; 1387 uint32_t flags; 1388 unsigned int i; 1389 int r; 1390 1391 /* Find a KFD GPU device that supports the get_dmabuf_info query */ 1392 for (i = 0; kfd_topology_enum_kfd_devices(i, &dev) == 0; i++) 1393 if (dev) 1394 break; 1395 if (!dev) 1396 return -EINVAL; 1397 1398 if (args->metadata_ptr) { 1399 metadata_buffer = kzalloc(args->metadata_size, GFP_KERNEL); 1400 if (!metadata_buffer) 1401 return -ENOMEM; 1402 } 1403 1404 /* Get dmabuf info from KGD */ 1405 r = amdgpu_amdkfd_get_dmabuf_info(dev->adev, args->dmabuf_fd, 1406 &dmabuf_adev, &args->size, 1407 metadata_buffer, args->metadata_size, 1408 &args->metadata_size, &flags); 1409 if (r) 1410 goto exit; 1411 1412 /* Reverse-lookup gpu_id from kgd pointer */ 1413 dev = kfd_device_by_adev(dmabuf_adev); 1414 if (!dev) { 1415 r = -EINVAL; 1416 goto exit; 1417 } 1418 args->gpu_id = dev->id; 1419 args->flags = flags; 1420 1421 /* Copy metadata buffer to user mode */ 1422 if (metadata_buffer) { 1423 r = copy_to_user((void __user *)args->metadata_ptr, 1424 metadata_buffer, args->metadata_size); 1425 if (r != 0) 1426 r = -EFAULT; 1427 } 1428 1429 exit: 1430 kfree(metadata_buffer); 1431 1432 return r; 1433 } 1434 1435 static int kfd_ioctl_import_dmabuf(struct file *filep, 1436 struct kfd_process *p, void *data) 1437 { 1438 struct kfd_ioctl_import_dmabuf_args *args = data; 1439 struct kfd_process_device *pdd; 1440 struct dma_buf *dmabuf; 1441 int idr_handle; 1442 uint64_t size; 1443 void *mem; 1444 int r; 1445 1446 dmabuf = dma_buf_get(args->dmabuf_fd); 1447 if (IS_ERR(dmabuf)) 1448 return PTR_ERR(dmabuf); 1449 1450 mutex_lock(&p->mutex); 1451 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 1452 if (!pdd) { 1453 r = -EINVAL; 1454 goto err_unlock; 1455 } 1456 1457 pdd = kfd_bind_process_to_device(pdd->dev, p); 1458 if (IS_ERR(pdd)) { 1459 r = PTR_ERR(pdd); 1460 goto err_unlock; 1461 } 1462 1463 r = amdgpu_amdkfd_gpuvm_import_dmabuf(pdd->dev->adev, dmabuf, 1464 args->va_addr, pdd->drm_priv, 1465 (struct kgd_mem **)&mem, &size, 1466 NULL); 1467 if (r) 1468 goto err_unlock; 1469 1470 idr_handle = kfd_process_device_create_obj_handle(pdd, mem); 1471 if (idr_handle < 0) { 1472 r = -EFAULT; 1473 goto err_free; 1474 } 1475 1476 mutex_unlock(&p->mutex); 1477 dma_buf_put(dmabuf); 1478 1479 args->handle = MAKE_HANDLE(args->gpu_id, idr_handle); 1480 1481 return 0; 1482 1483 err_free: 1484 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, (struct kgd_mem *)mem, 1485 pdd->drm_priv, NULL); 1486 err_unlock: 1487 mutex_unlock(&p->mutex); 1488 dma_buf_put(dmabuf); 1489 return r; 1490 } 1491 1492 /* Handle requests for watching SMI events */ 1493 static int kfd_ioctl_smi_events(struct file *filep, 1494 struct kfd_process *p, void *data) 1495 { 1496 struct kfd_ioctl_smi_events_args *args = data; 1497 struct kfd_process_device *pdd; 1498 1499 mutex_lock(&p->mutex); 1500 1501 pdd = kfd_process_device_data_by_id(p, args->gpuid); 1502 mutex_unlock(&p->mutex); 1503 if (!pdd) 1504 return -EINVAL; 1505 1506 return kfd_smi_event_open(pdd->dev, &args->anon_fd); 1507 } 1508 1509 static int kfd_ioctl_set_xnack_mode(struct file *filep, 1510 struct kfd_process *p, void *data) 1511 { 1512 struct kfd_ioctl_set_xnack_mode_args *args = data; 1513 int r = 0; 1514 1515 mutex_lock(&p->mutex); 1516 if (args->xnack_enabled >= 0) { 1517 if (!list_empty(&p->pqm.queues)) { 1518 pr_debug("Process has user queues running\n"); 1519 mutex_unlock(&p->mutex); 1520 return -EBUSY; 1521 } 1522 if (args->xnack_enabled && !kfd_process_xnack_mode(p, true)) 1523 r = -EPERM; 1524 else 1525 p->xnack_enabled = args->xnack_enabled; 1526 } else { 1527 args->xnack_enabled = p->xnack_enabled; 1528 } 1529 mutex_unlock(&p->mutex); 1530 1531 return r; 1532 } 1533 1534 #if IS_ENABLED(CONFIG_HSA_AMD_SVM) 1535 static int kfd_ioctl_svm(struct file *filep, struct kfd_process *p, void *data) 1536 { 1537 struct kfd_ioctl_svm_args *args = data; 1538 int r = 0; 1539 1540 pr_debug("start 0x%llx size 0x%llx op 0x%x nattr 0x%x\n", 1541 args->start_addr, args->size, args->op, args->nattr); 1542 1543 if ((args->start_addr & ~PAGE_MASK) || (args->size & ~PAGE_MASK)) 1544 return -EINVAL; 1545 if (!args->start_addr || !args->size) 1546 return -EINVAL; 1547 1548 r = svm_ioctl(p, args->op, args->start_addr, args->size, args->nattr, 1549 args->attrs); 1550 1551 return r; 1552 } 1553 #else 1554 static int kfd_ioctl_svm(struct file *filep, struct kfd_process *p, void *data) 1555 { 1556 return -EPERM; 1557 } 1558 #endif 1559 1560 static int criu_checkpoint_process(struct kfd_process *p, 1561 uint8_t __user *user_priv_data, 1562 uint64_t *priv_offset) 1563 { 1564 struct kfd_criu_process_priv_data process_priv; 1565 int ret; 1566 1567 memset(&process_priv, 0, sizeof(process_priv)); 1568 1569 process_priv.version = KFD_CRIU_PRIV_VERSION; 1570 /* For CR, we don't consider negative xnack mode which is used for 1571 * querying without changing it, here 0 simply means disabled and 1 1572 * means enabled so retry for finding a valid PTE. 1573 */ 1574 process_priv.xnack_mode = p->xnack_enabled ? 1 : 0; 1575 1576 ret = copy_to_user(user_priv_data + *priv_offset, 1577 &process_priv, sizeof(process_priv)); 1578 1579 if (ret) { 1580 pr_err("Failed to copy process information to user\n"); 1581 ret = -EFAULT; 1582 } 1583 1584 *priv_offset += sizeof(process_priv); 1585 return ret; 1586 } 1587 1588 static int criu_checkpoint_devices(struct kfd_process *p, 1589 uint32_t num_devices, 1590 uint8_t __user *user_addr, 1591 uint8_t __user *user_priv_data, 1592 uint64_t *priv_offset) 1593 { 1594 struct kfd_criu_device_priv_data *device_priv = NULL; 1595 struct kfd_criu_device_bucket *device_buckets = NULL; 1596 int ret = 0, i; 1597 1598 device_buckets = kvzalloc(num_devices * sizeof(*device_buckets), GFP_KERNEL); 1599 if (!device_buckets) { 1600 ret = -ENOMEM; 1601 goto exit; 1602 } 1603 1604 device_priv = kvzalloc(num_devices * sizeof(*device_priv), GFP_KERNEL); 1605 if (!device_priv) { 1606 ret = -ENOMEM; 1607 goto exit; 1608 } 1609 1610 for (i = 0; i < num_devices; i++) { 1611 struct kfd_process_device *pdd = p->pdds[i]; 1612 1613 device_buckets[i].user_gpu_id = pdd->user_gpu_id; 1614 device_buckets[i].actual_gpu_id = pdd->dev->id; 1615 1616 /* 1617 * priv_data does not contain useful information for now and is reserved for 1618 * future use, so we do not set its contents. 1619 */ 1620 } 1621 1622 ret = copy_to_user(user_addr, device_buckets, num_devices * sizeof(*device_buckets)); 1623 if (ret) { 1624 pr_err("Failed to copy device information to user\n"); 1625 ret = -EFAULT; 1626 goto exit; 1627 } 1628 1629 ret = copy_to_user(user_priv_data + *priv_offset, 1630 device_priv, 1631 num_devices * sizeof(*device_priv)); 1632 if (ret) { 1633 pr_err("Failed to copy device information to user\n"); 1634 ret = -EFAULT; 1635 } 1636 *priv_offset += num_devices * sizeof(*device_priv); 1637 1638 exit: 1639 kvfree(device_buckets); 1640 kvfree(device_priv); 1641 return ret; 1642 } 1643 1644 static uint32_t get_process_num_bos(struct kfd_process *p) 1645 { 1646 uint32_t num_of_bos = 0; 1647 int i; 1648 1649 /* Run over all PDDs of the process */ 1650 for (i = 0; i < p->n_pdds; i++) { 1651 struct kfd_process_device *pdd = p->pdds[i]; 1652 void *mem; 1653 int id; 1654 1655 idr_for_each_entry(&pdd->alloc_idr, mem, id) { 1656 struct kgd_mem *kgd_mem = (struct kgd_mem *)mem; 1657 1658 if ((uint64_t)kgd_mem->va > pdd->gpuvm_base) 1659 num_of_bos++; 1660 } 1661 } 1662 return num_of_bos; 1663 } 1664 1665 static int criu_get_prime_handle(struct drm_gem_object *gobj, int flags, 1666 u32 *shared_fd) 1667 { 1668 struct dma_buf *dmabuf; 1669 int ret; 1670 1671 dmabuf = amdgpu_gem_prime_export(gobj, flags); 1672 if (IS_ERR(dmabuf)) { 1673 ret = PTR_ERR(dmabuf); 1674 pr_err("dmabuf export failed for the BO\n"); 1675 return ret; 1676 } 1677 1678 ret = dma_buf_fd(dmabuf, flags); 1679 if (ret < 0) { 1680 pr_err("dmabuf create fd failed, ret:%d\n", ret); 1681 goto out_free_dmabuf; 1682 } 1683 1684 *shared_fd = ret; 1685 return 0; 1686 1687 out_free_dmabuf: 1688 dma_buf_put(dmabuf); 1689 return ret; 1690 } 1691 1692 static int criu_checkpoint_bos(struct kfd_process *p, 1693 uint32_t num_bos, 1694 uint8_t __user *user_bos, 1695 uint8_t __user *user_priv_data, 1696 uint64_t *priv_offset) 1697 { 1698 struct kfd_criu_bo_bucket *bo_buckets; 1699 struct kfd_criu_bo_priv_data *bo_privs; 1700 int ret = 0, pdd_index, bo_index = 0, id; 1701 void *mem; 1702 1703 bo_buckets = kvzalloc(num_bos * sizeof(*bo_buckets), GFP_KERNEL); 1704 if (!bo_buckets) 1705 return -ENOMEM; 1706 1707 bo_privs = kvzalloc(num_bos * sizeof(*bo_privs), GFP_KERNEL); 1708 if (!bo_privs) { 1709 ret = -ENOMEM; 1710 goto exit; 1711 } 1712 1713 for (pdd_index = 0; pdd_index < p->n_pdds; pdd_index++) { 1714 struct kfd_process_device *pdd = p->pdds[pdd_index]; 1715 struct amdgpu_bo *dumper_bo; 1716 struct kgd_mem *kgd_mem; 1717 1718 idr_for_each_entry(&pdd->alloc_idr, mem, id) { 1719 struct kfd_criu_bo_bucket *bo_bucket; 1720 struct kfd_criu_bo_priv_data *bo_priv; 1721 int i, dev_idx = 0; 1722 1723 if (!mem) { 1724 ret = -ENOMEM; 1725 goto exit; 1726 } 1727 1728 kgd_mem = (struct kgd_mem *)mem; 1729 dumper_bo = kgd_mem->bo; 1730 1731 if ((uint64_t)kgd_mem->va <= pdd->gpuvm_base) 1732 continue; 1733 1734 bo_bucket = &bo_buckets[bo_index]; 1735 bo_priv = &bo_privs[bo_index]; 1736 1737 bo_bucket->gpu_id = pdd->user_gpu_id; 1738 bo_bucket->addr = (uint64_t)kgd_mem->va; 1739 bo_bucket->size = amdgpu_bo_size(dumper_bo); 1740 bo_bucket->alloc_flags = (uint32_t)kgd_mem->alloc_flags; 1741 bo_priv->idr_handle = id; 1742 1743 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) { 1744 ret = amdgpu_ttm_tt_get_userptr(&dumper_bo->tbo, 1745 &bo_priv->user_addr); 1746 if (ret) { 1747 pr_err("Failed to obtain user address for user-pointer bo\n"); 1748 goto exit; 1749 } 1750 } 1751 if (bo_bucket->alloc_flags 1752 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) { 1753 ret = criu_get_prime_handle(&dumper_bo->tbo.base, 1754 bo_bucket->alloc_flags & 1755 KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE ? DRM_RDWR : 0, 1756 &bo_bucket->dmabuf_fd); 1757 if (ret) 1758 goto exit; 1759 } else { 1760 bo_bucket->dmabuf_fd = KFD_INVALID_FD; 1761 } 1762 1763 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) 1764 bo_bucket->offset = KFD_MMAP_TYPE_DOORBELL | 1765 KFD_MMAP_GPU_ID(pdd->dev->id); 1766 else if (bo_bucket->alloc_flags & 1767 KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) 1768 bo_bucket->offset = KFD_MMAP_TYPE_MMIO | 1769 KFD_MMAP_GPU_ID(pdd->dev->id); 1770 else 1771 bo_bucket->offset = amdgpu_bo_mmap_offset(dumper_bo); 1772 1773 for (i = 0; i < p->n_pdds; i++) { 1774 if (amdgpu_amdkfd_bo_mapped_to_dev(p->pdds[i]->dev->adev, kgd_mem)) 1775 bo_priv->mapped_gpuids[dev_idx++] = p->pdds[i]->user_gpu_id; 1776 } 1777 1778 pr_debug("bo_size = 0x%llx, bo_addr = 0x%llx bo_offset = 0x%llx\n" 1779 "gpu_id = 0x%x alloc_flags = 0x%x idr_handle = 0x%x", 1780 bo_bucket->size, 1781 bo_bucket->addr, 1782 bo_bucket->offset, 1783 bo_bucket->gpu_id, 1784 bo_bucket->alloc_flags, 1785 bo_priv->idr_handle); 1786 bo_index++; 1787 } 1788 } 1789 1790 ret = copy_to_user(user_bos, bo_buckets, num_bos * sizeof(*bo_buckets)); 1791 if (ret) { 1792 pr_err("Failed to copy BO information to user\n"); 1793 ret = -EFAULT; 1794 goto exit; 1795 } 1796 1797 ret = copy_to_user(user_priv_data + *priv_offset, bo_privs, num_bos * sizeof(*bo_privs)); 1798 if (ret) { 1799 pr_err("Failed to copy BO priv information to user\n"); 1800 ret = -EFAULT; 1801 goto exit; 1802 } 1803 1804 *priv_offset += num_bos * sizeof(*bo_privs); 1805 1806 exit: 1807 while (ret && bo_index--) { 1808 if (bo_buckets[bo_index].alloc_flags 1809 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) 1810 close_fd(bo_buckets[bo_index].dmabuf_fd); 1811 } 1812 1813 kvfree(bo_buckets); 1814 kvfree(bo_privs); 1815 return ret; 1816 } 1817 1818 static int criu_get_process_object_info(struct kfd_process *p, 1819 uint32_t *num_devices, 1820 uint32_t *num_bos, 1821 uint32_t *num_objects, 1822 uint64_t *objs_priv_size) 1823 { 1824 uint64_t queues_priv_data_size, svm_priv_data_size, priv_size; 1825 uint32_t num_queues, num_events, num_svm_ranges; 1826 int ret; 1827 1828 *num_devices = p->n_pdds; 1829 *num_bos = get_process_num_bos(p); 1830 1831 ret = kfd_process_get_queue_info(p, &num_queues, &queues_priv_data_size); 1832 if (ret) 1833 return ret; 1834 1835 num_events = kfd_get_num_events(p); 1836 1837 ret = svm_range_get_info(p, &num_svm_ranges, &svm_priv_data_size); 1838 if (ret) 1839 return ret; 1840 1841 *num_objects = num_queues + num_events + num_svm_ranges; 1842 1843 if (objs_priv_size) { 1844 priv_size = sizeof(struct kfd_criu_process_priv_data); 1845 priv_size += *num_devices * sizeof(struct kfd_criu_device_priv_data); 1846 priv_size += *num_bos * sizeof(struct kfd_criu_bo_priv_data); 1847 priv_size += queues_priv_data_size; 1848 priv_size += num_events * sizeof(struct kfd_criu_event_priv_data); 1849 priv_size += svm_priv_data_size; 1850 *objs_priv_size = priv_size; 1851 } 1852 return 0; 1853 } 1854 1855 static int criu_checkpoint(struct file *filep, 1856 struct kfd_process *p, 1857 struct kfd_ioctl_criu_args *args) 1858 { 1859 int ret; 1860 uint32_t num_devices, num_bos, num_objects; 1861 uint64_t priv_size, priv_offset = 0; 1862 1863 if (!args->devices || !args->bos || !args->priv_data) 1864 return -EINVAL; 1865 1866 mutex_lock(&p->mutex); 1867 1868 if (!p->n_pdds) { 1869 pr_err("No pdd for given process\n"); 1870 ret = -ENODEV; 1871 goto exit_unlock; 1872 } 1873 1874 /* Confirm all process queues are evicted */ 1875 if (!p->queues_paused) { 1876 pr_err("Cannot dump process when queues are not in evicted state\n"); 1877 /* CRIU plugin did not call op PROCESS_INFO before checkpointing */ 1878 ret = -EINVAL; 1879 goto exit_unlock; 1880 } 1881 1882 ret = criu_get_process_object_info(p, &num_devices, &num_bos, &num_objects, &priv_size); 1883 if (ret) 1884 goto exit_unlock; 1885 1886 if (num_devices != args->num_devices || 1887 num_bos != args->num_bos || 1888 num_objects != args->num_objects || 1889 priv_size != args->priv_data_size) { 1890 1891 ret = -EINVAL; 1892 goto exit_unlock; 1893 } 1894 1895 /* each function will store private data inside priv_data and adjust priv_offset */ 1896 ret = criu_checkpoint_process(p, (uint8_t __user *)args->priv_data, &priv_offset); 1897 if (ret) 1898 goto exit_unlock; 1899 1900 ret = criu_checkpoint_devices(p, num_devices, (uint8_t __user *)args->devices, 1901 (uint8_t __user *)args->priv_data, &priv_offset); 1902 if (ret) 1903 goto exit_unlock; 1904 1905 ret = criu_checkpoint_bos(p, num_bos, (uint8_t __user *)args->bos, 1906 (uint8_t __user *)args->priv_data, &priv_offset); 1907 if (ret) 1908 goto exit_unlock; 1909 1910 if (num_objects) { 1911 ret = kfd_criu_checkpoint_queues(p, (uint8_t __user *)args->priv_data, 1912 &priv_offset); 1913 if (ret) 1914 goto close_bo_fds; 1915 1916 ret = kfd_criu_checkpoint_events(p, (uint8_t __user *)args->priv_data, 1917 &priv_offset); 1918 if (ret) 1919 goto close_bo_fds; 1920 1921 ret = kfd_criu_checkpoint_svm(p, (uint8_t __user *)args->priv_data, &priv_offset); 1922 if (ret) 1923 goto close_bo_fds; 1924 } 1925 1926 close_bo_fds: 1927 if (ret) { 1928 /* If IOCTL returns err, user assumes all FDs opened in criu_dump_bos are closed */ 1929 uint32_t i; 1930 struct kfd_criu_bo_bucket *bo_buckets = (struct kfd_criu_bo_bucket *) args->bos; 1931 1932 for (i = 0; i < num_bos; i++) { 1933 if (bo_buckets[i].alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) 1934 close_fd(bo_buckets[i].dmabuf_fd); 1935 } 1936 } 1937 1938 exit_unlock: 1939 mutex_unlock(&p->mutex); 1940 if (ret) 1941 pr_err("Failed to dump CRIU ret:%d\n", ret); 1942 else 1943 pr_debug("CRIU dump ret:%d\n", ret); 1944 1945 return ret; 1946 } 1947 1948 static int criu_restore_process(struct kfd_process *p, 1949 struct kfd_ioctl_criu_args *args, 1950 uint64_t *priv_offset, 1951 uint64_t max_priv_data_size) 1952 { 1953 int ret = 0; 1954 struct kfd_criu_process_priv_data process_priv; 1955 1956 if (*priv_offset + sizeof(process_priv) > max_priv_data_size) 1957 return -EINVAL; 1958 1959 ret = copy_from_user(&process_priv, 1960 (void __user *)(args->priv_data + *priv_offset), 1961 sizeof(process_priv)); 1962 if (ret) { 1963 pr_err("Failed to copy process private information from user\n"); 1964 ret = -EFAULT; 1965 goto exit; 1966 } 1967 *priv_offset += sizeof(process_priv); 1968 1969 if (process_priv.version != KFD_CRIU_PRIV_VERSION) { 1970 pr_err("Invalid CRIU API version (checkpointed:%d current:%d)\n", 1971 process_priv.version, KFD_CRIU_PRIV_VERSION); 1972 return -EINVAL; 1973 } 1974 1975 pr_debug("Setting XNACK mode\n"); 1976 if (process_priv.xnack_mode && !kfd_process_xnack_mode(p, true)) { 1977 pr_err("xnack mode cannot be set\n"); 1978 ret = -EPERM; 1979 goto exit; 1980 } else { 1981 pr_debug("set xnack mode: %d\n", process_priv.xnack_mode); 1982 p->xnack_enabled = process_priv.xnack_mode; 1983 } 1984 1985 exit: 1986 return ret; 1987 } 1988 1989 static int criu_restore_devices(struct kfd_process *p, 1990 struct kfd_ioctl_criu_args *args, 1991 uint64_t *priv_offset, 1992 uint64_t max_priv_data_size) 1993 { 1994 struct kfd_criu_device_bucket *device_buckets; 1995 struct kfd_criu_device_priv_data *device_privs; 1996 int ret = 0; 1997 uint32_t i; 1998 1999 if (args->num_devices != p->n_pdds) 2000 return -EINVAL; 2001 2002 if (*priv_offset + (args->num_devices * sizeof(*device_privs)) > max_priv_data_size) 2003 return -EINVAL; 2004 2005 device_buckets = kmalloc_array(args->num_devices, sizeof(*device_buckets), GFP_KERNEL); 2006 if (!device_buckets) 2007 return -ENOMEM; 2008 2009 ret = copy_from_user(device_buckets, (void __user *)args->devices, 2010 args->num_devices * sizeof(*device_buckets)); 2011 if (ret) { 2012 pr_err("Failed to copy devices buckets from user\n"); 2013 ret = -EFAULT; 2014 goto exit; 2015 } 2016 2017 for (i = 0; i < args->num_devices; i++) { 2018 struct kfd_dev *dev; 2019 struct kfd_process_device *pdd; 2020 struct file *drm_file; 2021 2022 /* device private data is not currently used */ 2023 2024 if (!device_buckets[i].user_gpu_id) { 2025 pr_err("Invalid user gpu_id\n"); 2026 ret = -EINVAL; 2027 goto exit; 2028 } 2029 2030 dev = kfd_device_by_id(device_buckets[i].actual_gpu_id); 2031 if (!dev) { 2032 pr_err("Failed to find device with gpu_id = %x\n", 2033 device_buckets[i].actual_gpu_id); 2034 ret = -EINVAL; 2035 goto exit; 2036 } 2037 2038 pdd = kfd_get_process_device_data(dev, p); 2039 if (!pdd) { 2040 pr_err("Failed to get pdd for gpu_id = %x\n", 2041 device_buckets[i].actual_gpu_id); 2042 ret = -EINVAL; 2043 goto exit; 2044 } 2045 pdd->user_gpu_id = device_buckets[i].user_gpu_id; 2046 2047 drm_file = fget(device_buckets[i].drm_fd); 2048 if (!drm_file) { 2049 pr_err("Invalid render node file descriptor sent from plugin (%d)\n", 2050 device_buckets[i].drm_fd); 2051 ret = -EINVAL; 2052 goto exit; 2053 } 2054 2055 if (pdd->drm_file) { 2056 ret = -EINVAL; 2057 goto exit; 2058 } 2059 2060 /* create the vm using render nodes for kfd pdd */ 2061 if (kfd_process_device_init_vm(pdd, drm_file)) { 2062 pr_err("could not init vm for given pdd\n"); 2063 /* On success, the PDD keeps the drm_file reference */ 2064 fput(drm_file); 2065 ret = -EINVAL; 2066 goto exit; 2067 } 2068 /* 2069 * pdd now already has the vm bound to render node so below api won't create a new 2070 * exclusive kfd mapping but use existing one with renderDXXX but is still needed 2071 * for iommu v2 binding and runtime pm. 2072 */ 2073 pdd = kfd_bind_process_to_device(dev, p); 2074 if (IS_ERR(pdd)) { 2075 ret = PTR_ERR(pdd); 2076 goto exit; 2077 } 2078 } 2079 2080 /* 2081 * We are not copying device private data from user as we are not using the data for now, 2082 * but we still adjust for its private data. 2083 */ 2084 *priv_offset += args->num_devices * sizeof(*device_privs); 2085 2086 exit: 2087 kfree(device_buckets); 2088 return ret; 2089 } 2090 2091 static int criu_restore_memory_of_gpu(struct kfd_process_device *pdd, 2092 struct kfd_criu_bo_bucket *bo_bucket, 2093 struct kfd_criu_bo_priv_data *bo_priv, 2094 struct kgd_mem **kgd_mem) 2095 { 2096 int idr_handle; 2097 int ret; 2098 const bool criu_resume = true; 2099 u64 offset; 2100 2101 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) { 2102 if (bo_bucket->size != kfd_doorbell_process_slice(pdd->dev)) 2103 return -EINVAL; 2104 2105 offset = kfd_get_process_doorbells(pdd); 2106 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 2107 /* MMIO BOs need remapped bus address */ 2108 if (bo_bucket->size != PAGE_SIZE) { 2109 pr_err("Invalid page size\n"); 2110 return -EINVAL; 2111 } 2112 offset = pdd->dev->adev->rmmio_remap.bus_addr; 2113 if (!offset) { 2114 pr_err("amdgpu_amdkfd_get_mmio_remap_phys_addr failed\n"); 2115 return -ENOMEM; 2116 } 2117 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) { 2118 offset = bo_priv->user_addr; 2119 } 2120 /* Create the BO */ 2121 ret = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(pdd->dev->adev, bo_bucket->addr, 2122 bo_bucket->size, pdd->drm_priv, kgd_mem, 2123 &offset, bo_bucket->alloc_flags, criu_resume); 2124 if (ret) { 2125 pr_err("Could not create the BO\n"); 2126 return ret; 2127 } 2128 pr_debug("New BO created: size:0x%llx addr:0x%llx offset:0x%llx\n", 2129 bo_bucket->size, bo_bucket->addr, offset); 2130 2131 /* Restore previous IDR handle */ 2132 pr_debug("Restoring old IDR handle for the BO"); 2133 idr_handle = idr_alloc(&pdd->alloc_idr, *kgd_mem, bo_priv->idr_handle, 2134 bo_priv->idr_handle + 1, GFP_KERNEL); 2135 2136 if (idr_handle < 0) { 2137 pr_err("Could not allocate idr\n"); 2138 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, *kgd_mem, pdd->drm_priv, 2139 NULL); 2140 return -ENOMEM; 2141 } 2142 2143 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) 2144 bo_bucket->restored_offset = KFD_MMAP_TYPE_DOORBELL | KFD_MMAP_GPU_ID(pdd->dev->id); 2145 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 2146 bo_bucket->restored_offset = KFD_MMAP_TYPE_MMIO | KFD_MMAP_GPU_ID(pdd->dev->id); 2147 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_GTT) { 2148 bo_bucket->restored_offset = offset; 2149 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) { 2150 bo_bucket->restored_offset = offset; 2151 /* Update the VRAM usage count */ 2152 WRITE_ONCE(pdd->vram_usage, pdd->vram_usage + bo_bucket->size); 2153 } 2154 return 0; 2155 } 2156 2157 static int criu_restore_bo(struct kfd_process *p, 2158 struct kfd_criu_bo_bucket *bo_bucket, 2159 struct kfd_criu_bo_priv_data *bo_priv) 2160 { 2161 struct kfd_process_device *pdd; 2162 struct kgd_mem *kgd_mem; 2163 int ret; 2164 int j; 2165 2166 pr_debug("Restoring BO size:0x%llx addr:0x%llx gpu_id:0x%x flags:0x%x idr_handle:0x%x\n", 2167 bo_bucket->size, bo_bucket->addr, bo_bucket->gpu_id, bo_bucket->alloc_flags, 2168 bo_priv->idr_handle); 2169 2170 pdd = kfd_process_device_data_by_id(p, bo_bucket->gpu_id); 2171 if (!pdd) { 2172 pr_err("Failed to get pdd\n"); 2173 return -ENODEV; 2174 } 2175 2176 ret = criu_restore_memory_of_gpu(pdd, bo_bucket, bo_priv, &kgd_mem); 2177 if (ret) 2178 return ret; 2179 2180 /* now map these BOs to GPU/s */ 2181 for (j = 0; j < p->n_pdds; j++) { 2182 struct kfd_dev *peer; 2183 struct kfd_process_device *peer_pdd; 2184 2185 if (!bo_priv->mapped_gpuids[j]) 2186 break; 2187 2188 peer_pdd = kfd_process_device_data_by_id(p, bo_priv->mapped_gpuids[j]); 2189 if (!peer_pdd) 2190 return -EINVAL; 2191 2192 peer = peer_pdd->dev; 2193 2194 peer_pdd = kfd_bind_process_to_device(peer, p); 2195 if (IS_ERR(peer_pdd)) 2196 return PTR_ERR(peer_pdd); 2197 2198 ret = amdgpu_amdkfd_gpuvm_map_memory_to_gpu(peer->adev, kgd_mem, 2199 peer_pdd->drm_priv); 2200 if (ret) { 2201 pr_err("Failed to map to gpu %d/%d\n", j, p->n_pdds); 2202 return ret; 2203 } 2204 } 2205 2206 pr_debug("map memory was successful for the BO\n"); 2207 /* create the dmabuf object and export the bo */ 2208 if (bo_bucket->alloc_flags 2209 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) { 2210 ret = criu_get_prime_handle(&kgd_mem->bo->tbo.base, DRM_RDWR, 2211 &bo_bucket->dmabuf_fd); 2212 if (ret) 2213 return ret; 2214 } else { 2215 bo_bucket->dmabuf_fd = KFD_INVALID_FD; 2216 } 2217 2218 return 0; 2219 } 2220 2221 static int criu_restore_bos(struct kfd_process *p, 2222 struct kfd_ioctl_criu_args *args, 2223 uint64_t *priv_offset, 2224 uint64_t max_priv_data_size) 2225 { 2226 struct kfd_criu_bo_bucket *bo_buckets = NULL; 2227 struct kfd_criu_bo_priv_data *bo_privs = NULL; 2228 int ret = 0; 2229 uint32_t i = 0; 2230 2231 if (*priv_offset + (args->num_bos * sizeof(*bo_privs)) > max_priv_data_size) 2232 return -EINVAL; 2233 2234 /* Prevent MMU notifications until stage-4 IOCTL (CRIU_RESUME) is received */ 2235 amdgpu_amdkfd_block_mmu_notifications(p->kgd_process_info); 2236 2237 bo_buckets = kvmalloc_array(args->num_bos, sizeof(*bo_buckets), GFP_KERNEL); 2238 if (!bo_buckets) 2239 return -ENOMEM; 2240 2241 ret = copy_from_user(bo_buckets, (void __user *)args->bos, 2242 args->num_bos * sizeof(*bo_buckets)); 2243 if (ret) { 2244 pr_err("Failed to copy BOs information from user\n"); 2245 ret = -EFAULT; 2246 goto exit; 2247 } 2248 2249 bo_privs = kvmalloc_array(args->num_bos, sizeof(*bo_privs), GFP_KERNEL); 2250 if (!bo_privs) { 2251 ret = -ENOMEM; 2252 goto exit; 2253 } 2254 2255 ret = copy_from_user(bo_privs, (void __user *)args->priv_data + *priv_offset, 2256 args->num_bos * sizeof(*bo_privs)); 2257 if (ret) { 2258 pr_err("Failed to copy BOs information from user\n"); 2259 ret = -EFAULT; 2260 goto exit; 2261 } 2262 *priv_offset += args->num_bos * sizeof(*bo_privs); 2263 2264 /* Create and map new BOs */ 2265 for (; i < args->num_bos; i++) { 2266 ret = criu_restore_bo(p, &bo_buckets[i], &bo_privs[i]); 2267 if (ret) { 2268 pr_debug("Failed to restore BO[%d] ret%d\n", i, ret); 2269 goto exit; 2270 } 2271 } /* done */ 2272 2273 /* Copy only the buckets back so user can read bo_buckets[N].restored_offset */ 2274 ret = copy_to_user((void __user *)args->bos, 2275 bo_buckets, 2276 (args->num_bos * sizeof(*bo_buckets))); 2277 if (ret) 2278 ret = -EFAULT; 2279 2280 exit: 2281 while (ret && i--) { 2282 if (bo_buckets[i].alloc_flags 2283 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) 2284 close_fd(bo_buckets[i].dmabuf_fd); 2285 } 2286 kvfree(bo_buckets); 2287 kvfree(bo_privs); 2288 return ret; 2289 } 2290 2291 static int criu_restore_objects(struct file *filep, 2292 struct kfd_process *p, 2293 struct kfd_ioctl_criu_args *args, 2294 uint64_t *priv_offset, 2295 uint64_t max_priv_data_size) 2296 { 2297 int ret = 0; 2298 uint32_t i; 2299 2300 BUILD_BUG_ON(offsetof(struct kfd_criu_queue_priv_data, object_type)); 2301 BUILD_BUG_ON(offsetof(struct kfd_criu_event_priv_data, object_type)); 2302 BUILD_BUG_ON(offsetof(struct kfd_criu_svm_range_priv_data, object_type)); 2303 2304 for (i = 0; i < args->num_objects; i++) { 2305 uint32_t object_type; 2306 2307 if (*priv_offset + sizeof(object_type) > max_priv_data_size) { 2308 pr_err("Invalid private data size\n"); 2309 return -EINVAL; 2310 } 2311 2312 ret = get_user(object_type, (uint32_t __user *)(args->priv_data + *priv_offset)); 2313 if (ret) { 2314 pr_err("Failed to copy private information from user\n"); 2315 goto exit; 2316 } 2317 2318 switch (object_type) { 2319 case KFD_CRIU_OBJECT_TYPE_QUEUE: 2320 ret = kfd_criu_restore_queue(p, (uint8_t __user *)args->priv_data, 2321 priv_offset, max_priv_data_size); 2322 if (ret) 2323 goto exit; 2324 break; 2325 case KFD_CRIU_OBJECT_TYPE_EVENT: 2326 ret = kfd_criu_restore_event(filep, p, (uint8_t __user *)args->priv_data, 2327 priv_offset, max_priv_data_size); 2328 if (ret) 2329 goto exit; 2330 break; 2331 case KFD_CRIU_OBJECT_TYPE_SVM_RANGE: 2332 ret = kfd_criu_restore_svm(p, (uint8_t __user *)args->priv_data, 2333 priv_offset, max_priv_data_size); 2334 if (ret) 2335 goto exit; 2336 break; 2337 default: 2338 pr_err("Invalid object type:%u at index:%d\n", object_type, i); 2339 ret = -EINVAL; 2340 goto exit; 2341 } 2342 } 2343 exit: 2344 return ret; 2345 } 2346 2347 static int criu_restore(struct file *filep, 2348 struct kfd_process *p, 2349 struct kfd_ioctl_criu_args *args) 2350 { 2351 uint64_t priv_offset = 0; 2352 int ret = 0; 2353 2354 pr_debug("CRIU restore (num_devices:%u num_bos:%u num_objects:%u priv_data_size:%llu)\n", 2355 args->num_devices, args->num_bos, args->num_objects, args->priv_data_size); 2356 2357 if (!args->bos || !args->devices || !args->priv_data || !args->priv_data_size || 2358 !args->num_devices || !args->num_bos) 2359 return -EINVAL; 2360 2361 mutex_lock(&p->mutex); 2362 2363 /* 2364 * Set the process to evicted state to avoid running any new queues before all the memory 2365 * mappings are ready. 2366 */ 2367 ret = kfd_process_evict_queues(p); 2368 if (ret) 2369 goto exit_unlock; 2370 2371 /* Each function will adjust priv_offset based on how many bytes they consumed */ 2372 ret = criu_restore_process(p, args, &priv_offset, args->priv_data_size); 2373 if (ret) 2374 goto exit_unlock; 2375 2376 ret = criu_restore_devices(p, args, &priv_offset, args->priv_data_size); 2377 if (ret) 2378 goto exit_unlock; 2379 2380 ret = criu_restore_bos(p, args, &priv_offset, args->priv_data_size); 2381 if (ret) 2382 goto exit_unlock; 2383 2384 ret = criu_restore_objects(filep, p, args, &priv_offset, args->priv_data_size); 2385 if (ret) 2386 goto exit_unlock; 2387 2388 if (priv_offset != args->priv_data_size) { 2389 pr_err("Invalid private data size\n"); 2390 ret = -EINVAL; 2391 } 2392 2393 exit_unlock: 2394 mutex_unlock(&p->mutex); 2395 if (ret) 2396 pr_err("Failed to restore CRIU ret:%d\n", ret); 2397 else 2398 pr_debug("CRIU restore successful\n"); 2399 2400 return ret; 2401 } 2402 2403 static int criu_unpause(struct file *filep, 2404 struct kfd_process *p, 2405 struct kfd_ioctl_criu_args *args) 2406 { 2407 int ret; 2408 2409 mutex_lock(&p->mutex); 2410 2411 if (!p->queues_paused) { 2412 mutex_unlock(&p->mutex); 2413 return -EINVAL; 2414 } 2415 2416 ret = kfd_process_restore_queues(p); 2417 if (ret) 2418 pr_err("Failed to unpause queues ret:%d\n", ret); 2419 else 2420 p->queues_paused = false; 2421 2422 mutex_unlock(&p->mutex); 2423 2424 return ret; 2425 } 2426 2427 static int criu_resume(struct file *filep, 2428 struct kfd_process *p, 2429 struct kfd_ioctl_criu_args *args) 2430 { 2431 struct kfd_process *target = NULL; 2432 struct pid *pid = NULL; 2433 int ret = 0; 2434 2435 pr_debug("Inside %s, target pid for criu restore: %d\n", __func__, 2436 args->pid); 2437 2438 pid = find_get_pid(args->pid); 2439 if (!pid) { 2440 pr_err("Cannot find pid info for %i\n", args->pid); 2441 return -ESRCH; 2442 } 2443 2444 pr_debug("calling kfd_lookup_process_by_pid\n"); 2445 target = kfd_lookup_process_by_pid(pid); 2446 2447 put_pid(pid); 2448 2449 if (!target) { 2450 pr_debug("Cannot find process info for %i\n", args->pid); 2451 return -ESRCH; 2452 } 2453 2454 mutex_lock(&target->mutex); 2455 ret = kfd_criu_resume_svm(target); 2456 if (ret) { 2457 pr_err("kfd_criu_resume_svm failed for %i\n", args->pid); 2458 goto exit; 2459 } 2460 2461 ret = amdgpu_amdkfd_criu_resume(target->kgd_process_info); 2462 if (ret) 2463 pr_err("amdgpu_amdkfd_criu_resume failed for %i\n", args->pid); 2464 2465 exit: 2466 mutex_unlock(&target->mutex); 2467 2468 kfd_unref_process(target); 2469 return ret; 2470 } 2471 2472 static int criu_process_info(struct file *filep, 2473 struct kfd_process *p, 2474 struct kfd_ioctl_criu_args *args) 2475 { 2476 int ret = 0; 2477 2478 mutex_lock(&p->mutex); 2479 2480 if (!p->n_pdds) { 2481 pr_err("No pdd for given process\n"); 2482 ret = -ENODEV; 2483 goto err_unlock; 2484 } 2485 2486 ret = kfd_process_evict_queues(p); 2487 if (ret) 2488 goto err_unlock; 2489 2490 p->queues_paused = true; 2491 2492 args->pid = task_pid_nr_ns(p->lead_thread, 2493 task_active_pid_ns(p->lead_thread)); 2494 2495 ret = criu_get_process_object_info(p, &args->num_devices, &args->num_bos, 2496 &args->num_objects, &args->priv_data_size); 2497 if (ret) 2498 goto err_unlock; 2499 2500 dev_dbg(kfd_device, "Num of devices:%u bos:%u objects:%u priv_data_size:%lld\n", 2501 args->num_devices, args->num_bos, args->num_objects, 2502 args->priv_data_size); 2503 2504 err_unlock: 2505 if (ret) { 2506 kfd_process_restore_queues(p); 2507 p->queues_paused = false; 2508 } 2509 mutex_unlock(&p->mutex); 2510 return ret; 2511 } 2512 2513 static int kfd_ioctl_criu(struct file *filep, struct kfd_process *p, void *data) 2514 { 2515 struct kfd_ioctl_criu_args *args = data; 2516 int ret; 2517 2518 dev_dbg(kfd_device, "CRIU operation: %d\n", args->op); 2519 switch (args->op) { 2520 case KFD_CRIU_OP_PROCESS_INFO: 2521 ret = criu_process_info(filep, p, args); 2522 break; 2523 case KFD_CRIU_OP_CHECKPOINT: 2524 ret = criu_checkpoint(filep, p, args); 2525 break; 2526 case KFD_CRIU_OP_UNPAUSE: 2527 ret = criu_unpause(filep, p, args); 2528 break; 2529 case KFD_CRIU_OP_RESTORE: 2530 ret = criu_restore(filep, p, args); 2531 break; 2532 case KFD_CRIU_OP_RESUME: 2533 ret = criu_resume(filep, p, args); 2534 break; 2535 default: 2536 dev_dbg(kfd_device, "Unsupported CRIU operation:%d\n", args->op); 2537 ret = -EINVAL; 2538 break; 2539 } 2540 2541 if (ret) 2542 dev_dbg(kfd_device, "CRIU operation:%d err:%d\n", args->op, ret); 2543 2544 return ret; 2545 } 2546 2547 #define AMDKFD_IOCTL_DEF(ioctl, _func, _flags) \ 2548 [_IOC_NR(ioctl)] = {.cmd = ioctl, .func = _func, .flags = _flags, \ 2549 .cmd_drv = 0, .name = #ioctl} 2550 2551 /** Ioctl table */ 2552 static const struct amdkfd_ioctl_desc amdkfd_ioctls[] = { 2553 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_VERSION, 2554 kfd_ioctl_get_version, 0), 2555 2556 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_QUEUE, 2557 kfd_ioctl_create_queue, 0), 2558 2559 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DESTROY_QUEUE, 2560 kfd_ioctl_destroy_queue, 0), 2561 2562 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_MEMORY_POLICY, 2563 kfd_ioctl_set_memory_policy, 0), 2564 2565 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_CLOCK_COUNTERS, 2566 kfd_ioctl_get_clock_counters, 0), 2567 2568 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_PROCESS_APERTURES, 2569 kfd_ioctl_get_process_apertures, 0), 2570 2571 AMDKFD_IOCTL_DEF(AMDKFD_IOC_UPDATE_QUEUE, 2572 kfd_ioctl_update_queue, 0), 2573 2574 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_EVENT, 2575 kfd_ioctl_create_event, 0), 2576 2577 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DESTROY_EVENT, 2578 kfd_ioctl_destroy_event, 0), 2579 2580 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_EVENT, 2581 kfd_ioctl_set_event, 0), 2582 2583 AMDKFD_IOCTL_DEF(AMDKFD_IOC_RESET_EVENT, 2584 kfd_ioctl_reset_event, 0), 2585 2586 AMDKFD_IOCTL_DEF(AMDKFD_IOC_WAIT_EVENTS, 2587 kfd_ioctl_wait_events, 0), 2588 2589 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_REGISTER_DEPRECATED, 2590 kfd_ioctl_dbg_register, 0), 2591 2592 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_UNREGISTER_DEPRECATED, 2593 kfd_ioctl_dbg_unregister, 0), 2594 2595 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_ADDRESS_WATCH_DEPRECATED, 2596 kfd_ioctl_dbg_address_watch, 0), 2597 2598 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_WAVE_CONTROL_DEPRECATED, 2599 kfd_ioctl_dbg_wave_control, 0), 2600 2601 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_SCRATCH_BACKING_VA, 2602 kfd_ioctl_set_scratch_backing_va, 0), 2603 2604 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_TILE_CONFIG, 2605 kfd_ioctl_get_tile_config, 0), 2606 2607 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_TRAP_HANDLER, 2608 kfd_ioctl_set_trap_handler, 0), 2609 2610 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_PROCESS_APERTURES_NEW, 2611 kfd_ioctl_get_process_apertures_new, 0), 2612 2613 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ACQUIRE_VM, 2614 kfd_ioctl_acquire_vm, 0), 2615 2616 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_MEMORY_OF_GPU, 2617 kfd_ioctl_alloc_memory_of_gpu, 0), 2618 2619 AMDKFD_IOCTL_DEF(AMDKFD_IOC_FREE_MEMORY_OF_GPU, 2620 kfd_ioctl_free_memory_of_gpu, 0), 2621 2622 AMDKFD_IOCTL_DEF(AMDKFD_IOC_MAP_MEMORY_TO_GPU, 2623 kfd_ioctl_map_memory_to_gpu, 0), 2624 2625 AMDKFD_IOCTL_DEF(AMDKFD_IOC_UNMAP_MEMORY_FROM_GPU, 2626 kfd_ioctl_unmap_memory_from_gpu, 0), 2627 2628 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_CU_MASK, 2629 kfd_ioctl_set_cu_mask, 0), 2630 2631 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_QUEUE_WAVE_STATE, 2632 kfd_ioctl_get_queue_wave_state, 0), 2633 2634 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_DMABUF_INFO, 2635 kfd_ioctl_get_dmabuf_info, 0), 2636 2637 AMDKFD_IOCTL_DEF(AMDKFD_IOC_IMPORT_DMABUF, 2638 kfd_ioctl_import_dmabuf, 0), 2639 2640 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_QUEUE_GWS, 2641 kfd_ioctl_alloc_queue_gws, 0), 2642 2643 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SMI_EVENTS, 2644 kfd_ioctl_smi_events, 0), 2645 2646 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SVM, kfd_ioctl_svm, 0), 2647 2648 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_XNACK_MODE, 2649 kfd_ioctl_set_xnack_mode, 0), 2650 2651 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CRIU_OP, 2652 kfd_ioctl_criu, KFD_IOC_FLAG_CHECKPOINT_RESTORE), 2653 2654 }; 2655 2656 #define AMDKFD_CORE_IOCTL_COUNT ARRAY_SIZE(amdkfd_ioctls) 2657 2658 static long kfd_ioctl(struct file *filep, unsigned int cmd, unsigned long arg) 2659 { 2660 struct kfd_process *process; 2661 amdkfd_ioctl_t *func; 2662 const struct amdkfd_ioctl_desc *ioctl = NULL; 2663 unsigned int nr = _IOC_NR(cmd); 2664 char stack_kdata[128]; 2665 char *kdata = NULL; 2666 unsigned int usize, asize; 2667 int retcode = -EINVAL; 2668 bool ptrace_attached = false; 2669 2670 if (nr >= AMDKFD_CORE_IOCTL_COUNT) 2671 goto err_i1; 2672 2673 if ((nr >= AMDKFD_COMMAND_START) && (nr < AMDKFD_COMMAND_END)) { 2674 u32 amdkfd_size; 2675 2676 ioctl = &amdkfd_ioctls[nr]; 2677 2678 amdkfd_size = _IOC_SIZE(ioctl->cmd); 2679 usize = asize = _IOC_SIZE(cmd); 2680 if (amdkfd_size > asize) 2681 asize = amdkfd_size; 2682 2683 cmd = ioctl->cmd; 2684 } else 2685 goto err_i1; 2686 2687 dev_dbg(kfd_device, "ioctl cmd 0x%x (#0x%x), arg 0x%lx\n", cmd, nr, arg); 2688 2689 /* Get the process struct from the filep. Only the process 2690 * that opened /dev/kfd can use the file descriptor. Child 2691 * processes need to create their own KFD device context. 2692 */ 2693 process = filep->private_data; 2694 2695 rcu_read_lock(); 2696 if ((ioctl->flags & KFD_IOC_FLAG_CHECKPOINT_RESTORE) && 2697 ptrace_parent(process->lead_thread) == current) 2698 ptrace_attached = true; 2699 rcu_read_unlock(); 2700 2701 if (process->lead_thread != current->group_leader 2702 && !ptrace_attached) { 2703 dev_dbg(kfd_device, "Using KFD FD in wrong process\n"); 2704 retcode = -EBADF; 2705 goto err_i1; 2706 } 2707 2708 /* Do not trust userspace, use our own definition */ 2709 func = ioctl->func; 2710 2711 if (unlikely(!func)) { 2712 dev_dbg(kfd_device, "no function\n"); 2713 retcode = -EINVAL; 2714 goto err_i1; 2715 } 2716 2717 /* 2718 * Versions of docker shipped in Ubuntu 18.xx and 20.xx do not support 2719 * CAP_CHECKPOINT_RESTORE, so we also allow access if CAP_SYS_ADMIN as CAP_SYS_ADMIN is a 2720 * more priviledged access. 2721 */ 2722 if (unlikely(ioctl->flags & KFD_IOC_FLAG_CHECKPOINT_RESTORE)) { 2723 if (!capable(CAP_CHECKPOINT_RESTORE) && 2724 !capable(CAP_SYS_ADMIN)) { 2725 retcode = -EACCES; 2726 goto err_i1; 2727 } 2728 } 2729 2730 if (cmd & (IOC_IN | IOC_OUT)) { 2731 if (asize <= sizeof(stack_kdata)) { 2732 kdata = stack_kdata; 2733 } else { 2734 kdata = kmalloc(asize, GFP_KERNEL); 2735 if (!kdata) { 2736 retcode = -ENOMEM; 2737 goto err_i1; 2738 } 2739 } 2740 if (asize > usize) 2741 memset(kdata + usize, 0, asize - usize); 2742 } 2743 2744 if (cmd & IOC_IN) { 2745 if (copy_from_user(kdata, (void __user *)arg, usize) != 0) { 2746 retcode = -EFAULT; 2747 goto err_i1; 2748 } 2749 } else if (cmd & IOC_OUT) { 2750 memset(kdata, 0, usize); 2751 } 2752 2753 retcode = func(filep, process, kdata); 2754 2755 if (cmd & IOC_OUT) 2756 if (copy_to_user((void __user *)arg, kdata, usize) != 0) 2757 retcode = -EFAULT; 2758 2759 err_i1: 2760 if (!ioctl) 2761 dev_dbg(kfd_device, "invalid ioctl: pid=%d, cmd=0x%02x, nr=0x%02x\n", 2762 task_pid_nr(current), cmd, nr); 2763 2764 if (kdata != stack_kdata) 2765 kfree(kdata); 2766 2767 if (retcode) 2768 dev_dbg(kfd_device, "ioctl cmd (#0x%x), arg 0x%lx, ret = %d\n", 2769 nr, arg, retcode); 2770 2771 return retcode; 2772 } 2773 2774 static int kfd_mmio_mmap(struct kfd_dev *dev, struct kfd_process *process, 2775 struct vm_area_struct *vma) 2776 { 2777 phys_addr_t address; 2778 int ret; 2779 2780 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 2781 return -EINVAL; 2782 2783 address = dev->adev->rmmio_remap.bus_addr; 2784 2785 vma->vm_flags |= VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_NORESERVE | 2786 VM_DONTDUMP | VM_PFNMAP; 2787 2788 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 2789 2790 pr_debug("pasid 0x%x mapping mmio page\n" 2791 " target user address == 0x%08llX\n" 2792 " physical address == 0x%08llX\n" 2793 " vm_flags == 0x%04lX\n" 2794 " size == 0x%04lX\n", 2795 process->pasid, (unsigned long long) vma->vm_start, 2796 address, vma->vm_flags, PAGE_SIZE); 2797 2798 ret = io_remap_pfn_range(vma, 2799 vma->vm_start, 2800 address >> PAGE_SHIFT, 2801 PAGE_SIZE, 2802 vma->vm_page_prot); 2803 return ret; 2804 } 2805 2806 2807 static int kfd_mmap(struct file *filp, struct vm_area_struct *vma) 2808 { 2809 struct kfd_process *process; 2810 struct kfd_dev *dev = NULL; 2811 unsigned long mmap_offset; 2812 unsigned int gpu_id; 2813 2814 process = kfd_get_process(current); 2815 if (IS_ERR(process)) 2816 return PTR_ERR(process); 2817 2818 mmap_offset = vma->vm_pgoff << PAGE_SHIFT; 2819 gpu_id = KFD_MMAP_GET_GPU_ID(mmap_offset); 2820 if (gpu_id) 2821 dev = kfd_device_by_id(gpu_id); 2822 2823 switch (mmap_offset & KFD_MMAP_TYPE_MASK) { 2824 case KFD_MMAP_TYPE_DOORBELL: 2825 if (!dev) 2826 return -ENODEV; 2827 return kfd_doorbell_mmap(dev, process, vma); 2828 2829 case KFD_MMAP_TYPE_EVENTS: 2830 return kfd_event_mmap(process, vma); 2831 2832 case KFD_MMAP_TYPE_RESERVED_MEM: 2833 if (!dev) 2834 return -ENODEV; 2835 return kfd_reserved_mem_mmap(dev, process, vma); 2836 case KFD_MMAP_TYPE_MMIO: 2837 if (!dev) 2838 return -ENODEV; 2839 return kfd_mmio_mmap(dev, process, vma); 2840 } 2841 2842 return -EFAULT; 2843 } 2844