1a944c127SJinzhou Su /* 2a944c127SJinzhou Su * Copyright 2019 Advanced Micro Devices, Inc. 3a944c127SJinzhou Su * 4a944c127SJinzhou Su * Permission is hereby granted, free of charge, to any person obtaining a 5a944c127SJinzhou Su * copy of this software and associated documentation files (the "Software"), 6a944c127SJinzhou Su * to deal in the Software without restriction, including without limitation 7a944c127SJinzhou Su * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8a944c127SJinzhou Su * and/or sell copies of the Software, and to permit persons to whom the 9a944c127SJinzhou Su * Software is furnished to do so, subject to the following conditions: 10a944c127SJinzhou Su * 11a944c127SJinzhou Su * The above copyright notice and this permission notice shall be included in 12a944c127SJinzhou Su * all copies or substantial portions of the Software. 13a944c127SJinzhou Su * 14a944c127SJinzhou Su * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15a944c127SJinzhou Su * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16a944c127SJinzhou Su * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17a944c127SJinzhou Su * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18a944c127SJinzhou Su * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19a944c127SJinzhou Su * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20a944c127SJinzhou Su * OTHER DEALINGS IN THE SOFTWARE. 21a944c127SJinzhou Su * 22a944c127SJinzhou Su */ 23a944c127SJinzhou Su 24a944c127SJinzhou Su #ifndef _TA_SECUREDISPLAY_IF_H 25a944c127SJinzhou Su #define _TA_SECUREDISPLAY_IF_H 26a944c127SJinzhou Su 27a944c127SJinzhou Su /** Secure Display related enumerations */ 28a944c127SJinzhou Su /**********************************************************/ 29a944c127SJinzhou Su 30a944c127SJinzhou Su /** @enum ta_securedisplay_command 31a944c127SJinzhou Su * Secure Display Command ID 32a944c127SJinzhou Su */ 33a944c127SJinzhou Su enum ta_securedisplay_command { 34a944c127SJinzhou Su /* Query whether TA is responding used only for validation purpose */ 35a944c127SJinzhou Su TA_SECUREDISPLAY_COMMAND__QUERY_TA = 1, 36a944c127SJinzhou Su /* Send region of Interest and CRC value to I2C */ 37a944c127SJinzhou Su TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC = 2, 38a944c127SJinzhou Su /* Maximum Command ID */ 39a944c127SJinzhou Su TA_SECUREDISPLAY_COMMAND__MAX_ID = 0x7FFFFFFF, 40a944c127SJinzhou Su }; 41a944c127SJinzhou Su 42a944c127SJinzhou Su /** @enum ta_securedisplay_status 43a944c127SJinzhou Su * Secure Display status returns in shared buffer status 44a944c127SJinzhou Su */ 45a944c127SJinzhou Su enum ta_securedisplay_status { 46a944c127SJinzhou Su TA_SECUREDISPLAY_STATUS__SUCCESS = 0x00, /* Success */ 47a944c127SJinzhou Su TA_SECUREDISPLAY_STATUS__GENERIC_FAILURE = 0x01, /* Generic Failure */ 48a944c127SJinzhou Su TA_SECUREDISPLAY_STATUS__INVALID_PARAMETER = 0x02, /* Invalid Parameter */ 49a944c127SJinzhou Su TA_SECUREDISPLAY_STATUS__NULL_POINTER = 0x03, /* Null Pointer*/ 50a944c127SJinzhou Su TA_SECUREDISPLAY_STATUS__I2C_WRITE_ERROR = 0x04, /* Fail to Write to I2C */ 51a944c127SJinzhou Su TA_SECUREDISPLAY_STATUS__READ_DIO_SCRATCH_ERROR = 0x05, /*Fail Read DIO Scratch Register*/ 52a944c127SJinzhou Su TA_SECUREDISPLAY_STATUS__READ_CRC_ERROR = 0x06, /* Fail to Read CRC*/ 531c7b0adaSJinzhou Su TA_SECUREDISPLAY_STATUS__I2C_INIT_ERROR = 0x07, /* Failed to initialize I2C */ 54a944c127SJinzhou Su 55a944c127SJinzhou Su TA_SECUREDISPLAY_STATUS__MAX = 0x7FFFFFFF,/* Maximum Value for status*/ 56a944c127SJinzhou Su }; 57a944c127SJinzhou Su 58*f6e856e7SAaron Liu /** @enum ta_securedisplay_phy_ID 59a944c127SJinzhou Su * Physical ID number to use for reading corresponding DIO Scratch register for ROI 60a944c127SJinzhou Su */ 61*f6e856e7SAaron Liu enum ta_securedisplay_phy_ID { 62a944c127SJinzhou Su TA_SECUREDISPLAY_PHY0 = 0, 63a944c127SJinzhou Su TA_SECUREDISPLAY_PHY1 = 1, 64a944c127SJinzhou Su TA_SECUREDISPLAY_PHY2 = 2, 65a944c127SJinzhou Su TA_SECUREDISPLAY_PHY3 = 3, 66a944c127SJinzhou Su TA_SECUREDISPLAY_MAX_PHY = 4, 67a944c127SJinzhou Su }; 68a944c127SJinzhou Su 69a944c127SJinzhou Su /** @enum ta_securedisplay_ta_query_cmd_ret 70a944c127SJinzhou Su * A predefined specific reteurn value which is 0xAB only used to validate 71a944c127SJinzhou Su * communication to Secure Display TA is functional. 72a944c127SJinzhou Su * This value is used to validate whether TA is responding successfully 73a944c127SJinzhou Su */ 74a944c127SJinzhou Su enum ta_securedisplay_ta_query_cmd_ret { 75a944c127SJinzhou Su /* This is a value to validate if TA is loaded successfully */ 76a944c127SJinzhou Su TA_SECUREDISPLAY_QUERY_CMD_RET = 0xAB, 77a944c127SJinzhou Su }; 78a944c127SJinzhou Su 79a944c127SJinzhou Su /** @enum ta_securedisplay_buffer_size 80a944c127SJinzhou Su * I2C Buffer size which contains 8 bytes of ROI (X start, X end, Y start, Y end) 81a944c127SJinzhou Su * and 6 bytes of CRC( R,G,B) and 1 byte for physical ID 82a944c127SJinzhou Su */ 83a944c127SJinzhou Su enum ta_securedisplay_buffer_size { 84a944c127SJinzhou Su /* 15 bytes = 8 byte (ROI) + 6 byte(CRC) + 1 byte(phy_id) */ 85a944c127SJinzhou Su TA_SECUREDISPLAY_I2C_BUFFER_SIZE = 15, 86a944c127SJinzhou Su }; 87a944c127SJinzhou Su 88a944c127SJinzhou Su /** Input/output structures for Secure Display commands */ 89a944c127SJinzhou Su /**********************************************************/ 90a944c127SJinzhou Su /** 91a944c127SJinzhou Su * Input structures 92a944c127SJinzhou Su */ 93a944c127SJinzhou Su 94a944c127SJinzhou Su /** @struct ta_securedisplay_send_roi_crc_input 95a944c127SJinzhou Su * Physical ID to determine which DIO scratch register should be used to get ROI 96a944c127SJinzhou Su */ 97a944c127SJinzhou Su struct ta_securedisplay_send_roi_crc_input { 98a944c127SJinzhou Su uint32_t phy_id; /* Physical ID */ 99a944c127SJinzhou Su }; 100a944c127SJinzhou Su 101a944c127SJinzhou Su /** @union ta_securedisplay_cmd_input 102a944c127SJinzhou Su * Input buffer 103a944c127SJinzhou Su */ 104a944c127SJinzhou Su union ta_securedisplay_cmd_input { 105a944c127SJinzhou Su /* send ROI and CRC input buffer format */ 106a944c127SJinzhou Su struct ta_securedisplay_send_roi_crc_input send_roi_crc; 107a944c127SJinzhou Su uint32_t reserved[4]; 108a944c127SJinzhou Su }; 109a944c127SJinzhou Su 110a944c127SJinzhou Su /** 111a944c127SJinzhou Su * Output structures 112a944c127SJinzhou Su */ 113a944c127SJinzhou Su 114a944c127SJinzhou Su /** @struct ta_securedisplay_query_ta_output 115a944c127SJinzhou Su * Output buffer format for query TA whether TA is responding used only for validation purpose 116a944c127SJinzhou Su */ 117a944c127SJinzhou Su struct ta_securedisplay_query_ta_output { 118a944c127SJinzhou Su /* return value from TA when it is queried for validation purpose only */ 119a944c127SJinzhou Su uint32_t query_cmd_ret; 120a944c127SJinzhou Su }; 121a944c127SJinzhou Su 122a944c127SJinzhou Su /** @struct ta_securedisplay_send_roi_crc_output 123a944c127SJinzhou Su * Output buffer format for send ROI CRC command which will pass I2c buffer created inside TA 124a944c127SJinzhou Su * and used to write to I2C used only for validation purpose 125a944c127SJinzhou Su */ 126a944c127SJinzhou Su struct ta_securedisplay_send_roi_crc_output { 127a944c127SJinzhou Su uint8_t i2c_buf[TA_SECUREDISPLAY_I2C_BUFFER_SIZE]; /* I2C buffer */ 128a944c127SJinzhou Su uint8_t reserved; 129a944c127SJinzhou Su }; 130a944c127SJinzhou Su 131a944c127SJinzhou Su /** @union ta_securedisplay_cmd_output 132a944c127SJinzhou Su * Output buffer 133a944c127SJinzhou Su */ 134a944c127SJinzhou Su union ta_securedisplay_cmd_output { 135a944c127SJinzhou Su /* Query TA output buffer format used only for validation purpose*/ 136a944c127SJinzhou Su struct ta_securedisplay_query_ta_output query_ta; 137a944c127SJinzhou Su /* Send ROI CRC output buffer format used only for validation purpose */ 138a944c127SJinzhou Su struct ta_securedisplay_send_roi_crc_output send_roi_crc; 139a944c127SJinzhou Su uint32_t reserved[4]; 140a944c127SJinzhou Su }; 141a944c127SJinzhou Su 142*f6e856e7SAaron Liu /** @struct ta_securedisplay_cmd 143*f6e856e7SAaron Liu * Secure display command which is shared buffer memory 144a944c127SJinzhou Su */ 145*f6e856e7SAaron Liu struct ta_securedisplay_cmd { 146*f6e856e7SAaron Liu uint32_t cmd_id; /**< +0 Bytes Command ID */ 147*f6e856e7SAaron Liu enum ta_securedisplay_status status; /**< +4 Bytes Status code returned by the secure display TA */ 148*f6e856e7SAaron Liu uint32_t reserved[2]; /**< +8 Bytes Reserved */ 149*f6e856e7SAaron Liu union ta_securedisplay_cmd_input securedisplay_in_message; /**< +16 Bytes Command input buffer */ 150*f6e856e7SAaron Liu union ta_securedisplay_cmd_output securedisplay_out_message; /**< +32 Bytes Command output buffer */ 151a944c127SJinzhou Su /**@note Total 48 Bytes */ 152a944c127SJinzhou Su }; 153a944c127SJinzhou Su 154a944c127SJinzhou Su #endif //_TA_SECUREDISPLAY_IF_H 155a944c127SJinzhou Su 156