1 /* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Author: Huang Rui 23 * 24 */ 25 #ifndef __PSP_V10_0_H__ 26 #define __PSP_V10_0_H__ 27 28 #include "amdgpu_psp.h" 29 30 extern int psp_v10_0_init_microcode(struct psp_context *psp); 31 extern int psp_v10_0_prep_cmd_buf(struct amdgpu_firmware_info *ucode, 32 struct psp_gfx_cmd_resp *cmd); 33 extern int psp_v10_0_ring_init(struct psp_context *psp, 34 enum psp_ring_type ring_type); 35 extern int psp_v10_0_ring_create(struct psp_context *psp, 36 enum psp_ring_type ring_type); 37 extern int psp_v10_0_ring_stop(struct psp_context *psp, 38 enum psp_ring_type ring_type); 39 extern int psp_v10_0_ring_destroy(struct psp_context *psp, 40 enum psp_ring_type ring_type); 41 extern int psp_v10_0_cmd_submit(struct psp_context *psp, 42 struct amdgpu_firmware_info *ucode, 43 uint64_t cmd_buf_mc_addr, uint64_t fence_mc_addr, 44 int index); 45 extern bool psp_v10_0_compare_sram_data(struct psp_context *psp, 46 struct amdgpu_firmware_info *ucode, 47 enum AMDGPU_UCODE_ID ucode_type); 48 49 extern int psp_v10_0_mode1_reset(struct psp_context *psp); 50 #endif 51