1c1d83da9SJunwei Zhang /* 2c1d83da9SJunwei Zhang * Copyright 2016 Advanced Micro Devices, Inc. 3c1d83da9SJunwei Zhang * 4c1d83da9SJunwei Zhang * Permission is hereby granted, free of charge, to any person obtaining a 5c1d83da9SJunwei Zhang * copy of this software and associated documentation files (the "Software"), 6c1d83da9SJunwei Zhang * to deal in the Software without restriction, including without limitation 7c1d83da9SJunwei Zhang * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8c1d83da9SJunwei Zhang * and/or sell copies of the Software, and to permit persons to whom the 9c1d83da9SJunwei Zhang * Software is furnished to do so, subject to the following conditions: 10c1d83da9SJunwei Zhang * 11c1d83da9SJunwei Zhang * The above copyright notice and this permission notice shall be included in 12c1d83da9SJunwei Zhang * all copies or substantial portions of the Software. 13c1d83da9SJunwei Zhang * 14c1d83da9SJunwei Zhang * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15c1d83da9SJunwei Zhang * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16c1d83da9SJunwei Zhang * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17c1d83da9SJunwei Zhang * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18c1d83da9SJunwei Zhang * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19c1d83da9SJunwei Zhang * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20c1d83da9SJunwei Zhang * OTHER DEALINGS IN THE SOFTWARE. 21c1d83da9SJunwei Zhang * 22c1d83da9SJunwei Zhang */ 23c1d83da9SJunwei Zhang 24c1d83da9SJunwei Zhang #ifndef __NBIO_V6_1_H__ 25c1d83da9SJunwei Zhang #define __NBIO_V6_1_H__ 26c1d83da9SJunwei Zhang 27c1d83da9SJunwei Zhang #include "soc15_common.h" 28c1d83da9SJunwei Zhang 29c6622f3aSDave Airlie extern const struct nbio_hdp_flush_reg nbio_v6_1_hdp_flush_reg; 30946a4d5bSShaoyun Liu extern const struct amdgpu_nbio_funcs nbio_v6_1_funcs; 31946a4d5bSShaoyun Liu 32c1d83da9SJunwei Zhang int nbio_v6_1_init(struct amdgpu_device *adev); 33c1d83da9SJunwei Zhang u32 nbio_v6_1_get_atombios_scratch_regs(struct amdgpu_device *adev, 34c1d83da9SJunwei Zhang uint32_t idx); 35c1d83da9SJunwei Zhang void nbio_v6_1_set_atombios_scratch_regs(struct amdgpu_device *adev, 36c1d83da9SJunwei Zhang uint32_t idx, uint32_t val); 37c1d83da9SJunwei Zhang void nbio_v6_1_mc_access_enable(struct amdgpu_device *adev, bool enable); 38c1d83da9SJunwei Zhang void nbio_v6_1_hdp_flush(struct amdgpu_device *adev); 39c1d83da9SJunwei Zhang u32 nbio_v6_1_get_memsize(struct amdgpu_device *adev); 40c1d83da9SJunwei Zhang void nbio_v6_1_sdma_doorbell_range(struct amdgpu_device *adev, int instance, 41c1d83da9SJunwei Zhang bool use_doorbell, int doorbell_index); 42c1d83da9SJunwei Zhang void nbio_v6_1_enable_doorbell_aperture(struct amdgpu_device *adev, 43c1d83da9SJunwei Zhang bool enable); 44c1d83da9SJunwei Zhang void nbio_v6_1_enable_doorbell_selfring_aperture(struct amdgpu_device *adev, 45c1d83da9SJunwei Zhang bool enable); 46c1d83da9SJunwei Zhang void nbio_v6_1_ih_doorbell_range(struct amdgpu_device *adev, 47c1d83da9SJunwei Zhang bool use_doorbell, int doorbell_index); 48c1d83da9SJunwei Zhang void nbio_v6_1_ih_control(struct amdgpu_device *adev); 49c1d83da9SJunwei Zhang u32 nbio_v6_1_get_rev_id(struct amdgpu_device *adev); 50c1d83da9SJunwei Zhang void nbio_v6_1_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable); 51c1d83da9SJunwei Zhang void nbio_v6_1_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable); 52e96487a6SHuang Rui void nbio_v6_1_get_clockgating_state(struct amdgpu_device *adev, u32 *flags); 531b922423SXiangliang Yu void nbio_v6_1_detect_hw_virt(struct amdgpu_device *adev); 5412097c6dSAlex Deucher void nbio_v6_1_init_registers(struct amdgpu_device *adev); 55c1d83da9SJunwei Zhang 56c1d83da9SJunwei Zhang #endif 57