xref: /openbmc/linux/drivers/gpu/drm/amd/amdgpu/mmsch_v1_0.h (revision e5f586c763a079349398e2b0c7c271386193ac34)
1 /*
2  * Copyright 2017 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23 
24 #ifndef __MMSCH_V1_0_H__
25 #define __MMSCH_V1_0_H__
26 
27 #define MMSCH_VERSION_MAJOR	1
28 #define MMSCH_VERSION_MINOR	0
29 #define MMSCH_VERSION	(MMSCH_VERSION_MAJOR << 16 | MMSCH_VERSION_MINOR)
30 
31 enum mmsch_v1_0_command_type {
32 	MMSCH_COMMAND__DIRECT_REG_WRITE = 0,
33 	MMSCH_COMMAND__DIRECT_REG_POLLING = 2,
34 	MMSCH_COMMAND__DIRECT_REG_READ_MODIFY_WRITE = 3,
35 	MMSCH_COMMAND__INDIRECT_REG_WRITE = 8,
36 	MMSCH_COMMAND__END = 0xf
37 };
38 
39 struct mmsch_v1_0_init_header {
40 	uint32_t version;
41 	uint32_t header_size;
42 	uint32_t vce_init_status;
43 	uint32_t uvd_init_status;
44 	uint32_t vce_table_offset;
45 	uint32_t vce_table_size;
46 	uint32_t uvd_table_offset;
47 	uint32_t uvd_table_size;
48 };
49 
50 struct mmsch_v1_0_cmd_direct_reg_header {
51 	uint32_t reg_offset   : 28;
52 	uint32_t command_type : 4;
53 };
54 
55 struct mmsch_v1_0_cmd_indirect_reg_header {
56 	uint32_t reg_offset    : 20;
57 	uint32_t reg_idx_space : 8;
58 	uint32_t command_type  : 4;
59 };
60 
61 struct mmsch_v1_0_cmd_direct_write {
62 	struct mmsch_v1_0_cmd_direct_reg_header cmd_header;
63 	uint32_t reg_value;
64 };
65 
66 struct mmsch_v1_0_cmd_direct_read_modify_write {
67 	struct mmsch_v1_0_cmd_direct_reg_header cmd_header;
68 	uint32_t write_data;
69 	uint32_t mask_value;
70 };
71 
72 struct mmsch_v1_0_cmd_direct_polling {
73 	struct mmsch_v1_0_cmd_direct_reg_header cmd_header;
74 	uint32_t mask_value;
75 	uint32_t wait_value;
76 };
77 
78 struct mmsch_v1_0_cmd_end {
79 	struct mmsch_v1_0_cmd_direct_reg_header cmd_header;
80 };
81 
82 struct mmsch_v1_0_cmd_indirect_write {
83 	struct mmsch_v1_0_cmd_indirect_reg_header cmd_header;
84 	uint32_t reg_value;
85 };
86 
87 #endif
88